[{"id":1777367,"web_url":"http://patchwork.ozlabs.org/comment/1777367/","msgid":"<ac5b210c-bb8d-d683-d8f5-139c803d6dd8@gmail.com>","list_archive_url":null,"date":"2017-09-29T06:26:22","subject":"Re: [U-Boot] [PATCH v1 5/6] serial: stm32x7: add STM32F4 support","submitter":{"id":13793,"url":"http://patchwork.ozlabs.org/api/people/13793/","name":"Bo Shen","email":"voice.shen@gmail.com"},"content":"Hi Patrice,\n\nOn 09/27/2017 06:44 AM, patrice.chotard@st.com wrote:\n> From: Patrice Chotard <patrice.chotard@st.com>\n> \n> stm32f4 doesn't support FIFO and OVERRUN feature.\n> The enable bit is not at the same location in CR1\n> register than for STM32F7 and STM32H7.\n> \n> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>\n> ---\n>   drivers/serial/Kconfig          | 4 ++--\n>   drivers/serial/serial_stm32x7.c | 1 +\n>   drivers/serial/serial_stm32x7.h | 7 +++++++\n>   3 files changed, 10 insertions(+), 2 deletions(-)\n> \n> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig\n> index 9bf2e26..7c54a49 100644\n> --- a/drivers/serial/Kconfig\n> +++ b/drivers/serial/Kconfig\n> @@ -531,9 +531,9 @@ config STI_ASC_SERIAL\n>   \n>   config STM32X7_SERIAL\n>   \tbool \"STMicroelectronics STM32 SoCs on-chip UART\"\n> -\tdepends on DM_SERIAL && (STM32F7 || STM32H7)\n> +\tdepends on DM_SERIAL && (STM32F4 || STM32F7 || STM32H7)\n>   \thelp\n> -\t  If you have a machine based on a STM32 F7 or H7 SoC you can\n> +\t  If you have a machine based on a STM32 F4, F7 or H7 SoC you can\n>   \t  enable its onboard serial ports, say Y to this option.\n>   \t  If unsure, say N.\n>   \n> diff --git a/drivers/serial/serial_stm32x7.c b/drivers/serial/serial_stm32x7.c\n> index 19697e3..44e8b42 100644\n> --- a/drivers/serial/serial_stm32x7.c\n> +++ b/drivers/serial/serial_stm32x7.c\n> @@ -127,6 +127,7 @@ static int stm32_serial_probe(struct udevice *dev)\n>   \n>   #if CONFIG_IS_ENABLED(OF_CONTROL)\n>   static const struct udevice_id stm32_serial_id[] = {\n> +\t{ .compatible = \"st,stm32-uart\", .data = (ulong)&stm32f4_info},\n\ns/st,stm32-uart/st,stm32f4-uart/ (?)\n\n>   \t{ .compatible = \"st,stm32f7-uart\", .data = (ulong)&stm32f7_info},\n>   \t{ .compatible = \"st,stm32h7-uart\", .data = (ulong)&stm32h7_info},\n>   \t{}\n> diff --git a/drivers/serial/serial_stm32x7.h b/drivers/serial/serial_stm32x7.h\n> index ed8a3ee..b914edf 100644\n> --- a/drivers/serial/serial_stm32x7.h\n> +++ b/drivers/serial/serial_stm32x7.h\n> @@ -27,6 +27,13 @@ struct stm32_uart_info {\n>   \tbool has_fifo;\n>   };\n>   \n> +struct stm32_uart_info stm32f4_info = {\n> +\t.stm32f4 = true,\n> +\t.uart_enable_bit = 13,\n> +\t.has_overrun_disable = false,\n> +\t.has_fifo = false,\n> +};\n> +\n>   struct stm32_uart_info stm32f7_info = {\n>   \t.uart_enable_bit = 0,\n>   \t.stm32f4 = false,\n> \n\nBest Regards,\nBo Shen","headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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Thu, 28 Sep 2017 23:26:24 -0700 (PDT)","from [10.211.55.4] (76-247-182-195.lightspeed.sjcpca.sbcglobal.net.\n\t[76.247.182.195]) by smtp.gmail.com with ESMTPSA id\n\tk109sm1636491otc.5.2017.09.28.23.26.22\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 28 Sep 2017 23:26:22 -0700 (PDT)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=subject:to:references:from:message-id:date:user-agent:mime-version\n\t:in-reply-to:content-language:content-transfer-encoding;\n\tbh=RcwrBKeNpBwcRLO4ywEir2nl2FpTVSKoT3lTbjePhJo=;\n\tb=PRRHW9k8+V/VsdfGFJqfFCvgGFgPGzwBZnnIGJvgRutola8dkGN1PjV+RAYjzL8zJv\n\tlXgG5Ydne2Um46PAFj7PYZleK0eiQ2Ka97bo9YjHVvlRnM6OtEOJOl68J9cbLY+fa7qR\n\tIrSNuTvdNd6SYXMEap1rf/EXxYki19NALHSO709AzKmK5q+Tk5DEgdO64mL8wDiaH4ob\n\tVxLsksEKONMxhDL0bPhitmyxbrlcsam3IpvUKLaRojZ1pDgih673BkKxi7cgZM9l/3Po\n\t495mC5e+Qm8X2y/Qa/k1EgCeiSDN8ADqW/0+qH2CalFFN6v0fwamTxydUFk1W1Gq6X+o\n\tFPyw==","X-Google-DKIM-Signature":"v=1; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<1506519893-16509-6-git-send-email-patrice.chotard@st.com>","Content-Language":"en-US","Subject":"Re: [U-Boot] [PATCH v1 5/6] serial: stm32x7: add STM32F4 support","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion <u-boot.lists.denx.de>","List-Unsubscribe":"<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>","List-Archive":"<http://lists.denx.de/pipermail/u-boot/>","List-Post":"<mailto:u-boot@lists.denx.de>","List-Help":"<mailto:u-boot-request@lists.denx.de?subject=help>","List-Subscribe":"<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>","Content-Transfer-Encoding":"base64","Content-Type":"text/plain; charset=\"utf-8\"; Format=\"flowed\"","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>"}},{"id":1777507,"web_url":"http://patchwork.ozlabs.org/comment/1777507/","msgid":"<01d69606-1587-86be-0653-551127fe2f90@st.com>","list_archive_url":null,"date":"2017-09-29T11:52:30","subject":"Re: [U-Boot] [PATCH v1 5/6] serial: stm32x7: add STM32F4 support","submitter":{"id":63958,"url":"http://patchwork.ozlabs.org/api/people/63958/","name":"Patrice CHOTARD","email":"patrice.chotard@st.com"},"content":"Hi Bo\r\n\r\nOn 09/29/2017 08:26 AM, Bo Shen wrote:\r\n> Hi Patrice,\r\n> \r\n> On 09/27/2017 06:44 AM, patrice.chotard@st.com wrote:\r\n>> From: Patrice Chotard <patrice.chotard@st.com>\r\n>>\r\n>> stm32f4 doesn't support FIFO and OVERRUN feature.\r\n>> The enable bit is not at the same location in CR1\r\n>> register than for STM32F7 and STM32H7.\r\n>>\r\n>> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>\r\n>> ---\r\n>>   drivers/serial/Kconfig          | 4 ++--\r\n>>   drivers/serial/serial_stm32x7.c | 1 +\r\n>>   drivers/serial/serial_stm32x7.h | 7 +++++++\r\n>>   3 files changed, 10 insertions(+), 2 deletions(-)\r\n>>\r\n>> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig\r\n>> index 9bf2e26..7c54a49 100644\r\n>> --- a/drivers/serial/Kconfig\r\n>> +++ b/drivers/serial/Kconfig\r\n>> @@ -531,9 +531,9 @@ config STI_ASC_SERIAL\r\n>>   config STM32X7_SERIAL\r\n>>       bool \"STMicroelectronics STM32 SoCs on-chip UART\"\r\n>> -    depends on DM_SERIAL && (STM32F7 || STM32H7)\r\n>> +    depends on DM_SERIAL && (STM32F4 || STM32F7 || STM32H7)\r\n>>       help\r\n>> -      If you have a machine based on a STM32 F7 or H7 SoC you can\r\n>> +      If you have a machine based on a STM32 F4, F7 or H7 SoC you can\r\n>>         enable its onboard serial ports, say Y to this option.\r\n>>         If unsure, say N.\r\n>> diff --git a/drivers/serial/serial_stm32x7.c \r\n>> b/drivers/serial/serial_stm32x7.c\r\n>> index 19697e3..44e8b42 100644\r\n>> --- a/drivers/serial/serial_stm32x7.c\r\n>> +++ b/drivers/serial/serial_stm32x7.c\r\n>> @@ -127,6 +127,7 @@ static int stm32_serial_probe(struct udevice *dev)\r\n>>   #if CONFIG_IS_ENABLED(OF_CONTROL)\r\n>>   static const struct udevice_id stm32_serial_id[] = {\r\n>> +    { .compatible = \"st,stm32-uart\", .data = (ulong)&stm32f4_info},\r\n> \r\n> s/st,stm32-uart/st,stm32f4-uart/ (?)\r\n\r\nWe use the same DT bindings than kernel one and we want to keep aligned.\r\n\r\nHistorically stm32-uart is dedicated for F4, which was introduced first.\r\nAnd then with introduction of F7 and H7, new compatible string \r\n(stm32f7-uart and stm32h7-uart) was added.\r\n\r\nPatrice\r\n> \r\n>>       { .compatible = \"st,stm32f7-uart\", .data = (ulong)&stm32f7_info},\r\n>>       { .compatible = \"st,stm32h7-uart\", .data = (ulong)&stm32h7_info},\r\n>>       {}\r\n>> diff --git a/drivers/serial/serial_stm32x7.h \r\n>> b/drivers/serial/serial_stm32x7.h\r\n>> index ed8a3ee..b914edf 100644\r\n>> --- a/drivers/serial/serial_stm32x7.h\r\n>> +++ b/drivers/serial/serial_stm32x7.h\r\n>> @@ -27,6 +27,13 @@ struct stm32_uart_info {\r\n>>       bool has_fifo;\r\n>>   };\r\n>> +struct stm32_uart_info stm32f4_info = {\r\n>> +    .stm32f4 = true,\r\n>> +    .uart_enable_bit = 13,\r\n>> +    .has_overrun_disable = false,\r\n>> +    .has_fifo = false,\r\n>> +};\r\n>> +\r\n>>   struct stm32_uart_info stm32f7_info = {\r\n>>       .uart_enable_bit = 0,\r\n>>       .stm32f4 = false,\r\n>>\r\n> \r\n> Best Regards,\r\n> Bo Shen","headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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Fri, 29 Sep 2017 13:52:30 +0200"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0","From":"Patrice CHOTARD <patrice.chotard@st.com>","To":"Bo Shen <voice.shen@gmail.com>, \"u-boot@lists.denx.de\"\n\t<u-boot@lists.denx.de>, \"albert.u.boot@aribaud.net\"\n\t<albert.u.boot@aribaud.net>, \"sjg@chromium.org\" <sjg@chromium.org>,\n\t\"Vikas MANOCHA\" <vikas.manocha@st.com>","Thread-Topic":"[U-Boot] [PATCH v1 5/6] serial: stm32x7: add STM32F4 support","Thread-Index":"AQHTN5bSa+9jv8qaiESOSSxn9wM4X6LLRwcAgABbHoA=","Date":"Fri, 29 Sep 2017 11:52:30 +0000","Message-ID":"<01d69606-1587-86be-0653-551127fe2f90@st.com>","References":"<1506519893-16509-1-git-send-email-patrice.chotard@st.com>\n\t<1506519893-16509-6-git-send-email-patrice.chotard@st.com>\n\t<ac5b210c-bb8d-d683-d8f5-139c803d6dd8@gmail.com>","In-Reply-To":"<ac5b210c-bb8d-d683-d8f5-139c803d6dd8@gmail.com>","Accept-Language":"fr-FR, en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","user-agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","x-ms-exchange-messagesentrepresentingtype":"1","x-ms-exchange-transport-fromentityheader":"Hosted","x-originating-ip":"[10.75.127.49]","Content-ID":"<E72AB81A2EDBB842A3E61C9E60CAA3FB@st.com>","MIME-Version":"1.0","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-29_04:, , signatures=0","Subject":"Re: [U-Boot] [PATCH v1 5/6] serial: stm32x7: add STM32F4 support","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion <u-boot.lists.denx.de>","List-Unsubscribe":"<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>","List-Archive":"<http://lists.denx.de/pipermail/u-boot/>","List-Post":"<mailto:u-boot@lists.denx.de>","List-Help":"<mailto:u-boot-request@lists.denx.de?subject=help>","List-Subscribe":"<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>"}},{"id":1777860,"web_url":"http://patchwork.ozlabs.org/comment/1777860/","msgid":"<c64f031d-5ae4-3666-35f9-e1934bb23d11@gmail.com>","list_archive_url":null,"date":"2017-09-30T04:11:23","subject":"Re: [U-Boot] [PATCH v1 5/6] serial: stm32x7: add STM32F4 support","submitter":{"id":13793,"url":"http://patchwork.ozlabs.org/api/people/13793/","name":"Bo Shen","email":"voice.shen@gmail.com"},"content":"Hi Patrice,\n\nOn 09/29/2017 04:52 AM, Patrice CHOTARD wrote:\n>>> diff --git a/drivers/serial/serial_stm32x7.c\n>>> b/drivers/serial/serial_stm32x7.c\n>>> index 19697e3..44e8b42 100644\n>>> --- a/drivers/serial/serial_stm32x7.c\n>>> +++ b/drivers/serial/serial_stm32x7.c\n>>> @@ -127,6 +127,7 @@ static int stm32_serial_probe(struct udevice *dev)\n>>>    #if CONFIG_IS_ENABLED(OF_CONTROL)\n>>>    static const struct udevice_id stm32_serial_id[] = {\n>>> +    { .compatible = \"st,stm32-uart\", .data = (ulong)&stm32f4_info},\n>> s/st,stm32-uart/st,stm32f4-uart/ (?)\n> We use the same DT bindings than kernel one and we want to keep aligned.\n\nI'd suggest to send a patch to kernel to rename it.\n\n> Historically stm32-uart is dedicated for F4, which was introduced first.\n> And then with introduction of F7 and H7, new compatible string\n> (stm32f7-uart and stm32h7-uart) was added.\n\nIf we have patch in kernel to rename it, then it will be more clear.\n\nBest Regards,\nBo Shen","headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<01d69606-1587-86be-0653-551127fe2f90@st.com>","Content-Language":"en-US","Subject":"Re: [U-Boot] [PATCH v1 5/6] serial: stm32x7: add STM32F4 support","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion <u-boot.lists.denx.de>","List-Unsubscribe":"<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>","List-Archive":"<http://lists.denx.de/pipermail/u-boot/>","List-Post":"<mailto:u-boot@lists.denx.de>","List-Help":"<mailto:u-boot-request@lists.denx.de?subject=help>","List-Subscribe":"<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>","Content-Transfer-Encoding":"base64","Content-Type":"text/plain; charset=\"utf-8\"; Format=\"flowed\"","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>"}},{"id":1783034,"web_url":"http://patchwork.ozlabs.org/comment/1783034/","msgid":"<20171009170115.GL12015@bill-the-cat>","list_archive_url":null,"date":"2017-10-09T17:01:15","subject":"Re: [U-Boot] [U-Boot,v1,5/6] serial: stm32x7: add STM32F4 support","submitter":{"id":65875,"url":"http://patchwork.ozlabs.org/api/people/65875/","name":"Tom Rini","email":"trini@konsulko.com"},"content":"On Wed, Sep 27, 2017 at 03:44:52PM +0200, patrice.chotard@st.com wrote:\n\n> From: Patrice Chotard <patrice.chotard@st.com>\n> \n> stm32f4 doesn't support FIFO and OVERRUN feature.\n> The enable bit is not at the same location in CR1\n> register than for STM32F7 and STM32H7.\n> \n> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>\n\nApplied to u-boot/master, thanks!","headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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