[{"id":1790378,"web_url":"http://patchwork.ozlabs.org/comment/1790378/","msgid":"<20171019104921.GK9005@ulmo>","list_archive_url":null,"date":"2017-10-19T10:49:21","subject":"Re: [PATCH V2 4/4] arm64: tegra: Enable PCIe on Jetson TX2","submitter":{"id":26234,"url":"http://patchwork.ozlabs.org/api/people/26234/","name":"Thierry Reding","email":"thierry.reding@gmail.com"},"content":"On Wed, Sep 27, 2017 at 05:28:37PM +0530, Manikanta Maddireddy wrote:\n> Enable x4 PCIe slot on Jetson TX2.\n> \n> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>\n> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>\n> Tested-by: Mikko Perttunen <mperttunen@nvidia.com>\n> ---\n> V2: No change in this patch\n>  arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 24 ++++++++++++++++++++++++\n>  1 file changed, 24 insertions(+)\n> \n> diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi\n> index cf84d7046ad5..a4d96b2a23b4 100644\n> --- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi\n> +++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi\n> @@ -378,4 +378,28 @@\n>  \t\t\tvin-supply = <&vdd_1v8>;\n>  \t\t};\n>  \t};\n> +\n> +\tpcie@10003000 {\n> +\t\tstatus = \"okay\";\n> +\n> +\t\tdvdd-pex-supply = <&vdd_pex>;\n> +\t\thvdd-pex-pll-supply = <&vdd_1v8>;\n> +\t\thvdd-pex-supply = <&vdd_1v8>;\n> +\t\tvddio-pexctl-aud-supply = <&vdd_1v8>;\n> +\n> +\t\tpci@1,0 {\n> +\t\t\tnvidia,num-lanes = <4>;\n> +\t\t\tstatus = \"okay\";\n> +\t\t};\n> +\n> +\t\tpci@2,0 {\n> +\t\t\tnvidia,num-lanes = <0>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\n> +\t\tpci@3,0 {\n> +\t\t\tnvidia,num-lanes = <1>;\n> +\t\t\tstatus = \"disabled\";\n> +\t\t};\n> +\t};\n\nI moved this to tegra186-p2771-0000.dts because it exposes connectors\nthat are on the carrier board rather than the processor module.\n\nApplied to for-4.15/arm64/dt, thanks.\n\nThierry","headers":{"Return-Path":"<linux-pci-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tThu, 19 Oct 2017 03:49:23 -0700 (PDT)","Date":"Thu, 19 Oct 2017 12:49:21 +0200","From":"Thierry Reding <thierry.reding@gmail.com>","To":"Manikanta Maddireddy <mmaddireddy@nvidia.com>","Cc":"bhelgaas@google.com, jonathanh@nvidia.com,\n\tlinux-tegra@vger.kernel.org, linux-pci@vger.kernel.org,\n\tmperttunen@nvidia.com","Subject":"Re: [PATCH V2 4/4] arm64: tegra: Enable PCIe on Jetson TX2","Message-ID":"<20171019104921.GK9005@ulmo>","References":"<1506513517-25870-1-git-send-email-mmaddireddy@nvidia.com>\n\t<1506513517-25870-5-git-send-email-mmaddireddy@nvidia.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\"; boundary=\"yr6OvWOSyJed8q4v\"","Content-Disposition":"inline","In-Reply-To":"<1506513517-25870-5-git-send-email-mmaddireddy@nvidia.com>","User-Agent":"Mutt/1.9.1 (2017-09-22)","Sender":"linux-pci-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-pci.vger.kernel.org>","X-Mailing-List":"linux-pci@vger.kernel.org"}}]