[{"id":1776211,"web_url":"http://patchwork.ozlabs.org/comment/1776211/","msgid":"<20170927101622.v7odmreccwh7ldg2@flea>","list_archive_url":null,"date":"2017-09-27T10:16:22","subject":"Re: [PATCH v6 06/11] ARM: dts: sunxi: h3/h5: represent the mdio\n\tswitch used by sun8i-h3-emac","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Wed, Sep 27, 2017 at 07:34:09AM +0000, Corentin Labbe wrote:\n> Since dwmac-sun8i could use either an integrated PHY or an external PHY\n> (which could be at same MDIO address), we need to represent this selection\n> by a MDIO switch.\n> \n> Signed-off-by: Corentin Labbe \n> ---\n> arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++++++++++++++++++++++++------\n> 1 file changed, 25 insertions(+), 6 deletions(-)\n> \n> diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi\n> index 3b7d953429a6..a8e9b8f378ba 100644\n> --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi\n> +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi\n> @@ -422,14 +422,33 @@\n> \t\t\t#size-cells = <0>;\n> \t\t\tstatus = \"disabled\";\n> \n> -\t\t\tmdio: mdio {\n> +\t\t\tmdio0: mdio {\n> \t\t\t\t#address-cells = <1>;\n> \t\t\t\t#size-cells = <0>;\n> -\t\t\t\tint_mii_phy: ethernet-phy@1 {\n> -\t\t\t\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n> -\t\t\t\t\treg = <1>;\n> -\t\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> -\t\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> +\t\t\t\tcompatible = \"snps,dwmac-mdio\";\n> +\n> +\t\t\t\tmdio-mux {\n> +\t\t\t\t\tcompatible = \"mdio-mux\";\n> +\t\t\t\t\t#address-cells = <1>;\n> +\t\t\t\t\t#size-cells = <0>;\n\nNewline\n\n> +\t\t\t\t\t/* Only one MDIO is usable at the time */\n> +\t\t\t\t\tinternal_mdio: mdio@1 {\n> +\t\t\t\t\t\treg = <1>;\n> +\t\t\t\t\t\t#address-cells = <1>;\n> +\t\t\t\t\t\t#size-cells = <0>;\n\nNewline\n\n> +\t\t\t\t\t\tint_mii_phy: ethernet-phy@1 {\n> +\t\t\t\t\t\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n> +\t\t\t\t\t\t\treg = <1>;\n> +\t\t\t\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> +\t\t\t\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> +\t\t\t\t\t\t\tphy-is-integrated;\n> +\t\t\t\t\t\t};\n> +\t\t\t\t\t};\n\nNewline\n\n> +\t\t\t\t\tmdio: mdio@2 {\n\nThis is quite confusing. Why not call the label external_mdio?\n\nThanks","headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y2DJH5gWsz9t66\n\tfor ;\n\tWed, 27 Sep 2017 20:16:47 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752682AbdI0KQf (ORCPT );\n\tWed, 27 Sep 2017 06:16:35 -0400","from mail.free-electrons.com ([62.4.15.54]:58132 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752083AbdI0KQe (ORCPT\n\t); Wed, 27 Sep 2017 06:16:34 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 322C220801; Wed, 27 Sep 2017 12:16:32 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 0D0482068F;\n\tWed, 27 Sep 2017 12:16:22 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Wed, 27 Sep 2017 12:16:22 +0200","From":"Maxime Ripard ","To":"Corentin Labbe ","Cc":"robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org,\n\tlinux@armlinux.org.uk, catalin.marinas@arm.com,\n\twill.deacon@arm.com, peppe.cavallaro@st.com,\n\talexandre.torgue@st.com, andrew@lunn.ch, f.fainelli@gmail.com,\n\tfrowand.list@gmail.com, netdev@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com","Subject":"Re: [PATCH v6 06/11] ARM: dts: sunxi: h3/h5: represent the mdio\n\tswitch used by sun8i-h3-emac","Message-ID":"<20170927101622.v7odmreccwh7ldg2@flea>","References":"<20170927073414.17361-1-clabbe.montjoie@gmail.com>\n\t<20170927073414.17361-7-clabbe.montjoie@gmail.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"cn4zez4ijobb7pzg\"","Content-Disposition":"inline","In-Reply-To":"<20170927073414.17361-7-clabbe.montjoie@gmail.com>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"}},{"id":1776364,"web_url":"http://patchwork.ozlabs.org/comment/1776364/","msgid":"<20170927134709.GA14370@Red>","list_archive_url":null,"date":"2017-09-27T13:47:09","subject":"Re: [PATCH v6 06/11] ARM: dts: sunxi: h3/h5: represent the mdio\n\tswitch used by sun8i-h3-emac","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Wed, Sep 27, 2017 at 12:16:22PM +0200, Maxime Ripard wrote:\n> On Wed, Sep 27, 2017 at 07:34:09AM +0000, Corentin Labbe wrote:\n> > Since dwmac-sun8i could use either an integrated PHY or an external PHY\n> > (which could be at same MDIO address), we need to represent this selection\n> > by a MDIO switch.\n> > \n> > Signed-off-by: Corentin Labbe \n> > ---\n> > arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++++++++++++++++++++++++------\n> > 1 file changed, 25 insertions(+), 6 deletions(-)\n> > \n> > diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi\n> > index 3b7d953429a6..a8e9b8f378ba 100644\n> > --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi\n> > +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi\n> > @@ -422,14 +422,33 @@\n> > \t\t\t#size-cells = <0>;\n> > \t\t\tstatus = \"disabled\";\n> > \n> > -\t\t\tmdio: mdio {\n> > +\t\t\tmdio0: mdio {\n> > \t\t\t\t#address-cells = <1>;\n> > \t\t\t\t#size-cells = <0>;\n> > -\t\t\t\tint_mii_phy: ethernet-phy@1 {\n> > -\t\t\t\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n> > -\t\t\t\t\treg = <1>;\n> > -\t\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> > -\t\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> > +\t\t\t\tcompatible = \"snps,dwmac-mdio\";\n> > +\n> > +\t\t\t\tmdio-mux {\n> > +\t\t\t\t\tcompatible = \"mdio-mux\";\n> > +\t\t\t\t\t#address-cells = <1>;\n> > +\t\t\t\t\t#size-cells = <0>;\n> \n> Newline\n> \n> > +\t\t\t\t\t/* Only one MDIO is usable at the time */\n> > +\t\t\t\t\tinternal_mdio: mdio@1 {\n> > +\t\t\t\t\t\treg = <1>;\n> > +\t\t\t\t\t\t#address-cells = <1>;\n> > +\t\t\t\t\t\t#size-cells = <0>;\n> \n> Newline\n> \n> > +\t\t\t\t\t\tint_mii_phy: ethernet-phy@1 {\n> > +\t\t\t\t\t\t\tcompatible = \"ethernet-phy-ieee802.3-c22\";\n> > +\t\t\t\t\t\t\treg = <1>;\n> > +\t\t\t\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> > +\t\t\t\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> > +\t\t\t\t\t\t\tphy-is-integrated;\n> > +\t\t\t\t\t\t};\n> > +\t\t\t\t\t};\n> \n> Newline\n> \n> > +\t\t\t\t\tmdio: mdio@2 {\n> \n> This is quite confusing. Why not call the label external_mdio?\n> \n\nI will do it. (at origin I was not changing it for limiting changes on board with external PHY, but now all DT are reverted, it will be easy)\n\nRegards","headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"VzNUWDo9\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y2JzH57Gsz9tXw\n\tfor ;\n\tWed, 27 Sep 2017 23:47:23 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753215AbdI0NrV (ORCPT );\n\tWed, 27 Sep 2017 09:47:21 -0400","from mail-wr0-f194.google.com ([209.85.128.194]:36479 \"EHLO\n\tmail-wr0-f194.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1753072AbdI0NrS (ORCPT\n\t); Wed, 27 Sep 2017 09:47:18 -0400","by mail-wr0-f194.google.com with SMTP id k10so1744444wrk.3;\n\tWed, 27 Sep 2017 06:47:18 -0700 (PDT)","from Red ([2a01:cb1d:16e:1300:2e56:dcff:fed2:c6d6])\n\tby smtp.googlemail.com with ESMTPSA id\n\tb55sm8099879wrb.11.2017.09.27.06.47.16\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tWed, 27 Sep 2017 06:47:16 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=date:from:to:cc:subject:message-id:references:mime-version\n\t:content-disposition:in-reply-to:user-agent;\n\tbh=3DQ1rD4LElWexKKKueQSd/4ThPr00I+qZ3ENPlxGpKo=;\n\tb=VzNUWDo9PiTmoemJe7MVqz9/NuZckUXOaa32CltC5lGXvxm4IBBSQvgQiwwR9c0tjs\n\txmQmy+rT4Q1KJZJojt4qTeHsSt+JGWdj4fgoXxzYSiUQj99Nx/wtKGTXSMoC0p1xfRz6\n\tCPwOBl9k543tfq8xqwsXYXEa+QtLoZOP96IcbmcDmv9svDcFmr0buOGRPwRNh9a7/xmE\n\tQy6ENFy6d7uJjr14YPrq7kbfusfabY12JE4k2r96LLfduNcTvfaTrdu7E0OkJcqJoT7k\n\tMv2NFA3H24vIct6WM/d/v8PakE7pw9djbcpOp+v7lHcSYbTvIowqKbpSqiUm2rH8PiNc\n\tONLw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=3DQ1rD4LElWexKKKueQSd/4ThPr00I+qZ3ENPlxGpKo=;\n\tb=FmXcPCLEFd2sqzwW9iOPeqg5ENRJjFDyoW8869g0fxMB1N2Ii/CljOS2ADt89/jNLA\n\tsHXXuNkWYFotQtQU7wHWwV9B7vgUipv1biR1lUaVF8AzX321OOYKn+pRw4yoaNr9lnyS\n\t46Tl1GlbjIbB/4PHQmjtwnbXhYAWVRY6MT1M9Fi7kOyRQ/DsJJh2PWkN1txCw1mqPsTp\n\t8rSWtaveaSowgwyW3FSPe6Zwi83eedkMQn4WZyTH5Y6oi2IoaBhgLCJGHzikiqKq5/CO\n\tYRS9shyk4N+akDNRcU8pCk4C3g6mFed9Wnb9f/aVsNHYqmoOOd97qOSKKow9MDk5uAOS\n\t24aQ==","X-Gm-Message-State":"AHPjjUhrR9l6JV48JMHdKIgEvrfCkT3OP7BKtvqJwiFcS+6itm4w/TwA\n\tu62KnjGFLX6EvwYc+ue0Gkc=","X-Google-Smtp-Source":"AOwi7QA+0AiYZ4sMuwU7xA943iSguT1uccmPh1YTfNjb/U7O3ewKUCtc0wcYd3VciZL2SUNz697BCQ==","X-Received":"by 10.223.155.157 with SMTP id d29mr1186535wrc.24.1506520037365; \n\tWed, 27 Sep 2017 06:47:17 -0700 (PDT)","Date":"Wed, 27 Sep 2017 15:47:09 +0200","From":"Corentin Labbe ","To":"Maxime Ripard ","Cc":"robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org,\n\tlinux@armlinux.org.uk, catalin.marinas@arm.com,\n\twill.deacon@arm.com, peppe.cavallaro@st.com,\n\talexandre.torgue@st.com, andrew@lunn.ch, f.fainelli@gmail.com,\n\tfrowand.list@gmail.com, netdev@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com","Subject":"Re: [PATCH v6 06/11] ARM: dts: sunxi: h3/h5: represent the mdio\n\tswitch used by sun8i-h3-emac","Message-ID":"<20170927134709.GA14370@Red>","References":"<20170927073414.17361-1-clabbe.montjoie@gmail.com>\n\t<20170927073414.17361-7-clabbe.montjoie@gmail.com>\n\t<20170927101622.v7odmreccwh7ldg2@flea>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170927101622.v7odmreccwh7ldg2@flea>","User-Agent":"Mutt/1.7.2 (2016-11-26)","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"}}]