[{"id":1775457,"web_url":"http://patchwork.ozlabs.org/comment/1775457/","msgid":"<20170926130108.uibnri32b73elfy6@flea>","list_archive_url":null,"date":"2017-09-26T13:01:08","subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 12:17:13PM +0000, Quentin Schulz wrote:\n> Instead of using a function to retrieve each pin's correct control\n> register, use drv_data within pinctrl_pin_desc to store the ctrl reg.\n> \n> Remove axp20x_gpio_get_reg and replace every occurrence by a get from\n> drv_data.\n\nWhy do you need to do that? This should be explained.\n\nMaxime","headers":{"Return-Path":"<linux-gpio-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1h121wxtz9tXj\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 26 Sep 2017 23:01:42 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S967720AbdIZNBl (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tTue, 26 Sep 2017 09:01:41 -0400","from mail.free-electrons.com ([62.4.15.54]:54097 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S965798AbdIZNBj (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Tue, 26 Sep 2017 09:01:39 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid A8BFC20850; Tue, 26 Sep 2017 15:01:37 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 6EA912095D;\n\tTue, 26 Sep 2017 15:01:07 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 15:01:08 +0200","From":"Maxime Ripard <maxime.ripard@free-electrons.com>","To":"Quentin Schulz <quentin.schulz@free-electrons.com>","Cc":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com","Subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","Message-ID":"<20170926130108.uibnri32b73elfy6@flea>","References":"<cover.1c314f4154a6d27354625f03d0a5269eee55a9c5.1506428208.git-series.quentin.schulz@free-electrons.com>\n\t<7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"xcnhxbzwbfsiulu2\"","Content-Disposition":"inline","In-Reply-To":"<7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-gpio.vger.kernel.org>","X-Mailing-List":"linux-gpio@vger.kernel.org"}},{"id":1775485,"web_url":"http://patchwork.ozlabs.org/comment/1775485/","msgid":"<0ae64e95-ee49-fb4c-e79b-e8c25c86580c@free-electrons.com>","list_archive_url":null,"date":"2017-09-26T13:17:05","subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","submitter":{"id":69366,"url":"http://patchwork.ozlabs.org/api/people/69366/","name":"Quentin Schulz","email":"quentin.schulz@free-electrons.com"},"content":"Hi Maxime,\n\nOn 26/09/2017 15:01, Maxime Ripard wrote:\n> On Tue, Sep 26, 2017 at 12:17:13PM +0000, Quentin Schulz wrote:\n>> Instead of using a function to retrieve each pin's correct control\n>> register, use drv_data within pinctrl_pin_desc to store the ctrl reg.\n>>\n>> Remove axp20x_gpio_get_reg and replace every occurrence by a get from\n>> drv_data.\n> \n> Why do you need to do that? This should be explained.\n> \n\nAgreed that it misses an explanation.\n\nToday, to get a register addr of one of the GPIOs in the PMIC, we\nbasically get the GPIO number and returns the register via this info.\n\nThere are 3 GPIOs in AXP209, 2 in AXP813. I didn't want to have a switch\ncase for the GPIO number and then an if/else inside one of the case to\ncheck if the device is AXP209 or AXP813 in which case we return -EINVAL\ninstead of the GPIO2 reg. With support for new PMIC, we would have a\nbunch of if conditions and complexify the process for something really\nsimple.\n\nIMHO, this also allows easier integration of future PMICs which might\nhave different regs for the GPIOs.\n\nI don't *need* it but I find this solution nicer.\n\nThanks,\nQuentin","headers":{"Return-Path":"<linux-gpio-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1hMD1sQ1z9tXq\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 26 Sep 2017 23:17:28 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1030694AbdIZNR0 (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tTue, 26 Sep 2017 09:17:26 -0400","from mail.free-electrons.com ([62.4.15.54]:54857 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1030693AbdIZNRV (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Tue, 26 Sep 2017 09:17:21 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 31A6E207AF; Tue, 26 Sep 2017 15:17:19 +0200 (CEST)","from [192.168.0.13] (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id DAB8F20926;\n\tTue, 26 Sep 2017 15:17:08 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","To":"Maxime Ripard <maxime.ripard@free-electrons.com>","Cc":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com","References":"<cover.1c314f4154a6d27354625f03d0a5269eee55a9c5.1506428208.git-series.quentin.schulz@free-electrons.com>\n\t<7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com>\n\t<20170926130108.uibnri32b73elfy6@flea>","From":"Quentin Schulz <quentin.schulz@free-electrons.com>","Message-ID":"<0ae64e95-ee49-fb4c-e79b-e8c25c86580c@free-electrons.com>","Date":"Tue, 26 Sep 2017 15:17:05 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20170926130108.uibnri32b73elfy6@flea>","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"vSHPog3EoUl0rPKW3pRvkEVwkG1WG7sTx\"","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-gpio.vger.kernel.org>","X-Mailing-List":"linux-gpio@vger.kernel.org"}},{"id":1775523,"web_url":"http://patchwork.ozlabs.org/comment/1775523/","msgid":"<20170926134527.kmhpxn4ysfmvdulf@flea>","list_archive_url":null,"date":"2017-09-26T13:45:27","subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 01:17:05PM +0000, Quentin Schulz wrote:\n> Hi Maxime,\n> \n> On 26/09/2017 15:01, Maxime Ripard wrote:\n> > On Tue, Sep 26, 2017 at 12:17:13PM +0000, Quentin Schulz wrote:\n> >> Instead of using a function to retrieve each pin's correct control\n> >> register, use drv_data within pinctrl_pin_desc to store the ctrl reg.\n> >>\n> >> Remove axp20x_gpio_get_reg and replace every occurrence by a get from\n> >> drv_data.\n> > \n> > Why do you need to do that? This should be explained.\n> > \n> \n> Agreed that it misses an explanation.\n> \n> Today, to get a register addr of one of the GPIOs in the PMIC, we\n> basically get the GPIO number and returns the register via this info.\n> \n> There are 3 GPIOs in AXP209, 2 in AXP813. I didn't want to have a switch\n> case for the GPIO number and then an if/else inside one of the case to\n> check if the device is AXP209 or AXP813 in which case we return -EINVAL\n> instead of the GPIO2 reg. With support for new PMIC, we would have a\n> bunch of if conditions and complexify the process for something really\n> simple.\n\nI'm not sure how that relates to your code actually. The only thing\nthat patch is doing is to move the register offset from a function to\nthe structure associated to the pin.\n\nHowever, even in the AXP813 case, you're using exactly the same\nvalues, so that's not really needed.\n\nNow, you also mentionned the pin number. While this patch doesn't\nreally address it, it's also no really needed. The number of pins is\nalready known and registered in the GPIO framework. If the framework\ndoesn't already do it (which would be surprising), you can just check\nthat the pin number passed is not going to be higher than the one you\nregistered.\n\n> IMHO, this also allows easier integration of future PMICs which might\n> have different regs for the GPIOs.\n\nLet's worry about future PMICs in the future.\n\nMaxime","headers":{"Return-Path":"<linux-gpio-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1hzv0MZRz9s81\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 26 Sep 2017 23:45:47 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S968188AbdIZNpn (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tTue, 26 Sep 2017 09:45:43 -0400","from mail.free-electrons.com ([62.4.15.54]:55842 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S967470AbdIZNpj (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Tue, 26 Sep 2017 09:45:39 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 7B308208F1; Tue, 26 Sep 2017 15:45:37 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 5433720807;\n\tTue, 26 Sep 2017 15:45:27 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 15:45:27 +0200","From":"Maxime Ripard <maxime.ripard@free-electrons.com>","To":"Quentin Schulz <quentin.schulz@free-electrons.com>","Cc":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com","Subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","Message-ID":"<20170926134527.kmhpxn4ysfmvdulf@flea>","References":"<cover.1c314f4154a6d27354625f03d0a5269eee55a9c5.1506428208.git-series.quentin.schulz@free-electrons.com>\n\t<7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com>\n\t<20170926130108.uibnri32b73elfy6@flea>\n\t<0ae64e95-ee49-fb4c-e79b-e8c25c86580c@free-electrons.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"zjqmg4hqb6yittcl\"","Content-Disposition":"inline","In-Reply-To":"<0ae64e95-ee49-fb4c-e79b-e8c25c86580c@free-electrons.com>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-gpio.vger.kernel.org>","X-Mailing-List":"linux-gpio@vger.kernel.org"}},{"id":1777673,"web_url":"http://patchwork.ozlabs.org/comment/1777673/","msgid":"<201709300118.XqpYF5ya%fengguang.wu@intel.com>","list_archive_url":null,"date":"2017-09-29T17:27:23","subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","submitter":{"id":67315,"url":"http://patchwork.ozlabs.org/api/people/67315/","name":"kernel test robot","email":"lkp@intel.com"},"content":"Hi Quentin,\n\n[auto build test WARNING on ]\n\nurl:    https://github.com/0day-ci/linux/commits/Quentin-Schulz/add-pinmuxing-support-for-pins-in-AXP209-and-AXP813-PMICs/20170929-162846\nbase:    \nconfig: arm64-allmodconfig (attached as .config)\ncompiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705\nreproduce:\n        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross\n        chmod +x ~/bin/make.cross\n        # save the attached .config to linux build tree\n        make.cross ARCH=arm64 \n\nAll warnings (new ones prefixed by >>):\n\n   drivers//pinctrl/pinctrl-axp209.c: In function 'axp20x_gpio_get_direction':\n>> drivers//pinctrl/pinctrl-axp209.c:136:12: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]\n     int reg = (int)gpio->desc->pins[offset].pin.drv_data;\n               ^\n   drivers//pinctrl/pinctrl-axp209.c: In function 'axp20x_gpio_set':\n   drivers//pinctrl/pinctrl-axp209.c:171:12: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]\n     int reg = (int)gpio->desc->pins[offset].pin.drv_data;\n               ^\n   drivers//pinctrl/pinctrl-axp209.c: In function 'axp20x_pmx_set':\n   drivers//pinctrl/pinctrl-axp209.c:183:12: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]\n     int reg = (int)gpio->desc->pins[offset].pin.drv_data;\n               ^\n\nvim +136 drivers//pinctrl/pinctrl-axp209.c\n\n   132\t\n   133\tstatic int axp20x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)\n   134\t{\n   135\t\tstruct axp20x_gpio *gpio = gpiochip_get_data(chip);\n > 136\t\tint reg = (int)gpio->desc->pins[offset].pin.drv_data;\n   137\t\tunsigned int val;\n   138\t\tint ret;\n   139\t\n   140\t\tret = regmap_read(gpio->regmap, reg, &val);\n   141\t\tif (ret)\n   142\t\t\treturn ret;\n   143\t\n   144\t\t/*\n   145\t\t * This shouldn't really happen if the pin is in use already,\n   146\t\t * or if it's not in use yet, it doesn't matter since we're\n   147\t\t * going to change the value soon anyway. Default to output.\n   148\t\t */\n   149\t\tif ((val & AXP20X_GPIO_FUNCTIONS) > 2)\n   150\t\t\treturn 0;\n   151\t\n   152\t\t/*\n   153\t\t * The GPIO directions are the three lowest values.\n   154\t\t * 2 is input, 0 and 1 are output\n   155\t\t */\n   156\t\treturn val & 2;\n   157\t}\n   158\t\n\n---\n0-DAY kernel test infrastructure                Open Source Technology Center\nhttps://lists.01.org/pipermail/kbuild-all                   Intel Corporation","headers":{"Return-Path":"<linux-gpio-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y3dmy0KL6z9t3s\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 30 Sep 2017 03:28:02 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752006AbdI2R2A (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tFri, 29 Sep 2017 13:28:00 -0400","from mga06.intel.com ([134.134.136.31]:7426 \"EHLO mga06.intel.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751830AbdI2R17 (ORCPT <rfc822;linux-gpio@vger.kernel.org>);\n\tFri, 29 Sep 2017 13:27:59 -0400","from fmsmga005.fm.intel.com ([10.253.24.32])\n\tby orsmga104.jf.intel.com with ESMTP; 29 Sep 2017 10:27:58 -0700","from bee.sh.intel.com (HELO bee) ([10.239.97.14])\n\tby fmsmga005.fm.intel.com with ESMTP; 29 Sep 2017 10:27:54 -0700","from kbuild by bee with local (Exim 4.84_2)\n\t(envelope-from <fengguang.wu@intel.com>)\n\tid 1dxz9x-000Thh-KQ; Sat, 30 Sep 2017 01:33:09 +0800"],"X-ExtLoop1":"1","X-IronPort-AV":"E=Sophos;i=\"5.42,453,1500966000\"; \n\td=\"gz'50?scan'50,208,50\";a=\"157066074\"","Date":"Sat, 30 Sep 2017 01:27:23 +0800","From":"kbuild test robot <lkp@intel.com>","To":"Quentin Schulz <quentin.schulz@free-electrons.com>","Cc":"kbuild-all@01.org, linus.walleij@linaro.org, robh+dt@kernel.org,\n\tmark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk,\n\tmaxime.ripard@free-electrons.com, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com,\n\tQuentin Schulz <quentin.schulz@free-electrons.com>","Subject":"Re: [PATCH v2 03/10] pinctrl: axp209: use drv_data of\n\tpinctrl_pin_desc to store pin reg","Message-ID":"<201709300118.XqpYF5ya%fengguang.wu@intel.com>","MIME-Version":"1.0","Content-Type":"multipart/mixed; boundary=\"nFreZHaLTZJo0R7j\"","Content-Disposition":"inline","In-Reply-To":"<7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-SA-Exim-Connect-IP":"<locally generated>","X-SA-Exim-Mail-From":"fengguang.wu@intel.com","X-SA-Exim-Scanned":"No (on bee); SAEximRunCond expanded to false","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-gpio.vger.kernel.org>","X-Mailing-List":"linux-gpio@vger.kernel.org"}}]