[{"id":1775453,"web_url":"http://patchwork.ozlabs.org/comment/1775453/","msgid":"<20170926130009.r5isgrjvkwmm44nn@flea>","list_archive_url":null,"date":"2017-09-26T13:00:09","subject":"Re: [PATCH v2 02/10] pinctrl: axp209: add pinctrl features","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 12:17:12PM +0000, Quentin Schulz wrote:\n> +static const struct axp20x_desc_pin axp209_pins[] = {\n> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(0, \"GPIO0\"),\n> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\"),\n> +\t\t AXP20X_FUNCTION(0x3, \"ldo\"),\n> +\t\t AXP20X_FUNCTION(0x4, \"adc\")),\n> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(1, \"GPIO1\"),\n> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\"),\n> +\t\t AXP20X_FUNCTION(0x3, \"ldo\"),\n> +\t\t AXP20X_FUNCTION(0x4, \"adc\")),\n> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(2, \"GPIO2\"),\n> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\")),\n> +};\n\nIf all the functions are the same, and at the same offset, can't we\njust hardcode it, instead of having (and duplicate) all the logic\nbelow?\n\n> +\tpctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL);\n> +\tif (!pctrl_desc)\n> +\t\treturn -ENOMEM;\n> +\n> +\tpctrl_desc->name = dev_name(&pdev->dev);\n> +\tpctrl_desc->owner = THIS_MODULE;\n> +\tpctrl_desc->pins = pins;\n> +\tpctrl_desc->npins = gpio->desc->npins;\n> +\tpctrl_desc->pctlops = &axp20x_pctrl_ops;\n> +\tpctrl_desc->pmxops = &axp20x_pmx_ops;\n\nThe strict flag needs to be set too in order to avoid concurrent uses\nof GPIO and other functions.\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1gzk72w7z9tXj\n\tfor ;\n\tTue, 26 Sep 2017 23:00:34 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S967711AbdIZNAW (ORCPT );\n\tTue, 26 Sep 2017 09:00:22 -0400","from mail.free-electrons.com ([62.4.15.54]:53993 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S965798AbdIZNAV (ORCPT\n\t); Tue, 26 Sep 2017 09:00:21 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 0097820915; Tue, 26 Sep 2017 15:00:18 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id CADB2208DD;\n\tTue, 26 Sep 2017 15:00:08 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 15:00:09 +0200","From":"Maxime Ripard ","To":"Quentin Schulz ","Cc":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com","Subject":"Re: [PATCH v2 02/10] pinctrl: axp209: add pinctrl features","Message-ID":"<20170926130009.r5isgrjvkwmm44nn@flea>","References":"\n\t<6b89df1bf07dac2ab295fca5fdf0e55179c47ed6.1506428208.git-series.quentin.schulz@free-electrons.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"zwon7ho3f6pymg7r\"","Content-Disposition":"inline","In-Reply-To":"<6b89df1bf07dac2ab295fca5fdf0e55179c47ed6.1506428208.git-series.quentin.schulz@free-electrons.com>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"}},{"id":1775465,"web_url":"http://patchwork.ozlabs.org/comment/1775465/","msgid":"<5596280a-51bb-7491-31f4-5800219888ad@free-electrons.com>","list_archive_url":null,"date":"2017-09-26T13:08:21","subject":"Re: [PATCH v2 02/10] pinctrl: axp209: add pinctrl features","submitter":{"id":69366,"url":"http://patchwork.ozlabs.org/api/people/69366/","name":"Quentin Schulz","email":"quentin.schulz@free-electrons.com"},"content":"Hi Maxime,\n\nOn 26/09/2017 15:00, Maxime Ripard wrote:\n> On Tue, Sep 26, 2017 at 12:17:12PM +0000, Quentin Schulz wrote:\n>> +static const struct axp20x_desc_pin axp209_pins[] = {\n>> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(0, \"GPIO0\"),\n>> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n>> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\"),\n>> +\t\t AXP20X_FUNCTION(0x3, \"ldo\"),\n>> +\t\t AXP20X_FUNCTION(0x4, \"adc\")),\n>> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(1, \"GPIO1\"),\n>> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n>> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\"),\n>> +\t\t AXP20X_FUNCTION(0x3, \"ldo\"),\n>> +\t\t AXP20X_FUNCTION(0x4, \"adc\")),\n>> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(2, \"GPIO2\"),\n>> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n>> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\")),\n>> +};\n> \n> If all the functions are the same, and at the same offset, can't we\n> just hardcode it, instead of having (and duplicate) all the logic\n> below?\n> \n\nAXP20X_PIN(AXP20X_PINCTRL_PIN(0, \"GPIO0\"),\n\t\tAXP20X_GPIO_OUT,\n\t\tAXP20X_GPIO_IN,\n\t\tAXP20X_LDO,\n\t\tAXP20X_ADC))\n\nThat's what you mean?\n\n>> +\tpctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL);\n>> +\tif (!pctrl_desc)\n>> +\t\treturn -ENOMEM;\n>> +\n>> +\tpctrl_desc->name = dev_name(&pdev->dev);\n>> +\tpctrl_desc->owner = THIS_MODULE;\n>> +\tpctrl_desc->pins = pins;\n>> +\tpctrl_desc->npins = gpio->desc->npins;\n>> +\tpctrl_desc->pctlops = &axp20x_pctrl_ops;\n>> +\tpctrl_desc->pmxops = &axp20x_pmx_ops;\n> \n> The strict flag needs to be set too in order to avoid concurrent uses\n> of GPIO and other functions.\n> \n\nStrict is a property of pinmux_ops struct (pmxops) and it is set.\n\nThanks,\nQuentin","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1h934W6Kz9tXj\n\tfor ;\n\tTue, 26 Sep 2017 23:08:39 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S966573AbdIZNIi (ORCPT );\n\tTue, 26 Sep 2017 09:08:38 -0400","from mail.free-electrons.com ([62.4.15.54]:54343 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S966345AbdIZNIh (ORCPT\n\t); Tue, 26 Sep 2017 09:08:37 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 534E120911; Tue, 26 Sep 2017 15:08:35 +0200 (CEST)","from [192.168.0.13] (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 00202207D0;\n\tTue, 26 Sep 2017 15:08:24 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Subject":"Re: [PATCH v2 02/10] pinctrl: axp209: add pinctrl features","To":"Maxime Ripard ","Cc":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com","References":"\n\t<6b89df1bf07dac2ab295fca5fdf0e55179c47ed6.1506428208.git-series.quentin.schulz@free-electrons.com>\n\t<20170926130009.r5isgrjvkwmm44nn@flea>","From":"Quentin Schulz ","Message-ID":"<5596280a-51bb-7491-31f4-5800219888ad@free-electrons.com>","Date":"Tue, 26 Sep 2017 15:08:21 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20170926130009.r5isgrjvkwmm44nn@flea>","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"Tu9tUEg7AlRafR3iP0u73KuJAKulJ18T1\"","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"}},{"id":1775494,"web_url":"http://patchwork.ozlabs.org/comment/1775494/","msgid":"<20170926132709.od3myumh5xtungvs@flea>","list_archive_url":null,"date":"2017-09-26T13:27:09","subject":"Re: [PATCH v2 02/10] pinctrl: axp209: add pinctrl features","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 01:08:21PM +0000, Quentin Schulz wrote:\n> Hi Maxime,\n> \n> On 26/09/2017 15:00, Maxime Ripard wrote:\n> > On Tue, Sep 26, 2017 at 12:17:12PM +0000, Quentin Schulz wrote:\n> >> +static const struct axp20x_desc_pin axp209_pins[] = {\n> >> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(0, \"GPIO0\"),\n> >> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n> >> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\"),\n> >> +\t\t AXP20X_FUNCTION(0x3, \"ldo\"),\n> >> +\t\t AXP20X_FUNCTION(0x4, \"adc\")),\n> >> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(1, \"GPIO1\"),\n> >> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n> >> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\"),\n> >> +\t\t AXP20X_FUNCTION(0x3, \"ldo\"),\n> >> +\t\t AXP20X_FUNCTION(0x4, \"adc\")),\n> >> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(2, \"GPIO2\"),\n> >> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n> >> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\")),\n> >> +};\n> > \n> > If all the functions are the same, and at the same offset, can't we\n> > just hardcode it, instead of having (and duplicate) all the logic\n> > below?\n> > \n> \n> AXP20X_PIN(AXP20X_PINCTRL_PIN(0, \"GPIO0\"),\n> \t\tAXP20X_GPIO_OUT,\n> \t\tAXP20X_GPIO_IN,\n> \t\tAXP20X_LDO,\n> \t\tAXP20X_ADC))\n> \n> That's what you mean?\n\nWhat I mean is:\n\nstatic int axp20x_get_func(char *func)\n{\n\tif (!strcmp(func, \"gpio_out\"))\n\t\treturn 0;\n\n\tif (!strcmp(func, \"gpio_in\"))\n\t\treturn 2;\n \n\tif (!strcmp(func, \"ldo\"))\n \t\treturn 3;\n \n\tif (!strcmp(func, \"adc\"))\n \t\treturn 4;\n\n\treturn -EINVAL;\n}\n\n> >> +\tpctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL);\n> >> +\tif (!pctrl_desc)\n> >> +\t\treturn -ENOMEM;\n> >> +\n> >> +\tpctrl_desc->name = dev_name(&pdev->dev);\n> >> +\tpctrl_desc->owner = THIS_MODULE;\n> >> +\tpctrl_desc->pins = pins;\n> >> +\tpctrl_desc->npins = gpio->desc->npins;\n> >> +\tpctrl_desc->pctlops = &axp20x_pctrl_ops;\n> >> +\tpctrl_desc->pmxops = &axp20x_pmx_ops;\n> > \n> > The strict flag needs to be set too in order to avoid concurrent uses\n> > of GPIO and other functions.\n> > \n> \n> Strict is a property of pinmux_ops struct (pmxops) and it is set.\n\nAh, right, my bad.\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1hZs28xZz9tXH\n\tfor ;\n\tTue, 26 Sep 2017 23:27:33 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1030773AbdIZN1W (ORCPT );\n\tTue, 26 Sep 2017 09:27:22 -0400","from mail.free-electrons.com ([62.4.15.54]:55306 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1030289AbdIZN1V (ORCPT\n\t); Tue, 26 Sep 2017 09:27:21 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 0933920858; Tue, 26 Sep 2017 15:27:19 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id D039F20832;\n\tTue, 26 Sep 2017 15:27:08 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Tue, 26 Sep 2017 15:27:09 +0200","From":"Maxime Ripard ","To":"Quentin Schulz ","Cc":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com","Subject":"Re: [PATCH v2 02/10] pinctrl: axp209: add pinctrl features","Message-ID":"<20170926132709.od3myumh5xtungvs@flea>","References":"\n\t<6b89df1bf07dac2ab295fca5fdf0e55179c47ed6.1506428208.git-series.quentin.schulz@free-electrons.com>\n\t<20170926130009.r5isgrjvkwmm44nn@flea>\n\t<5596280a-51bb-7491-31f4-5800219888ad@free-electrons.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"oyfuwka7pc3evugi\"","Content-Disposition":"inline","In-Reply-To":"<5596280a-51bb-7491-31f4-5800219888ad@free-electrons.com>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"}},{"id":1775508,"web_url":"http://patchwork.ozlabs.org/comment/1775508/","msgid":"<0bc7efe6-8d0e-ddae-617b-36e4357f76ce@free-electrons.com>","list_archive_url":null,"date":"2017-09-26T13:37:37","subject":"Re: [PATCH v2 02/10] pinctrl: axp209: add pinctrl features","submitter":{"id":69366,"url":"http://patchwork.ozlabs.org/api/people/69366/","name":"Quentin Schulz","email":"quentin.schulz@free-electrons.com"},"content":"On 26/09/2017 15:27, Maxime Ripard wrote:\n> On Tue, Sep 26, 2017 at 01:08:21PM +0000, Quentin Schulz wrote:\n>> Hi Maxime,\n>>\n>> On 26/09/2017 15:00, Maxime Ripard wrote:\n>>> On Tue, Sep 26, 2017 at 12:17:12PM +0000, Quentin Schulz wrote:\n>>>> +static const struct axp20x_desc_pin axp209_pins[] = {\n>>>> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(0, \"GPIO0\"),\n>>>> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n>>>> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\"),\n>>>> +\t\t AXP20X_FUNCTION(0x3, \"ldo\"),\n>>>> +\t\t AXP20X_FUNCTION(0x4, \"adc\")),\n>>>> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(1, \"GPIO1\"),\n>>>> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n>>>> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\"),\n>>>> +\t\t AXP20X_FUNCTION(0x3, \"ldo\"),\n>>>> +\t\t AXP20X_FUNCTION(0x4, \"adc\")),\n>>>> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(2, \"GPIO2\"),\n>>>> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n>>>> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\")),\n>>>> +};\n>>>\n>>> If all the functions are the same, and at the same offset, can't we\n>>> just hardcode it, instead of having (and duplicate) all the logic\n>>> below?\n>>>\n>>\n>> AXP20X_PIN(AXP20X_PINCTRL_PIN(0, \"GPIO0\"),\n>> \t\tAXP20X_GPIO_OUT,\n>> \t\tAXP20X_GPIO_IN,\n>> \t\tAXP20X_LDO,\n>> \t\tAXP20X_ADC))\n>>\n>> That's what you mean?\n> \n> What I mean is:\n> \n> static int axp20x_get_func(char *func)\n> {\n> \tif (!strcmp(func, \"gpio_out\"))\n> \t\treturn 0;\n> \n> \tif (!strcmp(func, \"gpio_in\"))\n> \t\treturn 2;\n> \n> \tif (!strcmp(func, \"ldo\"))\n> \t\treturn 3;\n> \n> \tif (!strcmp(func, \"adc\"))\n> \t\treturn 4;\n> \n> \treturn -EINVAL;\n> }\n> \n\nGPIO2 on AXP209 does not support ldo nor adc.\nGPIO1 on AXP813 does not support adc.\n\nI find it more complex to handle those two cases in a function than by\nhardcoding it in structures like above.\n\nMoreover, nothing tells us that it would be the same offset for other PMICs.\n\nQuentin","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1hpq2mLnz9tXK\n\tfor ;\n\tTue, 26 Sep 2017 23:37:55 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1030901AbdIZNhy (ORCPT );\n\tTue, 26 Sep 2017 09:37:54 -0400","from mail.free-electrons.com ([62.4.15.54]:55581 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S967806AbdIZNhx (ORCPT\n\t); Tue, 26 Sep 2017 09:37:53 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid AA3F92091B; Tue, 26 Sep 2017 15:37:50 +0200 (CEST)","from [192.168.0.13] (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 56B0720911;\n\tTue, 26 Sep 2017 15:37:40 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Subject":"Re: [PATCH v2 02/10] pinctrl: axp209: add pinctrl features","To":"Maxime Ripard ","Cc":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com","References":"\n\t<6b89df1bf07dac2ab295fca5fdf0e55179c47ed6.1506428208.git-series.quentin.schulz@free-electrons.com>\n\t<20170926130009.r5isgrjvkwmm44nn@flea>\n\t<5596280a-51bb-7491-31f4-5800219888ad@free-electrons.com>\n\t<20170926132709.od3myumh5xtungvs@flea>","From":"Quentin Schulz ","Message-ID":"<0bc7efe6-8d0e-ddae-617b-36e4357f76ce@free-electrons.com>","Date":"Tue, 26 Sep 2017 15:37:37 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20170926132709.od3myumh5xtungvs@flea>","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"EOb1IFLpWDGHuD8HcIq4bWc07ciEaEgGC\"","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"}},{"id":1776180,"web_url":"http://patchwork.ozlabs.org/comment/1776180/","msgid":"<20170927092815.4y57ej5qbilioxr5@flea>","list_archive_url":null,"date":"2017-09-27T09:28:15","subject":"Re: [PATCH v2 02/10] pinctrl: axp209: add pinctrl features","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Tue, Sep 26, 2017 at 01:37:37PM +0000, Quentin Schulz wrote:\n> On 26/09/2017 15:27, Maxime Ripard wrote:\n> > On Tue, Sep 26, 2017 at 01:08:21PM +0000, Quentin Schulz wrote:\n> >> Hi Maxime,\n> >>\n> >> On 26/09/2017 15:00, Maxime Ripard wrote:\n> >>> On Tue, Sep 26, 2017 at 12:17:12PM +0000, Quentin Schulz wrote:\n> >>>> +static const struct axp20x_desc_pin axp209_pins[] = {\n> >>>> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(0, \"GPIO0\"),\n> >>>> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n> >>>> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\"),\n> >>>> +\t\t AXP20X_FUNCTION(0x3, \"ldo\"),\n> >>>> +\t\t AXP20X_FUNCTION(0x4, \"adc\")),\n> >>>> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(1, \"GPIO1\"),\n> >>>> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n> >>>> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\"),\n> >>>> +\t\t AXP20X_FUNCTION(0x3, \"ldo\"),\n> >>>> +\t\t AXP20X_FUNCTION(0x4, \"adc\")),\n> >>>> +\tAXP20X_PIN(AXP20X_PINCTRL_PIN(2, \"GPIO2\"),\n> >>>> +\t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n> >>>> +\t\t AXP20X_FUNCTION(0x2, \"gpio_in\")),\n> >>>> +};\n> >>>\n> >>> If all the functions are the same, and at the same offset, can't we\n> >>> just hardcode it, instead of having (and duplicate) all the logic\n> >>> below?\n> >>>\n> >>\n> >> AXP20X_PIN(AXP20X_PINCTRL_PIN(0, \"GPIO0\"),\n> >> \t\tAXP20X_GPIO_OUT,\n> >> \t\tAXP20X_GPIO_IN,\n> >> \t\tAXP20X_LDO,\n> >> \t\tAXP20X_ADC))\n> >>\n> >> That's what you mean?\n> > \n> > What I mean is:\n> > \n> > static int axp20x_get_func(char *func)\n> > {\n> > \tif (!strcmp(func, \"gpio_out\"))\n> > \t\treturn 0;\n> > \n> > \tif (!strcmp(func, \"gpio_in\"))\n> > \t\treturn 2;\n> > \n> > \tif (!strcmp(func, \"ldo\"))\n> > \t\treturn 3;\n> > \n> > \tif (!strcmp(func, \"adc\"))\n> > \t\treturn 4;\n> > \n> > \treturn -EINVAL;\n> > }\n> > \n> \n> GPIO2 on AXP209 does not support ldo nor adc.\n> GPIO1 on AXP813 does not support adc.\n\nRight, and surely that can be caught as well. This was a global\napproach. You could add a bitmap for example to encode whether ldo and\nadc are available. It takes two bytes, and two or operations.\n\n> I find it more complex to handle those two cases in a function than by\n> hardcoding it in structures like above.\n\nYou find more complex to add a 10 lines function than 450 lines of\ncode that you ripped off from another driver, that generates 4\nstructures many structures (groups, functions, pins and pins'\nfunctions) and will provide three different lookup methods? Really? :)\n\nIt's way overkill for that driver. Most of these lists can be\nhardcoded as well.\n\n> Moreover, nothing tells us that it would be the same offset for\n> other PMICs.\n\nAgain, let's worry about those PMICs when we'll need to support\nthem. Unless you already have an example in mind of course. Otherwise,\nit's just building things on theories that have never been proven (and\nmight never be).\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y2CDb392Lz9tXT\n\tfor ;\n\tWed, 27 Sep 2017 19:28:31 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752455AbdI0J23 (ORCPT );\n\tWed, 27 Sep 2017 05:28:29 -0400","from mail.free-electrons.com ([62.4.15.54]:56800 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752281AbdI0J21 (ORCPT\n\t); Wed, 27 Sep 2017 05:28:27 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid A4391207C0; Wed, 27 Sep 2017 11:28:24 +0200 (CEST)","from localhost (unknown [195.81.232.10])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 8022920774;\n\tWed, 27 Sep 2017 11:28:14 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT\n\tshortcircuit=ham autolearn=disabled version=3.4.0","Date":"Wed, 27 Sep 2017 11:28:15 +0200","From":"Maxime Ripard ","To":"Quentin Schulz ","Cc":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk, lee.jones@linaro.org,\n\tlinux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com","Subject":"Re: [PATCH v2 02/10] pinctrl: axp209: add pinctrl features","Message-ID":"<20170927092815.4y57ej5qbilioxr5@flea>","References":"\n\t<6b89df1bf07dac2ab295fca5fdf0e55179c47ed6.1506428208.git-series.quentin.schulz@free-electrons.com>\n\t<20170926130009.r5isgrjvkwmm44nn@flea>\n\t<5596280a-51bb-7491-31f4-5800219888ad@free-electrons.com>\n\t<20170926132709.od3myumh5xtungvs@flea>\n\t<0bc7efe6-8d0e-ddae-617b-36e4357f76ce@free-electrons.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"sktdlgeaimlfa47o\"","Content-Disposition":"inline","In-Reply-To":"<0bc7efe6-8d0e-ddae-617b-36e4357f76ce@free-electrons.com>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"}}]