[{"id":1774596,"web_url":"http://patchwork.ozlabs.org/comment/1774596/","msgid":"","list_archive_url":null,"date":"2017-09-25T09:03:09","subject":"Re: [U-Boot] [PATCH v2 04/19] arm: socfpga: Add Arria 10 SoCFPGA\n\tprogramming interface","submitter":{"id":12009,"url":"http://patchwork.ozlabs.org/api/people/12009/","name":"Marek Vasut","email":"marex@denx.de"},"content":"On 09/25/2017 10:40 AM, tien.fong.chee@intel.com wrote:\n> From: Tien Fong Chee \n> \n> Add code necessary into the FPGA driver framework in U-Boot\n> so it can be used via the 'fpga' command for programing Arria 10\n> SoCFPGA.\n> \n> Signed-off-by: Tien Fong Chee \n> ---\n\n[...]\n\n> +#if defined(CONFIG_CMD_FPGA_LOADFS)\n> +int altera_loadfs(Altera_desc *desc, const void *buf, size_t bsize,\n> +\t\t fpga_fs_info *fpga_fsinfo)\n> +{\n> +\tconst struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__);\n> +\n> +\tif (!fpga)\n> +\t\treturn FPGA_FAIL;\n> +\n> +\tdebug_cond(FPGA_DEBUG, \"%s: Launching the %s FS Loader...\\n\",\n> +\t\t __func__, fpga->name);\n> +\tif (fpga->loadfs)\n> +\t\treturn fpga->loadfs(desc, buf, bsize, fpga_fsinfo);\n> +\treturn 0;\n\nreturn -EINVAL , since the loader could not be started ?\n\n> +}\n> +#endif\n[...]","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3y102Q0dN3z9tX3\n\tfor ;\n\tMon, 25 Sep 2017 20:00:29 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid B7D5CC221DC; Mon, 25 Sep 2017 09:59:57 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id DA3C7C22028;\n\tMon, 25 Sep 2017 09:58:39 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 99C99C220FC; Mon, 25 Sep 2017 09:58:28 +0000 (UTC)","from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10])\n\tby lists.denx.de (Postfix) with ESMTPS id A8ECFC2209C\n\tfor ; Mon, 25 Sep 2017 09:58:24 +0000 (UTC)","from frontend01.mail.m-online.net (unknown [192.168.8.182])\n\tby mail-out.m-online.net (Postfix) with ESMTP id 3y10001v8sz1qtPc;\n\tMon, 25 Sep 2017 11:58:24 +0200 (CEST)","from localhost (dynscan1.mnet-online.de [192.168.6.70])\n\tby mail.m-online.net (Postfix) with ESMTP id 3y10000KSRz1qqkh;\n\tMon, 25 Sep 2017 11:58:24 +0200 (CEST)","from mail.mnet-online.de ([192.168.8.182])\n\tby localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new,\n\tport 10024)\n\twith ESMTP id qL68x0l98rwg; Mon, 25 Sep 2017 11:58:23 +0200 (CEST)","from [IPv6:::1] (unknown [195.140.253.167])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby mail.mnet-online.de (Postfix) with ESMTPSA;\n\tMon, 25 Sep 2017 11:58:22 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-0.7 required=5.0 tests=RCVD_IN_DNSWL_LOW,\n\tRCVD_IN_MSPIKE_H3,\n\tRCVD_IN_MSPIKE_WL autolearn=unavailable autolearn_force=no\n\tversion=3.4.0","X-Virus-Scanned":"amavisd-new at mnet-online.de","X-Auth-Info":"1tW4Y3ADZfmikrBrazn+urawoIYrho6ac4LWf5mkkNo=","To":"tien.fong.chee@intel.com, u-boot@lists.denx.de","References":"<1506328815-23733-1-git-send-email-tien.fong.chee@intel.com>\n\t<1506328815-23733-5-git-send-email-tien.fong.chee@intel.com>","From":"Marek Vasut ","Message-ID":"","Date":"Mon, 25 Sep 2017 11:03:09 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<1506328815-23733-5-git-send-email-tien.fong.chee@intel.com>","Content-Language":"en-US","Cc":"Ching Liang See ,\n\tMichal Simek ,\n\tTien Fong , \n\tWestergteen Dalon ","Subject":"Re: [U-Boot] [PATCH v2 04/19] arm: socfpga: Add Arria 10 SoCFPGA\n\tprogramming interface","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1777389,"web_url":"http://patchwork.ozlabs.org/comment/1777389/","msgid":"<1506670944.14357.0.camel@intel.com>","list_archive_url":null,"date":"2017-09-29T07:42:24","subject":"Re: [U-Boot] [PATCH v2 04/19] arm: socfpga: Add Arria 10 SoCFPGA\n\tprogramming interface","submitter":{"id":70549,"url":"http://patchwork.ozlabs.org/api/people/70549/","name":"Chee, Tien Fong","email":"tien.fong.chee@intel.com"},"content":"On Isn, 2017-09-25 at 11:03 +0200, Marek Vasut wrote:\r\n> On 09/25/2017 10:40 AM, tien.fong.chee@intel.com wrote:\r\n> > \r\n> > From: Tien Fong Chee \r\n> > \r\n> > Add code necessary into the FPGA driver framework in U-Boot\r\n> > so it can be used via the 'fpga' command for programing Arria 10\r\n> > SoCFPGA.\r\n> > \r\n> > Signed-off-by: Tien Fong Chee \r\n> > ---\r\n> [...]\r\n> \r\n> > \r\n> > +#if defined(CONFIG_CMD_FPGA_LOADFS)\r\n> > +int altera_loadfs(Altera_desc *desc, const void *buf, size_t\r\n> > bsize,\r\n> > +\t\t   fpga_fs_info *fpga_fsinfo)\r\n> > +{\r\n> > +\tconst struct altera_fpga *fpga = altera_desc_to_fpga(desc,\r\n> > __func__);\r\n> > +\r\n> > +\tif (!fpga)\r\n> > +\t\treturn FPGA_FAIL;\r\n> > +\r\n> > +\tdebug_cond(FPGA_DEBUG, \"%s: Launching the %s FS\r\n> > Loader...\\n\",\r\n> > +\t\t   __func__, fpga->name);\r\n> > +\tif (fpga->loadfs)\r\n> > +\t\treturn fpga->loadfs(desc, buf, bsize,\r\n> > fpga_fsinfo);\r\n> > +\treturn 0;\r\n> return -EINVAL , since the loader could not be started ?\r\n> \r\nOkay.\r\n> > \r\n> > +}\r\n> > +#endif\r\n> [...]\r\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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29 Sep 2017 00:42:26 -0700","from pgsmsx109.gar.corp.intel.com ([169.254.14.159]) by\n\tPGSMSX112.gar.corp.intel.com ([169.254.3.239]) with mapi id\n\t14.03.0248.002; Fri, 29 Sep 2017 15:42:25 +0800"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED\n\tautolearn=unavailable autolearn_force=no version=3.4.0","X-ExtLoop1":"1","X-IronPort-AV":"E=Sophos;i=\"5.42,451,1500966000\"; d=\"scan'208\";a=\"140817823\"","From":"\"Chee, Tien Fong\" ","To":"\"marex@denx.de\" , \"u-boot@lists.denx.de\"\n\t","Thread-Topic":"[PATCH v2 04/19] arm: socfpga: Add Arria 10 SoCFPGA\n\tprogramming interface","Thread-Index":"AQHTNdn+5UAtfkYgz0KzFwJEU5SJaKLEyGaAgAYyxAA=","Date":"Fri, 29 Sep 2017 07:42:24 +0000","Message-ID":"<1506670944.14357.0.camel@intel.com>","References":"<1506328815-23733-1-git-send-email-tien.fong.chee@intel.com>\n\t<1506328815-23733-5-git-send-email-tien.fong.chee@intel.com>\n\t","In-Reply-To":"","Accept-Language":"en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","x-originating-ip":"[10.226.242.168]","Content-ID":"<4592DD9A04E7BF4CB2D1ABBE23970DF1@intel.com>","MIME-Version":"1.0","Cc":"\"See, Chin Liang\" ,\n\t\"michal.simek@xilinx.com\" ,\n\t\"skywindctf@gmail.com\" , \"Westergreen,\n\tDalon\" ","Subject":"Re: [U-Boot] [PATCH v2 04/19] arm: socfpga: Add Arria 10 SoCFPGA\n\tprogramming interface","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; 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