[{"id":1780124,"web_url":"http://patchwork.ozlabs.org/comment/1780124/","msgid":"<20171004211411.27gxy5wnaymdcm3z@rob-hp-laptop>","list_archive_url":null,"date":"2017-10-04T21:14:11","subject":"Re: [PATCH 2/4] media: dt-bindings: Add bindings for TDA1997X","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Fri, Sep 22, 2017 at 03:24:11PM -0700, Tim Harvey wrote:\n> Signed-off-by: Tim Harvey \n\nYou need a commit msg. Otherwise, maintainers get publicly shamed.\n\n> ---\n> .../devicetree/bindings/media/i2c/tda1997x.txt | 159 +++++++++++++++++++++\n> 1 file changed, 159 insertions(+)\n> create mode 100644 Documentation/devicetree/bindings/media/i2c/tda1997x.txt\n> \n> diff --git a/Documentation/devicetree/bindings/media/i2c/tda1997x.txt b/Documentation/devicetree/bindings/media/i2c/tda1997x.txt\n> new file mode 100644\n> index 0000000..8330733\n> --- /dev/null\n> +++ b/Documentation/devicetree/bindings/media/i2c/tda1997x.txt\n> @@ -0,0 +1,159 @@\n> +Device-Tree bindings for the NXP TDA1997x HDMI receiver\n> +\n> +The TDA19971/73 are HDMI video receivers.\n> +\n> +The TDA19971 Video port output pins can be used as follows:\n> + - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]\n> + - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]\n> + - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]\n> + - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]\n> + - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]\n> + - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)\n> + - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)\n> + - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)\n> +\n> +The TDA19973 Video port output pins can be used as follows:\n> + - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]\n> + - YUV444 12bit per color (36 bits total): Y[11:0] Cb[11:0] Cr[11:0]\n> + - YUV422 semi-planar 12bit per component (24 bits total): Y[11:0] CbCr[11:0]\n> + - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)\n> +\n> +The Video port output pins are mapped via 4-bit 'pin groups' allowing\n> +for a variety fo connection possibilities including swapping pin order within\n> +pin groups. The video_portcfg device-tree property consists of register mapping\n> +pairs which map a chip-specific VP output register to a 4-bit pin group. If\n> +the pin group needs to be bit-swapped you can use the *_S pin-group defines.\n> +\n> +Required Properties:\n> + - compatible :\n> + - \"nxp,tda19971\" for the TDA19971\n> + - \"nxp,tda19973\" for the TDA19973\n> + - reg : I2C slave address\n> + - interrupts : The interrupt number\n> + - DOVDD-supply : Digital I/O supply\n> + - DVDD-supply : Digital Core supply\n> + - AVDD-supply : Analog supply\n> + - vidout_portcfg : array of pairs mapping VP output pins to pin groups\n\nNeeds a vendor prefix and don't use '_'.\n\n> +\n> +Optional Properties:\n> + - max-pixel-rate : Maximum pixel rate supported by the SoC (MP/sec)\n> + - audio-port : parameters defining audio output port connection\n\nThat description is meaningless to me.\n\n> +\n> +Optional Endpoint Properties:\n> + The following three properties are defined in video-interfaces.txt and\n> + are valid for source endpoints only:\n> + - hsync-active: Horizontal synchronization polarity. Defaults to active high.\n> + - vsync-active: Vertical synchronization polarity. Defaults to active high.\n> + - data-active: Data polarity. Defaults to active high.\n> +\n> +The Audio output port consists of A_CLK, A_WS, AP0, AP1, AP2, and AP3 pins\n> +and can support up to 8-chanenl audio using the following audio bus DAI formats:\n> + - I2S16\n> + - I2S32\n> + - SPDIF\n> + - OBA (One-Bit-Audio)\n> + - I2S16_HBR_STRAIGHT (High Bitrate straight through)\n> + - I2S16_HBR_DEMUX (High Bitrate demuxed)\n> + - I2S32_HBR_DEMUX (High Bitrate demuxed)\n> + - DST (Direct Stream Transfer)\n\nThis either should be a standard, common property or not be in DT. \nPractically every system is going to have at least one end of the \nconnection that is configurable. The kernel should be able to get lists \nof supported modes and pick one.\n\n> +\n> +Audio samples can be output in either SPDIF or I2S bus formats.\n> +In I2S mode, the TDF1997X is the master with 16bit or 32bit words.\n> +The audio port output is configured by three parameters: DAI format, layout\n> +and clock scaler.\n> +\n> +Each DAI format has two pin layouts shown by the following table:\n> + | SPDIF | SPDIF | I2S | I2S | HBR demux\n> + | Layout0 | Layout1 | Layout0 | Layout1 | SPDIF | I2S\n> + ------+---------+---------+---------+---------+------------+------------\n> + A_WS | WS | WS | WS | WS | WS | WS\n> + AP3 | | SPDIF3 | | SD3 | SPDIF[x+3] | SD[x+3]\n> + AP2 | | SPDIF2 | | SD2 | SPDIF[x+2] | SD[x+2]\n> + AP1 | | SPDIF1 | | SD1 | SPDIF[x+1] | SD[x+1]\n> + AP0 | SPDIF | SPDIF0 | SD | SD0 | SPDIF[x] | SD[x]\n> + A_CLK | (32*Fs) | (32*Fs) |(32*Fs) | (32*Fs) | (32*Fs) | (32*Fs)\n> + | (64*Fs) | (64*Fs) |(64*Fs) | (64*Fs) | (64*Fs) | (64*Fs)\n> +\n> +Freq(Sysclk) = 2*freq(Aclk)\n> +\n> +Examples:\n> + - VP[15:0] connected to IMX6 CSI_DATA[19:4] for 16bit YUV422\n> + 16bit I2S layout0 with a 128*fs clock (A_WS, AP0, A_CLK pins)\n> +\thdmi_receiver@48 {\n\ns/_/-/\n\n> +\t\tcompatible = \"nxp,tda19971\";\n> +\t\tpinctrl-names = \"default\";\n> +\t\tpinctrl-0 = <&pinctrl_tda1997x>;\n> +\t\treg = <0x48>;\n> +\t\tinterrupt-parent = <&gpio1>;\n> +\t\tinterrupts = <7 IRQ_TYPE_LEVEL_LOW>;\n> +\t\tDOVDD-supply = <®_3p3v>;\n> +\t\tAVDD-supply = <®_1p8v>;\n> +\t\tDVDD-supply = <®_1p8v>;\n> +\t\t/* audio output format */\n> +\t\taudio-port = < TDA1997X_I2S16\n> +\t\t\t TDA1997X_LAYOUT0\n> +\t\t\t TDA1997X_ACLK_128FS >;\n> +\t\t/*\n> +\t\t * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4]\n> +\t\t * and Y[11:4] across 16bits in the same pixclk cycle.\n> +\t\t */\n> +\t\tvidout_portcfg =\n> +\t\t\t/* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */\n> +\t\t\t< TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >,\n> +\t\t\t/* Y[7:4]<->VP[11:08]<->CSI_DATA[15:12] */\n> +\t\t\t< TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >,\n> +\t\t\t/* CbCc[11:8]<->VP[07:04]<->CSI_DATA[11:8] */\n> +\t\t\t< TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >,\n> +\t\t\t/* CbCr[7:4]<->VP[03:00]<->CSI_DATA[7:4] */\n> +\t\t\t< TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >;\n> +\t\tmax-pixel-rate = <180>; /* IMX6 CSI max pixel rate 180MP/sec */\n\nThat's a constraint that belongs in the i.MX CSI node or driver.\n\n> +\n> +\t\tport@0 {\n> +\t\t\treg = <0>;\n> +\t\t};\n> +\t\tport@1 {\n\nYou need to describe how many ports and what they are.\n\n> +\t\t\treg = <1>;\n> +\t\t\thdmi_in: endpoint {\n> +\t\t\t\tremote-endpoint = <&ccdc_in>;\n> +\t\t\t};\n> +\t\t};\n> +\t};\n> + - VP[15:8] connected to IMX6 CSI_DATA[19:12] for 8bit BT656\n> + 16bit I2S layout0 with a 128*fs clock (A_WS, AP0, A_CLK pins)\n\nDo you really need 2 examples? It should be possible to figure out other \nconfigurations with better descriptions above.\n\n> +\thdmi_receiver@48 {\n> +\t\tcompatible = \"nxp,tda19971\";\n> +\t\tpinctrl-names = \"default\";\n> +\t\tpinctrl-0 = <&pinctrl_tda1997x>;\n> +\t\treg = <0x48>;\n> +\t\tinterrupt-parent = <&gpio1>;\n> +\t\tinterrupts = <7 IRQ_TYPE_LEVEL_LOW>;\n> +\t\tDOVDD-supply = <®_3p3v>;\n> +\t\tAVDD-supply = <®_1p8v>;\n> +\t\tDVDD-supply = <®_1p8v>;\n> +\t\t/* audio output format */\n> +\t\t#sound-dai-cells = <0>;\n> +\t\taudio-port = < TDA1997X_I2S16\n> +\t\t\t TDA1997X_LAYOUT0\n> +\t\t\t TDA1997X_ACLK_128FS >;\n> +\t\t/*\n> +\t\t * The 8bpp BT656 mode outputs YCbCr[11:4] across 8bits over\n> +\t\t * 2 pixclk cycles.\n> +\t\t */\n> +\t\tvidout_portcfg =\n> +\t\t\t/* YCbCr[11:8]<->VP[15:12]<->CSI_DATA[19:16] */\n> +\t\t\t< TDA1997X_VP24_V15_12 TDA1997X_R_CR_CBCR_11_8 >,\n> +\t\t\t/* YCbCr[7:4]<->VP[11:08]<->CSI_DATA[15:12] */\n> +\t\t\t< TDA1997X_VP24_V11_08 TDA1997X_R_CR_CBCR_7_4 >,\n> +\t\tmax-pixel-rate = <180>; /* IMX6 CSI max pixel rate 180MP/sec */\n> +\n> +\t\tport@0 {\n> +\t\t\treg = <0>;\n> +\t\t};\n> +\t\tport@1 {\n> +\t\t\treg = <1>;\n> +\t\t\thdmi_in: endpoint {\n> +\t\t\t\tremote-endpoint = <&ccdc_in>;\n> +\t\t\t};\n> +\t\t};\n> +\t};\n> +\n> -- \n> 2.7.4\n> \n> --\n> To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n> the body of a message to majordomo@vger.kernel.org\n> More majordomo info at http://vger.kernel.org/majordomo-info.html\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y6pYh23RWz9t43\n\tfor ;\n\tThu, 5 Oct 2017 08:14:16 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751194AbdJDVOO (ORCPT\n\t);\n\tWed, 4 Oct 2017 17:14:14 -0400","from mail-oi0-f68.google.com ([209.85.218.68]:37334 \"EHLO\n\tmail-oi0-f68.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751169AbdJDVON (ORCPT\n\t); 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\n\tWed, 04 Oct 2017 14:14:12 -0700 (PDT)","Date":"Wed, 4 Oct 2017 16:14:11 -0500","From":"Rob Herring ","To":"Tim Harvey ","Cc":"linux-media@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, shawnguo@kernel.org,\n\tSteve Longerbeam ,\n\tPhilipp Zabel ,\n\tHans Verkuil , \n\tMauro Carvalho Chehab ","Subject":"Re: [PATCH 2/4] media: dt-bindings: Add bindings for TDA1997X","Message-ID":"<20171004211411.27gxy5wnaymdcm3z@rob-hp-laptop>","References":"<1506119053-21828-1-git-send-email-tharvey@gateworks.com>\n\t<1506119053-21828-3-git-send-email-tharvey@gateworks.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<1506119053-21828-3-git-send-email-tharvey@gateworks.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1780832,"web_url":"http://patchwork.ozlabs.org/comment/1780832/","msgid":"","list_archive_url":null,"date":"2017-10-05T17:06:06","subject":"Re: [PATCH 2/4] media: dt-bindings: Add bindings for TDA1997X","submitter":{"id":41730,"url":"http://patchwork.ozlabs.org/api/people/41730/","name":"Tim Harvey","email":"tharvey@gateworks.com"},"content":"On Wed, Oct 4, 2017 at 2:14 PM, Rob Herring wrote:\n> On Fri, Sep 22, 2017 at 03:24:11PM -0700, Tim Harvey wrote:\n>> Signed-off-by: Tim Harvey \n>\n\nHi Rob, thanks for the review!\n\nI will add a commit message, vendor prefix to non-standard props, and\nremove '_' in the next revision.\n\n>\n>> +\n>> +Optional Properties:\n>> + - max-pixel-rate : Maximum pixel rate supported by the SoC (MP/sec)\n>> + - audio-port : parameters defining audio output port connection\n>\n> That description is meaningless to me.\n>\n>\n>> +The Audio output port consists of A_CLK, A_WS, AP0, AP1, AP2, and AP3 pins\n>> +and can support up to 8-chanenl audio using the following audio bus DAI formats:\n>> + - I2S16\n>> + - I2S32\n>> + - SPDIF\n>> + - OBA (One-Bit-Audio)\n>> + - I2S16_HBR_STRAIGHT (High Bitrate straight through)\n>> + - I2S16_HBR_DEMUX (High Bitrate demuxed)\n>> + - I2S32_HBR_DEMUX (High Bitrate demuxed)\n>> + - DST (Direct Stream Transfer)\n>\n> This either should be a standard, common property or not be in DT.\n> Practically every system is going to have at least one end of the\n> connection that is configurable. The kernel should be able to get lists\n> of supported modes and pick one.\n>\n\nI struggled with 'audio-port' property quite a bit.\n\nLooking at the datasheet a bit closer\n(http://dev.gateworks.com/datasheets/TDA19971-datasheet-rev3.pdf) I\nsee that the audio output port consisting of WS, AP[0:3], CLK really\nonly supports I2S and S/PDIF output modes. The AP[0:3] provide support\nfor up to 8 audio channels. The way these pins are used is defined in\nTable 5/6/7 in the datasheet but I think that the dt perhaps only\nneeds to number of data lines (1-4) (which could also be represented\nas channels (1-8)), and a clock multiplier which could be described as\na 'mclk-fs' multiplication factor like simple-audio bindings does.\n\nWhat would your recommendation be here?\n\n>> +\n\n>> + max-pixel-rate = <180>; /* IMX6 CSI max pixel rate 180MP/sec */\n>\n> That's a constraint that belongs in the i.MX CSI node or driver.\n\nright - that makes sense. I'll talk to the maintainer of the i.MX CSI\ndriver to see what they think.\n\n>\n>> +\n>> + port@0 {\n>> + reg = <0>;\n>> + };\n>> + port@1 {\n>\n> You need to describe how many ports and what they are.\n\nok. My example was a mistake anyway and I propose a single output port such as:\n\nThe device node must contain one 'port' child node for its digital output\nvideo port, in accordance with the video interface bindings defined in\nDocumentation/devicetree/bindings/media/video-interfaces.txt.\n\nExample:\n port {\n tda1997x_to_ipu1_csi0_mux: endpoint {\n remote-endpoint =\n<&ipu1_csi0_mux_from_parallel_sensor>;\n bus-width = <16>;\n hsync-active = <1>;\n vsync-active = <1>;\n data-active = <1>;\n };\n };\n\n>\n>> + reg = <1>;\n>> + hdmi_in: endpoint {\n>> + remote-endpoint = <&ccdc_in>;\n>> + };\n>> + };\n>> + };\n>> + - VP[15:8] connected to IMX6 CSI_DATA[19:12] for 8bit BT656\n>> + 16bit I2S layout0 with a 128*fs clock (A_WS, AP0, A_CLK pins)\n>\n> Do you really need 2 examples? It should be possible to figure out other\n> configurations with better descriptions above.\n>\n\nPerhaps, but I feel like the vidout-portcfg is pretty confusing and\nwanted to provide some different mappings as examples. The\nvidout-portcfg property allows you to shift the bits around on the\noutput pins per 4-bit groups as well as reverse their order and\ndifferent defines are used depending on RGB444/YUV444/YUV422/BT656. I\ncould provide just portcfg examples above the full dts example though\nunder the short description of 'nxp,vidout-portcfg'.\n\nRegards,\n\nTim\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gateworks-com.20150623.gappssmtp.com\n\theader.i=@gateworks-com.20150623.gappssmtp.com header.b=\"haL/t1Rq\"; \n\tdkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y7K1D4bTVz9t2x\n\tfor ;\n\tFri, 6 Oct 2017 04:06:24 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751405AbdJERGK (ORCPT\n\t);\n\tThu, 5 Oct 2017 13:06:10 -0400","from mail-wm0-f50.google.com ([74.125.82.50]:50650 \"EHLO\n\tmail-wm0-f50.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751332AbdJERGI (ORCPT\n\t); Thu, 5 Oct 2017 13:06:08 -0400","by mail-wm0-f50.google.com with SMTP id u138so3305989wmu.5\n\tfor ;\n\tThu, 05 Oct 2017 10:06:08 -0700 (PDT)","by 10.28.228.215 with HTTP; Thu, 5 Oct 2017 10:06:06 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gateworks-com.20150623.gappssmtp.com; s=20150623;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=KoPjNQdzW82CgNw2yW0uu1vPSxmFvWqTKDXcB3TZBLQ=;\n\tb=haL/t1RqJqg7eGWjbQeVnCZDuxQNfbSZYNxzvGYC2Le73lprLTSWBZmxHhfIuK66ZI\n\tZJ6j1yeFRtMhdhpWbqmKvVOZjqarQL+TmrhBwYw4UPqvzt7eV8eAnYrba7rC2W3pndTG\n\tMdmln+ZIb4+4JoV9seGcbBVCuv5S639tLvCywhXh676lw7OhOcFeDOEkEE/Y4MSUmu56\n\tsr1IBdrj4I1IOCa+pxy4drbnIACcJB1DtdjSRK3LzoPZJK6vJfJ2mI47d6u0kF/8BDiX\n\tc77d3s52lpHnqD67MvaaM8UbnuZYGcuzQuspLps60sPenZ0fOa8WzuBEd0oUfbuGQfWT\n\tcMcw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=KoPjNQdzW82CgNw2yW0uu1vPSxmFvWqTKDXcB3TZBLQ=;\n\tb=MpKuYJ7rR+kTdz/hJ+c7cOLZZxTCGUfufbyvIgoIr1GudTy7ggGzqC1Zg75HCQc8Vb\n\taV+6WRJbS01UX8H6NjgSi6zfFhWkpuHxJRxCJejfzifKjcnoUFYRMAB4e6vk38NBI5vI\n\tqW2TgKww0flV36i5Cz4Yjwi7rTGCjp8cQ83n7qidILgpWL3K26dLNwuJ+cpwtKJgSkJ7\n\teSg48vM2kqSgzjc4NyBV7CKJlumqJlRzGRJ4XMuos9mRRHZ4ZfllZjQhg9GVDjE/dSHQ\n\t1RxzicdX/+8/hW0uXWMfzhDxQCAv2Xl+tyUx3JbfQFJYKjrq+kxFtEpS+ZNqsVaaXkXH\n\tEoOQ==","X-Gm-Message-State":"AMCzsaVFOvv3l0UagR8hpf+hxrXnJ3KZNoIft//unnVnVmTg0agyTBBt\n\tjXJFtOSqYExbsiHrgIvku2P03FPjN3FvP2taMtVdFA==","X-Google-Smtp-Source":"AOwi7QBb8SEbZWtZwnKDaKZFVpfoiNRYF0vSpIwqPMUiXGf7r1Ike6hzL0JZoEq4p0WOkKvbwEzzIMbHj9CAb7nGOZA=","X-Received":"by 10.28.62.67 with SMTP id l64mr12220374wma.6.1507223167243;\n\tThu, 05 Oct 2017 10:06:07 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20171004211411.27gxy5wnaymdcm3z@rob-hp-laptop>","References":"<1506119053-21828-1-git-send-email-tharvey@gateworks.com>\n\t<1506119053-21828-3-git-send-email-tharvey@gateworks.com>\n\t<20171004211411.27gxy5wnaymdcm3z@rob-hp-laptop>","From":"Tim Harvey ","Date":"Thu, 5 Oct 2017 10:06:06 -0700","Message-ID":"","Subject":"Re: [PATCH 2/4] media: dt-bindings: Add bindings for TDA1997X","To":"Rob Herring ","Cc":"linux-media ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-kernel@vger.kernel.org\" ,\n\tShawn Guo ,\n\tSteve Longerbeam , \n\tPhilipp Zabel ,\n\tHans Verkuil , \n\tMauro Carvalho Chehab ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]