[{"id":1780806,"web_url":"http://patchwork.ozlabs.org/comment/1780806/","msgid":"","list_archive_url":null,"date":"2017-10-05T16:39:18","subject":"Re: [Qemu-devel] [PATCH 09/20] target/arm: Add new-in-v8M SFSR and\n\tSFAR","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 09/22/2017 10:59 AM, Peter Maydell wrote:\n> Add the new M profile Secure Fault Status Register\n> and Secure Fault Address Register.\n> \n> Signed-off-by: Peter Maydell \n> ---\n> target/arm/cpu.h | 12 ++++++++++++\n> hw/intc/armv7m_nvic.c | 34 ++++++++++++++++++++++++++++++++++\n> target/arm/machine.c | 2 ++\n> 3 files changed, 48 insertions(+)\n\nReviewed-by: Richard Henderson \n\n\nr~","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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