[{"id":1780256,"web_url":"http://patchwork.ozlabs.org/comment/1780256/","msgid":"<88468bf1-594d-9b2e-1dbe-669073e42e76@amsat.org>","list_archive_url":null,"date":"2017-10-05T03:29:07","subject":"Re: [Qemu-devel] [Qemu-arm] [PATCH 16/20] target/arm: Factor out\n\t\"get mmuidx for specified security state\"","submitter":{"id":70924,"url":"http://patchwork.ozlabs.org/api/people/70924/","name":"Philippe Mathieu-Daudé","email":"f4bug@amsat.org"},"content":"On 09/22/2017 12:00 PM, Peter Maydell wrote:\n> For the SG instruction and secure function return we are going\n> to want to do memory accesses using the MMU index of the CPU\n> in secure state, even though the CPU is currently in non-secure\n> state. Write arm_v7m_mmu_idx_for_secstate() to do this job,\n> and use it in cpu_mmu_index().\n> \n> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>\n\nReviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>\n\n> ---\n>  target/arm/cpu.h | 32 +++++++++++++++++++++-----------\n>  1 file changed, 21 insertions(+), 11 deletions(-)\n> \n> diff --git a/target/arm/cpu.h b/target/arm/cpu.h\n> index 70c1f85..89d49cd 100644\n> --- a/target/arm/cpu.h\n> +++ b/target/arm/cpu.h\n> @@ -2329,23 +2329,33 @@ static inline int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx)\n>      }\n>  }\n>  \n> +/* Return the MMU index for a v7M CPU in the specified security state */\n> +static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env,\n> +                                                     bool secstate)\n> +{\n> +    int el = arm_current_el(env);\n> +    ARMMMUIdx mmu_idx;\n> +\n> +    if (el == 0) {\n> +        mmu_idx = secstate ? ARMMMUIdx_MSUser : ARMMMUIdx_MUser;\n> +    } else {\n> +        mmu_idx = secstate ? ARMMMUIdx_MSPriv : ARMMMUIdx_MPriv;\n> +    }\n> +\n> +    if (armv7m_nvic_neg_prio_requested(env->nvic, secstate)) {\n> +        mmu_idx = secstate ? ARMMMUIdx_MSNegPri : ARMMMUIdx_MNegPri;\n> +    }\n> +\n> +    return mmu_idx;\n> +}\n> +\n>  /* Determine the current mmu_idx to use for normal loads/stores */\n>  static inline int cpu_mmu_index(CPUARMState *env, bool ifetch)\n>  {\n>      int el = arm_current_el(env);\n>  \n>      if (arm_feature(env, ARM_FEATURE_M)) {\n> -        ARMMMUIdx mmu_idx;\n> -\n> -        if (el == 0) {\n> -            mmu_idx = env->v7m.secure ? ARMMMUIdx_MSUser : ARMMMUIdx_MUser;\n> -        } else {\n> -            mmu_idx = env->v7m.secure ? ARMMMUIdx_MSPriv : ARMMMUIdx_MPriv;\n> -        }\n> -\n> -        if (armv7m_nvic_neg_prio_requested(env->nvic, env->v7m.secure)) {\n> -            mmu_idx = env->v7m.secure ? ARMMMUIdx_MSNegPri : ARMMMUIdx_MNegPri;\n> -        }\n> +        ARMMMUIdx mmu_idx = arm_v7m_mmu_idx_for_secstate(env, env->v7m.secure);\n>  \n>          return arm_to_core_mmu_idx(mmu_idx);\n>      }\n>","headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"piSn7CGF\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y6ytj6y6Mz9sRq\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu,  5 Oct 2017 14:29:33 +1100 (AEDT)","from localhost ([::1]:37634 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dzwqq-0005aj-4I\n\tfor incoming@patchwork.ozlabs.org; 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\n\tWed, 04 Oct 2017 20:29:10 -0700 (PDT)","To":"Peter Maydell <peter.maydell@linaro.org>, qemu-arm@nongnu.org,\n\tqemu-devel@nongnu.org","References":"<1506092407-26985-1-git-send-email-peter.maydell@linaro.org>\n\t<1506092407-26985-17-git-send-email-peter.maydell@linaro.org>","From":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <f4bug@amsat.org>","Openpgp":"id=FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE;\n\turl=http://pgp.mit.edu/pks/lookup?op=get&search=0xE3E32C2CDEADC0DE","Message-ID":"<88468bf1-594d-9b2e-1dbe-669073e42e76@amsat.org>","Date":"Thu, 5 Oct 2017 00:29:07 -0300","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<1506092407-26985-17-git-send-email-peter.maydell@linaro.org>","Content-Type":"text/plain; charset=utf-8","Content-Language":"en-US","Content-Transfer-Encoding":"8bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400d:c09::244","Subject":"Re: [Qemu-devel] [Qemu-arm] [PATCH 16/20] target/arm: Factor out\n\t\"get mmuidx for specified security state\"","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Cc":"patches@linaro.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"}},{"id":1780903,"web_url":"http://patchwork.ozlabs.org/comment/1780903/","msgid":"<3d5580cc-eea2-280b-5a65-0462e7af7cbd@linaro.org>","list_archive_url":null,"date":"2017-10-05T18:42:06","subject":"Re: [Qemu-devel] [PATCH 16/20] target/arm: Factor out \"get mmuidx\n\tfor specified security state\"","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 09/22/2017 11:00 AM, Peter Maydell wrote:\n> For the SG instruction and secure function return we are going\n> to want to do memory accesses using the MMU index of the CPU\n> in secure state, even though the CPU is currently in non-secure\n> state. Write arm_v7m_mmu_idx_for_secstate() to do this job,\n> and use it in cpu_mmu_index().\n> \n> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>\n> ---\n>  target/arm/cpu.h | 32 +++++++++++++++++++++-----------\n>  1 file changed, 21 insertions(+), 11 deletions(-)\n\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\n\n\nr~","headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"JgGS5xRv\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y7MBL0SPJz9t34\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri,  6 Oct 2017 05:44:26 +1100 (AEDT)","from localhost ([::1]:41553 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1e0B8B-0007Az-Mh\n\tfor incoming@patchwork.ozlabs.org; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<1506092407-26985-17-git-send-email-peter.maydell@linaro.org>","Content-Type":"text/plain; charset=utf-8","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400d:c0d::22e","Subject":"Re: [Qemu-devel] [PATCH 16/20] target/arm: Factor out \"get mmuidx\n\tfor specified security state\"","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Cc":"patches@linaro.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"}}]