[{"id":1780795,"web_url":"http://patchwork.ozlabs.org/comment/1780795/","msgid":"<86c98e0d-ed73-6d6e-d4bd-9f28df46b4ce@linaro.org>","list_archive_url":null,"date":"2017-10-05T16:25:56","subject":"Re: [Qemu-devel] [PATCH 06/20] target/arm: Check for xPSR mismatch\n\tusage faults earlier for v8M","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 09/22/2017 10:59 AM, Peter Maydell wrote:\n> ARM v8M specifies that the INVPC usage fault for mismatched\n> xPSR exception field and handler mode bit should be checked\n> before updating the PSR and SP, so that the fault is taken\n> with the existing stack frame rather than by pushing a new one.\n> Perform this check in the right place for v8M.\n> \n> Since v7M specifies in its pseudocode that this usage fault\n> check should happen later, we have to retain the original\n> code for that check rather than being able to merge the two.\n> (The distinction is architecturally visible but only in\n> very obscure corner cases like attempting an invalid exception\n> return with an exception frame in read only memory.)\n> \n> Signed-off-by: Peter Maydell \n> ---\n> target/arm/helper.c | 30 +++++++++++++++++++++++++++---\n> 1 file changed, 27 insertions(+), 3 deletions(-)\n\nReviewed-by: Richard Henderson \n\n\nr~","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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