[{"id":1773508,"web_url":"http://patchwork.ozlabs.org/comment/1773508/","msgid":"<20170922113522.4nbls3bb3sglsu55@valkosipuli.retiisi.org.uk>","list_archive_url":null,"date":"2017-09-22T11:35:23","subject":"Re: [PATCH v4 1/2] dt-bindings: media: Add Cadence MIPI-CSI2 RX\n\tDevice Tree bindings","submitter":{"id":1593,"url":"http://patchwork.ozlabs.org/api/people/1593/","name":"Sakari Ailus","email":"sakari.ailus@iki.fi"},"content":"Hi Maxime,\n\nOn Fri, Sep 22, 2017 at 12:08:22PM +0200, Maxime Ripard wrote:\n> The Cadence MIPI-CSI2 RX controller is a CSI2RX bridge that supports up to\n> 4 CSI-2 lanes, and can route the frames to up to 4 streams, depending on\n> the hardware implementation.\n> \n> It can operate with an external D-PHY, an internal one or no D-PHY at all\n> in some configurations.\n> \n> Acked-by: Rob Herring \n> Acked-by: Benoit Parrot \n> Acked-by: Sakari Ailus \n> Reviewed-by: Laurent Pinchart \n> Signed-off-by: Maxime Ripard \n> ---\n> .../devicetree/bindings/media/cdns,csi2rx.txt | 97 ++++++++++++++++++++++\n> 1 file changed, 97 insertions(+)\n> create mode 100644 Documentation/devicetree/bindings/media/cdns,csi2rx.txt\n> \n> diff --git a/Documentation/devicetree/bindings/media/cdns,csi2rx.txt b/Documentation/devicetree/bindings/media/cdns,csi2rx.txt\n> new file mode 100644\n> index 000000000000..e9c30f964a96\n> --- /dev/null\n> +++ b/Documentation/devicetree/bindings/media/cdns,csi2rx.txt\n> @@ -0,0 +1,97 @@\n> +Cadence MIPI-CSI2 RX controller\n> +===============================\n> +\n> +The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI\n> +lanes in input, and 4 different pixel streams in output.\n> +\n> +Required properties:\n> + - compatible: must be set to \"cdns,csi2rx\" and an SoC-specific compatible\n> + - reg: base address and size of the memory mapped region\n> + - clocks: phandles to the clocks driving the controller\n> + - clock-names: must contain:\n> + * sys_clk: main clock\n> + * p_clk: register bank clock\n> + * pixel_if[0-3]_clk: pixel stream output clock, one for each stream\n> + implemented in hardware, between 0 and 3\n> +\n> +Optional properties:\n> + - phys: phandle to the external D-PHY, phy-names must be provided\n> + - phy-names: must contain dphy, if the implementation uses an\n> + external D-PHY\n> +\n> +Required subnodes:\n> + - ports: A ports node with one port child node per device input and output\n> + port, in accordance with the video interface bindings defined in\n> + Documentation/devicetree/bindings/media/video-interfaces.txt. The\n> + port nodes numbered as follows.\n> +\n> + Port Description\n> + -----------------------------\n> + 0 CSI-2 input\n> + 1 Stream 0 output\n> + 2 Stream 1 output\n> + 3 Stream 2 output\n> + 4 Stream 3 output\n> +\n> + The stream output port nodes are optional if they are not connected\n> + to anything at the hardware level or implemented in the design.\n\nCould you add supported endpoint numbers, please?\n\n\n\n> +\n> +Example:\n> +\n> +csi2rx: csi-bridge@0d060000 {\n> +\tcompatible = \"cdns,csi2rx\";\n> +\treg = <0x0d060000 0x1000>;\n> +\tclocks = <&byteclock>, <&byteclock>\n> +\t\t <&coreclock>, <&coreclock>,\n> +\t\t <&coreclock>, <&coreclock>;\n> +\tclock-names = \"sys_clk\", \"p_clk\",\n> +\t\t \"pixel_if0_clk\", \"pixel_if1_clk\",\n> +\t\t \"pixel_if2_clk\", \"pixel_if3_clk\";\n> +\n> +\tports {\n> +\t\t#address-cells = <1>;\n> +\t\t#size-cells = <0>;\n> +\n> +\t\tport@0 {\n> +\t\t\treg = <0>;\n> +\n> +\t\t\tcsi2rx_in_sensor: endpoint {\n> +\t\t\t\tremote-endpoint = <&sensor_out_csi2rx>;\n> +\t\t\t\tclock-lanes = <0>;\n> +\t\t\t\tdata-lanes = <1 2>;\n> +\t\t\t};\n> +\t\t};\n> +\n> +\t\tport@1 {\n> +\t\t\treg = <1>;\n> +\n> +\t\t\tcsi2rx_out_grabber0: endpoint {\n> +\t\t\t\tremote-endpoint = <&grabber0_in_csi2rx>;\n> +\t\t\t};\n> +\t\t};\n> +\n> +\t\tport@2 {\n> +\t\t\treg = <2>;\n> +\n> +\t\t\tcsi2rx_out_grabber1: endpoint {\n> +\t\t\t\tremote-endpoint = <&grabber1_in_csi2rx>;\n> +\t\t\t};\n> +\t\t};\n> +\n> +\t\tport@3 {\n> +\t\t\treg = <3>;\n> +\n> +\t\t\tcsi2rx_out_grabber2: endpoint {\n> +\t\t\t\tremote-endpoint = <&grabber2_in_csi2rx>;\n> +\t\t\t};\n> +\t\t};\n> +\n> +\t\tport@4 {\n> +\t\t\treg = <4>;\n> +\n> +\t\t\tcsi2rx_out_grabber3: endpoint {\n> +\t\t\t\tremote-endpoint = <&grabber3_in_csi2rx>;\n> +\t\t\t};\n> +\t\t};\n> +\t};\n> +};\n> -- \n> 2.13.5\n>","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xzBHQ2qwTz9sNw\n\tfor ;\n\tFri, 22 Sep 2017 21:35:30 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751997AbdIVLf1 (ORCPT\n\t);\n\tFri, 22 Sep 2017 07:35:27 -0400","from nblzone-211-213.nblnetworks.fi ([83.145.211.213]:43608 \"EHLO\n\thillosipuli.retiisi.org.uk\" rhost-flags-OK-OK-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1751931AbdIVLf1 (ORCPT\n\t); Fri, 22 Sep 2017 07:35:27 -0400","from valkosipuli.localdomain (valkosipuli.retiisi.org.uk\n\t[IPv6:2001:1bc8:1a6:d3d5::80:2])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby hillosipuli.retiisi.org.uk (Postfix) with ESMTPS id 73497600F4;\n\tFri, 22 Sep 2017 14:35:24 +0300 (EEST)","from sakke by valkosipuli.localdomain with local (Exim 4.89)\n\t(envelope-from )\n\tid 1dvMEt-0005f2-Ls; Fri, 22 Sep 2017 14:35:23 +0300"],"Date":"Fri, 22 Sep 2017 14:35:23 +0300","From":"Sakari Ailus ","To":"Maxime Ripard ","Cc":"Mauro Carvalho Chehab , Mark Rutland\n\t, Rob Herring , Laurent\n\tPinchart , \n\tlinux-media@vger.kernel.org, devicetree@vger.kernel.org, Cyprian Wronka\n\t, Richard Sproul , Alan Douglas\n\t, Steve Creaney , Thomas\n\tPetazzoni , Boris Brezillon\n\t, Niklas =?iso-8859-1?q?S=F6derlun?=\n\t=?iso-8859-1?q?d?= ,\n\tHans Verkuil , Sakari Ailus\n\t, \n\tBenoit Parrot , nm@ti.com","Subject":"Re: [PATCH v4 1/2] dt-bindings: media: Add Cadence MIPI-CSI2 RX\n\tDevice Tree bindings","Message-ID":"<20170922113522.4nbls3bb3sglsu55@valkosipuli.retiisi.org.uk>","References":"<20170922100823.18184-1-maxime.ripard@free-electrons.com>\n\t<20170922100823.18184-2-maxime.ripard@free-electrons.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170922100823.18184-2-maxime.ripard@free-electrons.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1773689,"web_url":"http://patchwork.ozlabs.org/comment/1773689/","msgid":"<20170922145404.444dqynmqz34jm7c@flea.lan>","list_archive_url":null,"date":"2017-09-22T14:54:04","subject":"Re: [PATCH v4 1/2] dt-bindings: media: Add Cadence MIPI-CSI2 RX\n\tDevice Tree bindings","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"Hi Sakari,\n\nOn Fri, Sep 22, 2017 at 11:35:23AM +0000, Sakari Ailus wrote:\n> Hi Maxime,\n> \n> On Fri, Sep 22, 2017 at 12:08:22PM +0200, Maxime Ripard wrote:\n> > The Cadence MIPI-CSI2 RX controller is a CSI2RX bridge that supports up to\n> > 4 CSI-2 lanes, and can route the frames to up to 4 streams, depending on\n> > the hardware implementation.\n> > \n> > It can operate with an external D-PHY, an internal one or no D-PHY at all\n> > in some configurations.\n> > \n> > Acked-by: Rob Herring \n> > Acked-by: Benoit Parrot \n> > Acked-by: Sakari Ailus \n> > Reviewed-by: Laurent Pinchart \n> > Signed-off-by: Maxime Ripard \n> > ---\n> > .../devicetree/bindings/media/cdns,csi2rx.txt | 97 ++++++++++++++++++++++\n> > 1 file changed, 97 insertions(+)\n> > create mode 100644 Documentation/devicetree/bindings/media/cdns,csi2rx.txt\n> > \n> > diff --git a/Documentation/devicetree/bindings/media/cdns,csi2rx.txt b/Documentation/devicetree/bindings/media/cdns,csi2rx.txt\n> > new file mode 100644\n> > index 000000000000..e9c30f964a96\n> > --- /dev/null\n> > +++ b/Documentation/devicetree/bindings/media/cdns,csi2rx.txt\n> > @@ -0,0 +1,97 @@\n> > +Cadence MIPI-CSI2 RX controller\n> > +===============================\n> > +\n> > +The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI\n> > +lanes in input, and 4 different pixel streams in output.\n> > +\n> > +Required properties:\n> > + - compatible: must be set to \"cdns,csi2rx\" and an SoC-specific compatible\n> > + - reg: base address and size of the memory mapped region\n> > + - clocks: phandles to the clocks driving the controller\n> > + - clock-names: must contain:\n> > + * sys_clk: main clock\n> > + * p_clk: register bank clock\n> > + * pixel_if[0-3]_clk: pixel stream output clock, one for each stream\n> > + implemented in hardware, between 0 and 3\n> > +\n> > +Optional properties:\n> > + - phys: phandle to the external D-PHY, phy-names must be provided\n> > + - phy-names: must contain dphy, if the implementation uses an\n> > + external D-PHY\n> > +\n> > +Required subnodes:\n> > + - ports: A ports node with one port child node per device input and output\n> > + port, in accordance with the video interface bindings defined in\n> > + Documentation/devicetree/bindings/media/video-interfaces.txt. The\n> > + port nodes numbered as follows.\n> > +\n> > + Port Description\n> > + -----------------------------\n> > + 0 CSI-2 input\n> > + 1 Stream 0 output\n> > + 2 Stream 1 output\n> > + 3 Stream 2 output\n> > + 4 Stream 3 output\n> > +\n> > + The stream output port nodes are optional if they are not connected\n> > + to anything at the hardware level or implemented in the design.\n> \n> Could you add supported endpoint numbers, please?\n> \n> \n\nSo in the case where you have a single endpoint, usually you don't\nprovide an endpoint number at all. Should I document it as zero, or as\n\"no number\"?\n\nThanks!\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xzGhc2spKz9s7p\n\tfor ;\n\tSat, 23 Sep 2017 00:54:08 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752069AbdIVOyG (ORCPT\n\t);\n\tFri, 22 Sep 2017 10:54:06 -0400","from mail.free-electrons.com ([62.4.15.54]:38525 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751873AbdIVOyG (ORCPT\n\t); Fri, 22 Sep 2017 10:54:06 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 28AB3209F9; Fri, 22 Sep 2017 16:54:04 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id E686C209F9;\n\tFri, 22 Sep 2017 16:54:03 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Fri, 22 Sep 2017 16:54:04 +0200","From":"Maxime Ripard ","To":"Sakari Ailus ","Cc":"Mauro Carvalho Chehab , Mark Rutland\n\t, Rob Herring , Laurent\n\tPinchart , \n\tlinux-media@vger.kernel.org, devicetree@vger.kernel.org, Cyprian Wronka\n\t, Richard Sproul , Alan Douglas\n\t, Steve Creaney , Thomas\n\tPetazzoni , Boris Brezillon\n\t, Niklas =?iso-8859-1?q?S=F6derlun?=\n\t=?iso-8859-1?q?d?= ,\n\tHans Verkuil , Sakari Ailus\n\t, \n\tBenoit Parrot , nm@ti.com","Subject":"Re: [PATCH v4 1/2] dt-bindings: media: Add Cadence MIPI-CSI2 RX\n\tDevice Tree bindings","Message-ID":"<20170922145404.444dqynmqz34jm7c@flea.lan>","References":"<20170922100823.18184-1-maxime.ripard@free-electrons.com>\n\t<20170922100823.18184-2-maxime.ripard@free-electrons.com>\n\t<20170922113522.4nbls3bb3sglsu55@valkosipuli.retiisi.org.uk>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"vbujyc7vulhtlheg\"","Content-Disposition":"inline","In-Reply-To":"<20170922113522.4nbls3bb3sglsu55@valkosipuli.retiisi.org.uk>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775212,"web_url":"http://patchwork.ozlabs.org/comment/1775212/","msgid":"<20170926073353.jzfx2gxy5pa5piyp@valkosipuli.retiisi.org.uk>","list_archive_url":null,"date":"2017-09-26T07:33:53","subject":"Re: [PATCH v4 1/2] dt-bindings: media: Add Cadence MIPI-CSI2 RX\n\tDevice Tree bindings","submitter":{"id":1593,"url":"http://patchwork.ozlabs.org/api/people/1593/","name":"Sakari Ailus","email":"sakari.ailus@iki.fi"},"content":"Hi Maxime,\n\nOn Fri, Sep 22, 2017 at 04:54:04PM +0200, Maxime Ripard wrote:\n> Hi Sakari,\n> \n> On Fri, Sep 22, 2017 at 11:35:23AM +0000, Sakari Ailus wrote:\n...\n> > > + Documentation/devicetree/bindings/media/video-interfaces.txt. The\n> > > + port nodes numbered as follows.\n> > > +\n> > > + Port Description\n> > > + -----------------------------\n> > > + 0 CSI-2 input\n> > > + 1 Stream 0 output\n> > > + 2 Stream 1 output\n> > > + 3 Stream 2 output\n> > > + 4 Stream 3 output\n> > > +\n> > > + The stream output port nodes are optional if they are not connected\n> > > + to anything at the hardware level or implemented in the design.\n> > \n> > Could you add supported endpoint numbers, please?\n> > \n> > \n> \n> So in the case where you have a single endpoint, usually you don't\n> provide an endpoint number at all. Should I document it as zero, or as\n> \"no number\"?\n\nGood question. If the endpoint numbers generally aren't meaningful for the\ndevice, no number should be equally good. But that should be documented.\n\nJust my opinion. I wonder what Rob thinks.\n\nI'll update the documentation patch.","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1Xkx52gnz9tXc\n\tfor ;\n\tTue, 26 Sep 2017 17:34:01 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S967523AbdIZHd7 (ORCPT );\n\tTue, 26 Sep 2017 03:33:59 -0400","from nblzone-211-213.nblnetworks.fi ([83.145.211.213]:54628 \"EHLO\n\thillosipuli.retiisi.org.uk\" rhost-flags-OK-OK-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S967519AbdIZHd5 (ORCPT\n\t); Tue, 26 Sep 2017 03:33:57 -0400","from valkosipuli.localdomain (valkosipuli.retiisi.org.uk\n\t[IPv6:2001:1bc8:1a6:d3d5::80:2])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby hillosipuli.retiisi.org.uk (Postfix) with ESMTPS id 8307060103;\n\tTue, 26 Sep 2017 10:33:54 +0300 (EEST)","from sakke by valkosipuli.localdomain with local (Exim 4.89)\n\t(envelope-from )\n\tid 1dwkNO-0007Cb-2m; Tue, 26 Sep 2017 10:33:54 +0300"],"Date":"Tue, 26 Sep 2017 10:33:53 +0300","From":"Sakari Ailus ","To":"Maxime Ripard ","Cc":"Mauro Carvalho Chehab , Mark Rutland\n\t, Rob Herring , Laurent\n\tPinchart , \n\tlinux-media@vger.kernel.org, devicetree@vger.kernel.org, Cyprian Wronka\n\t, Richard Sproul , Alan Douglas\n\t, Steve Creaney , Thomas\n\tPetazzoni , Boris Brezillon\n\t, Niklas =?iso-8859-1?q?S=F6derlun?=\n\t=?iso-8859-1?q?d?= ,\n\tHans Verkuil , Sakari Ailus\n\t, \n\tBenoit Parrot , nm@ti.com","Subject":"Re: [PATCH v4 1/2] dt-bindings: media: Add Cadence MIPI-CSI2 RX\n\tDevice Tree bindings","Message-ID":"<20170926073353.jzfx2gxy5pa5piyp@valkosipuli.retiisi.org.uk>","References":"<20170922100823.18184-1-maxime.ripard@free-electrons.com>\n\t<20170922100823.18184-2-maxime.ripard@free-electrons.com>\n\t<20170922113522.4nbls3bb3sglsu55@valkosipuli.retiisi.org.uk>\n\t<20170922145404.444dqynmqz34jm7c@flea.lan>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170922145404.444dqynmqz34jm7c@flea.lan>","User-Agent":"NeoMutt/20170113 (1.7.2)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]