[{"id":1773483,"web_url":"http://patchwork.ozlabs.org/comment/1773483/","msgid":"<20170922081547.zhjboykk6xm6sno3@flea.lan>","list_archive_url":null,"date":"2017-09-22T08:15:47","subject":"Re: [U-Boot] [PATCH 6/9] net: sun8i_emac: Support RX/TX delay chains","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Fri, Sep 22, 2017 at 07:26:32AM +0000, Chen-Yu Tsai wrote:\n> The EMAC syscon has configurable RX/TX delay chains for use with RGMII\n> PHYs.\n> \n> This adds support for configuring them via device tree properties. The\n> property names and format were defined in Linux's dwmac-sun8i binding\n> that was merged at one point.\n> \n> Signed-off-by: Chen-Yu Tsai \n\nAcked-by: Maxime Ripard \n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xz9ly4M06z9sNw\n\tfor ;\n\tFri, 22 Sep 2017 21:11:41 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 842A0C21FE7; Fri, 22 Sep 2017 11:11:30 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id A19DEC21FE0;\n\tFri, 22 Sep 2017 11:10:52 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 03819C21E0A; Fri, 22 Sep 2017 11:10:49 +0000 (UTC)","from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54])\n\tby lists.denx.de (Postfix) with ESMTP id 675EEC21E0A\n\tfor ; Fri, 22 Sep 2017 11:10:47 +0000 (UTC)","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 64DEA209EB; Fri, 22 Sep 2017 13:10:46 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 38B28209E2;\n\tFri, 22 Sep 2017 13:10:46 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0","Date":"Fri, 22 Sep 2017 10:15:47 +0200","From":"Maxime Ripard ","To":"Chen-Yu Tsai ","Message-ID":"<20170922081547.zhjboykk6xm6sno3@flea.lan>","References":"<20170922072635.32105-1-wens@csie.org>\n\t<20170922072635.32105-7-wens@csie.org>","MIME-Version":"1.0","In-Reply-To":"<20170922072635.32105-7-wens@csie.org>","User-Agent":"NeoMutt/20170914 (1.9.0)","Cc":"u-boot@lists.denx.de, Jagan Teki ,\n\tJoe Hershberger ","Subject":"Re: [U-Boot] [PATCH 6/9] net: sun8i_emac: Support RX/TX delay chains","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"multipart/mixed;\n\tboundary=\"===============0407064562845772229==\"","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1776446,"web_url":"http://patchwork.ozlabs.org/comment/1776446/","msgid":"","list_archive_url":null,"date":"2017-09-27T15:53:07","subject":"Re: [U-Boot] [PATCH 6/9] net: sun8i_emac: Support RX/TX delay chains","submitter":{"id":8809,"url":"http://patchwork.ozlabs.org/api/people/8809/","name":"Joe Hershberger","email":"joe.hershberger@ni.com"},"content":"On Fri, Sep 22, 2017 at 2:26 AM, Chen-Yu Tsai wrote:\n> The EMAC syscon has configurable RX/TX delay chains for use with RGMII\n> PHYs.\n>\n> This adds support for configuring them via device tree properties. The\n> property names and format were defined in Linux's dwmac-sun8i binding\n> that was merged at one point.\n>\n> Signed-off-by: Chen-Yu Tsai \n> ---\n> drivers/net/sun8i_emac.c | 25 +++++++++++++++++++++++++\n> 1 file changed, 25 insertions(+)\n>\n> diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c\n> index 09bbb2cdb5ca..5fa1b4c170d7 100644\n> --- a/drivers/net/sun8i_emac.c\n> +++ b/drivers/net/sun8i_emac.c\n> @@ -56,6 +56,10 @@\n> #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */\n>\n> #define SC_RMII_EN BIT(13)\n> +#define SC_TXDC_SHIFT 10\n> +#define SC_TXDC_MASK GENMASK(2, 0)\n> +#define SC_RXDC_SHIFT 5\n> +#define SC_RXDC_MASK GENMASK(4, 0)\n> #define SC_EPIT BIT(2) /* 1: RGMII, 0: MII */\n> #define SC_ETCS_MASK GENMASK(1, 0)\n> #define SC_ETCS_EXT_GMII 0x1\n> @@ -125,6 +129,8 @@ struct emac_eth_dev {\n> u32 addr;\n> u32 tx_slot;\n> bool use_internal_phy;\n> + u32 tx_delay;\n> + u32 rx_delay;\n>\n> enum emac_variant variant;\n> void *mac_reg;\n> @@ -290,6 +296,12 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)\n> if (priv->variant == H3_EMAC || priv->variant == A64_EMAC)\n> reg &= ~SC_RMII_EN;\n>\n> + /* Configure RX/TX delay chains */\n> + reg &= ~(SC_RXDC_MASK << SC_RXDC_SHIFT);\n> + reg &= ~(SC_TXDC_MASK << SC_TXDC_SHIFT);\n> + reg |= (priv->rx_delay & SC_RXDC_MASK) << SC_RXDC_SHIFT;\n> + reg |= (priv->tx_delay & SC_TXDC_MASK) << SC_TXDC_SHIFT;\n\nWhy not use bitfield_replace_by_mask() from include/bitfield.h?\n\n> +\n> switch (priv->interface) {\n> case PHY_INTERFACE_MODE_MII:\n> /* default */\n> @@ -836,6 +848,19 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)\n> }\n> #endif\n>\n> + /* Get RX/TX delays for RGMII */\n> + priv->rx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),\n> + \"allwinner,rx-delay-ps\", 0);\n> + if (priv->rx_delay % 100 || priv->rx_delay > 3100)\n> + debug(\"%s: invalid rx delay value\\n\", __func__);\n> + priv->rx_delay /= 100;\n> +\n> + priv->tx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),\n> + \"allwinner,tx-delay-ps\", 0);\n> + if (priv->tx_delay % 100 || priv->tx_delay > 800)\n> + debug(\"%s: invalid tx delay value\\n\", __func__);\n> + priv->tx_delay /= 100;\n> +\n> return 0;\n> }\n>\n> --\n> 2.14.1\n>\n> _______________________________________________\n> U-Boot mailing list\n> U-Boot@lists.denx.de\n> https://lists.denx.de/listinfo/u-boot","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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SFP:1102; SCL:1; SRVR:DM5PR04MB0922;\n\tH:mail-it0-f41.google.com; FPR:; \n\tSPF:None; PTR:InfoNoRecords; MX:1; A:1; LANG:en; ","Received-SPF":"None (protection.outlook.com: ni.com does not designate\n\tpermitted sender hosts)","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-OriginatorOrg":"ni.com","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"27 Sep 2017 15:53:32.2494\n\t(UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"87ba1f9a-44cd-43a6-b008-6fdb45a5204e","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DM5PR04MB0922","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-27_04:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_policy_notspam\n\tpolicy=outbound_policy score=30\n\tpriorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0\n\tbulkscore=0\n\tspamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0\n\tadultscore=0\n\tclassifier=spam adjust=30 reason=mlx scancount=1\n\tengine=8.0.1-1707230000\n\tdefinitions=main-1709270221","Cc":"u-boot ,\n\tMaxime Ripard ,\n\tJagan Teki , Joe Hershberger ","Subject":"Re: [U-Boot] [PATCH 6/9] net: sun8i_emac: Support RX/TX delay chains","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Reply-To":"joe.hershberger@gmail.com","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1777409,"web_url":"http://patchwork.ozlabs.org/comment/1777409/","msgid":"","list_archive_url":null,"date":"2017-09-29T08:16:44","subject":"Re: [U-Boot] [PATCH 6/9] net: sun8i_emac: Support RX/TX delay chains","submitter":{"id":47154,"url":"http://patchwork.ozlabs.org/api/people/47154/","name":"Chen-Yu Tsai","email":"wens@csie.org"},"content":"On Wed, Sep 27, 2017 at 11:53 PM, Joe Hershberger\n wrote:\n> On Fri, Sep 22, 2017 at 2:26 AM, Chen-Yu Tsai wrote:\n>> The EMAC syscon has configurable RX/TX delay chains for use with RGMII\n>> PHYs.\n>>\n>> This adds support for configuring them via device tree properties. The\n>> property names and format were defined in Linux's dwmac-sun8i binding\n>> that was merged at one point.\n>>\n>> Signed-off-by: Chen-Yu Tsai \n>> ---\n>> drivers/net/sun8i_emac.c | 25 +++++++++++++++++++++++++\n>> 1 file changed, 25 insertions(+)\n>>\n>> diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c\n>> index 09bbb2cdb5ca..5fa1b4c170d7 100644\n>> --- a/drivers/net/sun8i_emac.c\n>> +++ b/drivers/net/sun8i_emac.c\n>> @@ -56,6 +56,10 @@\n>> #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */\n>>\n>> #define SC_RMII_EN BIT(13)\n>> +#define SC_TXDC_SHIFT 10\n>> +#define SC_TXDC_MASK GENMASK(2, 0)\n>> +#define SC_RXDC_SHIFT 5\n>> +#define SC_RXDC_MASK GENMASK(4, 0)\n>> #define SC_EPIT BIT(2) /* 1: RGMII, 0: MII */\n>> #define SC_ETCS_MASK GENMASK(1, 0)\n>> #define SC_ETCS_EXT_GMII 0x1\n>> @@ -125,6 +129,8 @@ struct emac_eth_dev {\n>> u32 addr;\n>> u32 tx_slot;\n>> bool use_internal_phy;\n>> + u32 tx_delay;\n>> + u32 rx_delay;\n>>\n>> enum emac_variant variant;\n>> void *mac_reg;\n>> @@ -290,6 +296,12 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)\n>> if (priv->variant == H3_EMAC || priv->variant == A64_EMAC)\n>> reg &= ~SC_RMII_EN;\n>>\n>> + /* Configure RX/TX delay chains */\n>> + reg &= ~(SC_RXDC_MASK << SC_RXDC_SHIFT);\n>> + reg &= ~(SC_TXDC_MASK << SC_TXDC_SHIFT);\n>> + reg |= (priv->rx_delay & SC_RXDC_MASK) << SC_RXDC_SHIFT;\n>> + reg |= (priv->tx_delay & SC_TXDC_MASK) << SC_TXDC_SHIFT;\n>\n> Why not use bitfield_replace_by_mask() from include/bitfield.h?\n\nBecause I wasn't aware of such helpers. If that's preferred I'll\nrespin the patch.\n\nChenYu\n\n>> +\n>> switch (priv->interface) {\n>> case PHY_INTERFACE_MODE_MII:\n>> /* default */\n>> @@ -836,6 +848,19 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)\n>> }\n>> #endif\n>>\n>> + /* Get RX/TX delays for RGMII */\n>> + priv->rx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),\n>> + \"allwinner,rx-delay-ps\", 0);\n>> + if (priv->rx_delay % 100 || priv->rx_delay > 3100)\n>> + debug(\"%s: invalid rx delay value\\n\", __func__);\n>> + priv->rx_delay /= 100;\n>> +\n>> + priv->tx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),\n>> + \"allwinner,tx-delay-ps\", 0);\n>> + if (priv->tx_delay % 100 || priv->tx_delay > 800)\n>> + debug(\"%s: invalid tx delay value\\n\", __func__);\n>> + priv->tx_delay /= 100;\n>> +\n>> return 0;\n>> }\n>>\n>> --\n>> 2.14.1\n>>\n>> _______________________________________________\n>> U-Boot mailing list\n>> U-Boot@lists.denx.de\n>> https://lists.denx.de/listinfo/u-boot","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3y3PYx4rnrz9s7c\n\tfor ;\n\tFri, 29 Sep 2017 18:17:40 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 4E963C21DC5; Fri, 29 Sep 2017 08:17:32 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id C656AC21D6A;\n\tFri, 29 Sep 2017 08:17:28 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid AAC4FC21D6A; Fri, 29 Sep 2017 08:17:26 +0000 (UTC)","from smtp.csie.ntu.edu.tw (smtp.csie.ntu.edu.tw [140.112.30.61])\n\tby lists.denx.de (Postfix) with ESMTPS id 6E135C21C57\n\tfor ; Fri, 29 Sep 2017 08:17:24 +0000 (UTC)","from mail-wm0-f54.google.com (mail-wm0-f54.google.com\n\t[74.125.82.54])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits))\n\t(No client certificate requested) (Authenticated sender: b93043)\n\tby smtp.csie.ntu.edu.tw (Postfix) with ESMTPSA id AE2532054C\n\tfor ; Fri, 29 Sep 2017 16:17:08 +0800 (CST)","by mail-wm0-f54.google.com with SMTP id q124so1776003wmb.0\n\tfor ; Fri, 29 Sep 2017 01:17:08 -0700 (PDT)","by 10.223.176.172 with HTTP; Fri, 29 Sep 2017 01:16:44 -0700 (PDT)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED\n\tautolearn=unavailable autolearn_force=no version=3.4.0","X-Gm-Message-State":"AMCzsaXGVA+mkmzHypziPK+Gp2Z97C8v/mHQraWL/2PJrpaly0eq1KdQ\n\tnAnLcdoT6ORvD0ReW1YmoYWZTkzxVODsA/yTQzU=","X-Google-Smtp-Source":"AOwi7QCZTw+qEQ07r6Ls3FmgWSTTbRx8N6s1KmggWRZaqxPOQHEBJAUOnL75nfod6Z3hnZds9vsDlaf7iBYNHhY3UyI=","X-Received":"by 10.28.29.77 with SMTP id d74mr2874782wmd.106.1506673025211;\n\tFri, 29 Sep 2017 01:17:05 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"","References":"<20170922072635.32105-1-wens@csie.org>\n\t<20170922072635.32105-7-wens@csie.org>\n\t","From":"Chen-Yu Tsai ","Date":"Fri, 29 Sep 2017 16:16:44 +0800","X-Gmail-Original-Message-ID":"","Message-ID":"","To":"joe.hershberger@gmail.com","Cc":"u-boot , Jagan Teki ,\n\tMaxime Ripard ,\n\tJoe Hershberger ","Subject":"Re: [U-Boot] [PATCH 6/9] net: sun8i_emac: Support RX/TX delay chains","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}}]