[{"id":1783698,"web_url":"http://patchwork.ozlabs.org/comment/1783698/","msgid":"","list_archive_url":null,"date":"2017-10-10T12:54:03","subject":"Re: [Qemu-devel] [PATCH v11 3/5] msf2: Add Smartfusion2 SPI\n\tcontroller","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/people/5111/","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"content":"On 20 September 2017 at 21:17, Philippe Mathieu-Daudé wrote:\n> From: Subbaraya Sundeep \n>\n> Modelled Microsemi's Smartfusion2 SPI controller.\n>\n> Signed-off-by: Subbaraya Sundeep \n> Reviewed-by: Alistair Francis \n> Tested-by: Philippe Mathieu-Daudé \n\n> +#define FRAMESZ_MASK 0x1F\n\n> +static void set_fifodepth(MSSSpiState *s)\n> +{\n> + unsigned int size = s->regs[R_SPI_DFSIZE] & FRAMESZ_MASK;\n> +\n> + if (size <= 8) {\n> + s->fifo_depth = 32;\n> + } else if (size <= 16) {\n> + s->fifo_depth = 16;\n> + } else if (size <= 32) {\n> + s->fifo_depth = 8;\n> + } else {\n> + s->fifo_depth = 4;\n> + }\n> +}\n\nHi. Coverity points out (CID 1381483) that the \"else\" case here\nis dead code, because the FRAMESZ_MASK of 0x1F means that size\ncannot be 32 or more.\n\nPaolo kindly checked up with the spec at\nhttps://www.eecs.umich.edu/courses/eecs373/readings/Actel_SmartFusion_MSS_UserGuide.pdf\nwhich says that this register's field is bits [5:0] which\nwould imply an 0x3f mask is needed. On the other hand it also\nsays that \"maximum value is 32\", so what is the else clause\ndoing anyway?\n\nthanks\n-- PMM","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"DLfIpDy8\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yBHBk3TJ2z9tX7\n\tfor ;\n\tTue, 10 Oct 2017 23:54:54 +1100 (AEDT)","from localhost ([::1]:34940 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1e1u3g-0003DW-L3\n\tfor incoming@patchwork.ozlabs.org; Tue, 10 Oct 2017 08:54:52 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:49048)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1e1u3J-0003DQ-Ot\n\tfor qemu-devel@nongnu.org; Tue, 10 Oct 2017 08:54:30 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1e1u3F-0004F9-L3\n\tfor qemu-devel@nongnu.org; Tue, 10 Oct 2017 08:54:29 -0400","from mail-wm0-x235.google.com ([2a00:1450:400c:c09::235]:54235)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from )\n\tid 1e1u3F-0004Eo-DV\n\tfor qemu-devel@nongnu.org; Tue, 10 Oct 2017 08:54:25 -0400","by mail-wm0-x235.google.com with SMTP id q132so5021414wmd.2\n\tfor ; Tue, 10 Oct 2017 05:54:25 -0700 (PDT)","by 10.223.128.207 with HTTP; Tue, 10 Oct 2017 05:54:03 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc:content-transfer-encoding;\n\tbh=B1sQKbpP7aA/0CX3tP6aAv5d+DNfJ9lX48DGO/TirxI=;\n\tb=DLfIpDy8ICRQfpQv0SOGQInsU8kA017FNuhI02iMQNcswiY00TRb/ABCIdnq+pDRQA\n\t4kMnlE2A7Zfw3clnjGWuNlYtGCEntLqFONSa8idKnlNDpQ5SUzBw+xfG72oWyFD1MfsJ\n\tsh0g/+W6jKxq1p0VuWCT0/XnnVHru/jxEX3NI=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc:content-transfer-encoding;\n\tbh=B1sQKbpP7aA/0CX3tP6aAv5d+DNfJ9lX48DGO/TirxI=;\n\tb=sRfjEvYU22GkBL2rEXSizALL+zHGTkrs24WLSKyBwfPfPlkHrjvq6ItqwJpe72oUBd\n\tOczqLdZ9qcec4JJNrV4rmVwzu4QMTGtGBmfExQdVa5tYIEX5mxhO79G2slknS5bvYlfr\n\tT49iiIUnEMtAOSAeBZ4FLwFLRPAI0A1FXJkz6N5csqOrKhzodiatp774vDaWxr2eG8YM\n\tUI4przWmrIKcG0bL7PlqlP1yBs40ses4g8DCDLWP21r3PD0di/rVR9ILPKec8NxzoaW1\n\tmLxpm4rMxMRlIQNciwH0qy4wXLMbBVZa5FL+uKeHOpn+iwFtYkXPD0USSPCkaou3an5U\n\tPElw==","X-Gm-Message-State":"AMCzsaX5tNdzYkYCPZ2Fl5A8Kku0VOme3BcRjSQBxWZEgTH8HO38ViIS\n\t1IilGphQL+cA5fxmzniq02yQYT4iysH6Q7D0xdCv4w==","X-Google-Smtp-Source":"AOwi7QB+eQ40wfcgnrUsmTc9PlnbK0VME8aoIsIb+mCiBYkD5UcTu6uVc1chRnD98jyb+kLyowTZydZbLCwECi8X0BM=","X-Received":"by 10.223.147.166 with SMTP id 35mr14399023wrp.90.1507640064285; \n\tTue, 10 Oct 2017 05:54:24 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170920201737.25723-4-f4bug@amsat.org>","References":"<20170920201737.25723-1-f4bug@amsat.org>\n\t<20170920201737.25723-4-f4bug@amsat.org>","From":"Peter Maydell ","Date":"Tue, 10 Oct 2017 13:54:03 +0100","Message-ID":"","To":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2a00:1450:400c:c09::235","Subject":"Re: [Qemu-devel] [PATCH v11 3/5] msf2: Add Smartfusion2 SPI\n\tcontroller","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Crosthwaite ,\n\tAlistair Francis ,\n\tQEMU Developers ,\n\tSubbaraya Sundeep ,\n\tqemu-arm , Paolo Bonzini ,\n\tIgor Mammedov ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1787300,"web_url":"http://patchwork.ozlabs.org/comment/1787300/","msgid":"","list_archive_url":null,"date":"2017-10-16T09:43:53","subject":"Re: [Qemu-devel] [PATCH v11 3/5] msf2: Add Smartfusion2 SPI\n\tcontroller","submitter":{"id":64324,"url":"http://patchwork.ozlabs.org/api/people/64324/","name":"sundeep subbaraya","email":"sundeep.lkml@gmail.com"},"content":"Hi Peter,\n\nOn Tue, Oct 10, 2017 at 6:24 PM, Peter Maydell \nwrote:\n\n> On 20 September 2017 at 21:17, Philippe Mathieu-Daudé \n> wrote:\n> > From: Subbaraya Sundeep \n> >\n> > Modelled Microsemi's Smartfusion2 SPI controller.\n> >\n> > Signed-off-by: Subbaraya Sundeep \n> > Reviewed-by: Alistair Francis \n> > Tested-by: Philippe Mathieu-Daudé \n>\n> > +#define FRAMESZ_MASK 0x1F\n>\n> > +static void set_fifodepth(MSSSpiState *s)\n> > +{\n> > + unsigned int size = s->regs[R_SPI_DFSIZE] & FRAMESZ_MASK;\n> > +\n> > + if (size <= 8) {\n> > + s->fifo_depth = 32;\n> > + } else if (size <= 16) {\n> > + s->fifo_depth = 16;\n> > + } else if (size <= 32) {\n> > + s->fifo_depth = 8;\n> > + } else {\n> > + s->fifo_depth = 4;\n> > + }\n> > +}\n>\n> Hi. Coverity points out (CID 1381483) that the \"else\" case here\n> is dead code, because the FRAMESZ_MASK of 0x1F means that size\n> cannot be 32 or more.\n>\n> Paolo kindly checked up with the spec at\n> https://www.eecs.umich.edu/courses/eecs373/readings/Actel_SmartFusion_MSS_\n> UserGuide.pdf\n> which says that this register's field is bits [5:0] which\n> would imply an 0x3f mask is needed. On the other hand it also\n> says that \"maximum value is 32\", so what is the else clause\n> doing anyway?\n>\n\nI will remove the else, change mask to 0x3F and add check for max 32 in\nspi_write:\n case R_SPI_DFSIZE:\n if (s->enabled || (value & FRAMESZ_MASK) > 32) {\n break;\n }\n s->regs[R_SPI_DFSIZE] = value;\n break;\n\nThanks for pointing out.\nSundeep\n\n\n>\n> thanks\n> -- PMM\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"NgurEhxp\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yFth73dfzz9sNc\n\tfor ;\n\tMon, 16 Oct 2017 20:44:23 +1100 (AEDT)","from localhost ([::1]:60207 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1e41wb-0005xu-MO\n\tfor incoming@patchwork.ozlabs.org; Mon, 16 Oct 2017 05:44:21 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:56304)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1e41wD-0005xo-TX\n\tfor qemu-devel@nongnu.org; Mon, 16 Oct 2017 05:43:59 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1e41wC-0001I7-Go\n\tfor qemu-devel@nongnu.org; Mon, 16 Oct 2017 05:43:57 -0400","from mail-ua0-x22d.google.com ([2607:f8b0:400c:c08::22d]:54523)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from )\n\tid 1e41wC-0001He-B6; Mon, 16 Oct 2017 05:43:56 -0400","by mail-ua0-x22d.google.com with SMTP id n38so9247472uai.11;\n\tMon, 16 Oct 2017 02:43:54 -0700 (PDT)","by 10.159.63.6 with HTTP; Mon, 16 Oct 2017 02:43:53 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=spluKzKbbEFcCwVIRQKlSpxqx9SR3oTbk9hAZnO5B8Q=;\n\tb=NgurEhxpaB5UvT/GLXy6K2UlulqcR+IPz+LZV3EtrvLq2jwmKKc6/TYMq2dYvOiyk3\n\tQRtpriQgVhyo5aSlU2xxOkqaLxSO+kPnvH1Xr+CZxpIVIZu0TUF9CURqRDLuSfuCXomg\n\tiONhMnubDeZ+D3v5L6Mrdq9zOyTVnWYO7j6vKI6zc8CofsrZEHYVExK8bT+x9RR6u01w\n\tXPBFCPxXlI05kbMCXidXc47HDS1bzkjVeIuZmQnttluDbrWwG3mQAwheqjk34UAB2K4v\n\tx7F1o9co78HS0/dxk31jWOsTaPE9ryv5vXH7Tc/NOONHJLXhruM5V/MBWMDohMYWTsrA\n\tFO6Q==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=spluKzKbbEFcCwVIRQKlSpxqx9SR3oTbk9hAZnO5B8Q=;\n\tb=anUdmi6/Qn7vakK3oEr48T9qDqm2YgKe1SUpKNdOhM7rCcb8NqvKEdgWBPffd1vqDr\n\t39TnoAXv5FJPeGYy8mNjMsOPrJJuvbPEvXt6JMdnomI5WceDwPYrtCVd+OEIYczY+eM6\n\t8cdnSOuuvvnWZGYk0oxt3JQAEO209c5VoBSgnylZutWmU8c7aBvWnbi9yl0CZFIv8t6r\n\tOLfFI3xYBodVjm3k8RDJQFiQEbhp7F/OmU6nAZcD4/1qZBQ1G/4iYQIKKXa72r/Qq99D\n\t8acESMdjG+sVMzoFKTXNxhq/PTKXm9NC51H7cPtgBV8fjN5lwqUtoIvkmAATbFJYeABW\n\ta67w==","X-Gm-Message-State":"AMCzsaVY6zdlvYa4+3UQ6KHGfBUVU39jRwgfKmVo50xyEzJCCxuh1tIv\n\tQnHiEWfNlP3jw15qIN8xHDEuy4jLSIc4bUzV/hg=","X-Google-Smtp-Source":"AOwi7QCR6Am2lXjvg5RCKLuRLzstk8fHZ73kn9uCKi6XVtzUDkCQ8ffKtQBljJjHQzef3wCdOdQtZQun2URybGsrngo=","X-Received":"by 10.176.79.42 with SMTP id n42mr7007991uah.158.1508147034375; \n\tMon, 16 Oct 2017 02:43:54 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"","References":"<20170920201737.25723-1-f4bug@amsat.org>\n\t<20170920201737.25723-4-f4bug@amsat.org>\n\t","From":"sundeep subbaraya ","Date":"Mon, 16 Oct 2017 15:13:53 +0530","Message-ID":"","To":"Peter Maydell ","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400c:c08::22d","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","X-Content-Filtered-By":"Mailman/MimeDel 2.1.21","Subject":"Re: [Qemu-devel] [PATCH v11 3/5] msf2: Add Smartfusion2 SPI\n\tcontroller","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Crosthwaite , Alistair Francis\n\t, \tQEMU Developers ,\n\t=?utf-8?q?Philippe_Mathieu-D?= =?utf-8?b?YXVkw6k=?= ,\n\tqemu-arm , Paolo Bonzini , \n\tIgor Mammedov ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}}]