[{"id":1783543,"web_url":"http://patchwork.ozlabs.org/comment/1783543/","msgid":"","list_archive_url":null,"date":"2017-10-10T09:24:03","subject":"Re: [PATCH v2 2/3] mtd: spi-nor: Altera ASMI Parallel II IP Core","submitter":{"id":1124,"url":"http://patchwork.ozlabs.org/api/people/1124/","name":"Marek Vasut","email":"marek.vasut@gmail.com"},"content":"On 09/20/2017 08:28 PM, matthew.gerlach@linux.intel.com wrote:\n> From: Matthew Gerlach \n> \n> This patch adds support for a spi-nor, platform driver for the\n> Altera ASMI Parallel II IP Core. The intended use case is to be able\n> to update the flash used to load a FPGA at power up with mtd-utils.\n> \n> Signed-off-by: Matthew Gerlach \n> ---\n> v2:\n> minor checkpatch fixing by Wu Hao \n> Use read_dummy value as suggested by Cyrille Pitchen.\n> Don't assume 4 byte addressing (Cryille Pichecn and Marek Vasut).\n> Fixed #define indenting as suggested by Marek Vasut.\n> Added units to timer values as suggested by Marek Vasut.\n> Use io(read|write)8_rep() as suggested by Marek Vasut.\n> Renamed function prefixed with __ as suggested by Marek Vasut.\n\n[...]\n\n> +#define QSPI_ACTION_REG\t\t\t0\n> +#define QSPI_ACTION_RST\t\t\tBIT(0)\n> +#define QSPI_ACTION_EN\t\t\tBIT(1)\n> +#define QSPI_ACTION_SC\t\t\tBIT(2)\n> +#define QSPI_ACTION_CHIP_SEL_SFT\t4\n> +#define QSPI_ACTION_DUMMY_SFT\t\t8\n> +#define QSPI_ACTION_READ_BACK_SFT\t16\n> +\n> +#define QSPI_FIFO_CNT_REG\t\t4\n> +#define QSPI_FIFO_DEPTH\t\t\t0x200\n> +#define QSPI_FIFO_CNT_MSK\t\t0x3ff\n> +#define QSPI_FIFO_CNT_RX_SFT\t\t0\n> +#define QSPI_FIFO_CNT_TX_SFT\t\t12\n> +\n> +#define QSPI_DATA_REG\t\t\t0x8\n> +\n> +#define QSPI_POLL_TIMEOUT_US\t\t10000000\n\n10 s poll timeout ? :)\n\n> +#define QSPI_POLL_INTERVAL_US\t\t5\n> +\n> +struct altera_asmip2 {\n\n[...]\n\nOtherwise looks good","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<1505932139-2905-3-git-send-email-matthew.gerlach@linux.intel.com>","Content-Language":"en-US","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171010_022430_620208_A6F98782 ","X-CRM114-Status":"GOOD ( 12.34 )","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (marek.vasut[at]gmail.com)\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-mtd\" ","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"}},{"id":1784822,"web_url":"http://patchwork.ozlabs.org/comment/1784822/","msgid":"","list_archive_url":null,"date":"2017-10-11T17:00:37","subject":"Re: [PATCH v2 2/3] mtd: spi-nor: Altera ASMI Parallel II IP Core","submitter":{"id":70992,"url":"http://patchwork.ozlabs.org/api/people/70992/","name":"Matthew Gerlach","email":"matthew.gerlach@linux.intel.com"},"content":"On Tue, 10 Oct 2017, Marek Vasut wrote:\n\n> On 09/20/2017 08:28 PM, matthew.gerlach@linux.intel.com wrote:\n>> From: Matthew Gerlach \n>>\n>> This patch adds support for a spi-nor, platform driver for the\n>> Altera ASMI Parallel II IP Core. The intended use case is to be able\n>> to update the flash used to load a FPGA at power up with mtd-utils.\n>>\n>> Signed-off-by: Matthew Gerlach \n>> ---\n>> v2:\n>> minor checkpatch fixing by Wu Hao \n>> Use read_dummy value as suggested by Cyrille Pitchen.\n>> Don't assume 4 byte addressing (Cryille Pichecn and Marek Vasut).\n>> Fixed #define indenting as suggested by Marek Vasut.\n>> Added units to timer values as suggested by Marek Vasut.\n>> Use io(read|write)8_rep() as suggested by Marek Vasut.\n>> Renamed function prefixed with __ as suggested by Marek Vasut.\n>\n> [...]\n>\n>> +#define QSPI_ACTION_REG\t\t\t0\n>> +#define QSPI_ACTION_RST\t\t\tBIT(0)\n>> +#define QSPI_ACTION_EN\t\t\tBIT(1)\n>> +#define QSPI_ACTION_SC\t\t\tBIT(2)\n>> +#define QSPI_ACTION_CHIP_SEL_SFT\t4\n>> +#define QSPI_ACTION_DUMMY_SFT\t\t8\n>> +#define QSPI_ACTION_READ_BACK_SFT\t16\n>> +\n>> +#define QSPI_FIFO_CNT_REG\t\t4\n>> +#define QSPI_FIFO_DEPTH\t\t\t0x200\n>> +#define QSPI_FIFO_CNT_MSK\t\t0x3ff\n>> +#define QSPI_FIFO_CNT_RX_SFT\t\t0\n>> +#define QSPI_FIFO_CNT_TX_SFT\t\t12\n>> +\n>> +#define QSPI_DATA_REG\t\t\t0x8\n>> +\n>> +#define QSPI_POLL_TIMEOUT_US\t\t10000000\n>\n> 10 s poll timeout ? :)\n\nHi Marek,\n\nThe 10s timeout is fairly arbitrary. In other words, I pulled it out of \nthin air. Can you suggest a better timeout? From a practical standpoint 10s \nseemed to be much better than no timeout when I was debugging bad FPGA \nimages. Without a timeout I was hanging the system when the FPGA image \nfailed. With this timeout, we get a nice message and Linux keeps running \nhappily.\n\nThanks for the feedback,\n\nMatthew Gerlach\n\n>\n>> +#define QSPI_POLL_INTERVAL_US\t\t 5 >> + >> +struct \naltera_asmip2 { >\n> [...]\n>\n> Otherwise looks good\n>\n> -- \n> Best regards,\n> Marek Vasut\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; spf=none (mailfrom)\n\tsmtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133;\n\thelo=bombadil.infradead.org;\n\tenvelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"rdNIj9i4\"; \n\tdkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yC0d60QMzz9s4q\n\tfor ;\n\tThu, 12 Oct 2017 04:01:45 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e2KNx-0004c4-B1; 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d=\"scan'208\";a=\"137512805\"","Date":"Wed, 11 Oct 2017 10:00:37 -0700 (PDT)","From":"matthew.gerlach@linux.intel.com","X-X-Sender":"mgerlach@mgerlach-VirtualBox","To":"Marek Vasut ","Subject":"Re: [PATCH v2 2/3] mtd: spi-nor: Altera ASMI Parallel II IP Core","In-Reply-To":"","Message-ID":"","References":"<1505932139-2905-1-git-send-email-matthew.gerlach@linux.intel.com>\n\t<1505932139-2905-3-git-send-email-matthew.gerlach@linux.intel.com>\n\t","User-Agent":"Alpine 2.20 (DEB 67 2015-01-07)","MIME-Version":"1.0","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171011_100103_011988_45B01718 ","X-CRM114-Status":"GOOD ( 10.12 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [192.55.52.115 listed in list.dnswl.org]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"vndao@altera.com, boris.brezillon@free-electrons.com, mchehab@kernel.org,\n\tdevicetree@vger.kernel.org, hean.loong.ong@intel.com, richard@nod.at, \n\tlinux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tgregkh@linuxfoundation.org, robh+dt@kernel.org,\n\tlinux-mtd@lists.infradead.org, \n\tcyrille.pitchen@wedev4u.fr, mark.rutland@arm.com,\n\tcomputersforpeace@gmail.com, \n\tdwmw2@infradead.org, davem@davemloft.net, tien.hock.loh@intel.com","Content-Transfer-Encoding":"7bit","Content-Type":"text/plain; charset=\"us-ascii\"; Format=\"flowed\"","Sender":"\"linux-mtd\" ","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"}},{"id":1784971,"web_url":"http://patchwork.ozlabs.org/comment/1784971/","msgid":"","list_archive_url":null,"date":"2017-10-11T21:06:02","subject":"Re: [PATCH v2 2/3] mtd: spi-nor: Altera ASMI Parallel II IP Core","submitter":{"id":1124,"url":"http://patchwork.ozlabs.org/api/people/1124/","name":"Marek Vasut","email":"marek.vasut@gmail.com"},"content":"On 10/11/2017 07:00 PM, matthew.gerlach@linux.intel.com wrote:\n> \n> \n> On Tue, 10 Oct 2017, Marek Vasut wrote:\n> \n>> On 09/20/2017 08:28 PM, matthew.gerlach@linux.intel.com wrote:\n>>> From: Matthew Gerlach \n>>>\n>>> This patch adds support for a spi-nor, platform driver for the\n>>> Altera ASMI Parallel II IP Core.  The intended use case is to be able\n>>> to update the flash used to load a FPGA at power up with mtd-utils.\n>>>\n>>> Signed-off-by: Matthew Gerlach \n>>> ---\n>>> v2:\n>>>     minor checkpatch fixing by Wu Hao \n>>>     Use read_dummy value as suggested by Cyrille Pitchen.\n>>>     Don't assume 4 byte addressing (Cryille Pichecn and Marek Vasut).\n>>>     Fixed #define indenting as suggested by Marek Vasut.\n>>>     Added units to timer values as suggested by Marek Vasut.\n>>>     Use io(read|write)8_rep() as suggested by Marek Vasut.\n>>>     Renamed function prefixed with __ as suggested by Marek Vasut.\n>>\n>> [...]\n>>\n>>> +#define QSPI_ACTION_REG            0\n>>> +#define QSPI_ACTION_RST            BIT(0)\n>>> +#define QSPI_ACTION_EN            BIT(1)\n>>> +#define QSPI_ACTION_SC            BIT(2)\n>>> +#define QSPI_ACTION_CHIP_SEL_SFT    4\n>>> +#define QSPI_ACTION_DUMMY_SFT        8\n>>> +#define QSPI_ACTION_READ_BACK_SFT    16\n>>> +\n>>> +#define QSPI_FIFO_CNT_REG        4\n>>> +#define QSPI_FIFO_DEPTH            0x200\n>>> +#define QSPI_FIFO_CNT_MSK        0x3ff\n>>> +#define QSPI_FIFO_CNT_RX_SFT        0\n>>> +#define QSPI_FIFO_CNT_TX_SFT        12\n>>> +\n>>> +#define QSPI_DATA_REG            0x8\n>>> +\n>>> +#define QSPI_POLL_TIMEOUT_US        10000000\n>>\n>> 10 s poll timeout ? :)\n> \n> Hi Marek,\n> \n> The 10s timeout is fairly arbitrary.  In other words, I pulled it out of\n> thin air.  Can you suggest a better timeout?  From a practical\n> standpoint 10s seemed to be much better than no timeout when I was\n> debugging bad FPGA images.  Without a timeout I was hanging the system\n> when the FPGA image failed.  With this timeout, we get a nice message\n> and Linux keeps running happily.\nAFAIK the SPI subsystem has a timeout which is adaptive to the bus\nclock, maybe that's what you want to use here ?","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; 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\n\tWed, 11 Oct 2017 14:06:04 -0700 (PDT)","Subject":"Re: [PATCH v2 2/3] mtd: spi-nor: Altera ASMI Parallel II IP Core","To":"matthew.gerlach@linux.intel.com","References":"<1505932139-2905-1-git-send-email-matthew.gerlach@linux.intel.com>\n\t<1505932139-2905-3-git-send-email-matthew.gerlach@linux.intel.com>\n\t\n\t","From":"Marek Vasut ","Message-ID":"","Date":"Wed, 11 Oct 2017 23:06:02 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"","Content-Language":"en-US","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171011_140626_930383_50A08C18 ","X-CRM114-Status":"GOOD ( 14.34 )","X-Spam-Score":"-2.7 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.7 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n\tprovider (marek.vasut[at]gmail.com)\n\t-0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/,\n\tlow\n\ttrust [2a00:1450:400c:c09:0:0:0:22f listed in] [list.dnswl.org]\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"vndao@altera.com, boris.brezillon@free-electrons.com, mchehab@kernel.org,\n\tdevicetree@vger.kernel.org, hean.loong.ong@intel.com, richard@nod.at, \n\tlinux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tgregkh@linuxfoundation.org, robh+dt@kernel.org,\n\tlinux-mtd@lists.infradead.org, \n\tcyrille.pitchen@wedev4u.fr, mark.rutland@arm.com,\n\tcomputersforpeace@gmail.com, \n\tdwmw2@infradead.org, davem@davemloft.net, tien.hock.loh@intel.com","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-mtd\" ","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"}},{"id":1786595,"web_url":"http://patchwork.ozlabs.org/comment/1786595/","msgid":"","list_archive_url":null,"date":"2017-10-13T19:24:29","subject":"Re: [PATCH v2 2/3] mtd: spi-nor: Altera ASMI Parallel II IP Core","submitter":{"id":70992,"url":"http://patchwork.ozlabs.org/api/people/70992/","name":"Matthew Gerlach","email":"matthew.gerlach@linux.intel.com"},"content":"On Wed, 11 Oct 2017, Marek Vasut wrote:\n\n> On 10/11/2017 07:00 PM, matthew.gerlach@linux.intel.com wrote:\n>>\n>>\n>> On Tue, 10 Oct 2017, Marek Vasut wrote:\n>>\n>>> On 09/20/2017 08:28 PM, matthew.gerlach@linux.intel.com wrote:\n>>>> From: Matthew Gerlach \n>>>>\n>>>> This patch adds support for a spi-nor, platform driver for the\n>>>> Altera ASMI Parallel II IP Core.  The intended use case is to be able\n>>>> to update the flash used to load a FPGA at power up with mtd-utils.\n>>>>\n>>>> Signed-off-by: Matthew Gerlach \n>>>> ---\n>>>> v2:\n>>>>     minor checkpatch fixing by Wu Hao \n>>>>     Use read_dummy value as suggested by Cyrille Pitchen.\n>>>>     Don't assume 4 byte addressing (Cryille Pichecn and Marek Vasut).\n>>>>     Fixed #define indenting as suggested by Marek Vasut.\n>>>>     Added units to timer values as suggested by Marek Vasut.\n>>>>     Use io(read|write)8_rep() as suggested by Marek Vasut.\n>>>>     Renamed function prefixed with __ as suggested by Marek Vasut.\n>>>\n>>> [...]\n>>>\n>>>> +#define QSPI_ACTION_REG            0\n>>>> +#define QSPI_ACTION_RST            BIT(0)\n>>>> +#define QSPI_ACTION_EN            BIT(1)\n>>>> +#define QSPI_ACTION_SC            BIT(2)\n>>>> +#define QSPI_ACTION_CHIP_SEL_SFT    4\n>>>> +#define QSPI_ACTION_DUMMY_SFT        8\n>>>> +#define QSPI_ACTION_READ_BACK_SFT    16\n>>>> +\n>>>> +#define QSPI_FIFO_CNT_REG        4\n>>>> +#define QSPI_FIFO_DEPTH            0x200\n>>>> +#define QSPI_FIFO_CNT_MSK        0x3ff\n>>>> +#define QSPI_FIFO_CNT_RX_SFT        0\n>>>> +#define QSPI_FIFO_CNT_TX_SFT        12\n>>>> +\n>>>> +#define QSPI_DATA_REG            0x8\n>>>> +\n>>>> +#define QSPI_POLL_TIMEOUT_US        10000000\n>>>\n>>> 10 s poll timeout ? :)\n>>\n>> Hi Marek,\n>>\n>> The 10s timeout is fairly arbitrary.  In other words, I pulled it out of\n>> thin air.  Can you suggest a better timeout?  From a practical\n>> standpoint 10s seemed to be much better than no timeout when I was\n>> debugging bad FPGA images.  Without a timeout I was hanging the system\n>> when the FPGA image failed.  With this timeout, we get a nice message\n>> and Linux keeps running happily.\n> AFAIK the SPI subsystem has a timeout which is adaptive to the bus\n> clock, maybe that's what you want to use here ?\n\nHi Marek,\n\nI looked in spi-nor.c, and I see the following two macros:\n#define DEFAULT_READY_WAIT_JIFFIES\t\t(40UL * HZ)\n#define CHIP_ERASE_2MB_READY_WAIT_JIFFIES\t(40UL * HZ)\n\nThese timers values are used at the spi-nor layer for waiting for an\noperation to complete. It is the time spent waiting for Work In Progress\nto clear.\n\nThe timer value I'm using, QSPI_POLL_TIMEOUT_US, is used at a lower layer.\nThis timer value is used for the time it takes to send the opcode and tx \ndata and receive any bytes from the flash. While 10 seconds may seem \nlong, I am just trying to avoid a system hang when there is a catastrophic\nfailure with the flash controller in the FPGA or the flash part itself.\n\nI certainly could be missing something with regards to the timeouts, but I \nthink 10s for QSPI_POLL_TIMEOUT_US doesn't hurt, and it definately helps \nwhen something goes wrong.\n\nThanks for the feedback,\nMatthew Gerlach\n\n>\n> -- \n> Best regards,\n> Marek Vasut\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; spf=none (mailfrom)\n\tsmtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133;\n\thelo=bombadil.infradead.org;\n\tenvelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"RRl/kcOz\"; \n\tdkim=fail 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(PDT)","From":"matthew.gerlach@linux.intel.com","X-X-Sender":"mgerlach@mgerlach-VirtualBox","To":"Marek Vasut ","Subject":"Re: [PATCH v2 2/3] mtd: spi-nor: Altera ASMI Parallel II IP Core","In-Reply-To":"","Message-ID":"","References":"<1505932139-2905-1-git-send-email-matthew.gerlach@linux.intel.com>\n\t<1505932139-2905-3-git-send-email-matthew.gerlach@linux.intel.com>\n\t\n\t\n\t","User-Agent":"Alpine 2.20 (DEB 67 2015-01-07)","MIME-Version":"1.0","Content-Type":"multipart/mixed; BOUNDARY=\"8323329-241464664-1507922672=:1541\"","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171013_202455_089346_3570EBBB ","X-CRM114-Status":"GOOD ( 25.27 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on casper.infradead.org summary:\n\tContent analysis details: (-6.9 points, 5.0 required)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3)\n\t[134.134.136.24 listed in wl.mailspike.net]\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [134.134.136.24 listed in list.dnswl.org]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.0 RCVD_IN_MSPIKE_WL Mailspike good senders","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"vndao@altera.com, boris.brezillon@free-electrons.com, mchehab@kernel.org,\n\tdevicetree@vger.kernel.org, hean.loong.ong@intel.com, richard@nod.at, \n\tlinux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tgregkh@linuxfoundation.org, robh+dt@kernel.org,\n\tlinux-mtd@lists.infradead.org, \n\tcyrille.pitchen@wedev4u.fr, mark.rutland@arm.com,\n\tcomputersforpeace@gmail.com, \n\tdwmw2@infradead.org, davem@davemloft.net, tien.hock.loh@intel.com","Sender":"\"linux-mtd\" ","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"}},{"id":1786648,"web_url":"http://patchwork.ozlabs.org/comment/1786648/","msgid":"<089bb472-f824-26d7-0d72-66e64c2f24c4@gmail.com>","list_archive_url":null,"date":"2017-10-13T20:34:27","subject":"Re: [PATCH v2 2/3] mtd: spi-nor: Altera ASMI Parallel II IP Core","submitter":{"id":1124,"url":"http://patchwork.ozlabs.org/api/people/1124/","name":"Marek Vasut","email":"marek.vasut@gmail.com"},"content":"On 10/13/2017 09:24 PM, matthew.gerlach@linux.intel.com wrote:\n\n[ culling the ridiculous cc list ]\n\n> On Wed, 11 Oct 2017, Marek Vasut wrote:\n> \n>> On 10/11/2017 07:00 PM, matthew.gerlach@linux.intel.com wrote:\n>>>\n>>>\n>>> On Tue, 10 Oct 2017, Marek Vasut wrote:\n>>>\n>>>> On 09/20/2017 08:28 PM, matthew.gerlach@linux.intel.com wrote:\n>>>>> From: Matthew Gerlach \n>>>>>\n>>>>> This patch adds support for a spi-nor, platform driver for the\n>>>>> Altera ASMI Parallel II IP Core.  The intended use case is to be able\n>>>>> to update the flash used to load a FPGA at power up with mtd-utils.\n>>>>>\n>>>>> Signed-off-by: Matthew Gerlach \n>>>>> ---\n>>>>> v2:\n>>>>>     minor checkpatch fixing by Wu Hao \n>>>>>     Use read_dummy value as suggested by Cyrille Pitchen.\n>>>>>     Don't assume 4 byte addressing (Cryille Pichecn and Marek Vasut).\n>>>>>     Fixed #define indenting as suggested by Marek Vasut.\n>>>>>     Added units to timer values as suggested by Marek Vasut.\n>>>>>     Use io(read|write)8_rep() as suggested by Marek Vasut.\n>>>>>     Renamed function prefixed with __ as suggested by Marek Vasut.\n>>>>\n>>>> [...]\n>>>>\n>>>>> +#define QSPI_ACTION_REG            0\n>>>>> +#define QSPI_ACTION_RST            BIT(0)\n>>>>> +#define QSPI_ACTION_EN            BIT(1)\n>>>>> +#define QSPI_ACTION_SC            BIT(2)\n>>>>> +#define QSPI_ACTION_CHIP_SEL_SFT    4\n>>>>> +#define QSPI_ACTION_DUMMY_SFT        8\n>>>>> +#define QSPI_ACTION_READ_BACK_SFT    16\n>>>>> +\n>>>>> +#define QSPI_FIFO_CNT_REG        4\n>>>>> +#define QSPI_FIFO_DEPTH            0x200\n>>>>> +#define QSPI_FIFO_CNT_MSK        0x3ff\n>>>>> +#define QSPI_FIFO_CNT_RX_SFT        0\n>>>>> +#define QSPI_FIFO_CNT_TX_SFT        12\n>>>>> +\n>>>>> +#define QSPI_DATA_REG            0x8\n>>>>> +\n>>>>> +#define QSPI_POLL_TIMEOUT_US        10000000\n>>>>\n>>>> 10 s poll timeout ? :)\n>>>\n>>> Hi Marek,\n>>>\n>>> The 10s timeout is fairly arbitrary.  In other words, I pulled it out of\n>>> thin air.  Can you suggest a better timeout?  From a practical\n>>> standpoint 10s seemed to be much better than no timeout when I was\n>>> debugging bad FPGA images.  Without a timeout I was hanging the system\n>>> when the FPGA image failed.  With this timeout, we get a nice message\n>>> and Linux keeps running happily.\n>> AFAIK the SPI subsystem has a timeout which is adaptive to the bus\n>> clock, maybe that's what you want to use here ?\n> \n> Hi Marek,\n> \n> I looked in spi-nor.c, and I see the following two macros:\n> #define DEFAULT_READY_WAIT_JIFFIES        (40UL * HZ)\n> #define CHIP_ERASE_2MB_READY_WAIT_JIFFIES    (40UL * HZ)\n> \n> These timers values are used at the spi-nor layer for waiting for an\n> operation to complete.  It is the time spent waiting for Work In Progress\n> to clear.\n> \n> The timer value I'm using, QSPI_POLL_TIMEOUT_US, is used at a lower layer.\n> This timer value is used for the time it takes to send the opcode and tx\n> data and receive any bytes from the flash.  While 10 seconds may seem\n> long, I am just trying to avoid a system hang when there is a catastrophic\n> failure with the flash controller in the FPGA or the flash part itself.\n\nIt takes 10s to detect catastrophic failure ? I'd expect you can scale\nthat timeout value by the bus clock speed.\n\nWe have ie. this in drivers/spi/spi.c:\n\n9 ret = 0;\n1040 ms = 8LL * 1000LL * xfer->len;\n1041 do_div(ms, xfer->speed_hz);\n1042 ms += ms + 200; /* some tolerance */\n1043\n1044 if (ms > UINT_MAX)\n1045 ms = UINT_MAX;\n1046\n1047 ms =\nwait_for_completion_timeout(&master->xfer_completion,\n1048\nmsecs_to_jiffies(ms));\n\n> I certainly could be missing something with regards to the timeouts, but\n> I think 10s for QSPI_POLL_TIMEOUT_US doesn't hurt, and it definately\n> helps when something goes wrong.\n> \n> Thanks for the feedback,\n> Matthew Gerlach\n> \n>>\n>> -- \n>> Best regards,\n>> Marek Vasut\n>>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; spf=none (mailfrom)\n\tsmtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133;\n\thelo=bombadil.infradead.org;\n\tenvelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; 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