[{"id":1771596,"web_url":"http://patchwork.ozlabs.org/comment/1771596/","msgid":"<CACPK8XfK8voWhPoYg0kG-OhQoTH_B+=ES8BqbT26bdPYf39d1A@mail.gmail.com>","list_archive_url":null,"date":"2017-09-20T06:07:13","subject":"Re: [PATCH v2 1/4] watchdog: aspeed: Retain watchdog enabled state","submitter":{"id":48628,"url":"http://patchwork.ozlabs.org/api/people/48628/","name":"Joel Stanley","email":"joel@jms.id.au"},"content":"On Wed, Sep 20, 2017 at 3:00 PM, Andrew Jeffery <andrew@aj.id.au> wrote:\n> An unintended post-condition of probe() is that the watchdog is\n> disabled. This behaviour was introduced by an unnecessary write to the\n> control register to configure the hardware based on the devicetree. The\n> write is unnecessary because the cached control value that is\n> manipulated by the code parsing the devicetree is eventually written by\n> aspeed_wdt_enable(), which is when we care how the control register\n> should be configured.\n>\n> Remove the write to restore expected behaviour.\n>\n> Fixes: b7f0b8ad25f3 (\"drivers/watchdog: ASPEED reference dev tree properties for config\")\n> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>\n\nReviewed-by: Joel Stanley <joel@jms.id.au>\n\nThanks,\n\nJoel","headers":{"Return-Path":"<linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxq656JQBz9sNw\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 20 Sep 2017 16:07:41 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xxq65356BzDqBd\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 20 Sep 2017 16:07:41 +1000 (AEST)","from mail-lf0-x235.google.com (mail-lf0-x235.google.com\n\t[IPv6:2a00:1450:4010:c07::235])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xxq616zlszDqBd;\n\tWed, 20 Sep 2017 16:07:37 +1000 (AEST)","by mail-lf0-x235.google.com with SMTP id k23so1612389lfi.11;\n\tTue, 19 Sep 2017 23:07:37 -0700 (PDT)","by 10.25.103.82 with HTTP; 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charset=\"UTF-8\"","X-BeenThere":"linux-aspeed@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Linux ASPEED SoC development <linux-aspeed.lists.ozlabs.org>","List-Unsubscribe":"<https://lists.ozlabs.org/options/linux-aspeed>,\n\t<mailto:linux-aspeed-request@lists.ozlabs.org?subject=unsubscribe>","List-Archive":"<http://lists.ozlabs.org/pipermail/linux-aspeed/>","List-Post":"<mailto:linux-aspeed@lists.ozlabs.org>","List-Help":"<mailto:linux-aspeed-request@lists.ozlabs.org?subject=help>","List-Subscribe":"<https://lists.ozlabs.org/listinfo/linux-aspeed>,\n\t<mailto:linux-aspeed-request@lists.ozlabs.org?subject=subscribe>","Cc":"Ryan Chen <ryan_chen@aspeedtech.com>, linux-watchdog@vger.kernel.org,\n\tlinux-aspeed@lists.ozlabs.org,\n\tOpenBMC Maillist <openbmc@lists.ozlabs.org>, \n\tLinux Kernel Mailing List <linux-kernel@vger.kernel.org>,\n\tWim Van Sebroeck <wim@iguana.be>, Guenter Roeck <linux@roeck-us.net>","Errors-To":"linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org","Sender":"\"Linux-aspeed\"\n\t<linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>"}},{"id":1792244,"web_url":"http://patchwork.ozlabs.org/comment/1792244/","msgid":"<20171022160921.GA12755@roeck-us.net>","list_archive_url":null,"date":"2017-10-22T16:09:21","subject":"Re: [v2,1/4] watchdog: aspeed: Retain watchdog enabled state","submitter":{"id":21889,"url":"http://patchwork.ozlabs.org/api/people/21889/","name":"Guenter Roeck","email":"linux@roeck-us.net"},"content":"On Wed, Sep 20, 2017 at 03:00:17PM +0930, Andrew Jeffery wrote:\n> An unintended post-condition of probe() is that the watchdog is\n> disabled. This behaviour was introduced by an unnecessary write to the\n> control register to configure the hardware based on the devicetree. The\n> write is unnecessary because the cached control value that is\n> manipulated by the code parsing the devicetree is eventually written by\n> aspeed_wdt_enable(), which is when we care how the control register\n> should be configured.\n> \n> Remove the write to restore expected behaviour.\n> \n> Fixes: b7f0b8ad25f3 (\"drivers/watchdog: ASPEED reference dev tree properties for config\")\n> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>\n> Reviewed-by: Joel Stanley <joel@jms.id.au>\n\nReviewed-by: Guenter Roeck <linux@roeck-us.net>\n\n> ---\n>  drivers/watchdog/aspeed_wdt.c | 8 ++++++--\n>  1 file changed, 6 insertions(+), 2 deletions(-)\n> \n> diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c\n> index 79cc766cd30f..6c6dd3f4c48d 100644\n> --- a/drivers/watchdog/aspeed_wdt.c\n> +++ b/drivers/watchdog/aspeed_wdt.c\n> @@ -243,9 +243,13 @@ static int aspeed_wdt_probe(struct platform_device *pdev)\n>  \tif (of_property_read_bool(np, \"aspeed,external-signal\"))\n>  \t\twdt->ctrl |= WDT_CTRL_WDT_EXT;\n>  \n> -\twritel(wdt->ctrl, wdt->base + WDT_CTRL);\n> -\n>  \tif (readl(wdt->base + WDT_CTRL) & WDT_CTRL_ENABLE)  {\n> +\t\t/*\n> +\t\t * The watchdog is running, but invoke aspeed_wdt_start() to\n> +\t\t * write wdt->ctrl to WDT_CTRL to ensure the watchdog's\n> +\t\t * configuration conforms to the driver's expectations.\n> +\t\t * Primarily, ensure we're using the 1MHz clock source.\n> +\t\t */\n>  \t\taspeed_wdt_start(&wdt->wdd);\n>  \t\tset_bit(WDOG_HW_RUNNING, &wdt->wdd.status);\n>  \t}","headers":{"Return-Path":"<linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yKkyF6rp2z9sxR\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 23 Oct 2017 03:09:57 +1100 (AEDT)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3yKkyF5b1NzDrWG\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 23 Oct 2017 03:09:57 +1100 (AEDT)","from mail-pf0-x241.google.com (mail-pf0-x241.google.com\n\t[IPv6:2607:f8b0:400e:c00::241])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3yKkxd1pGqzDqZr;\n\tMon, 23 Oct 2017 03:09:24 +1100 (AEDT)","by mail-pf0-x241.google.com with SMTP id b6so15369994pfh.7;\n\tSun, 22 Oct 2017 09:09:24 -0700 (PDT)","from localhost (108-223-40-66.lightspeed.sntcca.sbcglobal.net.\n\t[108.223.40.66]) by smtp.gmail.com with ESMTPSA id\n\ti89sm9486510pfj.144.2017.10.22.09.09.22\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tSun, 22 Oct 2017 09:09:22 -0700 (PDT)"],"Authentication-Results":["ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"I/Ep4p2R\"; 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