[{"id":1775938,"web_url":"http://patchwork.ozlabs.org/comment/1775938/","msgid":"","list_archive_url":null,"date":"2017-09-26T22:46:51","subject":"Re: [U-Boot] [PATCH 06/14] arm: socfpga: stratix10: Add misc\n\tsupport for Stratix10 SoC","submitter":{"id":16347,"url":"http://patchwork.ozlabs.org/api/people/16347/","name":"Dinh Nguyen","email":"dinh.linux@gmail.com"},"content":"On Tue, Sep 19, 2017 at 4:22 AM, wrote:\n> From: Chin Liang See \n>\n> Add misc support for Stratix SoC\n\nJust because the file is call misc.c doesn't mean you can just keep the commit\nmessage that simple. Can you add what functions are you adding?\n\n>\n> Signed-off-by: Chin Liang See \n> ---\n> arch/arm/mach-socfpga/Makefile | 1 +\n> arch/arm/mach-socfpga/misc.c | 4 +\n> arch/arm/mach-socfpga/misc_s10.c | 165 +++++++++++++++++++++++++++++++++++++++\n> 3 files changed, 170 insertions(+)\n> create mode 100644 arch/arm/mach-socfpga/misc_s10.c\n>\n> diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile\n> index 910eb6f..b253914 100644\n> --- a/arch/arm/mach-socfpga/Makefile\n> +++ b/arch/arm/mach-socfpga/Makefile\n> @@ -32,6 +32,7 @@ endif\n>\n> ifdef CONFIG_TARGET_SOCFPGA_STRATIX10\n> obj-y += clock_manager_s10.o\n> +obj-y += misc_s10.o\n> obj-y += reset_manager_s10.o\n> obj-y += system_manager_s10.o\n> obj-y += wrap_pinmux_config_s10.o\n> diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c\n> index 00eff90..2ea94bc 100644\n> --- a/arch/arm/mach-socfpga/misc.c\n> +++ b/arch/arm/mach-socfpga/misc.c\n> @@ -23,8 +23,10 @@\n>\n> DECLARE_GLOBAL_DATA_PTR;\n>\n> +#ifdef CONFIG_SYS_L2_PL310\n> static const struct pl310_regs *const pl310 =\n> (struct pl310_regs *)CONFIG_SYS_PL310_BASE;\n> +#endif\n>\n> struct bsel bsel_str[] = {\n> { \"rsvd\", \"Reserved\", },\n> @@ -53,6 +55,7 @@ void enable_caches(void)\n> #endif\n> }\n>\n> +#ifdef CONFIG_SYS_L2_PL310\n> void v7_outer_cache_enable(void)\n> {\n> /* Disable the L2 cache */\n> @@ -73,6 +76,7 @@ void v7_outer_cache_disable(void)\n> /* Disable the L2 cache */\n> clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);\n> }\n> +#endif\n>\n> #if defined(CONFIG_SYS_CONSOLE_IS_IN_ENV) && \\\n> defined(CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE)\n> diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c\n> new file mode 100644\n> index 0000000..b84f055\n> --- /dev/null\n> +++ b/arch/arm/mach-socfpga/misc_s10.c\n\nThis misc_s10.c look very similar to the Gen5 stuff, can you re-use it?\n\nDinh","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"gMcjNcpz\"; dkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1x0Z3ws0z9t2M\n\tfor ;\n\tWed, 27 Sep 2017 08:47:09 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 40F19C21C41; Tue, 26 Sep 2017 22:46:59 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 31E9DC21C29;\n\tTue, 26 Sep 2017 22:46:57 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 09689C21C29; Tue, 26 Sep 2017 22:46:54 +0000 (UTC)","from mail-it0-f68.google.com (mail-it0-f68.google.com\n\t[209.85.214.68])\n\tby lists.denx.de (Postfix) with ESMTPS id 5B526C21C26\n\tfor ; Tue, 26 Sep 2017 22:46:54 +0000 (UTC)","by mail-it0-f68.google.com with SMTP id u2so5291858itb.2\n\tfor ; Tue, 26 Sep 2017 15:46:54 -0700 (PDT)","by 10.79.30.194 with HTTP; Tue, 26 Sep 2017 15:46:51 -0700 (PDT)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=3kG95VQaGr6MmH+0mOyvb646tAat78tkHtd2hS53O+s=;\n\tb=gMcjNcpzvQYiCaMrxzSLgPO3qj9eUhlwcLYRV+mX7NcP4iFWxJUQjB/f1KfEM/AdxN\n\tR2O8Y4UmYkuBir23A7SzeC2VlN6lDtaYtadYstKfEDSsl80CeDW35dc41yQOcyoYdg6l\n\tOGgh1ZvspGd+vN6gbmxkXqLhgUBqUyCRQVpNx3jZ45uSXjW5HyLPuR407AJ0hSU3bjSl\n\tUfMa/tDmvsp0DGrwvwt6k8aC7nQa39/GGbAe+KxTDetNryJ20M7XncKE3xRh1Thl7hy0\n\tBpX6oxSAmRLyJuoyRDQsBnkLBlM45v4fHLmM3Oqinl0COs+d0pfwitKNk3F+SVQoQnSA\n\tWBXw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=3kG95VQaGr6MmH+0mOyvb646tAat78tkHtd2hS53O+s=;\n\tb=iIbvqigdpgDh+P0Iwwt91Jy6Nt1RRE9XxscsQK0AO5argmB1Bmyt9+FoFvvmNNTb9p\n\tSAiBegUcKdM+0vS6V1BSOH/9smrcmb9CN+USrQYGEJLR1XibL6SftnO/uPJxwEp+/VPG\n\tBNFr2PHcNWyN58/ZUZgLKdlSVuaHJR2jp6RlDkx0Z4VLBz8qxlULdeV4O8xuj3XFImPD\n\t1gr0DXBRV8Bf+vvr/kzkAtZIKwj7cfXIQw74oI9oCCKBLHvD5yIZnt7otDx9CSZvkkOr\n\tE4q8o4Zug0xU2D10YTvoRzshfLL0u15SaDMwy+gyWZEM7PvRjdCkPhAcKpnzZnnD91bE\n\tuDdQ==","X-Gm-Message-State":"AHPjjUg8PJCNDOtTOZ3QyYipS8PoaFxifNWbuweTNClx0jDuxSNLrsbY\n\t72ewkPA/MmudpmqJoBo9kyknmhBWvSEbe2ThC5M=","X-Google-Smtp-Source":"AOwi7QBAExBi/5xpuWf9NFlHEpc/lSUM96T2NJnGJvuy6RO1Jwf5iFTmlqvZ0KRcYNkyc74GtwohR2J/QCEoJjapfQE=","X-Received":"by 10.36.246.1 with SMTP id u1mr8698668ith.152.1506466012705;\n\tTue, 26 Sep 2017 15:46:52 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1505812951-25088-7-git-send-email-chin.liang.see@intel.com>","References":"<1505812951-25088-1-git-send-email-chin.liang.see@intel.com>\n\t<1505812951-25088-7-git-send-email-chin.liang.see@intel.com>","From":"Dinh Nguyen ","Date":"Tue, 26 Sep 2017 17:46:51 -0500","Message-ID":"","To":"Chin Liang See ","Cc":"Marek Vasut , ZY - u-boot ,\n\tTien Fong Chee ","Subject":"Re: [U-Boot] [PATCH 06/14] arm: socfpga: stratix10: Add misc\n\tsupport for Stratix10 SoC","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1777522,"web_url":"http://patchwork.ozlabs.org/comment/1777522/","msgid":"<1506775964.2766.1.camel@intel.com>","list_archive_url":null,"date":"2017-09-29T12:51:58","subject":"Re: [U-Boot] [PATCH 06/14] arm: socfpga: stratix10: Add misc\n\tsupport for Stratix10 SoC","submitter":{"id":70182,"url":"http://patchwork.ozlabs.org/api/people/70182/","name":"See, Chin Liang","email":"chin.liang.see@intel.com"},"content":"On Tue, 2017-09-26 at 17:46 -0500, Dinh Nguyen wrote:\r\n> On Tue, Sep 19, 2017 at 4:22 AM,   wrote:\r\n> > \r\n> > From: Chin Liang See \r\n> > \r\n> > Add misc support for Stratix SoC\r\n> Just because the file is call misc.c doesn't mean you can just keep\r\n> the commit\r\n> message that simple. Can you add what functions are you adding?\r\n> \r\n\r\nDefinitely can add more details here\r\n\r\n> > \r\n> > \r\n> > Signed-off-by: Chin Liang See \r\n> > ---\r\n> >  arch/arm/mach-socfpga/Makefile   |   1 +\r\n> >  arch/arm/mach-socfpga/misc.c     |   4 +\r\n> >  arch/arm/mach-socfpga/misc_s10.c | 165\r\n> > +++++++++++++++++++++++++++++++++++++++\r\n> >  3 files changed, 170 insertions(+)\r\n> >  create mode 100644 arch/arm/mach-socfpga/misc_s10.c\r\n> > \r\n> > diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-\r\n> > socfpga/Makefile\r\n> > index 910eb6f..b253914 100644\r\n> > --- a/arch/arm/mach-socfpga/Makefile\r\n> > +++ b/arch/arm/mach-socfpga/Makefile\r\n> > @@ -32,6 +32,7 @@ endif\r\n> > \r\n> >  ifdef CONFIG_TARGET_SOCFPGA_STRATIX10\r\n> >  obj-y  += clock_manager_s10.o\r\n> > +obj-y  += misc_s10.o\r\n> >  obj-y  += reset_manager_s10.o\r\n> >  obj-y  += system_manager_s10.o\r\n> >  obj-y  += wrap_pinmux_config_s10.o\r\n> > diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-\r\n> > socfpga/misc.c\r\n> > index 00eff90..2ea94bc 100644\r\n> > --- a/arch/arm/mach-socfpga/misc.c\r\n> > +++ b/arch/arm/mach-socfpga/misc.c\r\n> > @@ -23,8 +23,10 @@\r\n> > \r\n> >  DECLARE_GLOBAL_DATA_PTR;\r\n> > \r\n> > +#ifdef CONFIG_SYS_L2_PL310\r\n> >  static const struct pl310_regs *const pl310 =\r\n> >         (struct pl310_regs *)CONFIG_SYS_PL310_BASE;\r\n> > +#endif\r\n> > \r\n> >  struct bsel bsel_str[] = {\r\n> >         { \"rsvd\", \"Reserved\", },\r\n> > @@ -53,6 +55,7 @@ void enable_caches(void)\r\n> >  #endif\r\n> >  }\r\n> > \r\n> > +#ifdef CONFIG_SYS_L2_PL310\r\n> >  void v7_outer_cache_enable(void)\r\n> >  {\r\n> >         /* Disable the L2 cache */\r\n> > @@ -73,6 +76,7 @@ void v7_outer_cache_disable(void)\r\n> >         /* Disable the L2 cache */\r\n> >         clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);\r\n> >  }\r\n> > +#endif\r\n> > \r\n> >  #if defined(CONFIG_SYS_CONSOLE_IS_IN_ENV) && \\\r\n> >  defined(CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE)\r\n> > diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-\r\n> > socfpga/misc_s10.c\r\n> > new file mode 100644\r\n> > index 0000000..b84f055\r\n> > --- /dev/null\r\n> > +++ b/arch/arm/mach-socfpga/misc_s10.c\r\n> This misc_s10.c look very similar to the Gen5 stuff, can you re-use\r\n> it?\r\n\r\nYes, its true.\r\nLet me move eth stuff to common.\r\n\r\nChin Liang\r\n\r\n> \r\n> Dinh","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3y3Wfh42rSz9t33\n\tfor ;\n\tFri, 29 Sep 2017 22:52:12 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 44DD9C21DE6; Fri, 29 Sep 2017 12:52:09 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 276B5C21D8D;\n\tFri, 29 Sep 2017 12:52:06 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 3CEDEC21D8D; Fri, 29 Sep 2017 12:52:05 +0000 (UTC)","from mga07.intel.com (mga07.intel.com [134.134.136.100])\n\tby lists.denx.de (Postfix) with ESMTPS id 803D9C21D6A\n\tfor ; Fri, 29 Sep 2017 12:52:03 +0000 (UTC)","from orsmga004.jf.intel.com ([10.7.209.38])\n\tby orsmga105.jf.intel.com with ESMTP; 29 Sep 2017 05:52:01 -0700","from pgsmsx105.gar.corp.intel.com ([10.221.44.96])\n\tby orsmga004.jf.intel.com with ESMTP; 29 Sep 2017 05:52:00 -0700","from pgsmsx109.gar.corp.intel.com ([169.254.14.159]) by\n\tPGSMSX105.gar.corp.intel.com ([169.254.4.27]) with mapi id\n\t14.03.0319.002; Fri, 29 Sep 2017 20:51:59 +0800"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0","X-ExtLoop1":"1","X-IronPort-AV":"E=Sophos;i=\"5.42,452,1500966000\"; d=\"scan'208\";a=\"133550527\"","From":"\"See, Chin Liang\" ","To":"\"dinh.linux@gmail.com\" ","Thread-Topic":"[U-Boot] [PATCH 06/14] arm: socfpga: stratix10: Add misc\n\tsupport for Stratix10 SoC","Thread-Index":"AQHTMSka1labrIZNKEGy2JJuKRlo1KLHSkGAgAWjVAA=","Date":"Fri, 29 Sep 2017 12:51:58 +0000","Message-ID":"<1506775964.2766.1.camel@intel.com>","References":"<1505812951-25088-1-git-send-email-chin.liang.see@intel.com>\n\t<1505812951-25088-7-git-send-email-chin.liang.see@intel.com>\n\t","In-Reply-To":"","Accept-Language":"en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","x-originating-ip":"[172.30.190.99]","Content-ID":"","MIME-Version":"1.0","Cc":"\"marex@denx.de\" ,\n\t\"u-boot@lists.denx.de\" , \"Chee,\n\tTien Fong\" ","Subject":"Re: [U-Boot] [PATCH 06/14] arm: socfpga: stratix10: Add misc\n\tsupport for Stratix10 SoC","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}}]