[{"id":1770568,"web_url":"http://patchwork.ozlabs.org/comment/1770568/","msgid":"<20170918225552.GM10621@localhost.localdomain>","list_archive_url":null,"date":"2017-09-18T22:55:52","subject":"[Qemu-devel] [RFC v1 0/2] Add a valid_cpu_types property","submitter":{"id":195,"url":"http://patchwork.ozlabs.org/api/people/195/","name":"Eduardo Habkost","email":"ehabkost@redhat.com"},"content":"On Mon, Sep 18, 2017 at 06:57:19PM -0300, Philippe Mathieu-Daudé wrote:\n> add a property to restrict the CPU for SoCs once on machine creation and avoid\n> duplicate code in each board.\n> \n> Signed-off-by: Philippe Mathieu-Daudé \n\nThe valid_cpu_types approach implemented by Alistair is more\ngeneric:\n Subject: [Qemu-devel] [RFC v1 0/2] Add a valid_cpu_types property\n Message-ID: \n\nWith it, boards that don't support other CPUs just need to set\nvalid_cpu_types = { default_cpu_type }.\n\n> ---\n> Based-on: 1505318697-77161-6-git-send-email-imammedo@redhat.com\n> \n> include/hw/boards.h | 3 +++\n> vl.c | 11 +++++++++++\n> 2 files changed, 14 insertions(+)\n> \n> diff --git a/include/hw/boards.h b/include/hw/boards.h\n> index 6b67adaef6..20dc0a0ab9 100644\n> --- a/include/hw/boards.h\n> +++ b/include/hw/boards.h\n> @@ -129,6 +129,8 @@ typedef struct {\n> * specifies default CPU_TYPE, which will be used for parsing target\n> * specific features and for creating CPUs if CPU name wasn't provided\n> * explicitly at CLI\n> + * @is_system_on_chip:\n> + * If true, board does not support other CPUs than default_cpu_type.\n> * @minimum_page_bits:\n> * If non-zero, the board promises never to create a CPU with a page size\n> * smaller than this, so QEMU can use a more efficient larger page\n> @@ -182,6 +184,7 @@ struct MachineClass {\n> const char *hw_version;\n> ram_addr_t default_ram_size;\n> const char *default_cpu_type;\n> + bool is_system_on_chip;\n> bool option_rom_has_mr;\n> bool rom_file_has_mr;\n> int minimum_page_bits;\n> diff --git a/vl.c b/vl.c\n> index fb6a700e55..6e59ffa856 100644\n> --- a/vl.c\n> +++ b/vl.c\n> @@ -4717,10 +4717,21 @@ int main(int argc, char **argv, char **envp)\n> current_machine->cpu_model = cpu_model;\n> \n> \n> + if (machine_class->is_system_on_chip && !machine_class->default_cpu_type) {\n> + error_report(\"System-on-Chip must have a default CPU type\");\n> + exit(1);\n> + }\n> /* parse features once if machine provides default cpu_type */\n> if (machine_class->default_cpu_type) {\n> current_machine->cpu_type = machine_class->default_cpu_type;\n> if (cpu_model) {\n> + if (machine_class->is_system_on_chip) {\n> + if (strcmp(cpu_model, machine_class->default_cpu_type) != 0) {\n> + error_report(\"This board can only be used with CPU %s\",\n> + machine_class->default_cpu_type);\n> + exit(1);\n> + }\n> + }\n> current_machine->cpu_type =\n> cpu_parse_cpu_model(machine_class->default_cpu_type, cpu_model);\n> }\n> -- \n> 2.14.1\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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Mon, 18 Sep 2017 18:56:05 -0400","from mx1.redhat.com ([209.132.183.28]:51580)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from ) id 1du4xK-0004Ik-J5\n\tfor qemu-devel@nongnu.org; Mon, 18 Sep 2017 18:55:58 -0400","from smtp.corp.redhat.com\n\t(int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id 26B8AC0587C6;\n\tMon, 18 Sep 2017 22:55:57 +0000 (UTC)","from localhost (ovpn-116-23.gru2.redhat.com [10.97.116.23])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id 8A4BC5D980;\n\tMon, 18 Sep 2017 22:55:54 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mx1.redhat.com 26B8AC0587C6","Date":"Mon, 18 Sep 2017 19:55:52 -0300","From":"Eduardo Habkost ","To":"Philippe =?iso-8859-1?q?Mathieu-Daud=E9?= ","Message-ID":"<20170918225552.GM10621@localhost.localdomain>","References":"<20170918215719.16415-1-f4bug@amsat.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","In-Reply-To":"<20170918215719.16415-1-f4bug@amsat.org>","X-Fnord":"you can see the fnord","User-Agent":"Mutt/1.8.3 (2017-05-23)","X-Scanned-By":"MIMEDefang 2.79 on 10.5.11.14","X-Greylist":"Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.32]);\n\tMon, 18 Sep 2017 22:55:57 +0000 (UTC)","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"209.132.183.28","Subject":"[Qemu-devel] [RFC v1 0/2] Add a valid_cpu_types property","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , qemu-devel@nongnu.org,\n\tAlistair Francis ,\n\tPaolo Bonzini , marcel@redhat.com,\n\tIgor Mammedov ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1770764,"web_url":"http://patchwork.ozlabs.org/comment/1770764/","msgid":"","list_archive_url":null,"date":"2017-09-19T09:03:39","subject":"Re: [Qemu-devel] [RFC PATCH] vl.c: add is_system_on_chip flag to\n\tforce board default cpu","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/people/5111/","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"content":"On 18 September 2017 at 22:57, Philippe Mathieu-Daudé wrote:\n> add a property to restrict the CPU for SoCs once on machine creation and avoid\n> duplicate code in each board.\n>\n> Signed-off-by: Philippe Mathieu-Daudé \n> ---\n> Based-on: 1505318697-77161-6-git-send-email-imammedo@redhat.com\n>\n> include/hw/boards.h | 3 +++\n> vl.c | 11 +++++++++++\n> 2 files changed, 14 insertions(+)\n>\n> diff --git a/include/hw/boards.h b/include/hw/boards.h\n> index 6b67adaef6..20dc0a0ab9 100644\n> --- a/include/hw/boards.h\n> +++ b/include/hw/boards.h\n> @@ -129,6 +129,8 @@ typedef struct {\n> * specifies default CPU_TYPE, which will be used for parsing target\n> * specific features and for creating CPUs if CPU name wasn't provided\n> * explicitly at CLI\n> + * @is_system_on_chip:\n> + * If true, board does not support other CPUs than default_cpu_type.\n\nBeing an SoC isn't the only reason a board might only support one\nCPU type (perhaps it just never existed with other than a single\nCPU soldered into it), so maybe a different name?\n\nthanks\n-- PMM","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2a00:1450:400c:c0c::235","Subject":"Re: [Qemu-devel] [RFC PATCH] vl.c: add is_system_on_chip flag to\n\tforce board default cpu","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"QEMU Developers ,\n\tIgor Mammedov ,\n\tEduardo Habkost , \n\tPaolo Bonzini ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1770803,"web_url":"http://patchwork.ozlabs.org/comment/1770803/","msgid":"<36b5e019-4f30-666b-7479-df8de0a6f936@amsat.org>","list_archive_url":null,"date":"2017-09-19T09:51:23","subject":"Re: [Qemu-devel] [RFC v1 0/2] Add a valid_cpu_types property","submitter":{"id":70924,"url":"http://patchwork.ozlabs.org/api/people/70924/","name":"Philippe Mathieu-Daudé","email":"f4bug@amsat.org"},"content":"On 09/18/2017 07:55 PM, Eduardo Habkost wrote:\n> On Mon, Sep 18, 2017 at 06:57:19PM -0300, Philippe Mathieu-Daudé wrote:\n>> add a property to restrict the CPU for SoCs once on machine creation and avoid\n>> duplicate code in each board.\n>>\n>> Signed-off-by: Philippe Mathieu-Daudé \n> \n> The valid_cpu_types approach implemented by Alistair is more\n> generic:\n> Subject: [Qemu-devel] [RFC v1 0/2] Add a valid_cpu_types property\n> Message-ID: \n> \n> With it, boards that don't support other CPUs just need to set\n> valid_cpu_types = { default_cpu_type }.\n\nOh thank for pointing this out, I missed his series.\n\nMany people waiting for Igor series to land ;)\n\nRegards,\n\nPhil.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20170918225552.GM10621@localhost.localdomain>","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Language":"en-US","Content-Transfer-Encoding":"8bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400d:c09::242","Subject":"Re: [Qemu-devel] [RFC v1 0/2] Add a valid_cpu_types property","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , qemu-devel@nongnu.org,\n\tAlistair Francis ,\n\tPaolo Bonzini , marcel@redhat.com,\n\tIgor Mammedov ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1770865,"web_url":"http://patchwork.ozlabs.org/comment/1770865/","msgid":"<20170919104259.GB3030@localhost.localdomain>","list_archive_url":null,"date":"2017-09-19T10:42:59","subject":"Re: [Qemu-devel] [RFC v1 0/2] Add a valid_cpu_types property","submitter":{"id":195,"url":"http://patchwork.ozlabs.org/api/people/195/","name":"Eduardo Habkost","email":"ehabkost@redhat.com"},"content":"On Tue, Sep 19, 2017 at 06:51:23AM -0300, Philippe Mathieu-Daudé wrote:\n> On 09/18/2017 07:55 PM, Eduardo Habkost wrote:\n> > On Mon, Sep 18, 2017 at 06:57:19PM -0300, Philippe Mathieu-Daudé wrote:\n> > > add a property to restrict the CPU for SoCs once on machine creation and avoid\n> > > duplicate code in each board.\n> > > \n> > > Signed-off-by: Philippe Mathieu-Daudé \n> > \n> > The valid_cpu_types approach implemented by Alistair is more\n> > generic:\n> > Subject: [Qemu-devel] [RFC v1 0/2] Add a valid_cpu_types property\n> > Message-ID: \n> > \n> > With it, boards that don't support other CPUs just need to set\n> > valid_cpu_types = { default_cpu_type }.\n> \n> Oh thank for pointing this out, I missed his series.\n> \n> Many people waiting for Igor series to land ;)\n\nI plan to queue it today, and get a pull request out today or\ntomorrow.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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Tue, 19 Sep 2017 06:43:09 -0400","from mx1.redhat.com ([209.132.183.28]:41988)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from ) id 1duFze-0006cl-L4\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 06:43:06 -0400","from smtp.corp.redhat.com\n\t(int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id 70C3A25BAC;\n\tTue, 19 Sep 2017 10:43:05 +0000 (UTC)","from localhost (ovpn-116-23.gru2.redhat.com [10.97.116.23])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id 9450A60466;\n\tTue, 19 Sep 2017 10:43:01 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mx1.redhat.com 70C3A25BAC","Date":"Tue, 19 Sep 2017 07:42:59 -0300","From":"Eduardo Habkost ","To":"Philippe =?iso-8859-1?q?Mathieu-Daud=E9?= ","Message-ID":"<20170919104259.GB3030@localhost.localdomain>","References":"<20170918215719.16415-1-f4bug@amsat.org>\n\t<20170918225552.GM10621@localhost.localdomain>\n\t<36b5e019-4f30-666b-7479-df8de0a6f936@amsat.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","In-Reply-To":"<36b5e019-4f30-666b-7479-df8de0a6f936@amsat.org>","X-Fnord":"you can see the fnord","User-Agent":"Mutt/1.8.3 (2017-05-23)","X-Scanned-By":"MIMEDefang 2.79 on 10.5.11.11","X-Greylist":"Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.39]);\n\tTue, 19 Sep 2017 10:43:05 +0000 (UTC)","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"209.132.183.28","Subject":"Re: [Qemu-devel] [RFC v1 0/2] Add a valid_cpu_types property","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , qemu-devel@nongnu.org,\n\tAlistair Francis ,\n\tPaolo Bonzini , marcel@redhat.com,\n\tIgor Mammedov ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1771272,"web_url":"http://patchwork.ozlabs.org/comment/1771272/","msgid":"","list_archive_url":null,"date":"2017-09-19T18:16:29","subject":"Re: [Qemu-devel] [RFC PATCH] vl.c: add is_system_on_chip flag to\n\tforce board default cpu","submitter":{"id":64571,"url":"http://patchwork.ozlabs.org/api/people/64571/","name":"Alistair Francis","email":"alistair23@gmail.com"},"content":"On Tue, Sep 19, 2017 at 2:03 AM, Peter Maydell wrote:\n> On 18 September 2017 at 22:57, Philippe Mathieu-Daudé wrote:\n>> add a property to restrict the CPU for SoCs once on machine creation and avoid\n>> duplicate code in each board.\n>>\n>> Signed-off-by: Philippe Mathieu-Daudé \n>> ---\n>> Based-on: 1505318697-77161-6-git-send-email-imammedo@redhat.com\n>>\n>> include/hw/boards.h | 3 +++\n>> vl.c | 11 +++++++++++\n>> 2 files changed, 14 insertions(+)\n>>\n>> diff --git a/include/hw/boards.h b/include/hw/boards.h\n>> index 6b67adaef6..20dc0a0ab9 100644\n>> --- a/include/hw/boards.h\n>> +++ b/include/hw/boards.h\n>> @@ -129,6 +129,8 @@ typedef struct {\n>> * specifies default CPU_TYPE, which will be used for parsing target\n>> * specific features and for creating CPUs if CPU name wasn't provided\n>> * explicitly at CLI\n>> + * @is_system_on_chip:\n>> + * If true, board does not support other CPUs than default_cpu_type.\n>\n> Being an SoC isn't the only reason a board might only support one\n> CPU type (perhaps it just never existed with other than a single\n> CPU soldered into it), so maybe a different name?\n\nI don't think this makes a lot of sense. There are some SoCs that are\nbasically the same besides the CPU. I think a list of possible CPUs\nmakes more sense for machines. That way the list can be used for every\nmachine and not just machines with a single CPU. If your SoC only\nsupports one CPU then you only describe one, but if you want others\nyou can list others.\n\nThanks,\nAlistair\n\n>\n> thanks\n> -- PMM\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"sUqUPlmo\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxWLr2xNyz9s7F\n\tfor ;\n\tWed, 20 Sep 2017 04:17:39 +1000 (AEST)","from localhost ([::1]:44730 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1duN5V-0008Ex-32\n\tfor incoming@patchwork.ozlabs.org; Tue, 19 Sep 2017 14:17:37 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:46571)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1duN4x-0008Cv-2t\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 14:17:03 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1duN4v-0005El-Tc\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 14:17:03 -0400","from mail-wm0-x243.google.com ([2a00:1450:400c:c09::243]:37145)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from )\n\tid 1duN4v-0005Bh-N6\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 14:17:01 -0400","by mail-wm0-x243.google.com with SMTP id f4so369106wmh.4\n\tfor ; Tue, 19 Sep 2017 11:17:01 -0700 (PDT)","by 10.28.191.130 with HTTP; Tue, 19 Sep 2017 11:16:29 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc:content-transfer-encoding;\n\tbh=zzTPTIyqf+IRMRYdYhOZQ7jnWcZiRnhC82n1EgKZKb4=;\n\tb=sUqUPlmo4TifdLnU8d73Y96LQtUfCNFgY0qByqrWzJZWEGyS5p7ynJKZlrInlm6Ebd\n\t2iXY1Hp64QD9MCqauz1sRaIMG7ivAed8UH5opM3K6T1oaFtKdc3uvf2dSOj2BTPDuJQ1\n\trTwKa8SlGoH/UjV5uY6CFVuhO3LUwzKeIN+1FqVKFME+Icle5L+WfAW6H8PudnyZgx7g\n\t6ivrLorDNIhEBMGR42mmjm6m1jIlR3g2sWsn+u81Z5Trb541/zNVJemuBGMTZAL0zdeQ\n\tkqXq5edAigDDG7j2pxpM3KDYYJR0PpV4BVVaVsFoeQdfIsC/jNVfD6D1E/1GuDqF/i/Z\n\tEWEA==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc:content-transfer-encoding;\n\tbh=zzTPTIyqf+IRMRYdYhOZQ7jnWcZiRnhC82n1EgKZKb4=;\n\tb=pr9e+Xxlt0mbi58LrZxRCM3M+8jOxP2lnofR5g9lGSfnjBl0tuWdaBKd1RarbBh81g\n\tNIFZXQSy7SK9vT4JRn7Er8O2wNfhNgqWDICWn47NGE+Mxzp8fRyJXu/G7FMecQpJdpKg\n\tjCsAWA+WRARMBJ6UBgfcCdeflh4bTQy5UgVSccFuSfp5LzlKYa6mMgD/l0LsV4rdrkfb\n\tblPX1NkQpgsCbzYum2E4inUNIP6V1KJ+r6rBw0p35oCZCWgRZ51pfdUJtPPIRmgf4F+Q\n\t2J7OKSWfvLrwrMMZIy1yOKVzEACmmHJYtjd31xQiK1NYLqip8Iv4xPnj3mMTKzp0Q4Uu\n\tGWVQ==","X-Gm-Message-State":"AHPjjUhzSouYvVO0cJVXQyqGxgbFUj0mwl0+MSDHhikyBKyiDV/XDvVY\n\thqcvYX1psD99HeD1APlSlnm+1xsm/48H+lV+uDE=","X-Google-Smtp-Source":"AOwi7QD37lMRoRJb7ACZRFi/46vIi0QkGLsPm/Wp3Nd7ZTHGvCVEdMFq4HoQi6CCTiDKqrVpxYSYaVyUjkbOobwMlVg=","X-Received":"by 10.28.135.209 with SMTP id j200mr1748235wmd.40.1505845020616; \n\tTue, 19 Sep 2017 11:17:00 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"","References":"<20170918215719.16415-1-f4bug@amsat.org>\n\t","From":"Alistair Francis ","Date":"Tue, 19 Sep 2017 11:16:29 -0700","Message-ID":"","To":"Peter Maydell ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2a00:1450:400c:c09::243","Subject":"Re: [Qemu-devel] [RFC PATCH] vl.c: add is_system_on_chip flag to\n\tforce board default cpu","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Igor Mammedov , Paolo Bonzini ,\n\t=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ,\n\tEduardo Habkost , QEMU Developers\n\t","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}}]