[{"id":1779325,"web_url":"http://patchwork.ozlabs.org/comment/1779325/","msgid":"","list_archive_url":null,"date":"2017-10-03T23:46:36","subject":"Re: [U-Boot] [PATCH 5/5] ARM: rmobile: Zap Gen3 PFC tables","submitter":{"id":1028,"url":"http://patchwork.ozlabs.org/api/people/1028/","name":"Nobuhiro Iwamatsu","email":"iwamatsu@nigauri.org"},"content":"Hi!\n\nThis patch breaks the compiling of board/renesas/ulcb/cpld.c\n----\nboard/renesas/ulcb/cpld.c: In function 'ulcb_softspi_sda':\nboard/renesas/ulcb/cpld.c:17:16: error: 'GPIO_GP_6_7' undeclared\n(first use in this function)\n #define MOSI GPIO_GP_6_7\n ^\nboard/renesas/ulcb/cpld.c:46:17: note: in expansion of macro 'MOSI'\n gpio_set_value(MOSI, set);\n ^~~~\n\n----\n\nCould you check about this?\n\nBest regards,\n Nobuhiro\n\n2017-09-16 4:13 GMT+09:00 Marek Vasut :\n> These old PFC tables are no longer needed as there is now a proper\n> PFC pinmux driver in drivers/pinctrl/renesas . Remove them .\n>\n> Signed-off-by: Marek Vasut \n> Cc: Nobuhiro Iwamatsu \n> ---\n> arch/arm/mach-rmobile/Makefile | 4 +-\n> arch/arm/mach-rmobile/include/mach/gpio.h | 6 -\n> arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h | 1016 ----\n> arch/arm/mach-rmobile/include/mach/r8a7796-gpio.h | 1084 -----\n> arch/arm/mach-rmobile/pfc-r8a7795.c | 5005 --------------------\n> arch/arm/mach-rmobile/pfc-r8a7796.c | 5253 ---------------------\n> 6 files changed, 2 insertions(+), 12366 deletions(-)\n> delete mode 100644 arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h\n> delete mode 100644 arch/arm/mach-rmobile/include/mach/r8a7796-gpio.h\n> delete mode 100644 arch/arm/mach-rmobile/pfc-r8a7795.c\n> delete mode 100644 arch/arm/mach-rmobile/pfc-r8a7796.c\n>\n> diff --git a/arch/arm/mach-rmobile/Makefile b/arch/arm/mach-rmobile/Makefile\n> index 2aea527bae..8aa2b4f82a 100644\n> --- a/arch/arm/mach-rmobile/Makefile\n> +++ b/arch/arm/mach-rmobile/Makefile\n> @@ -16,7 +16,7 @@ obj-$(CONFIG_R8A7791) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7791.o\n> obj-$(CONFIG_R8A7792) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7792.o\n> obj-$(CONFIG_R8A7793) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7793.o\n> obj-$(CONFIG_R8A7794) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7794.o\n> -obj-$(CONFIG_R8A7795) += lowlevel_init_gen3.o cpu_info-rcar.o pfc-r8a7795.o memmap-r8a7795.o\n> -obj-$(CONFIG_R8A7796) += lowlevel_init_gen3.o cpu_info-rcar.o pfc-r8a7796.o memmap-r8a7796.o\n> +obj-$(CONFIG_R8A7795) += lowlevel_init_gen3.o cpu_info-rcar.o memmap-r8a7795.o\n> +obj-$(CONFIG_R8A7796) += lowlevel_init_gen3.o cpu_info-rcar.o memmap-r8a7796.o\n> obj-$(CONFIG_SH73A0) += lowlevel_init.o cpu_info-sh73a0.o pfc-sh73a0.o\n> obj-$(CONFIG_TMU_TIMER) += ../../sh/lib/time.o\n> diff --git a/arch/arm/mach-rmobile/include/mach/gpio.h b/arch/arm/mach-rmobile/include/mach/gpio.h\n> index 02b29364c5..448d189e92 100644\n> --- a/arch/arm/mach-rmobile/include/mach/gpio.h\n> +++ b/arch/arm/mach-rmobile/include/mach/gpio.h\n> @@ -22,12 +22,6 @@ void r8a7793_pinmux_init(void);\n> #elif defined(CONFIG_R8A7794)\n> #include \"r8a7794-gpio.h\"\n> void r8a7794_pinmux_init(void);\n> -#elif defined(CONFIG_R8A7795)\n> -#include \"r8a7795-gpio.h\"\n> -void r8a7795_pinmux_init(void);\n> -#elif defined(CONFIG_R8A7796)\n> -#include \"r8a7796-gpio.h\"\n> -void r8a7796_pinmux_init(void);\n> #endif\n>\n> #endif /* __ASM_ARCH_GPIO_H */\n> diff --git a/arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h b/arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h\n> deleted file mode 100644\n> index 554063ab8f..0000000000\n> --- a/arch/arm/mach-rmobile/include/mach/r8a7795-gpio.h\n> +++ /dev/null\n> @@ -1,1016 +0,0 @@\n> -/*\n> - * arch/arm/include/asm/arch-rcar_gen3/r8a7795-gpio.h\n> - * This file defines pin function control of gpio.\n> - *\n> - * Copyright (C) 2015-2016 Renesas Electronics Corporation\n> - *\n> - * SPDX-License-Identifier: GPL-2.0+\n> - */\n> -#ifndef __ASM_R8A7795_GPIO_H__\n> -#define __ASM_R8A7795_GPIO_H__\n> -\n> -/* Pin Function Controller:\n> - * GPIO_FN_xx - GPIO used to select pin function\n> - * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU\n> - */\n> -\n> -/* V2(ES2.0) */\n> -enum {\n> - GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,\n> - GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,\n> - GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,\n> - GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,\n> -\n> - GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,\n> - GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,\n> - GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,\n> - GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,\n> - GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,\n> - GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,\n> - GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,\n> - GPIO_GP_1_28,\n> -\n> - GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,\n> - GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,\n> - GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,\n> - GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14,\n> -\n> - GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,\n> - GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,\n> - GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,\n> - GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,\n> -\n> - GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,\n> - GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,\n> - GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,\n> - GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,\n> - GPIO_GP_4_16, GPIO_GP_4_17,\n> -\n> - GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,\n> - GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,\n> - GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,\n> - GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,\n> - GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,\n> - GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,\n> - GPIO_GP_5_24, GPIO_GP_5_25,\n> -\n> - GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,\n> - GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,\n> - GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,\n> - GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,\n> - GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,\n> - GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,\n> - GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,\n> - GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,\n> -\n> - GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,\n> -\n> - /* GPSR0 */\n> - GPIO_GFN_D15,\n> - GPIO_GFN_D14,\n> - GPIO_GFN_D13,\n> - GPIO_GFN_D12,\n> - GPIO_GFN_D11,\n> - GPIO_GFN_D10,\n> - GPIO_GFN_D9,\n> - GPIO_GFN_D8,\n> - GPIO_GFN_D7,\n> - GPIO_GFN_D6,\n> - GPIO_GFN_D5,\n> - GPIO_GFN_D4,\n> - GPIO_GFN_D3,\n> - GPIO_GFN_D2,\n> - GPIO_GFN_D1,\n> - GPIO_GFN_D0,\n> -\n> - /* GPSR1 */\n> - GPIO_GFN_CLKOUT,\n> - GPIO_GFN_EX_WAIT0_A,\n> - GPIO_GFN_WE1x,\n> - GPIO_GFN_WE0x,\n> - GPIO_GFN_RD_WRx,\n> - GPIO_GFN_RDx,\n> - GPIO_GFN_BSx,\n> - GPIO_GFN_CS1x_A26,\n> - GPIO_GFN_CS0x,\n> - GPIO_GFN_A19,\n> - GPIO_GFN_A18,\n> - GPIO_GFN_A17,\n> - GPIO_GFN_A16,\n> - GPIO_GFN_A15,\n> - GPIO_GFN_A14,\n> - GPIO_GFN_A13,\n> - GPIO_GFN_A12,\n> - GPIO_GFN_A11,\n> - GPIO_GFN_A10,\n> - GPIO_GFN_A9,\n> - GPIO_GFN_A8,\n> - GPIO_GFN_A7,\n> - GPIO_GFN_A6,\n> - GPIO_GFN_A5,\n> - GPIO_GFN_A4,\n> - GPIO_GFN_A3,\n> - GPIO_GFN_A2,\n> - GPIO_GFN_A1,\n> - GPIO_GFN_A0,\n> -\n> - /* GPSR2 */\n> - GPIO_GFN_AVB_AVTP_CAPTURE_A,\n> - GPIO_GFN_AVB_AVTP_MATCH_A,\n> - GPIO_GFN_AVB_LINK,\n> - GPIO_GFN_AVB_PHY_INT,\n> - GPIO_GFN_AVB_MAGIC,\n> - GPIO_GFN_AVB_MDC,\n> - GPIO_GFN_PWM2_A,\n> - GPIO_GFN_PWM1_A,\n> - GPIO_GFN_PWM0,\n> - GPIO_GFN_IRQ5,\n> - GPIO_GFN_IRQ4,\n> - GPIO_GFN_IRQ3,\n> - GPIO_GFN_IRQ2,\n> - GPIO_GFN_IRQ1,\n> - GPIO_GFN_IRQ0,\n> -\n> - /* GPSR3 */\n> - GPIO_GFN_SD1_WP,\n> - GPIO_GFN_SD1_CD,\n> - GPIO_GFN_SD0_WP,\n> - GPIO_GFN_SD0_CD,\n> - GPIO_GFN_SD1_DAT3,\n> - GPIO_GFN_SD1_DAT2,\n> - GPIO_GFN_SD1_DAT1,\n> - GPIO_GFN_SD1_DAT0,\n> - GPIO_GFN_SD1_CMD,\n> - GPIO_GFN_SD1_CLK,\n> - GPIO_GFN_SD0_DAT3,\n> - GPIO_GFN_SD0_DAT2,\n> - GPIO_GFN_SD0_DAT1,\n> - GPIO_GFN_SD0_DAT0,\n> - GPIO_GFN_SD0_CMD,\n> - GPIO_GFN_SD0_CLK,\n> -\n> - /* GPSR4 */\n> - GPIO_GFN_SD3_DS,\n> - GPIO_GFN_SD3_DAT7,\n> - GPIO_GFN_SD3_DAT6,\n> - GPIO_GFN_SD3_DAT5,\n> - GPIO_GFN_SD3_DAT4,\n> - GPIO_GFN_SD3_DAT3,\n> - GPIO_GFN_SD3_DAT2,\n> - GPIO_GFN_SD3_DAT1,\n> - GPIO_GFN_SD3_DAT0,\n> - GPIO_GFN_SD3_CMD,\n> - GPIO_GFN_SD3_CLK,\n> - GPIO_GFN_SD2_DS,\n> - GPIO_GFN_SD2_DAT3,\n> - GPIO_GFN_SD2_DAT2,\n> - GPIO_GFN_SD2_DAT1,\n> - GPIO_GFN_SD2_DAT0,\n> - GPIO_GFN_SD2_CMD,\n> - GPIO_GFN_SD2_CLK,\n> -\n> - /* GPSR5 */\n> - GPIO_GFN_MLB_DAT,\n> - GPIO_GFN_MLB_SIG,\n> - GPIO_GFN_MLB_CLK,\n> - GPIO_FN_MSIOF0_RXD,\n> - GPIO_GFN_MSIOF0_SS2,\n> - GPIO_FN_MSIOF0_TXD,\n> - GPIO_GFN_MSIOF0_SS1,\n> - GPIO_GFN_MSIOF0_SYNC,\n> - GPIO_FN_MSIOF0_SCK,\n> - GPIO_GFN_HRTS0x,\n> - GPIO_GFN_HCTS0x,\n> - GPIO_GFN_HTX0,\n> - GPIO_GFN_HRX0,\n> - GPIO_GFN_HSCK0,\n> - GPIO_GFN_RX2_A,\n> - GPIO_GFN_TX2_A,\n> - GPIO_GFN_SCK2,\n> - GPIO_GFN_RTS1x_TANS,\n> - GPIO_GFN_CTS1x,\n> - GPIO_GFN_TX1_A,\n> - GPIO_GFN_RX1_A,\n> - GPIO_GFN_RTS0x_TANS,\n> - GPIO_GFN_CTS0x,\n> - GPIO_GFN_TX0,\n> - GPIO_GFN_RX0,\n> - GPIO_GFN_SCK0,\n> -\n> - /* GPSR6 */\n> - GPIO_GFN_USB3_OVC,\n> - GPIO_GFN_USB3_PWEN,\n> - GPIO_GFN_USB30_OVC,\n> - GPIO_GFN_USB30_PWEN,\n> - GPIO_GFN_USB1_OVC,\n> - GPIO_GFN_USB1_PWEN,\n> - GPIO_GFN_USB0_OVC,\n> - GPIO_GFN_USB0_PWEN,\n> - GPIO_GFN_AUDIO_CLKB_B,\n> - GPIO_GFN_AUDIO_CLKA_A,\n> - GPIO_GFN_SSI_SDATA9_A,\n> - GPIO_GFN_SSI_SDATA8,\n> - GPIO_GFN_SSI_SDATA7,\n> - GPIO_GFN_SSI_WS78,\n> - GPIO_GFN_SSI_SCK78,\n> - GPIO_GFN_SSI_SDATA6,\n> - GPIO_GFN_SSI_WS6,\n> - GPIO_GFN_SSI_SCK6,\n> - GPIO_FN_SSI_SDATA5,\n> - GPIO_FN_SSI_WS5,\n> - GPIO_FN_SSI_SCK5,\n> - GPIO_GFN_SSI_SDATA4,\n> - GPIO_GFN_SSI_WS4,\n> - GPIO_GFN_SSI_SCK4,\n> - GPIO_GFN_SSI_SDATA3,\n> - GPIO_GFN_SSI_WS34,\n> - GPIO_GFN_SSI_SCK34,\n> - GPIO_GFN_SSI_SDATA2_A,\n> - GPIO_GFN_SSI_SDATA1_A,\n> - GPIO_GFN_SSI_SDATA0,\n> - GPIO_GFN_SSI_WS01239,\n> - GPIO_GFN_SSI_SCK01239,\n> -\n> - /* GPSR7 */\n> - GPIO_FN_HDMI1_CEC,\n> - GPIO_FN_HDMI0_CEC,\n> - GPIO_FN_AVS2,\n> - GPIO_FN_AVS1,\n> -\n> - /* IPSR0 */\n> - GPIO_IFN_AVB_MDC,\n> - GPIO_FN_MSIOF2_SS2_C,\n> - GPIO_IFN_AVB_MAGIC,\n> - GPIO_FN_MSIOF2_SS1_C,\n> - GPIO_FN_SCK4_A,\n> - GPIO_IFN_AVB_PHY_INT,\n> - GPIO_FN_MSIOF2_SYNC_C,\n> - GPIO_FN_RX4_A,\n> - GPIO_IFN_AVB_LINK,\n> - GPIO_FN_MSIOF2_SCK_C,\n> - GPIO_FN_TX4_A,\n> - GPIO_IFN_AVB_AVTP_MATCH_A,\n> - GPIO_FN_MSIOF2_RXD_C,\n> - GPIO_FN_CTS4x_A,\n> - GPIO_FN_FSCLKST2x_A,\n> - GPIO_IFN_AVB_AVTP_CAPTURE_A,\n> - GPIO_FN_MSIOF2_TXD_C,\n> - GPIO_FN_RTS4x_TANS_A,\n> - GPIO_IFN_IRQ0,\n> - GPIO_FN_QPOLB,\n> - GPIO_FN_DU_CDE,\n> - GPIO_FN_VI4_DATA0_B,\n> - GPIO_FN_CAN0_TX_B,\n> - GPIO_FN_CANFD0_TX_B,\n> - GPIO_FN_MSIOF3_SS2_E,\n> - GPIO_IFN_IRQ1,\n> - GPIO_FN_QPOLA,\n> - GPIO_FN_DU_DISP,\n> - GPIO_FN_VI4_DATA1_B,\n> - GPIO_FN_CAN0_RX_B,\n> - GPIO_FN_CANFD0_RX_B,\n> - GPIO_FN_MSIOF3_SS1_E,\n> -\n> - /* IPSR1 */\n> - GPIO_IFN_IRQ2,\n> - GPIO_FN_QCPV_QDE,\n> - GPIO_FN_DU_EXODDF_DU_ODDF_DISP_CDE,\n> - GPIO_FN_VI4_DATA2_B,\n> - GPIO_FN_MSIOF3_SYNC_E,\n> - GPIO_FN_PWM3_B,\n> - GPIO_IFN_IRQ3,\n> - GPIO_FN_QSTVB_QVE,\n> - GPIO_FN_A25,\n> - GPIO_FN_DU_DOTCLKOUT1,\n> - GPIO_FN_VI4_DATA3_B,\n> - GPIO_FN_MSIOF3_SCK_E,\n> - GPIO_FN_PWM4_B,\n> - GPIO_IFN_IRQ4,\n> - GPIO_FN_QSTH_QHS,\n> - GPIO_FN_A24,\n> - GPIO_FN_DU_EXHSYNC_DU_HSYNC,\n> - GPIO_FN_VI4_DATA4_B,\n> - GPIO_FN_MSIOF3_RXD_E,\n> - GPIO_FN_PWM5_B,\n> - GPIO_IFN_IRQ5,\n> - GPIO_FN_QSTB_QHE,\n> - GPIO_FN_A23,\n> - GPIO_FN_DU_EXVSYNC_DU_VSYNC,\n> - GPIO_FN_VI4_DATA5_B,\n> - GPIO_FN_FSCLKST2x_B,\n> - GPIO_FN_MSIOF3_TXD_E,\n> - GPIO_FN_PWM6_B,\n> - GPIO_IFN_PWM0,\n> - GPIO_FN_AVB_AVTP_PPS,\n> - GPIO_FN_VI4_DATA6_B,\n> - GPIO_FN_IECLK_B,\n> - GPIO_IFN_PWM1_A,\n> - GPIO_FN_HRX3_D,\n> - GPIO_FN_VI4_DATA7_B,\n> - GPIO_FN_IERX_B,\n> - GPIO_IFN_PWM2_A,\n> - GPIO_FN_HTX3_D,\n> - GPIO_FN_IETX_B,\n> - GPIO_IFN_A0,\n> - GPIO_FN_LCDOUT16,\n> - GPIO_FN_MSIOF3_SYNC_B,\n> - GPIO_FN_VI4_DATA8,\n> - GPIO_FN_DU_DB0,\n> - GPIO_FN_PWM3_A,\n> -\n> - /* IPSR2 */\n> - GPIO_IFN_A1,\n> - GPIO_FN_LCDOUT17,\n> - GPIO_FN_MSIOF3_TXD_B,\n> - GPIO_FN_VI4_DATA9,\n> - GPIO_FN_DU_DB1,\n> - GPIO_FN_PWM4_A,\n> - GPIO_IFN_A2,\n> - GPIO_FN_LCDOUT18,\n> - GPIO_FN_MSIOF3_SCK_B,\n> - GPIO_FN_VI4_DATA10,\n> - GPIO_FN_DU_DB2,\n> - GPIO_FN_PWM5_A,\n> - GPIO_IFN_A3,\n> - GPIO_FN_LCDOUT19,\n> - GPIO_FN_MSIOF3_RXD_B,\n> - GPIO_FN_VI4_DATA11,\n> - GPIO_FN_DU_DB3,\n> - GPIO_FN_PWM6_A,\n> - GPIO_IFN_A4,\n> - GPIO_FN_LCDOUT20,\n> - GPIO_FN_MSIOF3_SS1_B,\n> - GPIO_FN_VI4_DATA12,\n> - GPIO_FN_VI5_DATA12,\n> - GPIO_FN_DU_DB4,\n> - GPIO_IFN_A5,\n> - GPIO_FN_LCDOUT21,\n> - GPIO_FN_MSIOF3_SS2_B,\n> - GPIO_FN_SCK4_B,\n> - GPIO_FN_VI4_DATA13,\n> - GPIO_FN_VI5_DATA13,\n> - GPIO_FN_DU_DB5,\n> - GPIO_IFN_A6,\n> - GPIO_FN_LCDOUT22,\n> - GPIO_FN_MSIOF2_SS1_A,\n> - GPIO_FN_RX4_B,\n> - GPIO_FN_VI4_DATA14,\n> - GPIO_FN_VI5_DATA14,\n> - GPIO_FN_DU_DB6,\n> - GPIO_IFN_A7,\n> - GPIO_FN_LCDOUT23,\n> - GPIO_FN_MSIOF2_SS2_A,\n> - GPIO_FN_TX4_B,\n> - GPIO_FN_VI4_DATA15,\n> - GPIO_FN_V15_DATA15,\n> - GPIO_FN_DU_DB7,\n> - GPIO_IFN_A8,\n> - GPIO_FN_RX3_B,\n> - GPIO_FN_MSIOF2_SYNC_A,\n> - GPIO_FN_HRX4_B,\n> - GPIO_FN_SDA6_A,\n> - GPIO_FN_AVB_AVTP_MATCH_B,\n> - GPIO_FN_PWM1_B,\n> -\n> - /* IPSR3 */\n> - GPIO_IFN_A9,\n> - GPIO_FN_MSIOF2_SCK_A,\n> - GPIO_FN_CTS4x_B,\n> - GPIO_FN_VI5_VSYNCx,\n> - GPIO_IFN_A10,\n> - GPIO_FN_MSIOF2_RXD_A,\n> - GPIO_FN_RTS4n_TANS_B,\n> - GPIO_FN_VI5_HSYNCx,\n> - GPIO_IFN_A11,\n> - GPIO_FN_TX3_B,\n> - GPIO_FN_MSIOF2_TXD_A,\n> - GPIO_FN_HTX4_B,\n> - GPIO_FN_HSCK4,\n> - GPIO_FN_VI5_FIELD,\n> - GPIO_FN_SCL6_A,\n> - GPIO_FN_AVB_AVTP_CAPTURE_B,\n> - GPIO_FN_PWM2_B,\n> - GPIO_IFN_A12,\n> - GPIO_FN_LCDOUT12,\n> - GPIO_FN_MSIOF3_SCK_C,\n> - GPIO_FN_HRX4_A,\n> - GPIO_FN_VI5_DATA8,\n> - GPIO_FN_DU_DG4,\n> - GPIO_IFN_A13,\n> - GPIO_FN_LCDOUT13,\n> - GPIO_FN_MSIOF3_SYNC_C,\n> - GPIO_FN_HTX4_A,\n> - GPIO_FN_VI5_DATA9,\n> - GPIO_FN_DU_DG5,\n> - GPIO_IFN_A14,\n> - GPIO_FN_LCDOUT14,\n> - GPIO_FN_MSIOF3_RXD_C,\n> - GPIO_FN_HCTS4x,\n> - GPIO_FN_VI5_DATA10,\n> - GPIO_FN_DU_DG6,\n> - GPIO_IFN_A15,\n> - GPIO_FN_LCDOUT15,\n> - GPIO_FN_MSIOF3_TXD_C,\n> - GPIO_FN_HRTS4x,\n> - GPIO_FN_VI5_DATA11,\n> - GPIO_FN_DU_DG7,\n> - GPIO_IFN_A16,\n> - GPIO_FN_LCDOUT8,\n> - GPIO_FN_VI4_FIELD,\n> - GPIO_FN_DU_DG0,\n> -\n> - /* IPSR4 */\n> - GPIO_IFN_A17,\n> - GPIO_FN_LCDOUT9,\n> - GPIO_FN_VI4_VSYNCx,\n> - GPIO_FN_DU_DG1,\n> - GPIO_IFN_A18,\n> - GPIO_FN_LCDOUT10,\n> - GPIO_FN_VI4_HSYNCx,\n> - GPIO_FN_DU_DG2,\n> - GPIO_IFN_A19,\n> - GPIO_FN_LCDOUT11,\n> - GPIO_FN_VI4_CLKENB,\n> - GPIO_FN_DU_DG3,\n> - GPIO_IFN_CS0x,\n> - GPIO_FN_VI5_CLKENB,\n> - GPIO_IFN_CS1x_A26,\n> - GPIO_FN_VI5_CLK,\n> - GPIO_FN_EX_WAIT0_B,\n> - GPIO_IFN_BSx,\n> - GPIO_FN_QSTVA_QVS,\n> - GPIO_FN_MSIOF3_SCK_D,\n> - GPIO_FN_SCK3,\n> - GPIO_FN_HSCK3,\n> - GPIO_FN_CAN1_TX,\n> - GPIO_FN_CANFD1_TX,\n> - GPIO_FN_IETX_A,\n> - GPIO_IFN_RDx,\n> - GPIO_FN_MSIOF3_SYNC_D,\n> - GPIO_FN_RX3_A,\n> - GPIO_FN_HRX3_A,\n> - GPIO_FN_CAN0_TX_A,\n> - GPIO_FN_CANFD0_TX_A,\n> - GPIO_IFN_RD_WRx,\n> - GPIO_FN_MSIOF3_RXD_D,\n> - GPIO_FN_TX3_A,\n> - GPIO_FN_HTX3_A,\n> - GPIO_FN_CAN0_RX_A,\n> - GPIO_FN_CANFD0_RX_A,\n> -\n> - /* IPSR5 */\n> - GPIO_IFN_WE0x,\n> - GPIO_FN_MSIIOF3_TXD_D,\n> - GPIO_FN_CTS3x,\n> - GPIO_FN_HCTS3x,\n> - GPIO_FN_SCL6_B,\n> - GPIO_FN_CAN_CLK,\n> - GPIO_FN_IECLK_A,\n> - GPIO_IFN_WE1x,\n> - GPIO_FN_MSIOF3_SS1_D,\n> - GPIO_FN_RTS3x_TANS,\n> - GPIO_FN_HRTS3x,\n> - GPIO_FN_SDA6_B,\n> - GPIO_FN_CAN1_RX,\n> - GPIO_FN_CANFD1_RX,\n> - GPIO_FN_IERX_A,\n> - GPIO_IFN_EX_WAIT0_A,\n> - GPIO_FN_QCLK,\n> - GPIO_FN_VI4_CLK,\n> - GPIO_FN_DU_DOTCLKOUT0,\n> - GPIO_IFN_D0,\n> - GPIO_FN_MSIOF2_SS1_B,\n> - GPIO_FN_MSIOF3_SCK_A,\n> - GPIO_FN_VI4_DATA16,\n> - GPIO_FN_VI5_DATA0,\n> - GPIO_IFN_D1,\n> - GPIO_FN_MSIOF2_SS2_B,\n> - GPIO_FN_MSIOF3_SYNC_A,\n> - GPIO_FN_VI4_DATA17,\n> - GPIO_FN_VI5_DATA1,\n> - GPIO_IFN_D2,\n> - GPIO_FN_MSIOF3_RXD_A,\n> - GPIO_FN_VI4_DATA18,\n> - GPIO_FN_VI5_DATA2,\n> - GPIO_IFN_D3,\n> - GPIO_FN_MSIOF3_TXD_A,\n> - GPIO_FN_VI4_DATA19,\n> - GPIO_FN_VI5_DATA3,\n> - GPIO_IFN_D4,\n> - GPIO_FN_MSIOF2_SCK_B,\n> - GPIO_FN_VI4_DATA20,\n> - GPIO_FN_VI5_DATA4,\n> -\n> - /* IPSR6 */\n> - GPIO_IFN_D5,\n> - GPIO_FN_MSIOF2_SYNC_B,\n> - GPIO_FN_VI4_DATA21,\n> - GPIO_FN_VI5_DATA5,\n> - GPIO_IFN_D6,\n> - GPIO_FN_MSIOF2_RXD_B,\n> - GPIO_FN_VI4_DATA22,\n> - GPIO_FN_VI5_DATA6,\n> - GPIO_IFN_D7,\n> - GPIO_FN_MSIOF2_TXD_B,\n> - GPIO_FN_VI4_DATA23,\n> - GPIO_FN_VI5_DATA7,\n> - GPIO_IFN_D8,\n> - GPIO_FN_LCDOUT0,\n> - GPIO_FN_MSIOF2_SCK_D,\n> - GPIO_FN_SCK4_C,\n> - GPIO_FN_VI4_DATA0_A,\n> - GPIO_FN_DU_DR0,\n> - GPIO_IFN_D9,\n> - GPIO_FN_LCDOUT1,\n> - GPIO_FN_MSIOF2_SYNC_D,\n> - GPIO_FN_VI4_DATA1_A,\n> - GPIO_FN_DU_DR1,\n> - GPIO_IFN_D10,\n> - GPIO_FN_LCDOUT2,\n> - GPIO_FN_MSIOF2_RXD_D,\n> - GPIO_FN_HRX3_B,\n> - GPIO_FN_VI4_DATA2_A,\n> - GPIO_FN_CTS4x_C,\n> - GPIO_FN_DU_DR2,\n> - GPIO_IFN_D11,\n> - GPIO_FN_LCDOUT3,\n> - GPIO_FN_MSIOF2_TXD_D,\n> - GPIO_FN_HTX3_B,\n> - GPIO_FN_VI4_DATA3_A,\n> - GPIO_FN_RTS4x_TANS_C,\n> - GPIO_FN_DU_DR3,\n> - GPIO_IFN_D12,\n> - GPIO_FN_LCDOUT4,\n> - GPIO_FN_MSIOF2_SS1_D,\n> - GPIO_FN_RX4_C,\n> - GPIO_FN_VI4_DATA4_A,\n> - GPIO_FN_DU_DR4,\n> -\n> - /* IPSR7 */\n> - GPIO_IFN_D13,\n> - GPIO_FN_LCDOUT5,\n> - GPIO_FN_MSIOF2_SS2_D,\n> - GPIO_FN_TX4_C,\n> - GPIO_FN_VI4_DATA5_A,\n> - GPIO_FN_DU_DR5,\n> - GPIO_IFN_D14,\n> - GPIO_FN_LCDOUT6,\n> - GPIO_FN_MSIOF3_SS1_A,\n> - GPIO_FN_HRX3_C,\n> - GPIO_FN_VI4_DATA6_A,\n> - GPIO_FN_DU_DR6,\n> - GPIO_FN_SCL6_C,\n> - GPIO_IFN_D15,\n> - GPIO_FN_LCDOUT7,\n> - GPIO_FN_MSIOF3_SS2_A,\n> - GPIO_FN_HTX3_C,\n> - GPIO_FN_VI4_DATA7_A,\n> - GPIO_FN_DU_DR7,\n> - GPIO_FN_SDA6_C,\n> - GPIO_FN_FSCLKST,\n> - GPIO_IFN_SD0_CLK,\n> - GPIO_FN_MSIOF1_SCK_E,\n> - GPIO_FN_STP_OPWM_0_B,\n> - GPIO_IFN_SD0_CMD,\n> - GPIO_FN_MSIOF1_SYNC_E,\n> - GPIO_FN_STP_IVCXO27_0_B,\n> - GPIO_IFN_SD0_DAT0,\n> - GPIO_FN_MSIOF1_RXD_E,\n> - GPIO_FN_TS_SCK0_B,\n> - GPIO_FN_STP_ISCLK_0_B,\n> - GPIO_IFN_SD0_DAT1,\n> - GPIO_FN_MSIOF1_TXD_E,\n> - GPIO_FN_TS_SPSYNC0_B,\n> - GPIO_FN_STP_ISSYNC_0_B,\n> -\n> - /* IPSR8 */\n> - GPIO_IFN_SD0_DAT2,\n> - GPIO_FN_MSIOF1_SS1_E,\n> - GPIO_FN_TS_SDAT0_B,\n> - GPIO_FN_STP_ISD_0_B,\n> - GPIO_IFN_SD0_DAT3,\n> - GPIO_FN_MSIOF1_SS2_E,\n> - GPIO_FN_TS_SDEN0_B,\n> - GPIO_FN_STP_ISEN_0_B,\n> - GPIO_IFN_SD1_CLK,\n> - GPIO_FN_MSIOF1_SCK_G,\n> - GPIO_FN_SIM0_CLK_A,\n> - GPIO_IFN_SD1_CMD,\n> - GPIO_FN_MSIOF1_SYNC_G,\n> - GPIO_FN_NFCEx_B,\n> - GPIO_FN_SIM0_D_A,\n> - GPIO_FN_STP_IVCXO27_1_B,\n> - GPIO_IFN_SD1_DAT0,\n> - GPIO_FN_SD2_DAT4,\n> - GPIO_FN_MSIOF1_RXD_G,\n> - GPIO_FN_NFWPx_B,\n> - GPIO_FN_TS_SCK1_B,\n> - GPIO_FN_STP_ISCLK_1_B,\n> - GPIO_IFN_SD1_DAT1,\n> - GPIO_FN_SD2_DAT5,\n> - GPIO_FN_MSIOF1_TXD_G,\n> - GPIO_FN_NFDATA14_B,\n> - GPIO_FN_TS_SPSYNC1_B,\n> - GPIO_FN_STP_ISSYNC_1_B,\n> - GPIO_IFN_SD1_DAT2,\n> - GPIO_FN_SD2_DAT6,\n> - GPIO_FN_MSIOF1_SS1_G,\n> - GPIO_FN_NFDATA15_B,\n> - GPIO_FN_TS_SDAT1_B,\n> - GPIO_FN_STP_IOD_1_B,\n> - GPIO_IFN_SD1_DAT3,\n> - GPIO_FN_SD2_DAT7,\n> - GPIO_FN_MSIOF1_SS2_G,\n> - GPIO_FN_NFRBx_B,\n> - GPIO_FN_TS_SDEN1_B,\n> - GPIO_FN_STP_ISEN_1_B,\n> -\n> - /* IPSR9 */\n> - GPIO_IFN_SD2_CLK,\n> - GPIO_FN_NFDATA8,\n> - GPIO_IFN_SD2_CMD,\n> - GPIO_FN_NFDATA9,\n> - GPIO_IFN_SD2_DAT0,\n> - GPIO_FN_NFDATA10,\n> - GPIO_IFN_SD2_DAT1,\n> - GPIO_FN_NFDATA11,\n> - GPIO_IFN_SD2_DAT2,\n> - GPIO_FN_NFDATA12,\n> - GPIO_IFN_SD2_DAT3,\n> - GPIO_FN_NFDATA13,\n> - GPIO_IFN_SD2_DS,\n> - GPIO_FN_NFALE,\n> - GPIO_FN_SATA_DEVSLP_B,\n> - GPIO_IFN_SD3_CLK,\n> - GPIO_FN_NFWEx,\n> -\n> - /* IPSR10 */\n> - GPIO_IFN_SD3_CMD,\n> - GPIO_FN_NFREx,\n> - GPIO_IFN_SD3_DAT0,\n> - GPIO_FN_NFDATA0,\n> - GPIO_IFN_SD3_DAT1,\n> - GPIO_FN_NFDATA1,\n> - GPIO_IFN_SD3_DAT2,\n> - GPIO_FN_NFDATA2,\n> - GPIO_IFN_SD3_DAT3,\n> - GPIO_FN_NFDATA3,\n> - GPIO_IFN_SD3_DAT4,\n> - GPIO_FN_SD2_CD_A,\n> - GPIO_FN_NFDATA4,\n> - GPIO_IFN_SD3_DAT5,\n> - GPIO_FN_SD2_WP_A,\n> - GPIO_FN_NFDATA5,\n> - GPIO_IFN_SD3_DAT6,\n> - GPIO_FN_SD3_CD,\n> - GPIO_FN_NFDATA6,\n> -\n> - /* IPSR11 */\n> - GPIO_IFN_SD3_DAT7,\n> - GPIO_FN_SD3_WP,\n> - GPIO_FN_NFDATA7,\n> - GPIO_IFN_SD3_DS,\n> - GPIO_FN_NFCLE,\n> - GPIO_IFN_SD0_CD,\n> - GPIO_FN_NFDATA14_A,\n> - GPIO_FN_SCL2_B,\n> - GPIO_FN_SIM0_RST_A,\n> - GPIO_IFN_SD0_WP,\n> - GPIO_FN_NFDATA15_A,\n> - GPIO_FN_SDA2_B,\n> - GPIO_IFN_SD1_CD,\n> - GPIO_FN_NFRBx_A,\n> - GPIO_FN_SIM0_CLK_B,\n> - GPIO_IFN_SD1_WP,\n> - GPIO_FN_NFCEx_A,\n> - GPIO_FN_SIM0_D_B,\n> - GPIO_IFN_SCK0,\n> - GPIO_FN_HSCK1_B,\n> - GPIO_FN_MSIOF1_SS2_B,\n> - GPIO_FN_AUDIO_CLKC_B,\n> - GPIO_FN_SDA2_A,\n> - GPIO_FN_SIM0_RST_B,\n> - GPIO_FN_STP_OPWM_0_C,\n> - GPIO_FN_RIF0_CLK_B,\n> - GPIO_FN_ADICHS2,\n> - GPIO_FN_SCK5_B,\n> - GPIO_IFN_RX0,\n> - GPIO_FN_HRX1_B,\n> - GPIO_FN_TS_SCK0_C,\n> - GPIO_FN_STP_ISCLK_0_C,\n> - GPIO_FN_RIF0_D0_B,\n> -\n> - /* IPSR12 */\n> - GPIO_IFN_TX0,\n> - GPIO_FN_HTX1_B,\n> - GPIO_FN_TS_SPSYNC0_C,\n> - GPIO_FN_STP_ISSYNC_0_C,\n> - GPIO_FN_RIF0_D1_B,\n> - GPIO_IFN_CTS0x,\n> - GPIO_FN_HCTS1x_B,\n> - GPIO_FN_MSIOF1_SYNC_B,\n> - GPIO_FN_TS_SPSYNC1_C,\n> - GPIO_FN_STP_ISSYNC_1_C,\n> - GPIO_FN_RIF1_SYNC_B,\n> - GPIO_FN_AUDIO_CLKOUT_C,\n> - GPIO_FN_ADICS_SAMP,\n> - GPIO_IFN_RTS0x_TANS,\n> - GPIO_FN_HRTS1x_B,\n> - GPIO_FN_MSIOF1_SS1_B,\n> - GPIO_FN_AUDIO_CLKA_B,\n> - GPIO_FN_SCL2_A,\n> - GPIO_FN_STP_IVCXO27_1_C,\n> - GPIO_FN_RIF0_SYNC_B,\n> - GPIO_FN_ADICHS1,\n> - GPIO_IFN_RX1_A,\n> - GPIO_FN_HRX1_A,\n> - GPIO_FN_TS_SDAT0_C,\n> - GPIO_FN_STP_ISD_0_C,\n> - GPIO_FN_RIF1_CLK_C,\n> - GPIO_IFN_TX1_A,\n> - GPIO_FN_HTX1_A,\n> - GPIO_FN_TS_SDEN0_C,\n> - GPIO_FN_STP_ISEN_0_C,\n> - GPIO_FN_RIF1_D0_C,\n> - GPIO_IFN_CTS1x,\n> - GPIO_FN_HCTS1x_A,\n> - GPIO_FN_MSIOF1_RXD_B,\n> - GPIO_FN_TS_SDEN1_C,\n> - GPIO_FN_STP_ISEN_1_C,\n> - GPIO_FN_RIF1_D0_B,\n> - GPIO_FN_ADIDATA,\n> - GPIO_IFN_RTS1x_TANS,\n> - GPIO_FN_HRTS1x_A,\n> - GPIO_FN_MSIOF1_TXD_B,\n> - GPIO_FN_TS_SDAT1_C,\n> - GPIO_FN_STP_ISD_1_C,\n> - GPIO_FN_RIF1_D1_B,\n> - GPIO_FN_ADICHS0,\n> - GPIO_IFN_SCK2,\n> - GPIO_FN_SCIF_CLK_B,\n> - GPIO_FN_MSIOF1_SCK_B,\n> - GPIO_FN_TS_SCK1_C,\n> - GPIO_FN_STP_ISCLK_1_C,\n> - GPIO_FN_RIF1_CLK_B,\n> - GPIO_FN_ADICLK,\n> -\n> - /* IPSR13 */\n> - GPIO_IFN_TX2_A,\n> - GPIO_FN_SD2_CD_B,\n> - GPIO_FN_SCL1_A,\n> - GPIO_FN_FMCLK_A,\n> - GPIO_FN_RIF1_D1_C,\n> - GPIO_FN_FSO_CFE_0x,\n> - GPIO_IFN_RX2_A,\n> - GPIO_FN_SD2_WP_B,\n> - GPIO_FN_SDA1_A,\n> - GPIO_FN_FMIN_A,\n> - GPIO_FN_RIF1_SYNC_C,\n> - GPIO_FN_FSO_CFE_1x,\n> - GPIO_IFN_HSCK0,\n> - GPIO_FN_MSIOF1_SCK_D,\n> - GPIO_FN_AUDIO_CLKB_A,\n> - GPIO_FN_SSI_SDATA1_B,\n> - GPIO_FN_TS_SCK0_D,\n> - GPIO_FN_STP_ISCLK_0_D,\n> - GPIO_FN_RIF0_CLK_C,\n> - GPIO_FN_RX5_B,\n> - GPIO_IFN_HRX0,\n> - GPIO_FN_MSIOF1_RXD_D,\n> - GPIO_FN_SSI_SDATA2_B,\n> - GPIO_FN_TS_SDEN0_D,\n> - GPIO_FN_STP_ISEN_0_D,\n> - GPIO_FN_RIF0_D0_C,\n> - GPIO_IFN_HTX0,\n> - GPIO_FN_MSIOF1_TXD_D,\n> - GPIO_FN_SSI_SDATA9_B,\n> - GPIO_FN_TS_SDAT0_D,\n> - GPIO_FN_STP_ISD_0_D,\n> - GPIO_FN_RIF0_D1_C,\n> - GPIO_IFN_HCTS0x,\n> - GPIO_FN_RX2_B,\n> - GPIO_FN_MSIOF1_SYNC_D,\n> - GPIO_FN_SSI_SCK9_A,\n> - GPIO_FN_TS_SPSYNC0_D,\n> - GPIO_FN_STP_ISSYNC_0_D,\n> - GPIO_FN_RIF0_SYNC_C,\n> - GPIO_FN_AUDIO_CLKOUT1_A,\n> - GPIO_IFN_HRTS0x,\n> - GPIO_FN_TX2_B,\n> - GPIO_FN_MSIOF1_SS1_D,\n> - GPIO_FN_SSI_WS9_A,\n> - GPIO_FN_STP_IVCXO27_0_D,\n> - GPIO_FN_BPFCLK_A,\n> - GPIO_FN_AUDIO_CLKOUT2_A,\n> - GPIO_IFN_MSIOF0_SYNC,\n> - GPIO_FN_AUDIO_CLKOUT_A,\n> - GPIO_FN_TX5_B,\n> - GPIO_FN_BPFCLK_D,\n> -\n> - /* IPSR14 */\n> - GPIO_IFN_MSIOF0_SS1,\n> - GPIO_FN_RX5_A,\n> - GPIO_FN_NFWPx_A,\n> - GPIO_FN_AUDIO_CLKA_C,\n> - GPIO_FN_SSI_SCK2_A,\n> - GPIO_FN_STP_IVCXO27_0_C,\n> - GPIO_FN_AUDIO_CLKOUT3_A,\n> - GPIO_FN_TCLK1_B,\n> - GPIO_IFN_MSIOF0_SS2,\n> - GPIO_FN_TX5_A,\n> - GPIO_FN_MSIOF1_SS2_D,\n> - GPIO_FN_AUDIO_CLKC_A,\n> - GPIO_FN_SSI_WS2_A,\n> - GPIO_FN_STP_OPWM_0_D,\n> - GPIO_FN_AUDIO_CLKOUT_D,\n> - GPIO_FN_SPEEDIN_B,\n> - GPIO_IFN_MLB_CLK,\n> - GPIO_FN_MSIOF1_SCK_F,\n> - GPIO_FN_SCL1_B,\n> - GPIO_IFN_MLB_SIG,\n> - GPIO_FN_RX1_B,\n> - GPIO_FN_MSIOF1_SYNC_F,\n> - GPIO_FN_SDA1_B,\n> - GPIO_IFN_MLB_DAT,\n> - GPIO_FN_TX1_B,\n> - GPIO_FN_MSIOF1_RXD_F,\n> - GPIO_IFN_SSI_SCK01239,\n> - GPIO_FN_MSIOF1_TXD_F,\n> - GPIO_FN_MOUT0,\n> - GPIO_IFN_SSI_WS01239,\n> - GPIO_FN_MSIOF1_SS1_F,\n> - GPIO_FN_MOUT1,\n> - GPIO_IFN_SSI_SDATA0,\n> - GPIO_FN_MSIOF1_SS2_F,\n> - GPIO_FN_MOUT2,\n> -\n> - /* IPSR15 */\n> - GPIO_IFN_SSI_SDATA1_A,\n> - GPIO_FN_MOUT5,\n> - GPIO_IFN_SSI_SDATA2_A,\n> - GPIO_FN_SSI_SCK1_B,\n> - GPIO_FN_MOUT6,\n> - GPIO_IFN_SSI_SCK34,\n> - GPIO_FN_MSIOF1_SS1_A,\n> - GPIO_FN_STP_OPWM_0_A,\n> - GPIO_IFN_SSI_WS34,\n> - GPIO_FN_HCTS2x_A,\n> - GPIO_FN_MSIOF1_SS2_A,\n> - GPIO_FN_STP_IVCXO27_0_A,\n> - GPIO_IFN_SSI_SDATA3,\n> - GPIO_FN_HRTS2x_A,\n> - GPIO_FN_MSIOF1_TXD_A,\n> - GPIO_FN_TS_SCK0_A,\n> - GPIO_FN_STP_ISCLK_0_A,\n> - GPIO_FN_RIF0_D1_A,\n> - GPIO_FN_RIF2_D0_A,\n> - GPIO_IFN_SSI_SCK4,\n> - GPIO_FN_HRX2_A,\n> - GPIO_FN_MSIOF1_SCK_A,\n> - GPIO_FN_TS_SDAT0_A,\n> - GPIO_FN_STP_ISD_0_A,\n> - GPIO_FN_RIF0_CLK_A,\n> - GPIO_FN_RIF2_CLK_A,\n> - GPIO_IFN_SSI_WS4,\n> - GPIO_FN_HTX2_A,\n> - GPIO_FN_MSIOF1_SYNC_A,\n> - GPIO_FN_TS_SDEN0_A,\n> - GPIO_FN_STP_ISEN_0_A,\n> - GPIO_FN_RIF0_SYNC_A,\n> - GPIO_FN_RIF2_SYNC_A,\n> - GPIO_IFN_SSI_SDATA4,\n> - GPIO_FN_HSCK2_A,\n> - GPIO_FN_MSIOF1_RXD_A,\n> - GPIO_FN_TS_SPSYNC0_A,\n> - GPIO_FN_STP_ISSYNC_0_A,\n> - GPIO_FN_RIF0_D0_A,\n> - GPIO_FN_RIF2_D1_A,\n> -\n> - /* IPSR16 */\n> - GPIO_IFN_SSI_SCK6,\n> - GPIO_FN_SIM0_RST_D,\n> - GPIO_IFN_SSI_WS6,\n> - GPIO_FN_SIM0_D_D,\n> - GPIO_IFN_SSI_SDATA6,\n> - GPIO_FN_SIM0_CLK_D,\n> - GPIO_FN_SATA_DEVSLP_A,\n> - GPIO_IFN_SSI_SCK78,\n> - GPIO_FN_HRX2_B,\n> - GPIO_FN_MSIOF1_SCK_C,\n> - GPIO_FN_TS_SCK1_A,\n> - GPIO_FN_STP_ISCLK_1_A,\n> - GPIO_FN_RIF1_CLK_A,\n> - GPIO_FN_RIF3_CLK_A,\n> - GPIO_IFN_SSI_WS78,\n> - GPIO_FN_HTX2_B,\n> - GPIO_FN_MSIOF1_SYNC_C,\n> - GPIO_FN_TS_SDAT1_A,\n> - GPIO_FN_STP_ISD_1_A,\n> - GPIO_FN_RIF1_SYNC_A,\n> - GPIO_FN_RIF3_SYNC_A,\n> - GPIO_IFN_SSI_SDATA7,\n> - GPIO_FN_HCTS2x_B,\n> - GPIO_FN_MSIOF1_RXD_C,\n> - GPIO_FN_TS_SDEN1_A,\n> - GPIO_FN_STP_ISEN_1_A,\n> - GPIO_FN_RIF1_D0_A,\n> - GPIO_FN_RIF3_D0_A,\n> - GPIO_FN_TCLK2_A,\n> - GPIO_IFN_SSI_SDATA8,\n> - GPIO_FN_HRTS2x_B,\n> - GPIO_FN_MSIOF1_TXD_C,\n> - GPIO_FN_TS_SPSYNC1_A,\n> - GPIO_FN_STP_ISSYNC_1_A,\n> - GPIO_FN_RIF1_D1_A,\n> - GPIO_FN_RIF3_D1_A,\n> - GPIO_IFN_SSI_SDATA9_A,\n> - GPIO_FN_HSCK2_B,\n> - GPIO_FN_MSIOF1_SS1_C,\n> - GPIO_FN_HSCK1_A,\n> - GPIO_FN_SSI_WS1_B,\n> - GPIO_FN_SCK1,\n> - GPIO_FN_STP_IVCXO27_1_A,\n> - GPIO_FN_SCK5_A,\n> -\n> - /* IPSR17 */\n> - GPIO_IFN_AUDIO_CLKA_A,\n> - GPIO_FN_CC5_OSCOUT,\n> - GPIO_IFN_AUDIO_CLKB_B,\n> - GPIO_FN_SCIF_CLK_A,\n> - GPIO_FN_STP_IVCXO27_1_D,\n> - GPIO_FN_REMOCON_A,\n> - GPIO_FN_TCLK1_A,\n> - GPIO_IFN_USB0_PWEN,\n> - GPIO_FN_SIM0_RST_C,\n> - GPIO_FN_TS_SCK1_D,\n> - GPIO_FN_STP_ISCLK_1_D,\n> - GPIO_FN_BPFCLK_B,\n> - GPIO_FN_RIF3_CLK_B,\n> - GPIO_FN_HSCK2_C,\n> - GPIO_IFN_USB0_OVC,\n> - GPIO_FN_SIM0_D_C,\n> - GPIO_FN_TS_SDAT1_D,\n> - GPIO_FN_STP_ISD_1_D,\n> - GPIO_FN_RIF3_SYNC_B,\n> - GPIO_FN_HRX2_C,\n> - GPIO_IFN_USB1_PWEN,\n> - GPIO_FN_SIM0_CLK_C,\n> - GPIO_FN_SSI_SCK1_A,\n> - GPIO_FN_TS_SCK0_E,\n> - GPIO_FN_STP_ISCLK_0_E,\n> - GPIO_FN_FMCLK_B,\n> - GPIO_FN_RIF2_CLK_B,\n> - GPIO_FN_SPEEDIN_A,\n> - GPIO_FN_HTX2_C,\n> - GPIO_IFN_USB1_OVC,\n> - GPIO_FN_MSIOF1_SS2_C,\n> - GPIO_FN_SSI_WS1_A,\n> - GPIO_FN_TS_SDAT0_E,\n> - GPIO_FN_STP_ISD_0_E,\n> - GPIO_FN_FMIN_B,\n> - GPIO_FN_RIF2_SYNC_B,\n> - GPIO_FN_REMOCON_B,\n> - GPIO_FN_HCTS2x_C,\n> - GPIO_IFN_USB30_PWEN,\n> - GPIO_FN_AUDIO_CLKOUT_B,\n> - GPIO_FN_SSI_SCK2_B,\n> - GPIO_FN_TS_SDEN1_D,\n> - GPIO_FN_STP_ISEN_1_D,\n> - GPIO_FN_STP_OPWM_0_E,\n> - GPIO_FN_RIF3_D0_B,\n> - GPIO_FN_TCLK2_B,\n> - GPIO_FN_TPU0TO0,\n> - GPIO_FN_BPFCLK_C,\n> - GPIO_FN_HRTS2x_C,\n> - GPIO_IFN_USB30_OVC,\n> - GPIO_FN_AUDIO_CLKOUT1_B,\n> - GPIO_FN_SSI_WS2_B,\n> - GPIO_FN_TS_SPSYNC1_D,\n> - GPIO_FN_STP_ISSYNC_1_D,\n> - GPIO_FN_STP_IVCXO27_0_E,\n> - GPIO_FN_RIF3_D1_B,\n> - GPIO_FN_FSO_TOEx,\n> - GPIO_FN_TPU0TO1,\n> -\n> - /* IPSR18 */\n> - GPIO_IFN_USB3_PWEN,\n> - GPIO_FN_AUDIO_CLKOUT2_B,\n> - GPIO_FN_SSI_SCK9_B,\n> - GPIO_FN_TS_SDEN0_E,\n> - GPIO_FN_STP_ISEN_0_E,\n> - GPIO_FN_RIF2_D0_B,\n> - GPIO_FN_TPU0TO2,\n> - GPIO_FN_FMCLK_C,\n> - GPIO_FN_FMCLK_D,\n> - GPIO_IFN_USB3_OVC,\n> - GPIO_FN_AUDIO_CLKOUT3_B,\n> - GPIO_FN_SSI_WS9_B,\n> - GPIO_FN_TS_SPSYNC0_E,\n> - GPIO_FN_STP_ISSYNC_0_E,\n> - GPIO_FN_RIF2_D1_B,\n> - GPIO_FN_TPU0TO3,\n> - GPIO_FN_FMIN_C,\n> - GPIO_FN_FMIN_D,\n> -};\n> -\n> -#endif /* __ASM_R8A7795_GPIO_H__ */\n> diff --git a/arch/arm/mach-rmobile/include/mach/r8a7796-gpio.h b/arch/arm/mach-rmobile/include/mach/r8a7796-gpio.h\n> deleted file mode 100644\n> index 2359e36a14..0000000000\n> --- a/arch/arm/mach-rmobile/include/mach/r8a7796-gpio.h\n> +++ /dev/null\n> @@ -1,1084 +0,0 @@\n> -/*\n> - * arch/arm/include/asm/arch-rcar_gen3/r8a7796-gpio.h\n> - * This file defines pin function control of gpio.\n> - *\n> - * Copyright (C) 2016 Renesas Electronics Corporation\n> - *\n> - * SPDX-License-Identifier: GPL-2.0+\n> - */\n> -#ifndef __ASM_R8A7796_GPIO_H__\n> -#define __ASM_R8A7796_GPIO_H__\n> -\n> -/* Pin Function Controller:\n> - * GPIO_FN_xx - GPIO used to select pin function\n> - * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU\n> - */\n> -enum {\n> - GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,\n> - GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,\n> - GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,\n> - GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,\n> -\n> - GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,\n> - GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,\n> - GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,\n> - GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,\n> - GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,\n> - GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,\n> - GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,\n> - GPIO_GP_1_28,\n> -\n> - GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,\n> - GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,\n> - GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,\n> - GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14,\n> -\n> - GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,\n> - GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,\n> - GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,\n> - GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,\n> -\n> - GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,\n> - GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,\n> - GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,\n> - GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,\n> - GPIO_GP_4_16, GPIO_GP_4_17,\n> -\n> - GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,\n> - GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,\n> - GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,\n> - GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,\n> - GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,\n> - GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,\n> - GPIO_GP_5_24, GPIO_GP_5_25,\n> -\n> - GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,\n> - GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,\n> - GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,\n> - GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,\n> - GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,\n> - GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,\n> - GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,\n> - GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,\n> -\n> - GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,\n> -\n> - /* GPSR0 */\n> - GPIO_GFN_D15,\n> - GPIO_GFN_D14,\n> - GPIO_GFN_D13,\n> - GPIO_GFN_D12,\n> - GPIO_GFN_D11,\n> - GPIO_GFN_D10,\n> - GPIO_GFN_D9,\n> - GPIO_GFN_D8,\n> - GPIO_GFN_D7,\n> - GPIO_GFN_D6,\n> - GPIO_GFN_D5,\n> - GPIO_GFN_D4,\n> - GPIO_GFN_D3,\n> - GPIO_GFN_D2,\n> - GPIO_GFN_D1,\n> - GPIO_GFN_D0,\n> -\n> - /* GPSR1 */\n> - GPIO_GFN_CLKOUT,\n> - GPIO_GFN_EX_WAIT0_A,\n> - GPIO_GFN_WE1x,\n> - GPIO_GFN_WE0x,\n> - GPIO_GFN_RD_WRx,\n> - GPIO_GFN_RDx,\n> - GPIO_GFN_BSx,\n> - GPIO_GFN_CS1x_A26,\n> - GPIO_GFN_CS0x,\n> - GPIO_GFN_A19,\n> - GPIO_GFN_A18,\n> - GPIO_GFN_A17,\n> - GPIO_GFN_A16,\n> - GPIO_GFN_A15,\n> - GPIO_GFN_A14,\n> - GPIO_GFN_A13,\n> - GPIO_GFN_A12,\n> - GPIO_GFN_A11,\n> - GPIO_GFN_A10,\n> - GPIO_GFN_A9,\n> - GPIO_GFN_A8,\n> - GPIO_GFN_A7,\n> - GPIO_GFN_A6,\n> - GPIO_GFN_A5,\n> - GPIO_GFN_A4,\n> - GPIO_GFN_A3,\n> - GPIO_GFN_A2,\n> - GPIO_GFN_A1,\n> - GPIO_GFN_A0,\n> -\n> - /* GPSR2 */\n> - GPIO_GFN_AVB_AVTP_CAPTURE_A,\n> - GPIO_GFN_AVB_AVTP_MATCH_A,\n> - GPIO_GFN_AVB_LINK,\n> - GPIO_GFN_AVB_PHY_INT,\n> - GPIO_GFN_AVB_MAGIC,\n> - GPIO_GFN_AVB_MDC,\n> - GPIO_GFN_PWM2_A,\n> - GPIO_GFN_PWM1_A,\n> - GPIO_GFN_PWM0,\n> - GPIO_GFN_IRQ5,\n> - GPIO_GFN_IRQ4,\n> - GPIO_GFN_IRQ3,\n> - GPIO_GFN_IRQ2,\n> - GPIO_GFN_IRQ1,\n> - GPIO_GFN_IRQ0,\n> -\n> - /* GPSR3 */\n> - GPIO_GFN_SD1_WP,\n> - GPIO_GFN_SD1_CD,\n> - GPIO_GFN_SD0_WP,\n> - GPIO_GFN_SD0_CD,\n> - GPIO_GFN_SD1_DAT3,\n> - GPIO_GFN_SD1_DAT2,\n> - GPIO_GFN_SD1_DAT1,\n> - GPIO_GFN_SD1_DAT0,\n> - GPIO_GFN_SD1_CMD,\n> - GPIO_GFN_SD1_CLK,\n> - GPIO_GFN_SD0_DAT3,\n> - GPIO_GFN_SD0_DAT2,\n> - GPIO_GFN_SD0_DAT1,\n> - GPIO_GFN_SD0_DAT0,\n> - GPIO_GFN_SD0_CMD,\n> - GPIO_GFN_SD0_CLK,\n> -\n> - /* GPSR4 */\n> - GPIO_GFN_SD3_DS,\n> - GPIO_GFN_SD3_DAT7,\n> - GPIO_GFN_SD3_DAT6,\n> - GPIO_GFN_SD3_DAT5,\n> - GPIO_GFN_SD3_DAT4,\n> - GPIO_FN_SD3_DAT3,\n> - GPIO_FN_SD3_DAT2,\n> - GPIO_FN_SD3_DAT1,\n> - GPIO_FN_SD3_DAT0,\n> - GPIO_FN_SD3_CMD,\n> - GPIO_FN_SD3_CLK,\n> - GPIO_GFN_SD2_DS,\n> - GPIO_GFN_SD2_DAT3,\n> - GPIO_GFN_SD2_DAT2,\n> - GPIO_GFN_SD2_DAT1,\n> - GPIO_GFN_SD2_DAT0,\n> - GPIO_FN_SD2_CMD,\n> - GPIO_GFN_SD2_CLK,\n> -\n> - /* GPSR5 */\n> - GPIO_GFN_MLB_DAT,\n> - GPIO_GFN_MLB_SIG,\n> - GPIO_GFN_MLB_CLK,\n> - GPIO_FN_MSIOF0_RXD,\n> - GPIO_GFN_MSIOF0_SS2,\n> - GPIO_FN_MSIOF0_TXD,\n> - GPIO_GFN_MSIOF0_SS1,\n> - GPIO_GFN_MSIOF0_SYNC,\n> - GPIO_FN_MSIOF0_SCK,\n> - GPIO_GFN_HRTS0x,\n> - GPIO_GFN_HCTS0x,\n> - GPIO_GFN_HTX0,\n> - GPIO_GFN_HRX0,\n> - GPIO_GFN_HSCK0,\n> - GPIO_GFN_RX2_A,\n> - GPIO_GFN_TX2_A,\n> - GPIO_GFN_SCK2,\n> - GPIO_GFN_RTS1x_TANS,\n> - GPIO_GFN_CTS1x,\n> - GPIO_GFN_TX1_A,\n> - GPIO_GFN_RX1_A,\n> - GPIO_GFN_RTS0x_TANS,\n> - GPIO_GFN_CTS0x,\n> - GPIO_GFN_TX0,\n> - GPIO_GFN_RX0,\n> - GPIO_GFN_SCK0,\n> -\n> - /* GPSR6 */\n> - GPIO_GFN_GP6_31,\n> - GPIO_GFN_GP6_30,\n> - GPIO_GFN_USB30_OVC,\n> - GPIO_GFN_USB30_PWEN,\n> - GPIO_GFN_USB1_OVC,\n> - GPIO_GFN_USB1_PWEN,\n> - GPIO_GFN_USB0_OVC,\n> - GPIO_GFN_USB0_PWEN,\n> - GPIO_GFN_AUDIO_CLKB_B,\n> - GPIO_GFN_AUDIO_CLKA_A,\n> - GPIO_GFN_SSI_SDATA9_A,\n> - GPIO_GFN_SSI_SDATA8,\n> - GPIO_GFN_SSI_SDATA7,\n> - GPIO_GFN_SSI_WS78,\n> - GPIO_GFN_SSI_SCK78,\n> - GPIO_GFN_SSI_SDATA6,\n> - GPIO_GFN_SSI_WS6,\n> - GPIO_GFN_SSI_SCK6,\n> - GPIO_FN_SSI_SDATA5,\n> - GPIO_FN_SSI_WS5,\n> - GPIO_FN_SSI_SCK5,\n> - GPIO_GFN_SSI_SDATA4,\n> - GPIO_GFN_SSI_WS4,\n> - GPIO_GFN_SSI_SCK4,\n> - GPIO_GFN_SSI_SDATA3,\n> - GPIO_GFN_SSI_WS34,\n> - GPIO_GFN_SSI_SCK34,\n> - GPIO_GFN_SSI_SDATA2_A,\n> - GPIO_GFN_SSI_SDATA1_A,\n> - GPIO_GFN_SSI_SDATA0,\n> - GPIO_GFN_SSI_WS01239,\n> - GPIO_GFN_SSI_SCK01239,\n> -\n> - /* GPSR7 */\n> - GPIO_FN_HDMI1_CEC,\n> - GPIO_FN_HDMI0_CEC,\n> - GPIO_FN_AVS2,\n> - GPIO_FN_AVS1,\n> -\n> - /* IPSR0 */\n> - GPIO_IFN_AVB_MDC,\n> - GPIO_FN_MSIOF2_SS2_C,\n> - GPIO_IFN_AVB_MAGIC,\n> - GPIO_FN_MSIOF2_SS1_C,\n> - GPIO_FN_SCK4_A,\n> - GPIO_IFN_AVB_PHY_INT,\n> - GPIO_FN_MSIOF2_SYNC_C,\n> - GPIO_FN_RX4_A,\n> - GPIO_IFN_AVB_LINK,\n> - GPIO_FN_MSIOF2_SCK_C,\n> - GPIO_FN_TX4_A,\n> - GPIO_IFN_AVB_AVTP_MATCH_A,\n> - GPIO_FN_MSIOF2_RXD_C,\n> - GPIO_FN_CTS4x_A,\n> - GPIO_IFN_AVB_AVTP_CAPTURE_A,\n> - GPIO_FN_MSIOF2_TXD_C,\n> - GPIO_FN_RTS4x_TANS_A,\n> - GPIO_IFN_IRQ0,\n> - GPIO_FN_QPOLB,\n> - GPIO_FN_DU_CDE,\n> - GPIO_FN_VI4_DATA0_B,\n> - GPIO_FN_CAN0_TX_B,\n> - GPIO_FN_CANFD0_TX_B,\n> - GPIO_FN_MSIOF3_SS2_E,\n> - GPIO_IFN_IRQ1,\n> - GPIO_FN_QPOLA,\n> - GPIO_FN_DU_DISP,\n> - GPIO_FN_VI4_DATA1_B,\n> - GPIO_FN_CAN0_RX_B,\n> - GPIO_FN_CANFD0_RX_B,\n> - GPIO_FN_MSIOF3_SS1_E,\n> -\n> - /* IPSR1 */\n> - GPIO_IFN_IRQ2,\n> - GPIO_FN_QCPV_QDE,\n> - GPIO_FN_DU_EXODDF_DU_ODDF_DISP_CDE,\n> - GPIO_FN_VI4_DATA2_B,\n> - GPIO_FN_MSIOF3_SYNC_E,\n> - GPIO_FN_PWM3_B,\n> - GPIO_IFN_IRQ3,\n> - GPIO_FN_QSTVB_QVE,\n> - GPIO_FN_DU_DOTCLKOUT1,\n> - GPIO_FN_VI4_DATA3_B,\n> - GPIO_FN_MSIOF3_SCK_E,\n> - GPIO_FN_PWM4_B,\n> - GPIO_IFN_IRQ4,\n> - GPIO_FN_QSTH_QHS,\n> - GPIO_FN_DU_EXHSYNC_DU_HSYNC,\n> - GPIO_FN_VI4_DATA4_B,\n> - GPIO_FN_MSIOF3_RXD_E,\n> - GPIO_FN_PWM5_B,\n> - GPIO_IFN_IRQ5,\n> - GPIO_FN_QSTB_QHE,\n> - GPIO_FN_DU_EXVSYNC_DU_VSYNC,\n> - GPIO_FN_VI4_DATA5_B,\n> - GPIO_FN_MSIOF3_TXD_E,\n> - GPIO_FN_PWM6_B,\n> - GPIO_IFN_PWM0,\n> - GPIO_FN_AVB_AVTP_PPS,\n> - GPIO_FN_VI4_DATA6_B,\n> - GPIO_FN_IECLK_B,\n> - GPIO_IFN_PWM1_A,\n> - GPIO_FN_HRX3_D,\n> - GPIO_FN_VI4_DATA7_B,\n> - GPIO_FN_IERX_B,\n> - GPIO_IFN_PWM2_A,\n> - GPIO_FN_PWMFSW0,\n> - GPIO_FN_HTX3_D,\n> - GPIO_FN_IETX_B,\n> - GPIO_IFN_A0,\n> - GPIO_FN_LCDOUT16,\n> - GPIO_FN_MSIOF3_SYNC_B,\n> - GPIO_FN_VI4_DATA8,\n> - GPIO_FN_DU_DB0,\n> - GPIO_FN_PWM3_A,\n> -\n> - /* IPSR2 */\n> - GPIO_IFN_A1,\n> - GPIO_FN_LCDOUT17,\n> - GPIO_FN_MSIOF3_TXD_B,\n> - GPIO_FN_VI4_DATA9,\n> - GPIO_FN_DU_DB1,\n> - GPIO_FN_PWM4_A,\n> - GPIO_IFN_A2,\n> - GPIO_FN_LCDOUT18,\n> - GPIO_FN_MSIOF3_SCK_B,\n> - GPIO_FN_VI4_DATA10,\n> - GPIO_FN_DU_DB2,\n> - GPIO_FN_PWM5_A,\n> - GPIO_IFN_A3,\n> - GPIO_FN_LCDOUT19,\n> - GPIO_FN_MSIOF3_RXD_B,\n> - GPIO_FN_VI4_DATA11,\n> - GPIO_FN_DU_DB3,\n> - GPIO_FN_PWM6_A,\n> - GPIO_IFN_A4,\n> - GPIO_FN_LCDOUT20,\n> - GPIO_FN_MSIOF3_SS1_B,\n> - GPIO_FN_VI4_DATA12,\n> - GPIO_FN_VI5_DATA12,\n> - GPIO_FN_DU_DB4,\n> - GPIO_IFN_A5,\n> - GPIO_FN_LCDOUT21,\n> - GPIO_FN_MSIOF3_SS2_B,\n> - GPIO_FN_SCK4_B,\n> - GPIO_FN_VI4_DATA13,\n> - GPIO_FN_VI5_DATA13,\n> - GPIO_FN_DU_DB5,\n> - GPIO_IFN_A6,\n> - GPIO_FN_LCDOUT22,\n> - GPIO_FN_MSIOF2_SS1_A,\n> - GPIO_FN_RX4_B,\n> - GPIO_FN_VI4_DATA14,\n> - GPIO_FN_VI5_DATA14,\n> - GPIO_FN_DU_DB6,\n> - GPIO_IFN_A7,\n> - GPIO_FN_LCDOUT23,\n> - GPIO_FN_MSIOF2_SS2_A,\n> - GPIO_FN_TX4_B,\n> - GPIO_FN_VI4_DATA15,\n> - GPIO_FN_V15_DATA15,\n> - GPIO_FN_DU_DB7,\n> - GPIO_IFN_A8,\n> - GPIO_FN_RX3_B,\n> - GPIO_FN_MSIOF2_SYNC_A,\n> - GPIO_FN_HRX4_B,\n> - GPIO_FN_SDA6_A,\n> - GPIO_FN_AVB_AVTP_MATCH_B,\n> - GPIO_FN_PWM1_B,\n> -\n> - /* IPSR3 */\n> - GPIO_IFN_A9,\n> - GPIO_FN_MSIOF2_SCK_A,\n> - GPIO_FN_CTS4x_B,\n> - GPIO_FN_VI5_VSYNCx,\n> - GPIO_IFN_A10,\n> - GPIO_FN_MSIOF2_RXD_A,\n> - GPIO_FN_RTS4n_TANS_B,\n> - GPIO_FN_VI5_HSYNCx,\n> - GPIO_IFN_A11,\n> - GPIO_FN_TX3_B,\n> - GPIO_FN_MSIOF2_TXD_A,\n> - GPIO_FN_HTX4_B,\n> - GPIO_FN_HSCK4,\n> - GPIO_FN_VI5_FIELD,\n> - GPIO_FN_SCL6_A,\n> - GPIO_FN_AVB_AVTP_CAPTURE_B,\n> - GPIO_FN_PWM2_B,\n> - GPIO_FN_SPV_EVEN,\n> - GPIO_IFN_A12,\n> - GPIO_FN_LCDOUT12,\n> - GPIO_FN_MSIOF3_SCK_C,\n> - GPIO_FN_HRX4_A,\n> - GPIO_FN_VI5_DATA8,\n> - GPIO_FN_DU_DG4,\n> - GPIO_IFN_A13,\n> - GPIO_FN_LCDOUT13,\n> - GPIO_FN_MSIOF3_SYNC_C,\n> - GPIO_FN_HTX4_A,\n> - GPIO_FN_VI5_DATA9,\n> - GPIO_FN_DU_DG5,\n> - GPIO_IFN_A14,\n> - GPIO_FN_LCDOUT14,\n> - GPIO_FN_MSIOF3_RXD_C,\n> - GPIO_FN_HCTS4x,\n> - GPIO_FN_VI5_DATA10,\n> - GPIO_FN_DU_DG6,\n> - GPIO_IFN_A15,\n> - GPIO_FN_LCDOUT15,\n> - GPIO_FN_MSIOF3_TXD_C,\n> - GPIO_FN_HRTS4x,\n> - GPIO_FN_VI5_DATA11,\n> - GPIO_FN_DU_DG7,\n> - GPIO_IFN_A16,\n> - GPIO_FN_LCDOUT8,\n> - GPIO_FN_VI4_FIELD,\n> - GPIO_FN_DU_DG0,\n> -\n> - /* IPSR4 */\n> - GPIO_IFN_A17,\n> - GPIO_FN_LCDOUT9,\n> - GPIO_FN_VI4_VSYNCx,\n> - GPIO_FN_DU_DG1,\n> - GPIO_IFN_A18,\n> - GPIO_FN_LCDOUT10,\n> - GPIO_FN_VI4_HSYNCx,\n> - GPIO_FN_DU_DG2,\n> - GPIO_IFN_A19,\n> - GPIO_FN_LCDOUT11,\n> - GPIO_FN_VI4_CLKENB,\n> - GPIO_FN_DU_DG3,\n> - GPIO_IFN_CS0x,\n> - GPIO_FN_VI5_CLKENB,\n> - GPIO_IFN_CS1x_A26,\n> - GPIO_FN_VI5_CLK,\n> - GPIO_FN_EX_WAIT0_B,\n> - GPIO_IFN_BSx,\n> - GPIO_FN_QSTVA_QVS,\n> - GPIO_FN_MSIOF3_SCK_D,\n> - GPIO_FN_SCK3,\n> - GPIO_FN_HSCK3,\n> - GPIO_FN_CAN1_TX,\n> - GPIO_FN_CANFD1_TX,\n> - GPIO_FN_IETX_A,\n> - GPIO_IFN_RDx,\n> - GPIO_FN_MSIOF3_SYNC_D,\n> - GPIO_FN_RX3_A,\n> - GPIO_FN_HRX3_A,\n> - GPIO_FN_CAN0_TX_A,\n> - GPIO_FN_CANFD0_TX_A,\n> - GPIO_IFN_RD_WRx,\n> - GPIO_FN_MSIOF3_RXD_D,\n> - GPIO_FN_TX3_A,\n> - GPIO_FN_HTX3_A,\n> - GPIO_FN_CAN0_RX_A,\n> - GPIO_FN_CANFD0_RX_A,\n> -\n> - /* IPSR5 */\n> - GPIO_IFN_WE0x,\n> - GPIO_FN_MSIIOF3_TXD_D,\n> - GPIO_FN_CTS3x,\n> - GPIO_FN_HCTS3x,\n> - GPIO_FN_SCL6_B,\n> - GPIO_FN_CAN_CLK,\n> - GPIO_FN_IECLK_A,\n> - GPIO_IFN_WE1x,\n> - GPIO_FN_MSIOF3_SS1_D,\n> - GPIO_FN_RTS3x_TANS,\n> - GPIO_FN_HRTS3x,\n> - GPIO_FN_SDA6_B,\n> - GPIO_FN_CAN1_RX,\n> - GPIO_FN_CANFD1_RX,\n> - GPIO_FN_IERX_A,\n> - GPIO_IFN_EX_WAIT0_A,\n> - GPIO_FN_QCLK,\n> - GPIO_FN_VI4_CLK,\n> - GPIO_FN_DU_DOTCLKOUT0,\n> - GPIO_IFN_D0,\n> - GPIO_FN_MSIOF2_SS1_B,\n> - GPIO_FN_MSIOF3_SCK_A,\n> - GPIO_FN_VI4_DATA16,\n> - GPIO_FN_VI5_DATA0,\n> - GPIO_IFN_D1,\n> - GPIO_FN_MSIOF2_SS2_B,\n> - GPIO_FN_MSIOF3_SYNC_A,\n> - GPIO_FN_VI4_DATA17,\n> - GPIO_FN_VI5_DATA1,\n> - GPIO_IFN_D2,\n> - GPIO_FN_MSIOF3_RXD_A,\n> - GPIO_FN_VI4_DATA18,\n> - GPIO_FN_VI5_DATA2,\n> - GPIO_IFN_D3,\n> - GPIO_FN_MSIOF3_TXD_A,\n> - GPIO_FN_VI4_DATA19,\n> - GPIO_FN_VI5_DATA3,\n> - GPIO_IFN_D4,\n> - GPIO_FN_MSIOF2_SCK_B,\n> - GPIO_FN_VI4_DATA20,\n> - GPIO_FN_VI5_DATA4,\n> -\n> - /* IPSR6 */\n> - GPIO_IFN_D5,\n> - GPIO_FN_MSIOF2_SYNC_B,\n> - GPIO_FN_VI4_DATA21,\n> - GPIO_FN_VI5_DATA5,\n> - GPIO_IFN_D6,\n> - GPIO_FN_MSIOF2_RXD_B,\n> - GPIO_FN_VI4_DATA22,\n> - GPIO_FN_VI5_DATA6,\n> - GPIO_IFN_D7,\n> - GPIO_FN_MSIOF2_TXD_B,\n> - GPIO_FN_VI4_DATA23,\n> - GPIO_FN_VI5_DATA7,\n> - GPIO_IFN_D8,\n> - GPIO_FN_LCDOUT0,\n> - GPIO_FN_MSIOF2_SCK_D,\n> - GPIO_FN_SCK4_C,\n> - GPIO_FN_VI4_DATA0_A,\n> - GPIO_FN_DU_DR0,\n> - GPIO_IFN_D9,\n> - GPIO_FN_LCDOUT1,\n> - GPIO_FN_MSIOF2_SYNC_D,\n> - GPIO_FN_VI4_DATA1_A,\n> - GPIO_FN_DU_DR1,\n> - GPIO_IFN_D10,\n> - GPIO_FN_LCDOUT2,\n> - GPIO_FN_MSIOF2_RXD_D,\n> - GPIO_FN_HRX3_B,\n> - GPIO_FN_VI4_DATA2_A,\n> - GPIO_FN_CTS4x_C,\n> - GPIO_FN_DU_DR2,\n> - GPIO_IFN_D11,\n> - GPIO_FN_LCDOUT3,\n> - GPIO_FN_MSIOF2_TXD_D,\n> - GPIO_FN_HTX3_B,\n> - GPIO_FN_VI4_DATA3_A,\n> - GPIO_FN_RTS4x_TANS_C,\n> - GPIO_FN_DU_DR3,\n> - GPIO_IFN_D12,\n> - GPIO_FN_LCDOUT4,\n> - GPIO_FN_MSIOF2_SS1_D,\n> - GPIO_FN_RX4_C,\n> - GPIO_FN_VI4_DATA4_A,\n> - GPIO_FN_DU_DR4,\n> -\n> - /* IPSR7 */\n> - GPIO_IFN_D13,\n> - GPIO_FN_LCDOUT5,\n> - GPIO_FN_MSIOF2_SS2_D,\n> - GPIO_FN_TX4_C,\n> - GPIO_FN_VI4_DATA5_A,\n> - GPIO_FN_DU_DR5,\n> - GPIO_IFN_D14,\n> - GPIO_FN_LCDOUT6,\n> - GPIO_FN_MSIOF3_SS1_A,\n> - GPIO_FN_HRX3_C,\n> - GPIO_FN_VI4_DATA6_A,\n> - GPIO_FN_DU_DR6,\n> - GPIO_FN_SCL6_C,\n> - GPIO_IFN_D15,\n> - GPIO_FN_LCDOUT7,\n> - GPIO_FN_MSIOF3_SS2_A,\n> - GPIO_FN_HTX3_C,\n> - GPIO_FN_VI4_DATA7_A,\n> - GPIO_FN_DU_DR7,\n> - GPIO_FN_SDA6_C,\n> - GPIO_FN_FSCLKST,\n> - GPIO_IFN_SD0_CLK,\n> - GPIO_FN_MSIOF1_SCK_E,\n> - GPIO_FN_STP_OPWM_0_B,\n> - GPIO_IFN_SD0_CMD,\n> - GPIO_FN_MSIOF1_SYNC_E,\n> - GPIO_FN_STP_IVCXO27_0_B,\n> - GPIO_IFN_SD0_DAT0,\n> - GPIO_FN_MSIOF1_RXD_E,\n> - GPIO_FN_TS_SCK0_B,\n> - GPIO_FN_STP_ISCLK_0_B,\n> - GPIO_IFN_SD0_DAT1,\n> - GPIO_FN_MSIOF1_TXD_E,\n> - GPIO_FN_TS_SPSYNC0_B,\n> - GPIO_FN_STP_ISSYNC_0_B,\n> -\n> - /* IPSR8 */\n> - GPIO_IFN_SD0_DAT2,\n> - GPIO_FN_MSIOF1_SS1_E,\n> - GPIO_FN_TS_SDAT0_B,\n> - GPIO_FN_STP_ISD_0_B,\n> -\n> - GPIO_IFN_SD0_DAT3,\n> - GPIO_FN_MSIOF1_SS2_E,\n> - GPIO_FN_TS_SDEN0_B,\n> - GPIO_FN_STP_ISEN_0_B,\n> -\n> - GPIO_IFN_SD1_CLK,\n> - GPIO_FN_MSIOF1_SCK_G,\n> - GPIO_FN_SIM0_CLK_A,\n> -\n> - GPIO_IFN_SD1_CMD,\n> - GPIO_FN_MSIOF1_SYNC_G,\n> - GPIO_FN_NFCEx_B,\n> - GPIO_FN_SIM0_D_A,\n> - GPIO_FN_STP_IVCXO27_1_B,\n> -\n> - GPIO_IFN_SD1_DAT0,\n> - GPIO_FN_SD2_DAT4,\n> - GPIO_FN_MSIOF1_RXD_G,\n> - GPIO_FN_NFWPx_B,\n> - GPIO_FN_TS_SCK1_B,\n> - GPIO_FN_STP_ISCLK_1_B,\n> -\n> - GPIO_IFN_SD1_DAT1,\n> - GPIO_FN_SD2_DAT5,\n> - GPIO_FN_MSIOF1_TXD_G,\n> - GPIO_FN_NFDATA14_B,\n> - GPIO_FN_TS_SPSYNC1_B,\n> - GPIO_FN_STP_ISSYNC_1_B,\n> -\n> - GPIO_IFN_SD1_DAT2,\n> - GPIO_FN_SD2_DAT6,\n> - GPIO_FN_MSIOF1_SS1_G,\n> - GPIO_FN_NFDATA15_B,\n> - GPIO_FN_TS_SDAT1_B,\n> - GPIO_FN_STP_IOD_1_B,\n> -\n> - GPIO_IFN_SD1_DAT3,\n> - GPIO_FN_SD2_DAT7,\n> - GPIO_FN_MSIOF1_SS2_G,\n> - GPIO_FN_NFRBx_B,\n> - GPIO_FN_TS_SDEN1_B,\n> - GPIO_FN_STP_ISEN_1_B,\n> -\n> - /* IPSR9 */\n> - GPIO_IFN_SD2_CLK,\n> - GPIO_FN_NFDATA8,\n> -\n> - GPIO_IFN_SD2_CMD,\n> - GPIO_FN_NFDATA9,\n> -\n> - GPIO_IFN_SD2_DAT0,\n> - GPIO_FN_NFDATA10,\n> -\n> - GPIO_IFN_SD2_DAT1,\n> - GPIO_FN_NFDATA11,\n> -\n> - GPIO_IFN_SD2_DAT2,\n> - GPIO_FN_NFDATA12,\n> -\n> - GPIO_IFN_SD2_DAT3,\n> - GPIO_FN_NFDATA13,\n> -\n> - GPIO_IFN_SD2_DS,\n> - GPIO_FN_NFALE,\n> -\n> - GPIO_IFN_SD3_CLK,\n> - GPIO_FN_NFWEx,\n> -\n> - /* IPSR10 */\n> - GPIO_IFN_SD3_CMD,\n> - GPIO_FN_NFREx,\n> -\n> - GPIO_IFN_SD3_DAT0,\n> - GPIO_FN_NFDATA0,\n> -\n> - GPIO_IFN_SD3_DAT1,\n> - GPIO_FN_NFDATA1,\n> -\n> - GPIO_IFN_SD3_DAT2,\n> - GPIO_FN_NFDATA2,\n> -\n> - GPIO_IFN_SD3_DAT3,\n> - GPIO_FN_NFDATA3,\n> -\n> - GPIO_IFN_SD3_DAT4,\n> - GPIO_FN_SD2_CD_A,\n> - GPIO_FN_NFDATA4,\n> -\n> - GPIO_IFN_SD3_DAT5,\n> - GPIO_FN_SD2_WP_A,\n> - GPIO_FN_NFDATA5,\n> -\n> - GPIO_IFN_SD3_DAT6,\n> - GPIO_FN_SD3_CD,\n> - GPIO_FN_NFDATA6,\n> -\n> - /* IPSR11 */\n> - GPIO_IFN_SD3_DAT7,\n> - GPIO_FN_SD3_WP,\n> - GPIO_FN_NFDATA7,\n> -\n> - GPIO_IFN_SD3_DS,\n> - GPIO_FN_NFCLE,\n> -\n> - GPIO_IFN_SD0_CD,\n> - GPIO_FN_NFDATA14_A,\n> - GPIO_FN_SCL2_B,\n> - GPIO_FN_SIM0_RST_A,\n> -\n> - GPIO_IFN_SD0_WP,\n> - GPIO_FN_NFDATA15_A,\n> - GPIO_FN_SDA2_B,\n> -\n> - GPIO_IFN_SD1_CD,\n> - GPIO_FN_NFRBx_A,\n> - GPIO_FN_SIM0_CLK_B,\n> -\n> - GPIO_IFN_SD1_WP,\n> - GPIO_FN_NFCEx_A,\n> - GPIO_FN_SIM0_D_B,\n> -\n> - GPIO_IFN_SCK0,\n> - GPIO_FN_HSCK1_B,\n> - GPIO_FN_MSIOF1_SS2_B,\n> - GPIO_FN_AUDIO_CLKC_B,\n> - GPIO_FN_SDA2_A,\n> - GPIO_FN_SIM0_RST_B,\n> - GPIO_FN_STP_OPWM_0_C,\n> - GPIO_FN_RIF0_CLK_B,\n> - GPIO_FN_ADICHS2,\n> - GPIO_FN_SCK5_B,\n> -\n> - GPIO_IFN_RX0,\n> - GPIO_FN_HRX1_B,\n> - GPIO_FN_TS_SCK0_C,\n> - GPIO_FN_STP_ISCLK_0_C,\n> - GPIO_FN_RIF0_D0_B,\n> -\n> - /* IPSR12 */\n> - GPIO_IFN_TX0,\n> - GPIO_FN_HTX1_B,\n> - GPIO_FN_TS_SPSYNC0_C,\n> - GPIO_FN_STP_ISSYNC_0_C,\n> - GPIO_FN_RIF0_D1_B,\n> -\n> - GPIO_IFN_CTS0x,\n> - GPIO_FN_HCTS1x_B,\n> - GPIO_FN_MSIOF1_SYNC_B,\n> - GPIO_FN_TS_SPSYNC1_C,\n> - GPIO_FN_STP_ISSYNC_1_C,\n> - GPIO_FN_RIF1_SYNC_B,\n> - GPIO_FN_AUDIO_CLKOUT_C,\n> - GPIO_FN_ADICS_SAMP,\n> -\n> - GPIO_IFN_RTS0x_TANS,\n> - GPIO_FN_HRTS1x_B,\n> - GPIO_FN_MSIOF1_SS1_B,\n> - GPIO_FN_AUDIO_CLKA_B,\n> - GPIO_FN_SCL2_A,\n> - GPIO_FN_STP_IVCXO27_1_C,\n> - GPIO_FN_RIF0_SYNC_B,\n> - GPIO_FN_ADICHS1,\n> -\n> - GPIO_IFN_RX1_A,\n> - GPIO_FN_HRX1_A,\n> - GPIO_FN_TS_SDAT0_C,\n> - GPIO_FN_STP_ISD_0_C,\n> - GPIO_FN_RIF1_CLK_C,\n> -\n> - GPIO_IFN_TX1_A,\n> - GPIO_FN_HTX1_A,\n> - GPIO_FN_TS_SDEN0_C,\n> - GPIO_FN_STP_ISEN_0_C,\n> - GPIO_FN_RIF1_D0_C,\n> -\n> - GPIO_IFN_CTS1x,\n> - GPIO_FN_HCTS1x_A,\n> - GPIO_FN_MSIOF1_RXD_B,\n> - GPIO_FN_TS_SDEN1_C,\n> - GPIO_FN_STP_ISEN_1_C,\n> - GPIO_FN_RIF1_D0_B,\n> - GPIO_FN_ADIDATA,\n> -\n> - GPIO_IFN_RTS1x_TANS,\n> - GPIO_FN_HRTS1x_A,\n> - GPIO_FN_MSIOF1_TXD_B,\n> - GPIO_FN_TS_SDAT1_C,\n> - GPIO_FN_STP_ISD_1_C,\n> - GPIO_FN_RIF1_D1_B,\n> - GPIO_FN_ADICHS0,\n> -\n> - GPIO_IFN_SCK2,\n> - GPIO_FN_SCIF_CLK_B,\n> - GPIO_FN_MSIOF1_SCK_B,\n> - GPIO_FN_TS_SCK1_C,\n> - GPIO_FN_STP_ISCLK_1_C,\n> - GPIO_FN_RIF1_CLK_B,\n> - GPIO_FN_ADICLK,\n> -\n> - /* IPSR13 */\n> - GPIO_IFN_TX2_A,\n> - GPIO_FN_SD2_CD_B,\n> - GPIO_FN_SCL1_A,\n> - GPIO_FN_FMCLK_A,\n> - GPIO_FN_RIF1_D1_C,\n> - GPIO_FN_FSO_CFE_0_B,\n> -\n> - GPIO_IFN_RX2_A,\n> - GPIO_FN_SD2_WP_B,\n> - GPIO_FN_SDA1_A,\n> - GPIO_FN_FMIN_A,\n> - GPIO_FN_RIF1_SYNC_C,\n> - GPIO_FN_FSO_CEF_1_B,\n> -\n> - GPIO_IFN_HSCK0,\n> - GPIO_FN_MSIOF1_SCK_D,\n> - GPIO_FN_AUDIO_CLKB_A,\n> - GPIO_FN_SSI_SDATA1_B,\n> - GPIO_FN_TS_SCK0_D,\n> - GPIO_FN_STP_ISCLK_0_D,\n> - GPIO_FN_RIF0_CLK_C,\n> - GPIO_FN_RX5_B,\n> -\n> - GPIO_IFN_HRX0,\n> - GPIO_FN_MSIOF1_RXD_D,\n> - GPIO_FN_SS1_SDATA2_B,\n> - GPIO_FN_TS_SDEN0_D,\n> - GPIO_FN_STP_ISEN_0_D,\n> - GPIO_FN_RIF0_D0_C,\n> -\n> - GPIO_IFN_HTX0,\n> - GPIO_FN_MSIOF1_TXD_D,\n> - GPIO_FN_SSI_SDATA9_B,\n> - GPIO_FN_TS_SDAT0_D,\n> - GPIO_FN_STP_ISD_0_D,\n> - GPIO_FN_RIF0_D1_C,\n> -\n> - GPIO_IFN_HCTS0x,\n> - GPIO_FN_RX2_B,\n> - GPIO_FN_MSIOF1_SYNC_D,\n> - GPIO_FN_SSI_SCK9_A,\n> - GPIO_FN_TS_SPSYNC0_D,\n> - GPIO_FN_STP_ISSYNC_0_D,\n> - GPIO_FN_RIF0_SYNC_C,\n> - GPIO_FN_AUDIO_CLKOUT1_A,\n> -\n> - GPIO_IFN_HRTS0x,\n> - GPIO_FN_TX2_B,\n> - GPIO_FN_MSIOF1_SS1_D,\n> - GPIO_FN_SSI_WS9_A,\n> - GPIO_FN_STP_IVCXO27_0_D,\n> - GPIO_FN_BPFCLK_A,\n> - GPIO_FN_AUDIO_CLKOUT2_A,\n> -\n> - GPIO_IFN_MSIOF0_SYNC,\n> - GPIO_FN_AUDIO_CLKOUT_A,\n> - GPIO_FN_TX5_B,\n> - GPIO_FN_BPFCLK_D,\n> -\n> - /* IPSR14 */\n> - GPIO_IFN_MSIOF0_SS1,\n> - GPIO_FN_RX5_A,\n> - GPIO_FN_NFWPx_A,\n> - GPIO_FN_AUDIO_CLKA_C,\n> - GPIO_FN_SSI_SCK2_A,\n> - GPIO_FN_STP_IVCXO27_0_C,\n> - GPIO_FN_AUDIO_CLKOUT3_A,\n> - GPIO_FN_TCLK1_B,\n> -\n> - GPIO_IFN_MSIOF0_SS2,\n> - GPIO_FN_TX5_A,\n> - GPIO_FN_MSIOF1_SS2_D,\n> - GPIO_FN_AUDIO_CLKC_A,\n> - GPIO_FN_SSI_WS2_A,\n> - GPIO_FN_STP_OPWM_0_D,\n> - GPIO_FN_AUDIO_CLKOUT_D,\n> - GPIO_FN_SPEEDIN_B,\n> -\n> - GPIO_IFN_MLB_CLK,\n> - GPIO_FN_MSIOF1_SCK_F,\n> - GPIO_FN_SCL1_B,\n> -\n> - GPIO_IFN_MLB_SIG,\n> - GPIO_FN_RX1_B,\n> - GPIO_FN_MSIOF1_SYNC_F,\n> - GPIO_FN_SDA1_B,\n> -\n> - GPIO_IFN_MLB_DAT,\n> - GPIO_FN_TX1_B,\n> - GPIO_FN_MSIOF1_RXD_F,\n> -\n> - GPIO_IFN_SSI_SCK0129,\n> - GPIO_FN_MSIOF1_TXD_F,\n> - GPIO_FN_MOUT0,\n> -\n> - GPIO_IFN_SSI_WS0129,\n> - GPIO_FN_MSIOF1_SS1_F,\n> - GPIO_FN_MOUT1,\n> -\n> - GPIO_IFN_SSI_SDATA0,\n> - GPIO_FN_MSIOF1_SS2_F,\n> - GPIO_FN_MOUT2,\n> -\n> - /* IPSR15 */\n> - GPIO_IFN_SSI_SDATA1_A,\n> - GPIO_FN_MOUT5,\n> -\n> - GPIO_IFN_SSI_SDATA2_A,\n> - GPIO_FN_SSI_SCK1_B,\n> - GPIO_FN_MOUT6,\n> -\n> - GPIO_IFN_SSI_SCK34,\n> - GPIO_FN_MSIOF1_SS1_A,\n> - GPIO_FN_STP_OPWM_0_A,\n> -\n> - GPIO_IFN_SSI_WS34,\n> - GPIO_FN_HCTS2x_A,\n> - GPIO_FN_MSIOF1_SS2_A,\n> - GPIO_FN_STP_IVCXO27_0_A,\n> -\n> - GPIO_IFN_SSI_SDATA3,\n> - GPIO_FN_HRTS2x_A,\n> - GPIO_FN_MSIOF1_TXD_A,\n> - GPIO_FN_TS_SCK0_A,\n> - GPIO_FN_STP_ISCLK_0_A,\n> - GPIO_FN_RIF0_D1_A,\n> - GPIO_FN_RIF2_D0_A,\n> -\n> - GPIO_IFN_SSI_SCK4,\n> - GPIO_FN_HRX2_A,\n> - GPIO_FN_MSIOF1_SCK_A,\n> - GPIO_FN_TS_SDAT0_A,\n> - GPIO_FN_STP_ISD_0_A,\n> - GPIO_FN_RIF0_CLK_A,\n> - GPIO_FN_RIF2_CLK_A,\n> -\n> - GPIO_IFN_SSI_WS4,\n> - GPIO_FN_HTX2_A,\n> - GPIO_FN_MSIOF1_SYNC_A,\n> - GPIO_FN_TS_SDEN0_A,\n> - GPIO_FN_STP_ISEN_0_A,\n> - GPIO_FN_RIF0_SYNC_A,\n> - GPIO_FN_RIF2_SYNC_A,\n> -\n> - GPIO_IFN_SSI_SDATA4,\n> - GPIO_FN_HSCK2_A,\n> - GPIO_FN_MSIOF1_RXD_A,\n> - GPIO_FN_TS_SPSYNC0_A,\n> - GPIO_FN_STP_ISSYNC_0_A,\n> - GPIO_FN_RIF0_D0_A,\n> - GPIO_FN_RIF2_D1_A,\n> -\n> - /* IPSR16 */\n> - GPIO_IFN_SSI_SCK6,\n> - GPIO_FN_SIM0_RST_D,\n> - GPIO_FN_FSO_TOE_A,\n> -\n> - GPIO_IFN_SSI_WS6,\n> - GPIO_FN_SIM0_D_D,\n> -\n> - GPIO_IFN_SSI_SDATA6,\n> - GPIO_FN_SIM0_CLK_D,\n> -\n> - GPIO_IFN_SSI_SCK78,\n> - GPIO_FN_HRX2_B,\n> - GPIO_FN_MSIOF1_SCK_C,\n> - GPIO_FN_TS_SCK1_A,\n> - GPIO_FN_STP_ISCLK_1_A,\n> - GPIO_FN_RIF1_CLK_A,\n> - GPIO_FN_RIF3_CLK_A,\n> -\n> - GPIO_IFN_SSI_WS78,\n> - GPIO_FN_HTX2_B,\n> - GPIO_FN_MSIOF1_SYNC_C,\n> - GPIO_FN_TS_SDAT1_A,\n> - GPIO_FN_STP_ISD_1_A,\n> - GPIO_FN_RIF1_SYNC_A,\n> - GPIO_FN_RIF3_SYNC_A,\n> -\n> - GPIO_IFN_SSI_SDATA7,\n> - GPIO_FN_HCTS2x_B,\n> - GPIO_FN_MSIOF1_RXD_C,\n> - GPIO_FN_TS_SDEN1_A,\n> - GPIO_FN_STP_IEN_1_A,\n> - GPIO_FN_RIF1_D0_A,\n> - GPIO_FN_RIF3_D0_A,\n> - GPIO_FN_TCLK2_A,\n> -\n> - GPIO_IFN_SSI_SDATA8,\n> - GPIO_FN_HRTS2x_B,\n> - GPIO_FN_MSIOF1_TXD_C,\n> - GPIO_FN_TS_SPSYNC1_A,\n> - GPIO_FN_STP_ISSYNC_1_A,\n> - GPIO_FN_RIF1_D1_A,\n> - GPIO_FN_EIF3_D1_A,\n> -\n> - GPIO_IFN_SSI_SDATA9_A,\n> - GPIO_FN_HSCK2_B,\n> - GPIO_FN_MSIOF1_SS1_C,\n> - GPIO_FN_HSCK1_A,\n> - GPIO_FN_SSI_WS1_B,\n> - GPIO_FN_SCK1,\n> - GPIO_FN_STP_IVCXO27_1_A,\n> - GPIO_FN_SCK5,\n> -\n> - /* IPSR17 */\n> - GPIO_IFN_AUDIO_CLKA_A,\n> - GPIO_FN_CC5_OSCOUT,\n> -\n> - GPIO_IFN_AUDIO_CLKB_B,\n> - GPIO_FN_SCIF_CLK_A,\n> - GPIO_FN_STP_IVCXO27_1_D,\n> - GPIO_FN_REMOCON_A,\n> - GPIO_FN_TCLK1_A,\n> -\n> - GPIO_IFN_USB0_PWEN,\n> - GPIO_FN_SIM0_RST_C,\n> - GPIO_FN_TS_SCK1_D,\n> - GPIO_FN_STP_ISCLK_1_D,\n> - GPIO_FN_BPFCLK_B,\n> - GPIO_FN_RIF3_CLK_B,\n> - GPIO_FN_FSO_CFE_1_A,\n> - GPIO_FN_HSCK2_C,\n> -\n> - GPIO_IFN_USB0_OVC,\n> - GPIO_FN_SIM0_D_C,\n> - GPIO_FN_TS_SDAT1_D,\n> - GPIO_FN_STP_ISD_1_D,\n> - GPIO_FN_RIF3_SYNC_B,\n> - GPIO_FN_HRX2_C,\n> -\n> - GPIO_IFN_USB1_PWEN,\n> - GPIO_FN_SIM0_CLK_C,\n> - GPIO_FN_SSI_SCK1_A,\n> - GPIO_FN_TS_SCK0_E,\n> - GPIO_FN_STP_ISCLK_0_E,\n> - GPIO_FN_FMCLK_B,\n> - GPIO_FN_RIF2_CLK_B,\n> - GPIO_FN_SPEEDIN_A,\n> - GPIO_FN_HTX2_C,\n> -\n> - GPIO_IFN_USB1_OVC,\n> - GPIO_FN_MSIOF1_SS2_C,\n> - GPIO_FN_SSI_WS1_A,\n> - GPIO_FN_TS_SDAT0_E,\n> - GPIO_FN_STP_ISD_0_E,\n> - GPIO_FN_FMIN_B,\n> - GPIO_FN_RIF2_SYNC_B,\n> - GPIO_FN_REMOCON_B,\n> - GPIO_FN_HCTS2x_C,\n> -\n> - GPIO_IFN_USB30_PWEN,\n> - GPIO_FN_AUDIO_CLKOUT_B,\n> - GPIO_FN_SSI_SCK2_B,\n> - GPIO_FN_TS_SDEN1_D,\n> - GPIO_FN_STP_ISEN_1_D,\n> - GPIO_FN_STP_OPWM_0_E,\n> - GPIO_FN_RIF3_D0_B,\n> - GPIO_FN_TCLK2_B,\n> - GPIO_FN_TPU0TO0,\n> - GPIO_FN_BPFCLK_C,\n> - GPIO_FN_HRTS2x_C,\n> -\n> - GPIO_IFN_USB30_OVC,\n> - GPIO_FN_AUDIO_CLKOUT1_B,\n> - GPIO_FN_SSI_WS2_B,\n> - GPIO_FN_TS_SPSYNC1_D,\n> - GPIO_FN_STP_ISSYNC_1_D,\n> - GPIO_FN_STP_IVCXO27_0_E,\n> - GPIO_FN_RIF3_D1_B,\n> - GPIO_FN_FSO_TOE_B,\n> - GPIO_FN_TPU0TO1,\n> -\n> - /* IPSR18 */\n> - GPIO_IFN_GP6_30,\n> - GPIO_FN_AUDIO_CLKOUT2_B,\n> - GPIO_FN_SSI_SCK9_B,\n> - GPIO_FN_TS_SDEN0_E,\n> - GPIO_FN_STP_ISEN_0_E,\n> - GPIO_FN_RIF2_D0_B,\n> - GPIO_FN_FSO_CFE_0_A,\n> - GPIO_FN_TPU0TO2,\n> - GPIO_FN_FMCLK_C,\n> - GPIO_FN_FMCLK_D,\n> -\n> - GPIO_IFN_GP6_31,\n> - GPIO_FN_AUDIO_CLKOUT3_B,\n> - GPIO_FN_SSI_WS9_B,\n> - GPIO_FN_TS_SPSYNC0_E,\n> - GPIO_FN_STP_ISSYNC_0_E,\n> - GPIO_FN_RIF2_D1_B,\n> - GPIO_FN_TPU0TO3,\n> - GPIO_FN_FMIN_C,\n> - GPIO_FN_FMIN_D,\n> -\n> -};\n> -\n> -#endif /* __ASM_R8A7796_GPIO_H__ */\n> diff --git a/arch/arm/mach-rmobile/pfc-r8a7795.c b/arch/arm/mach-rmobile/pfc-r8a7795.c\n> deleted file mode 100644\n> index 93aaf31ed9..0000000000\n> --- a/arch/arm/mach-rmobile/pfc-r8a7795.c\n> +++ /dev/null\n> @@ -1,5005 +0,0 @@\n> -/*\n> - * arch/arm/cpu/armv8/rcar_gen3/pfc-r8a7795.c\n> - * This file is r8a7795 processor support - PFC hardware block.\n> - *\n> - * Copyright (C) 2015-2016 Renesas Electronics Corporation\n> - *\n> - * SPDX-License-Identifier: GPL-2.0+\n> - */\n> -\n> -#include \n> -#include \n> -#include \n> -\n> -#define CPU_32_PORT(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \\\n> - PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \\\n> - PORT_1(fn, pfx##31, sfx)\n> -\n> -#define CPU_32_PORT1(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \\\n> - PORT_10(fn, pfx##2, sfx)\n> -\n> -#define CPU_32_PORT2(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \\\n> - PORT_10(fn, pfx##2, sfx)\n> -\n> -#define CPU_32_PORT_29(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), \\\n> - PORT_10(fn, pfx##1, sfx), \\\n> - PORT_1(fn, pfx##20, sfx), \\\n> - PORT_1(fn, pfx##21, sfx), \\\n> - PORT_1(fn, pfx##22, sfx), \\\n> - PORT_1(fn, pfx##23, sfx), \\\n> - PORT_1(fn, pfx##24, sfx), \\\n> - PORT_1(fn, pfx##25, sfx), \\\n> - PORT_1(fn, pfx##26, sfx), \\\n> - PORT_1(fn, pfx##27, sfx), \\\n> - PORT_1(fn, pfx##28, sfx)\n> -\n> -#define CPU_32_PORT_28(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), \\\n> - PORT_10(fn, pfx##1, sfx), \\\n> - PORT_1(fn, pfx##20, sfx), \\\n> - PORT_1(fn, pfx##21, sfx), \\\n> - PORT_1(fn, pfx##22, sfx), \\\n> - PORT_1(fn, pfx##23, sfx), \\\n> - PORT_1(fn, pfx##24, sfx), \\\n> - PORT_1(fn, pfx##25, sfx), \\\n> - PORT_1(fn, pfx##26, sfx), \\\n> - PORT_1(fn, pfx##27, sfx)\n> -\n> -#define CPU_32_PORT_26(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), \\\n> - PORT_10(fn, pfx##1, sfx), \\\n> - PORT_1(fn, pfx##20, sfx), \\\n> - PORT_1(fn, pfx##21, sfx), \\\n> - PORT_1(fn, pfx##22, sfx), \\\n> - PORT_1(fn, pfx##23, sfx), \\\n> - PORT_1(fn, pfx##24, sfx), \\\n> - PORT_1(fn, pfx##25, sfx)\n> -\n> -#define CPU_32_PORT_18(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), \\\n> - PORT_1(fn, pfx##10, sfx), \\\n> - PORT_1(fn, pfx##11, sfx), \\\n> - PORT_1(fn, pfx##12, sfx), \\\n> - PORT_1(fn, pfx##13, sfx), \\\n> - PORT_1(fn, pfx##14, sfx), \\\n> - PORT_1(fn, pfx##15, sfx), \\\n> - PORT_1(fn, pfx##16, sfx), \\\n> - PORT_1(fn, pfx##17, sfx)\n> -\n> -#define CPU_32_PORT_16(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), \\\n> - PORT_1(fn, pfx##10, sfx), \\\n> - PORT_1(fn, pfx##11, sfx), \\\n> - PORT_1(fn, pfx##12, sfx), \\\n> - PORT_1(fn, pfx##13, sfx), \\\n> - PORT_1(fn, pfx##14, sfx), \\\n> - PORT_1(fn, pfx##15, sfx)\n> -\n> -#define CPU_32_PORT_15(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), \\\n> - PORT_1(fn, pfx##10, sfx), \\\n> - PORT_1(fn, pfx##11, sfx), \\\n> - PORT_1(fn, pfx##12, sfx), \\\n> - PORT_1(fn, pfx##13, sfx), \\\n> - PORT_1(fn, pfx##14, sfx)\n> -\n> -#define CPU_32_PORT_4(fn, pfx, sfx) \\\n> - PORT_1(fn, pfx##0, sfx), \\\n> - PORT_1(fn, pfx##1, sfx), \\\n> - PORT_1(fn, pfx##2, sfx), \\\n> - PORT_1(fn, pfx##3, sfx)\n> -\n> -\n> -/* --gen3-- */\n> -/* GP_0_0_DATA -> GP_7_4_DATA */\n> -/* except for GP0[16] - [31],\n> - GP1[28] - [31],\n> - GP2[15] - [31],\n> - GP3[16] - [31],\n> - GP4[18] - [31],\n> - GP5[26] - [31],\n> - GP7[4] - [31] */\n> -\n> -#define ES_CPU_ALL_PORT(fn, pfx, sfx) \\\n> - CPU_32_PORT_16(fn, pfx##_0_, sfx), \\\n> - CPU_32_PORT_28(fn, pfx##_1_, sfx), \\\n> - CPU_32_PORT_15(fn, pfx##_2_, sfx), \\\n> - CPU_32_PORT_16(fn, pfx##_3_, sfx), \\\n> - CPU_32_PORT_18(fn, pfx##_4_, sfx), \\\n> - CPU_32_PORT_26(fn, pfx##_5_, sfx), \\\n> - CPU_32_PORT(fn, pfx##_6_, sfx), \\\n> - CPU_32_PORT_4(fn, pfx##_7_, sfx)\n> -\n> -#define CPU_ALL_PORT(fn, pfx, sfx) \\\n> - CPU_32_PORT_16(fn, pfx##_0_, sfx), \\\n> - CPU_32_PORT_29(fn, pfx##_1_, sfx), \\\n> - CPU_32_PORT_15(fn, pfx##_2_, sfx), \\\n> - CPU_32_PORT_16(fn, pfx##_3_, sfx), \\\n> - CPU_32_PORT_18(fn, pfx##_4_, sfx), \\\n> - CPU_32_PORT_26(fn, pfx##_5_, sfx), \\\n> - CPU_32_PORT(fn, pfx##_6_, sfx), \\\n> - CPU_32_PORT_4(fn, pfx##_7_, sfx)\n> -\n> -#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)\n> -#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \\\n> - GP##pfx##_IN, GP##pfx##_OUT)\n> -\n> -#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT\n> -#define _GP_INDT(pfx, sfx) GP##pfx##_DATA\n> -\n> -#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)\n> -#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)\n> -#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)\n> -\n> -\n> -#define PORT_10_REV(fn, pfx, sfx) \\\n> - PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \\\n> - PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \\\n> - PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \\\n> - PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \\\n> - PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)\n> -\n> -#define CPU_32_PORT_REV(fn, pfx, sfx) \\\n> - PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \\\n> - PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \\\n> - PORT_10_REV(fn, pfx, sfx)\n> -\n> -#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)\n> -#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)\n> -\n> -#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)\n> -#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \\\n> - FN_##ipsr, FN_##fn)\n> -\n> -enum {\n> - PINMUX_RESERVED = 0,\n> -\n> - PINMUX_DATA_BEGIN,\n> - GP_ALL(DATA),\n> - PINMUX_DATA_END,\n> -\n> - PINMUX_INPUT_BEGIN,\n> - GP_ALL(IN),\n> - PINMUX_INPUT_END,\n> -\n> - PINMUX_OUTPUT_BEGIN,\n> - GP_ALL(OUT),\n> - PINMUX_OUTPUT_END,\n> -\n> - PINMUX_FUNCTION_BEGIN,\n> - GP_ALL(FN),\n> -\n> - /* GPSR0 */\n> - GFN_D15,\n> - GFN_D14,\n> - GFN_D13,\n> - GFN_D12,\n> - GFN_D11,\n> - GFN_D10,\n> - GFN_D9,\n> - GFN_D8,\n> - GFN_D7,\n> - GFN_D6,\n> - GFN_D5,\n> - GFN_D4,\n> - GFN_D3,\n> - GFN_D2,\n> - GFN_D1,\n> - GFN_D0,\n> -\n> - /* GPSR1 */\n> - GFN_CLKOUT,\n> - GFN_EX_WAIT0_A,\n> - GFN_WE1x,\n> - GFN_WE0x,\n> - GFN_RD_WRx,\n> - GFN_RDx,\n> - GFN_BSx,\n> - GFN_CS1x_A26,\n> - GFN_CS0x,\n> - GFN_A19,\n> - GFN_A18,\n> - GFN_A17,\n> - GFN_A16,\n> - GFN_A15,\n> - GFN_A14,\n> - GFN_A13,\n> - GFN_A12,\n> - GFN_A11,\n> - GFN_A10,\n> - GFN_A9,\n> - GFN_A8,\n> - GFN_A7,\n> - GFN_A6,\n> - GFN_A5,\n> - GFN_A4,\n> - GFN_A3,\n> - GFN_A2,\n> - GFN_A1,\n> - GFN_A0,\n> -\n> - /* GPSR2 */\n> - GFN_AVB_AVTP_CAPTURE_A,\n> - GFN_AVB_AVTP_MATCH_A,\n> - GFN_AVB_LINK,\n> - GFN_AVB_PHY_INT,\n> - GFN_AVB_MAGIC,\n> - GFN_AVB_MDC,\n> - GFN_PWM2_A,\n> - GFN_PWM1_A,\n> - GFN_PWM0,\n> - GFN_IRQ5,\n> - GFN_IRQ4,\n> - GFN_IRQ3,\n> - GFN_IRQ2,\n> - GFN_IRQ1,\n> - GFN_IRQ0,\n> -\n> - /* GPSR3 */\n> - GFN_SD1_WP,\n> - GFN_SD1_CD,\n> - GFN_SD0_WP,\n> - GFN_SD0_CD,\n> - GFN_SD1_DAT3,\n> - GFN_SD1_DAT2,\n> - GFN_SD1_DAT1,\n> - GFN_SD1_DAT0,\n> - GFN_SD1_CMD,\n> - GFN_SD1_CLK,\n> - GFN_SD0_DAT3,\n> - GFN_SD0_DAT2,\n> - GFN_SD0_DAT1,\n> - GFN_SD0_DAT0,\n> - GFN_SD0_CMD,\n> - GFN_SD0_CLK,\n> -\n> - /* GPSR4 */\n> - GFN_SD3_DS,\n> - GFN_SD3_DAT7,\n> - GFN_SD3_DAT6,\n> - GFN_SD3_DAT5,\n> - GFN_SD3_DAT4,\n> - GFN_SD3_DAT3,\n> - GFN_SD3_DAT2,\n> - GFN_SD3_DAT1,\n> - GFN_SD3_DAT0,\n> - GFN_SD3_CMD,\n> - GFN_SD3_CLK,\n> - GFN_SD2_DS,\n> - GFN_SD2_DAT3,\n> - GFN_SD2_DAT2,\n> - GFN_SD2_DAT1,\n> - GFN_SD2_DAT0,\n> - GFN_SD2_CMD,\n> - GFN_SD2_CLK,\n> -\n> - /* GPSR5 */\n> - GFN_MLB_DAT,\n> - GFN_MLB_SIG,\n> - GFN_MLB_CLK,\n> - FN_MSIOF0_RXD,\n> - GFN_MSIOF0_SS2,\n> - FN_MSIOF0_TXD,\n> - GFN_MSIOF0_SS1,\n> - GFN_MSIOF0_SYNC,\n> - FN_MSIOF0_SCK,\n> - GFN_HRTS0x,\n> - GFN_HCTS0x,\n> - GFN_HTX0,\n> - GFN_HRX0,\n> - GFN_HSCK0,\n> - GFN_RX2_A,\n> - GFN_TX2_A,\n> - GFN_SCK2,\n> - GFN_RTS1x_TANS,\n> - GFN_CTS1x,\n> - GFN_TX1_A,\n> - GFN_RX1_A,\n> - GFN_RTS0x_TANS,\n> - GFN_CTS0x,\n> - GFN_TX0,\n> - GFN_RX0,\n> - GFN_SCK0,\n> -\n> - /* GPSR6 */\n> - GFN_USB3_OVC,\n> - GFN_USB3_PWEN,\n> - GFN_USB30_OVC,\n> - GFN_USB30_PWEN,\n> - GFN_USB1_OVC,\n> - GFN_USB1_PWEN,\n> - GFN_USB0_OVC,\n> - GFN_USB0_PWEN,\n> - GFN_AUDIO_CLKB_B,\n> - GFN_AUDIO_CLKA_A,\n> - GFN_SSI_SDATA9_A,\n> - GFN_SSI_SDATA8,\n> - GFN_SSI_SDATA7,\n> - GFN_SSI_WS78,\n> - GFN_SSI_SCK78,\n> - GFN_SSI_SDATA6,\n> - GFN_SSI_WS6,\n> - GFN_SSI_SCK6,\n> - FN_SSI_SDATA5,\n> - FN_SSI_WS5,\n> - FN_SSI_SCK5,\n> - GFN_SSI_SDATA4,\n> - GFN_SSI_WS4,\n> - GFN_SSI_SCK4,\n> - GFN_SSI_SDATA3,\n> - GFN_SSI_WS34,\n> - GFN_SSI_SCK34,\n> - GFN_SSI_SDATA2_A,\n> - GFN_SSI_SDATA1_A,\n> - GFN_SSI_SDATA0,\n> - GFN_SSI_WS01239,\n> - GFN_SSI_SCK01239,\n> -\n> - /* GPSR7 */\n> - FN_HDMI1_CEC,\n> - FN_HDMI0_CEC,\n> - FN_AVS2,\n> - FN_AVS1,\n> -\n> - /* IPSR0 */\n> - IFN_AVB_MDC,\n> - FN_MSIOF2_SS2_C,\n> - IFN_AVB_MAGIC,\n> - FN_MSIOF2_SS1_C,\n> - FN_SCK4_A,\n> - IFN_AVB_PHY_INT,\n> - FN_MSIOF2_SYNC_C,\n> - FN_RX4_A,\n> - IFN_AVB_LINK,\n> - FN_MSIOF2_SCK_C,\n> - FN_TX4_A,\n> - IFN_AVB_AVTP_MATCH_A,\n> - FN_MSIOF2_RXD_C,\n> - FN_CTS4x_A,\n> - FN_FSCLKST2x_A,\n> - IFN_AVB_AVTP_CAPTURE_A,\n> - FN_MSIOF2_TXD_C,\n> - FN_RTS4x_TANS_A,\n> - IFN_IRQ0,\n> - FN_QPOLB,\n> - FN_DU_CDE,\n> - FN_VI4_DATA0_B,\n> - FN_CAN0_TX_B,\n> - FN_CANFD0_TX_B,\n> - FN_MSIOF3_SS2_E,\n> - IFN_IRQ1,\n> - FN_QPOLA,\n> - FN_DU_DISP,\n> - FN_VI4_DATA1_B,\n> - FN_CAN0_RX_B,\n> - FN_CANFD0_RX_B,\n> - FN_MSIOF3_SS1_E,\n> -\n> - /* IPSR1 */\n> - IFN_IRQ2,\n> - FN_QCPV_QDE,\n> - FN_DU_EXODDF_DU_ODDF_DISP_CDE,\n> - FN_VI4_DATA2_B,\n> - FN_MSIOF3_SYNC_E,\n> - FN_PWM3_B,\n> - IFN_IRQ3,\n> - FN_QSTVB_QVE,\n> - FN_DU_DOTCLKOUT1,\n> - FN_VI4_DATA3_B,\n> - FN_MSIOF3_SCK_E,\n> - FN_PWM4_B,\n> - IFN_IRQ4,\n> - FN_QSTH_QHS,\n> - FN_DU_EXHSYNC_DU_HSYNC,\n> - FN_VI4_DATA4_B,\n> - FN_MSIOF3_RXD_E,\n> - FN_PWM5_B,\n> - IFN_IRQ5,\n> - FN_QSTB_QHE,\n> - FN_DU_EXVSYNC_DU_VSYNC,\n> - FN_VI4_DATA5_B,\n> - FN_FSCLKST2x_B,\n> - FN_MSIOF3_TXD_E,\n> - FN_PWM6_B,\n> - IFN_PWM0,\n> - FN_AVB_AVTP_PPS,\n> - FN_VI4_DATA6_B,\n> - FN_IECLK_B,\n> - IFN_PWM1_A,\n> - FN_HRX3_D,\n> - FN_VI4_DATA7_B,\n> - FN_IERX_B,\n> - IFN_PWM2_A,\n> - FN_HTX3_D,\n> - FN_IETX_B,\n> - IFN_A0,\n> - FN_LCDOUT16,\n> - FN_MSIOF3_SYNC_B,\n> - FN_VI4_DATA8,\n> - FN_DU_DB0,\n> - FN_PWM3_A,\n> -\n> - /* IPSR2 */\n> - IFN_A1,\n> - FN_LCDOUT17,\n> - FN_MSIOF3_TXD_B,\n> - FN_VI4_DATA9,\n> - FN_DU_DB1,\n> - FN_PWM4_A,\n> - IFN_A2,\n> - FN_LCDOUT18,\n> - FN_MSIOF3_SCK_B,\n> - FN_VI4_DATA10,\n> - FN_DU_DB2,\n> - FN_PWM5_A,\n> - IFN_A3,\n> - FN_LCDOUT19,\n> - FN_MSIOF3_RXD_B,\n> - FN_VI4_DATA11,\n> - FN_DU_DB3,\n> - FN_PWM6_A,\n> - IFN_A4,\n> - FN_LCDOUT20,\n> - FN_MSIOF3_SS1_B,\n> - FN_VI4_DATA12,\n> - FN_VI5_DATA12,\n> - FN_DU_DB4,\n> - IFN_A5,\n> - FN_LCDOUT21,\n> - FN_MSIOF3_SS2_B,\n> - FN_SCK4_B,\n> - FN_VI4_DATA13,\n> - FN_VI5_DATA13,\n> - FN_DU_DB5,\n> - IFN_A6,\n> - FN_LCDOUT22,\n> - FN_MSIOF2_SS1_A,\n> - FN_RX4_B,\n> - FN_VI4_DATA14,\n> - FN_VI5_DATA14,\n> - FN_DU_DB6,\n> - IFN_A7,\n> - FN_LCDOUT23,\n> - FN_MSIOF2_SS2_A,\n> - FN_TX4_B,\n> - FN_VI4_DATA15,\n> - FN_V15_DATA15,\n> - FN_DU_DB7,\n> - IFN_A8,\n> - FN_RX3_B,\n> - FN_MSIOF2_SYNC_A,\n> - FN_HRX4_B,\n> - FN_SDA6_A,\n> - FN_AVB_AVTP_MATCH_B,\n> - FN_PWM1_B,\n> -\n> - /* IPSR3 */\n> - IFN_A9,\n> - FN_MSIOF2_SCK_A,\n> - FN_CTS4x_B,\n> - FN_VI5_VSYNCx,\n> - IFN_A10,\n> - FN_MSIOF2_RXD_A,\n> - FN_RTS4n_TANS_B,\n> - FN_VI5_HSYNCx,\n> - IFN_A11,\n> - FN_TX3_B,\n> - FN_MSIOF2_TXD_A,\n> - FN_HTX4_B,\n> - FN_HSCK4,\n> - FN_VI5_FIELD,\n> - FN_SCL6_A,\n> - FN_AVB_AVTP_CAPTURE_B,\n> - FN_PWM2_B,\n> - IFN_A12,\n> - FN_LCDOUT12,\n> - FN_MSIOF3_SCK_C,\n> - FN_HRX4_A,\n> - FN_VI5_DATA8,\n> - FN_DU_DG4,\n> - IFN_A13,\n> - FN_LCDOUT13,\n> - FN_MSIOF3_SYNC_C,\n> - FN_HTX4_A,\n> - FN_VI5_DATA9,\n> - FN_DU_DG5,\n> - IFN_A14,\n> - FN_LCDOUT14,\n> - FN_MSIOF3_RXD_C,\n> - FN_HCTS4x,\n> - FN_VI5_DATA10,\n> - FN_DU_DG6,\n> - IFN_A15,\n> - FN_LCDOUT15,\n> - FN_MSIOF3_TXD_C,\n> - FN_HRTS4x,\n> - FN_VI5_DATA11,\n> - FN_DU_DG7,\n> - IFN_A16,\n> - FN_LCDOUT8,\n> - FN_VI4_FIELD,\n> - FN_DU_DG0,\n> -\n> - /* IPSR4 */\n> - IFN_A17,\n> - FN_LCDOUT9,\n> - FN_VI4_VSYNCx,\n> - FN_DU_DG1,\n> - IFN_A18,\n> - FN_LCDOUT10,\n> - FN_VI4_HSYNCx,\n> - FN_DU_DG2,\n> - IFN_A19,\n> - FN_LCDOUT11,\n> - FN_VI4_CLKENB,\n> - FN_DU_DG3,\n> - IFN_CS0x,\n> - FN_VI5_CLKENB,\n> - IFN_CS1x_A26,\n> - FN_VI5_CLK,\n> - FN_EX_WAIT0_B,\n> - IFN_BSx,\n> - FN_QSTVA_QVS,\n> - FN_MSIOF3_SCK_D,\n> - FN_SCK3,\n> - FN_HSCK3,\n> - FN_CAN1_TX,\n> - FN_CANFD1_TX,\n> - FN_IETX_A,\n> - IFN_RDx,\n> - FN_MSIOF3_SYNC_D,\n> - FN_RX3_A,\n> - FN_HRX3_A,\n> - FN_CAN0_TX_A,\n> - FN_CANFD0_TX_A,\n> - IFN_RD_WRx,\n> - FN_MSIOF3_RXD_D,\n> - FN_TX3_A,\n> - FN_HTX3_A,\n> - FN_CAN0_RX_A,\n> - FN_CANFD0_RX_A,\n> -\n> - /* IPSR5 */\n> - IFN_WE0x,\n> - FN_MSIIOF3_TXD_D,\n> - FN_CTS3x,\n> - FN_HCTS3x,\n> - FN_SCL6_B,\n> - FN_CAN_CLK,\n> - FN_IECLK_A,\n> - IFN_WE1x,\n> - FN_MSIOF3_SS1_D,\n> - FN_RTS3x_TANS,\n> - FN_HRTS3x,\n> - FN_SDA6_B,\n> - FN_CAN1_RX,\n> - FN_CANFD1_RX,\n> - FN_IERX_A,\n> - IFN_EX_WAIT0_A,\n> - FN_QCLK,\n> - FN_VI4_CLK,\n> - FN_DU_DOTCLKOUT0,\n> - IFN_D0,\n> - FN_MSIOF2_SS1_B,\n> - FN_MSIOF3_SCK_A,\n> - FN_VI4_DATA16,\n> - FN_VI5_DATA0,\n> - IFN_D1,\n> - FN_MSIOF2_SS2_B,\n> - FN_MSIOF3_SYNC_A,\n> - FN_VI4_DATA17,\n> - FN_VI5_DATA1,\n> - IFN_D2,\n> - FN_MSIOF3_RXD_A,\n> - FN_VI4_DATA18,\n> - FN_VI5_DATA2,\n> - IFN_D3,\n> - FN_MSIOF3_TXD_A,\n> - FN_VI4_DATA19,\n> - FN_VI5_DATA3,\n> - IFN_D4,\n> - FN_MSIOF2_SCK_B,\n> - FN_VI4_DATA20,\n> - FN_VI5_DATA4,\n> -\n> - /* IPSR6 */\n> - IFN_D5,\n> - FN_MSIOF2_SYNC_B,\n> - FN_VI4_DATA21,\n> - FN_VI5_DATA5,\n> - IFN_D6,\n> - FN_MSIOF2_RXD_B,\n> - FN_VI4_DATA22,\n> - FN_VI5_DATA6,\n> - IFN_D7,\n> - FN_MSIOF2_TXD_B,\n> - FN_VI4_DATA23,\n> - FN_VI5_DATA7,\n> - IFN_D8,\n> - FN_LCDOUT0,\n> - FN_MSIOF2_SCK_D,\n> - FN_SCK4_C,\n> - FN_VI4_DATA0_A,\n> - FN_DU_DR0,\n> - IFN_D9,\n> - FN_LCDOUT1,\n> - FN_MSIOF2_SYNC_D,\n> - FN_VI4_DATA1_A,\n> - FN_DU_DR1,\n> - IFN_D10,\n> - FN_LCDOUT2,\n> - FN_MSIOF2_RXD_D,\n> - FN_HRX3_B,\n> - FN_VI4_DATA2_A,\n> - FN_CTS4x_C,\n> - FN_DU_DR2,\n> - IFN_D11,\n> - FN_LCDOUT3,\n> - FN_MSIOF2_TXD_D,\n> - FN_HTX3_B,\n> - FN_VI4_DATA3_A,\n> - FN_RTS4x_TANS_C,\n> - FN_DU_DR3,\n> - IFN_D12,\n> - FN_LCDOUT4,\n> - FN_MSIOF2_SS1_D,\n> - FN_RX4_C,\n> - FN_VI4_DATA4_A,\n> - FN_DU_DR4,\n> -\n> - /* IPSR7 */\n> - IFN_D13,\n> - FN_LCDOUT5,\n> - FN_MSIOF2_SS2_D,\n> - FN_TX4_C,\n> - FN_VI4_DATA5_A,\n> - FN_DU_DR5,\n> - IFN_D14,\n> - FN_LCDOUT6,\n> - FN_MSIOF3_SS1_A,\n> - FN_HRX3_C,\n> - FN_VI4_DATA6_A,\n> - FN_DU_DR6,\n> - FN_SCL6_C,\n> - IFN_D15,\n> - FN_LCDOUT7,\n> - FN_MSIOF3_SS2_A,\n> - FN_HTX3_C,\n> - FN_VI4_DATA7_A,\n> - FN_DU_DR7,\n> - FN_SDA6_C,\n> - FN_FSCLKST,\n> - IFN_SD0_CLK,\n> - FN_MSIOF1_SCK_E,\n> - FN_STP_OPWM_0_B,\n> - IFN_SD0_CMD,\n> - FN_MSIOF1_SYNC_E,\n> - FN_STP_IVCXO27_0_B,\n> - IFN_SD0_DAT0,\n> - FN_MSIOF1_RXD_E,\n> - FN_TS_SCK0_B,\n> - FN_STP_ISCLK_0_B,\n> - IFN_SD0_DAT1,\n> - FN_MSIOF1_TXD_E,\n> - FN_TS_SPSYNC0_B,\n> - FN_STP_ISSYNC_0_B,\n> -\n> - /* IPSR8 */\n> - IFN_SD0_DAT2,\n> - FN_MSIOF1_SS1_E,\n> - FN_TS_SDAT0_B,\n> - FN_STP_ISD_0_B,\n> - IFN_SD0_DAT3,\n> - FN_MSIOF1_SS2_E,\n> - FN_TS_SDEN0_B,\n> - FN_STP_ISEN_0_B,\n> - IFN_SD1_CLK,\n> - FN_MSIOF1_SCK_G,\n> - FN_SIM0_CLK_A,\n> - IFN_SD1_CMD,\n> - FN_MSIOF1_SYNC_G,\n> - FN_NFCEx_B,\n> - FN_SIM0_D_A,\n> - FN_STP_IVCXO27_1_B,\n> - IFN_SD1_DAT0,\n> - FN_SD2_DAT4,\n> - FN_MSIOF1_RXD_G,\n> - FN_NFWPx_B,\n> - FN_TS_SCK1_B,\n> - FN_STP_ISCLK_1_B,\n> - IFN_SD1_DAT1,\n> - FN_SD2_DAT5,\n> - FN_MSIOF1_TXD_G,\n> - FN_NFDATA14_B,\n> - FN_TS_SPSYNC1_B,\n> - FN_STP_ISSYNC_1_B,\n> - IFN_SD1_DAT2,\n> - FN_SD2_DAT6,\n> - FN_MSIOF1_SS1_G,\n> - FN_NFDATA15_B,\n> - FN_TS_SDAT1_B,\n> - FN_STP_IOD_1_B,\n> - IFN_SD1_DAT3,\n> - FN_SD2_DAT7,\n> - FN_MSIOF1_SS2_G,\n> - FN_NFRBx_B,\n> - FN_TS_SDEN1_B,\n> - FN_STP_ISEN_1_B,\n> -\n> - /* IPSR9 */\n> - IFN_SD2_CLK,\n> - FN_NFDATA8,\n> - IFN_SD2_CMD,\n> - FN_NFDATA9,\n> - IFN_SD2_DAT0,\n> - FN_NFDATA10,\n> - IFN_SD2_DAT1,\n> - FN_NFDATA11,\n> - IFN_SD2_DAT2,\n> - FN_NFDATA12,\n> - IFN_SD2_DAT3,\n> - FN_NFDATA13,\n> - IFN_SD2_DS,\n> - FN_NFALE,\n> - FN_SATA_DEVSLP_B,\n> - IFN_SD3_CLK,\n> - FN_NFWEx,\n> -\n> - /* IPSR10 */\n> - IFN_SD3_CMD,\n> - FN_NFREx,\n> - IFN_SD3_DAT0,\n> - FN_NFDATA0,\n> - IFN_SD3_DAT1,\n> - FN_NFDATA1,\n> - IFN_SD3_DAT2,\n> - FN_NFDATA2,\n> - IFN_SD3_DAT3,\n> - FN_NFDATA3,\n> - IFN_SD3_DAT4,\n> - FN_SD2_CD_A,\n> - FN_NFDATA4,\n> - IFN_SD3_DAT5,\n> - FN_SD2_WP_A,\n> - FN_NFDATA5,\n> - IFN_SD3_DAT6,\n> - FN_SD3_CD,\n> - FN_NFDATA6,\n> -\n> - /* IPSR11 */\n> - IFN_SD3_DAT7,\n> - FN_SD3_WP,\n> - FN_NFDATA7,\n> - IFN_SD3_DS,\n> - FN_NFCLE,\n> - IFN_SD0_CD,\n> - FN_NFDATA14_A,\n> - FN_SCL2_B,\n> - FN_SIM0_RST_A,\n> - IFN_SD0_WP,\n> - FN_NFDATA15_A,\n> - FN_SDA2_B,\n> - IFN_SD1_CD,\n> - FN_NFRBx_A,\n> - FN_SIM0_CLK_B,\n> - IFN_SD1_WP,\n> - FN_NFCEx_A,\n> - FN_SIM0_D_B,\n> - IFN_SCK0,\n> - FN_HSCK1_B,\n> - FN_MSIOF1_SS2_B,\n> - FN_AUDIO_CLKC_B,\n> - FN_SDA2_A,\n> - FN_SIM0_RST_B,\n> - FN_STP_OPWM_0_C,\n> - FN_RIF0_CLK_B,\n> - FN_ADICHS2,\n> - FN_SCK5_B,\n> - IFN_RX0,\n> - FN_HRX1_B,\n> - FN_TS_SCK0_C,\n> - FN_STP_ISCLK_0_C,\n> - FN_RIF0_D0_B,\n> -\n> - /* IPSR12 */\n> - IFN_TX0,\n> - FN_HTX1_B,\n> - FN_TS_SPSYNC0_C,\n> - FN_STP_ISSYNC_0_C,\n> - FN_RIF0_D1_B,\n> - IFN_CTS0x,\n> - FN_HCTS1x_B,\n> - FN_MSIOF1_SYNC_B,\n> - FN_TS_SPSYNC1_C,\n> - FN_STP_ISSYNC_1_C,\n> - FN_RIF1_SYNC_B,\n> - FN_AUDIO_CLKOUT_C,\n> - FN_ADICS_SAMP,\n> - IFN_RTS0x_TANS,\n> - FN_HRTS1x_B,\n> - FN_MSIOF1_SS1_B,\n> - FN_AUDIO_CLKA_B,\n> - FN_SCL2_A,\n> - FN_STP_IVCXO27_1_C,\n> - FN_RIF0_SYNC_B,\n> - FN_ADICHS1,\n> - IFN_RX1_A,\n> - FN_HRX1_A,\n> - FN_TS_SDAT0_C,\n> - FN_STP_ISD_0_C,\n> - FN_RIF1_CLK_C,\n> - IFN_TX1_A,\n> - FN_HTX1_A,\n> - FN_TS_SDEN0_C,\n> - FN_STP_ISEN_0_C,\n> - FN_RIF1_D0_C,\n> - IFN_CTS1x,\n> - FN_HCTS1x_A,\n> - FN_MSIOF1_RXD_B,\n> - FN_TS_SDEN1_C,\n> - FN_STP_ISEN_1_C,\n> - FN_RIF1_D0_B,\n> - FN_ADIDATA,\n> - IFN_RTS1x_TANS,\n> - FN_HRTS1x_A,\n> - FN_MSIOF1_TXD_B,\n> - FN_TS_SDAT1_C,\n> - FN_STP_ISD_1_C,\n> - FN_RIF1_D1_B,\n> - FN_ADICHS0,\n> - IFN_SCK2,\n> - FN_SCIF_CLK_B,\n> - FN_MSIOF1_SCK_B,\n> - FN_TS_SCK1_C,\n> - FN_STP_ISCLK_1_C,\n> - FN_RIF1_CLK_B,\n> - FN_ADICLK,\n> -\n> - /* IPSR13 */\n> - IFN_TX2_A,\n> - FN_SD2_CD_B,\n> - FN_SCL1_A,\n> - FN_FMCLK_A,\n> - FN_RIF1_D1_C,\n> - FN_FSO_CFE_0x,\n> - IFN_RX2_A,\n> - FN_SD2_WP_B,\n> - FN_SDA1_A,\n> - FN_FMIN_A,\n> - FN_RIF1_SYNC_C,\n> - FN_FSO_CFE_1x,\n> - IFN_HSCK0,\n> - FN_MSIOF1_SCK_D,\n> - FN_AUDIO_CLKB_A,\n> - FN_SSI_SDATA1_B,\n> - FN_TS_SCK0_D,\n> - FN_STP_ISCLK_0_D,\n> - FN_RIF0_CLK_C,\n> - FN_RX5_B,\n> - IFN_HRX0,\n> - FN_MSIOF1_RXD_D,\n> - FN_SSI_SDATA2_B,\n> - FN_TS_SDEN0_D,\n> - FN_STP_ISEN_0_D,\n> - FN_RIF0_D0_C,\n> - IFN_HTX0,\n> - FN_MSIOF1_TXD_D,\n> - FN_SSI_SDATA9_B,\n> - FN_TS_SDAT0_D,\n> - FN_STP_ISD_0_D,\n> - FN_RIF0_D1_C,\n> - IFN_HCTS0x,\n> - FN_RX2_B,\n> - FN_MSIOF1_SYNC_D,\n> - FN_SSI_SCK9_A,\n> - FN_TS_SPSYNC0_D,\n> - FN_STP_ISSYNC_0_D,\n> - FN_RIF0_SYNC_C,\n> - FN_AUDIO_CLKOUT1_A,\n> - IFN_HRTS0x,\n> - FN_TX2_B,\n> - FN_MSIOF1_SS1_D,\n> - FN_SSI_WS9_A,\n> - FN_STP_IVCXO27_0_D,\n> - FN_BPFCLK_A,\n> - FN_AUDIO_CLKOUT2_A,\n> - IFN_MSIOF0_SYNC,\n> - FN_AUDIO_CLKOUT_A,\n> - FN_TX5_B,\n> - FN_BPFCLK_D,\n> -\n> - /* IPSR14 */\n> - IFN_MSIOF0_SS1,\n> - FN_RX5_A,\n> - FN_NFWPx_A,\n> - FN_AUDIO_CLKA_C,\n> - FN_SSI_SCK2_A,\n> - FN_STP_IVCXO27_0_C,\n> - FN_AUDIO_CLKOUT3_A,\n> - FN_TCLK1_B,\n> - IFN_MSIOF0_SS2,\n> - FN_TX5_A,\n> - FN_MSIOF1_SS2_D,\n> - FN_AUDIO_CLKC_A,\n> - FN_SSI_WS2_A,\n> - FN_STP_OPWM_0_D,\n> - FN_AUDIO_CLKOUT_D,\n> - FN_SPEEDIN_B,\n> - IFN_MLB_CLK,\n> - FN_MSIOF1_SCK_F,\n> - FN_SCL1_B,\n> - IFN_MLB_SIG,\n> - FN_RX1_B,\n> - FN_MSIOF1_SYNC_F,\n> - FN_SDA1_B,\n> - IFN_MLB_DAT,\n> - FN_TX1_B,\n> - FN_MSIOF1_RXD_F,\n> - IFN_SSI_SCK01239,\n> - FN_MSIOF1_TXD_F,\n> - FN_MOUT0,\n> - IFN_SSI_WS01239,\n> - FN_MSIOF1_SS1_F,\n> - FN_MOUT1,\n> - IFN_SSI_SDATA0,\n> - FN_MSIOF1_SS2_F,\n> - FN_MOUT2,\n> -\n> - /* IPSR15 */\n> - IFN_SSI_SDATA1_A,\n> - FN_MOUT5,\n> - IFN_SSI_SDATA2_A,\n> - FN_SSI_SCK1_B,\n> - FN_MOUT6,\n> - IFN_SSI_SCK34,\n> - FN_MSIOF1_SS1_A,\n> - FN_STP_OPWM_0_A,\n> - IFN_SSI_WS34,\n> - FN_HCTS2x_A,\n> - FN_MSIOF1_SS2_A,\n> - FN_STP_IVCXO27_0_A,\n> - IFN_SSI_SDATA3,\n> - FN_HRTS2x_A,\n> - FN_MSIOF1_TXD_A,\n> - FN_TS_SCK0_A,\n> - FN_STP_ISCLK_0_A,\n> - FN_RIF0_D1_A,\n> - FN_RIF2_D0_A,\n> - IFN_SSI_SCK4,\n> - FN_HRX2_A,\n> - FN_MSIOF1_SCK_A,\n> - FN_TS_SDAT0_A,\n> - FN_STP_ISD_0_A,\n> - FN_RIF0_CLK_A,\n> - FN_RIF2_CLK_A,\n> - IFN_SSI_WS4,\n> - FN_HTX2_A,\n> - FN_MSIOF1_SYNC_A,\n> - FN_TS_SDEN0_A,\n> - FN_STP_ISEN_0_A,\n> - FN_RIF0_SYNC_A,\n> - FN_RIF2_SYNC_A,\n> - IFN_SSI_SDATA4,\n> - FN_HSCK2_A,\n> - FN_MSIOF1_RXD_A,\n> - FN_TS_SPSYNC0_A,\n> - FN_STP_ISSYNC_0_A,\n> - FN_RIF0_D0_A,\n> - FN_RIF2_D1_A,\n> -\n> - /* IPSR16 */\n> - IFN_SSI_SCK6,\n> - FN_SIM0_RST_D,\n> - IFN_SSI_WS6,\n> - FN_SIM0_D_D,\n> - IFN_SSI_SDATA6,\n> - FN_SIM0_CLK_D,\n> - FN_SATA_DEVSLP_A,\n> - IFN_SSI_SCK78,\n> - FN_HRX2_B,\n> - FN_MSIOF1_SCK_C,\n> - FN_TS_SCK1_A,\n> - FN_STP_ISCLK_1_A,\n> - FN_RIF1_CLK_A,\n> - FN_RIF3_CLK_A,\n> - IFN_SSI_WS78,\n> - FN_HTX2_B,\n> - FN_MSIOF1_SYNC_C,\n> - FN_TS_SDAT1_A,\n> - FN_STP_ISD_1_A,\n> - FN_RIF1_SYNC_A,\n> - FN_RIF3_SYNC_A,\n> - IFN_SSI_SDATA7,\n> - FN_HCTS2x_B,\n> - FN_MSIOF1_RXD_C,\n> - FN_TS_SDEN1_A,\n> - FN_STP_ISEN_1_A,\n> - FN_RIF1_D0_A,\n> - FN_RIF3_D0_A,\n> - FN_TCLK2_A,\n> - IFN_SSI_SDATA8,\n> - FN_HRTS2x_B,\n> - FN_MSIOF1_TXD_C,\n> - FN_TS_SPSYNC1_A,\n> - FN_STP_ISSYNC_1_A,\n> - FN_RIF1_D1_A,\n> - FN_RIF3_D1_A,\n> - IFN_SSI_SDATA9_A,\n> - FN_HSCK2_B,\n> - FN_MSIOF1_SS1_C,\n> - FN_HSCK1_A,\n> - FN_SSI_WS1_B,\n> - FN_SCK1,\n> - FN_STP_IVCXO27_1_A,\n> - FN_SCK5_A,\n> -\n> - /* IPSR17 */\n> - IFN_AUDIO_CLKA_A,\n> - FN_CC5_OSCOUT,\n> - IFN_AUDIO_CLKB_B,\n> - FN_SCIF_CLK_A,\n> - FN_STP_IVCXO27_1_D,\n> - FN_REMOCON_A,\n> - FN_TCLK1_A,\n> - IFN_USB0_PWEN,\n> - FN_SIM0_RST_C,\n> - FN_TS_SCK1_D,\n> - FN_STP_ISCLK_1_D,\n> - FN_BPFCLK_B,\n> - FN_RIF3_CLK_B,\n> - FN_HSCK2_C,\n> - IFN_USB0_OVC,\n> - FN_SIM0_D_C,\n> - FN_TS_SDAT1_D,\n> - FN_STP_ISD_1_D,\n> - FN_RIF3_SYNC_B,\n> - FN_HRX2_C,\n> - IFN_USB1_PWEN,\n> - FN_SIM0_CLK_C,\n> - FN_SSI_SCK1_A,\n> - FN_TS_SCK0_E,\n> - FN_STP_ISCLK_0_E,\n> - FN_FMCLK_B,\n> - FN_RIF2_CLK_B,\n> - FN_SPEEDIN_A,\n> - FN_HTX2_C,\n> - IFN_USB1_OVC,\n> - FN_MSIOF1_SS2_C,\n> - FN_SSI_WS1_A,\n> - FN_TS_SDAT0_E,\n> - FN_STP_ISD_0_E,\n> - FN_FMIN_B,\n> - FN_RIF2_SYNC_B,\n> - FN_REMOCON_B,\n> - FN_HCTS2x_C,\n> - IFN_USB30_PWEN,\n> - FN_AUDIO_CLKOUT_B,\n> - FN_SSI_SCK2_B,\n> - FN_TS_SDEN1_D,\n> - FN_STP_ISEN_1_D,\n> - FN_STP_OPWM_0_E,\n> - FN_RIF3_D0_B,\n> - FN_TCLK2_B,\n> - FN_TPU0TO0,\n> - FN_BPFCLK_C,\n> - FN_HRTS2x_C,\n> - IFN_USB30_OVC,\n> - FN_AUDIO_CLKOUT1_B,\n> - FN_SSI_WS2_B,\n> - FN_TS_SPSYNC1_D,\n> - FN_STP_ISSYNC_1_D,\n> - FN_STP_IVCXO27_0_E,\n> - FN_RIF3_D1_B,\n> - FN_FSO_TOEx,\n> - FN_TPU0TO1,\n> -\n> - /* IPSR18 */\n> - IFN_USB3_PWEN,\n> - FN_AUDIO_CLKOUT2_B,\n> - FN_SSI_SCK9_B,\n> - FN_TS_SDEN0_E,\n> - FN_STP_ISEN_0_E,\n> - FN_RIF2_D0_B,\n> - FN_TPU0TO2,\n> - FN_FMCLK_C,\n> - FN_FMCLK_D,\n> - IFN_USB3_OVC,\n> - FN_AUDIO_CLKOUT3_B,\n> - FN_SSI_WS9_B,\n> - FN_TS_SPSYNC0_E,\n> - FN_STP_ISSYNC_0_E,\n> - FN_RIF2_D1_B,\n> - FN_TPU0TO3,\n> - FN_FMIN_C,\n> - FN_FMIN_D,\n> -\n> - /* MOD_SEL0 */\n> - /* sel_msiof3[3](0,1,2,3,4) */\n> - FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,\n> - FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,\n> - FN_SEL_MSIOF3_4,\n> - /* sel_msiof2[2](0,1,2,3) */\n> - FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,\n> - FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,\n> - /* sel_msiof1[3](0,1,2,3,4,5,6) */\n> - FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,\n> - FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,\n> - FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,\n> - FN_SEL_MSIOF1_6,\n> - /* sel_lbsc[1](0,1) */\n> - FN_SEL_LBSC_0, FN_SEL_LBSC_1,\n> - /* sel_iebus[1](0,1) */\n> - FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,\n> - /* sel_i2c2[1](0,1) */\n> - FN_SEL_I2C2_0, FN_SEL_I2C2_1,\n> - /* sel_i2c1[1](0,1) */\n> - FN_SEL_I2C1_0, FN_SEL_I2C1_1,\n> - /* sel_hscif4[1](0,1) */\n> - FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,\n> - /* sel_hscif3[2](0,1,2,3) */\n> - FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,\n> - FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,\n> - /* sel_hscif1[1](0,1) */\n> - FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,\n> - /* reserved[1] */\n> - /* sel_hscif2[2](0,1,2) */\n> - FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,\n> - FN_SEL_HSCIF2_2,\n> - /* sel_etheravb[1](0,1) */\n> - FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,\n> - /* sel_drif3[1](0,1) */\n> - FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,\n> - /* sel_drif2[1](0,1) */\n> - FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,\n> - /* sel_drif1[2](0,1,2) */\n> - FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,\n> - FN_SEL_DRIF1_2,\n> - /* sel_drif0[2](0,1,2) */\n> - FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,\n> - FN_SEL_DRIF0_2,\n> - /* sel_canfd0[1](0,1) */\n> - FN_SEL_CANFD_0, FN_SEL_CANFD_1,\n> - /* sel_adg_a[2](0,1,2) */\n> - FN_SEL_ADG_A_0, FN_SEL_ADG_A_1,\n> - FN_SEL_ADG_A_2,\n> - /* reserved[3]*/\n> -\n> - /* MOD_SEL1 */\n> - /* sel_tsif1[2](0,1,2,3) */\n> - FN_SEL_TSIF1_0, FN_SEL_TSIF1_1,\n> - FN_SEL_TSIF1_2, FN_SEL_TSIF1_3,\n> - /* sel_tsif0[3](0,1,2,3,4) */\n> - FN_SEL_TSIF0_0, FN_SEL_TSIF0_1,\n> - FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,\n> - FN_SEL_TSIF0_4,\n> - /* sel_timer_tmu1[1](0,1) */\n> - FN_SEL_TIMER_TMU1_0, FN_SEL_TIMER_TMU1_1,\n> - /* sel_ssp1_1[2](0,1,2,3) */\n> - FN_SEL_SSP1_1_0, FN_SEL_SSP1_1_1,\n> - FN_SEL_SSP1_1_2, FN_SEL_SSP1_1_3,\n> - /* sel_ssp1_0[3](0,1,2,3,4) */\n> - FN_SEL_SSP1_0_0, FN_SEL_SSP1_0_1,\n> - FN_SEL_SSP1_0_2, FN_SEL_SSP1_0_3,\n> - FN_SEL_SSP1_0_4,\n> - /* sel_ssi1[1](0,1) */\n> - FN_SEL_SSI_0, FN_SEL_SSI_1,\n> - /* sel_speed_pulse_if[1](0,1) */\n> - FN_SEL_SPEED_PULSE_IF_0, FN_SEL_SPEED_PULSE_IF_1,\n> - /* sel_simcard[2](0,1,2,3) */\n> - FN_SEL_SIMCARD_0, FN_SEL_SIMCARD_1,\n> - FN_SEL_SIMCARD_2, FN_SEL_SIMCARD_3,\n> - /* sel_sdhi2[1](0,1) */\n> - FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,\n> - /* sel_scif4[2](0,1,2) */\n> - FN_SEL_SCIF4_0, FN_SEL_SCIF4_1,\n> - FN_SEL_SCIF4_2,\n> - /* sel_scif3[1](0,1) */\n> - FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,\n> - /* sel_scif2[1](0,1) */\n> - FN_SEL_SCIF2_0, FN_SEL_SCIF2_1,\n> - /* sel_scif1[1](0,1) */\n> - FN_SEL_SCIF1_0, FN_SEL_SCIF1_1,\n> - /* sel_scif[1](0,1) */\n> - FN_SEL_SCIF_0, FN_SEL_SCIF_1,\n> - /* sel_remocon[1](0,1) */\n> - FN_SEL_REMOCON_0, FN_SEL_REMOCON_1,\n> - /* reserved[8..7] */\n> - /* sel_rcan0[1](0,1) */\n> - FN_SEL_RCAN_0, FN_SEL_RCAN_1,\n> - /* sel_pwm6[1](0,1) */\n> - FN_SEL_PWM6_0, FN_SEL_PWM6_1,\n> - /* sel_pwm5[1](0,1) */\n> - FN_SEL_PWM5_0, FN_SEL_PWM5_1,\n> - /* sel_pwm4[1](0,1) */\n> - FN_SEL_PWM4_0, FN_SEL_PWM4_1,\n> - /* sel_pwm3[1](0,1) */\n> - FN_SEL_PWM3_0, FN_SEL_PWM3_1,\n> - /* sel_pwm2[1](0,1) */\n> - FN_SEL_PWM2_0, FN_SEL_PWM2_1,\n> - /* sel_pwm1[1](0,1) */\n> - FN_SEL_PWM1_0, FN_SEL_PWM1_1,\n> -\n> - /* MOD_SEL2 */\n> - /* i2c_sel_5[1](0,1) */\n> - FN_I2C_SEL_5_0, FN_I2C_SEL_5_1,\n> - /* i2c_sel_3[1](0,1) */\n> - FN_I2C_SEL_3_0, FN_I2C_SEL_3_1,\n> - /* i2c_sel_0[1](0,1) */\n> - FN_I2C_SEL_0_0, FN_I2C_SEL_0_1,\n> - /* sel_fm[2](0,1,2,3) */\n> - FN_SEL_FM_0, FN_SEL_FM_1,\n> - FN_SEL_FM_2, FN_SEL_FM_3,\n> - /* sel_scif5[1](0,1) */\n> - FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,\n> - /* sel_i2c6[3](0,1,2) */\n> - FN_SEL_I2C6_0, FN_SEL_I2C6_1,\n> - FN_SEL_I2C6_2,\n> - /* sel_ndfc[1](0,1) */\n> - FN_SEL_NDFC_0, FN_SEL_NDFC_1,\n> - /* sel_ssi2[1](0,1) */\n> - FN_SEL_SSI2_0, FN_SEL_SSI2_1,\n> - /* sel_ssi9[1](0,1) */\n> - FN_SEL_SSI9_0, FN_SEL_SSI9_1,\n> - /* sel_timer_tmu2[1](0,1) */\n> - FN_SEL_TIMER_TMU2_0, FN_SEL_TIMER_TMU2_1,\n> - /* sel_adg_b[1](0,1) */\n> - FN_SEL_ADG_B_0, FN_SEL_ADG_B_1,\n> - /* sel_adg_c[1](0,1) */\n> - FN_SEL_ADG_C_0, FN_SEL_ADG_C_1,\n> - /* reserved[16..16] */\n> - /* reserved[15..8] */\n> - /* reserved[7..1] */\n> - /* sel_vin4[1](0,1) */\n> - FN_SEL_VIN4_0, FN_SEL_VIN4_1,\n> -\n> - PINMUX_FUNCTION_END,\n> -\n> - PINMUX_MARK_BEGIN,\n> -\n> - /* GPSR0 */\n> - D15_GMARK,\n> - D14_GMARK,\n> - D13_GMARK,\n> - D12_GMARK,\n> - D11_GMARK,\n> - D10_GMARK,\n> - D9_GMARK,\n> - D8_GMARK,\n> - D7_GMARK,\n> - D6_GMARK,\n> - D5_GMARK,\n> - D4_GMARK,\n> - D3_GMARK,\n> - D2_GMARK,\n> - D1_GMARK,\n> - D0_GMARK,\n> -\n> - /* GPSR1 */\n> - CLKOUT_GMARK,\n> - EX_WAIT0_A_GMARK,\n> - WE1x_GMARK,\n> - WE0x_GMARK,\n> - RD_WRx_GMARK,\n> - RDx_GMARK,\n> - BSx_GMARK,\n> - CS1x_A26_GMARK,\n> - CS0x_GMARK,\n> - A19_GMARK,\n> - A18_GMARK,\n> - A17_GMARK,\n> - A16_GMARK,\n> - A15_GMARK,\n> - A14_GMARK,\n> - A13_GMARK,\n> - A12_GMARK,\n> - A11_GMARK,\n> - A10_GMARK,\n> - A9_GMARK,\n> - A8_GMARK,\n> - A7_GMARK,\n> - A6_GMARK,\n> - A5_GMARK,\n> - A4_GMARK,\n> - A3_GMARK,\n> - A2_GMARK,\n> - A1_GMARK,\n> - A0_GMARK,\n> -\n> - /* GPSR2 */\n> - AVB_AVTP_CAPTURE_A_GMARK,\n> - AVB_AVTP_MATCH_A_GMARK,\n> - AVB_LINK_GMARK,\n> - AVB_PHY_INT_GMARK,\n> - AVB_MAGIC_GMARK,\n> - AVB_MDC_GMARK,\n> - PWM2_A_GMARK,\n> - PWM1_A_GMARK,\n> - PWM0_GMARK,\n> - IRQ5_GMARK,\n> - IRQ4_GMARK,\n> - IRQ3_GMARK,\n> - IRQ2_GMARK,\n> - IRQ1_GMARK,\n> - IRQ0_GMARK,\n> -\n> - /* GPSR3 */\n> - SD1_WP_GMARK,\n> - SD1_CD_GMARK,\n> - SD0_WP_GMARK,\n> - SD0_CD_GMARK,\n> - SD1_DAT3_GMARK,\n> - SD1_DAT2_GMARK,\n> - SD1_DAT1_GMARK,\n> - SD1_DAT0_GMARK,\n> - SD1_CMD_GMARK,\n> - SD1_CLK_GMARK,\n> - SD0_DAT3_GMARK,\n> - SD0_DAT2_GMARK,\n> - SD0_DAT1_GMARK,\n> - SD0_DAT0_GMARK,\n> - SD0_CMD_GMARK,\n> - SD0_CLK_GMARK,\n> -\n> - /* GPSR4 */\n> - SD3_DS_GMARK,\n> - SD3_DAT7_GMARK,\n> - SD3_DAT6_GMARK,\n> - SD3_DAT5_GMARK,\n> - SD3_DAT4_GMARK,\n> - SD3_DAT3_GMARK,\n> - SD3_DAT2_GMARK,\n> - SD3_DAT1_GMARK,\n> - SD3_DAT0_GMARK,\n> - SD3_CMD_GMARK,\n> - SD3_CLK_GMARK,\n> - SD2_DS_GMARK,\n> - SD2_DAT3_GMARK,\n> - SD2_DAT2_GMARK,\n> - SD2_DAT1_GMARK,\n> - SD2_DAT0_GMARK,\n> - SD2_CMD_GMARK,\n> - SD2_CLK_GMARK,\n> -\n> - /* GPSR5 */\n> - MLB_DAT_GMARK,\n> - MLB_SIG_GMARK,\n> - MLB_CLK_GMARK,\n> - MSIOF0_RXD_MARK,\n> - MSIOF0_SS2_GMARK,\n> - MSIOF0_TXD_MARK,\n> - MSIOF0_SS1_GMARK,\n> - MSIOF0_SYNC_GMARK,\n> - MSIOF0_SCK_MARK,\n> - HRTS0x_GMARK,\n> - HCTS0x_GMARK,\n> - HTX0_GMARK,\n> - HRX0_GMARK,\n> - HSCK0_GMARK,\n> - RX2_A_GMARK,\n> - TX2_A_GMARK,\n> - SCK2_GMARK,\n> - RTS1x_TANS_GMARK,\n> - CTS1x_GMARK,\n> - TX1_A_GMARK,\n> - RX1_A_GMARK,\n> - RTS0x_TANS_GMARK,\n> - CTS0x_GMARK,\n> - TX0_GMARK,\n> - RX0_GMARK,\n> - SCK0_GMARK,\n> -\n> - /* GPSR6 */\n> - USB3_OVC_GMARK,\n> - USB3_PWEN_GMARK,\n> - USB30_OVC_GMARK,\n> - USB30_PWEN_GMARK,\n> - USB1_OVC_GMARK,\n> - USB1_PWEN_GMARK,\n> - USB0_OVC_GMARK,\n> - USB0_PWEN_GMARK,\n> - AUDIO_CLKB_B_GMARK,\n> - AUDIO_CLKA_A_GMARK,\n> - SSI_SDATA9_A_GMARK,\n> - SSI_SDATA8_GMARK,\n> - SSI_SDATA7_GMARK,\n> - SSI_WS78_GMARK,\n> - SSI_SCK78_GMARK,\n> - SSI_SDATA6_GMARK,\n> - SSI_WS6_GMARK,\n> - SSI_SCK6_GMARK,\n> - SSI_SDATA5_MARK,\n> - SSI_WS5_MARK,\n> - SSI_SCK5_MARK,\n> - SSI_SDATA4_GMARK,\n> - SSI_WS4_GMARK,\n> - SSI_SCK4_GMARK,\n> - SSI_SDATA3_GMARK,\n> - SSI_WS34_GMARK,\n> - SSI_SCK34_GMARK,\n> - SSI_SDATA2_A_GMARK,\n> - SSI_SDATA1_A_GMARK,\n> - SSI_SDATA0_GMARK,\n> - SSI_WS01239_GMARK,\n> - SSI_SCK01239_GMARK,\n> -\n> - /* GPSR7 */\n> - HDMI1_CEC_MARK,\n> - HDMI0_CEC_MARK,\n> - AVS2_MARK,\n> - AVS1_MARK,\n> -\n> - /* IPSR0 */\n> - AVB_MDC_IMARK,\n> - MSIOF2_SS2_C_MARK,\n> - AVB_MAGIC_IMARK,\n> - MSIOF2_SS1_C_MARK,\n> - SCK4_A_MARK,\n> - AVB_PHY_INT_IMARK,\n> - MSIOF2_SYNC_C_MARK,\n> - RX4_A_MARK,\n> - AVB_LINK_IMARK,\n> - MSIOF2_SCK_C_MARK,\n> - TX4_A_MARK,\n> - AVB_AVTP_MATCH_A_IMARK,\n> - MSIOF2_RXD_C_MARK,\n> - CTS4x_A_MARK,\n> - FSCLKST2x_A_MARK,\n> - AVB_AVTP_CAPTURE_A_IMARK,\n> - MSIOF2_TXD_C_MARK,\n> - RTS4x_TANS_A_MARK,\n> - IRQ0_IMARK,\n> - QPOLB_MARK,\n> - DU_CDE_MARK,\n> - VI4_DATA0_B_MARK,\n> - CAN0_TX_B_MARK,\n> - CANFD0_TX_B_MARK,\n> - MSIOF3_SS2_E_MARK,\n> - IRQ1_IMARK,\n> - QPOLA_MARK,\n> - DU_DISP_MARK,\n> - VI4_DATA1_B_MARK,\n> - CAN0_RX_B_MARK,\n> - CANFD0_RX_B_MARK,\n> - MSIOF3_SS1_E_MARK,\n> -\n> - /* IPSR1 */\n> - IRQ2_IMARK,\n> - QCPV_QDE_MARK,\n> - DU_EXODDF_DU_ODDF_DISP_CDE_MARK,\n> - VI4_DATA2_B_MARK,\n> - MSIOF3_SYNC_E_MARK,\n> - PWM3_B_MARK,\n> - IRQ3_IMARK,\n> - QSTVB_QVE_MARK,\n> - DU_DOTCLKOUT1_MARK,\n> - VI4_DATA3_B_MARK,\n> - MSIOF3_SCK_E_MARK,\n> - PWM4_B_MARK,\n> - IRQ4_IMARK,\n> - QSTH_QHS_MARK,\n> - DU_EXHSYNC_DU_HSYNC_MARK,\n> - VI4_DATA4_B_MARK,\n> - MSIOF3_RXD_E_MARK,\n> - PWM5_B_MARK,\n> - IRQ5_IMARK,\n> - QSTB_QHE_MARK,\n> - DU_EXVSYNC_DU_VSYNC_MARK,\n> - VI4_DATA5_B_MARK,\n> - FSCLKST2x_B_MARK,\n> - MSIOF3_TXD_E_MARK,\n> - PWM6_B_MARK,\n> - PWM0_IMARK,\n> - AVB_AVTP_PPS_MARK,\n> - VI4_DATA6_B_MARK,\n> - IECLK_B_MARK,\n> - PWM1_A_IMARK,\n> - HRX3_D_MARK,\n> - VI4_DATA7_B_MARK,\n> - IERX_B_MARK,\n> - PWM2_A_IMARK,\n> - PWMFSW0_MARK,\n> - HTX3_D_MARK,\n> - IETX_B_MARK,\n> - A0_IMARK,\n> - LCDOUT16_MARK,\n> - MSIOF3_SYNC_B_MARK,\n> - VI4_DATA8_MARK,\n> - DU_DB0_MARK,\n> - PWM3_A_MARK,\n> -\n> - /* IPSR2 */\n> - A1_IMARK,\n> - LCDOUT17_MARK,\n> - MSIOF3_TXD_B_MARK,\n> - VI4_DATA9_MARK,\n> - DU_DB1_MARK,\n> - PWM4_A_MARK,\n> - A2_IMARK,\n> - LCDOUT18_MARK,\n> - MSIOF3_SCK_B_MARK,\n> - VI4_DATA10_MARK,\n> - DU_DB2_MARK,\n> - PWM5_A_MARK,\n> - A3_IMARK,\n> - LCDOUT19_MARK,\n> - MSIOF3_RXD_B_MARK,\n> - VI4_DATA11_MARK,\n> - DU_DB3_MARK,\n> - PWM6_A_MARK,\n> - A4_IMARK,\n> - LCDOUT20_MARK,\n> - MSIOF3_SS1_B_MARK,\n> - VI4_DATA12_MARK,\n> - VI5_DATA12_MARK,\n> - DU_DB4_MARK,\n> - A5_IMARK,\n> - LCDOUT21_MARK,\n> - MSIOF3_SS2_B_MARK,\n> - SCK4_B_MARK,\n> - VI4_DATA13_MARK,\n> - VI5_DATA13_MARK,\n> - DU_DB5_MARK,\n> - A6_IMARK,\n> - LCDOUT22_MARK,\n> - MSIOF2_SS1_A_MARK,\n> - RX4_B_MARK,\n> - VI4_DATA14_MARK,\n> - VI5_DATA14_MARK,\n> - DU_DB6_MARK,\n> - A7_IMARK,\n> - LCDOUT23_MARK,\n> - MSIOF2_SS2_A_MARK,\n> - TX4_B_MARK,\n> - VI4_DATA15_MARK,\n> - V15_DATA15_MARK,\n> - DU_DB7_MARK,\n> - A8_IMARK,\n> - RX3_B_MARK,\n> - MSIOF2_SYNC_A_MARK,\n> - HRX4_B_MARK,\n> - SDA6_A_MARK,\n> - AVB_AVTP_MATCH_B_MARK,\n> - PWM1_B_MARK,\n> -\n> - /* IPSR3 */\n> - A9_IMARK,\n> - MSIOF2_SCK_A_MARK,\n> - CTS4x_B_MARK,\n> - VI5_VSYNCx_MARK,\n> - A10_IMARK,\n> - MSIOF2_RXD_A_MARK,\n> - RTS4n_TANS_B_MARK,\n> - VI5_HSYNCx_MARK,\n> - A11_IMARK,\n> - TX3_B_MARK,\n> - MSIOF2_TXD_A_MARK,\n> - HTX4_B_MARK,\n> - HSCK4_MARK,\n> - VI5_FIELD_MARK,\n> - SCL6_A_MARK,\n> - AVB_AVTP_CAPTURE_B_MARK,\n> - PWM2_B_MARK,\n> - A12_IMARK,\n> - LCDOUT12_MARK,\n> - MSIOF3_SCK_C_MARK,\n> - HRX4_A_MARK,\n> - VI5_DATA8_MARK,\n> - DU_DG4_MARK,\n> - A13_IMARK,\n> - LCDOUT13_MARK,\n> - MSIOF3_SYNC_C_MARK,\n> - HTX4_A_MARK,\n> - VI5_DATA9_MARK,\n> - DU_DG5_MARK,\n> - A14_IMARK,\n> - LCDOUT14_MARK,\n> - MSIOF3_RXD_C_MARK,\n> - HCTS4x_MARK,\n> - VI5_DATA10_MARK,\n> - DU_DG6_MARK,\n> - A15_IMARK,\n> - LCDOUT15_MARK,\n> - MSIOF3_TXD_C_MARK,\n> - HRTS4x_MARK,\n> - VI5_DATA11_MARK,\n> - DU_DG7_MARK,\n> - A16_IMARK,\n> - LCDOUT8_MARK,\n> - VI4_FIELD_MARK,\n> - DU_DG0_MARK,\n> -\n> - /* IPSR4 */\n> - A17_IMARK,\n> - LCDOUT9_MARK,\n> - VI4_VSYNCx_MARK,\n> - DU_DG1_MARK,\n> - A18_IMARK,\n> - LCDOUT10_MARK,\n> - VI4_HSYNCx_MARK,\n> - DU_DG2_MARK,\n> - A19_IMARK,\n> - LCDOUT11_MARK,\n> - VI4_CLKENB_MARK,\n> - DU_DG3_MARK,\n> - CS0x_IMARK,\n> - VI5_CLKENB_MARK,\n> - CS1x_A26_IMARK,\n> - VI5_CLK_MARK,\n> - EX_WAIT0_B_MARK,\n> - BSx_IMARK,\n> - QSTVA_QVS_MARK,\n> - MSIOF3_SCK_D_MARK,\n> - SCK3_MARK,\n> - HSCK3_MARK,\n> - CAN1_TX_MARK,\n> - CANFD1_TX_MARK,\n> - IETX_A_MARK,\n> - RDx_IMARK,\n> - MSIOF3_SYNC_D_MARK,\n> - RX3_A_MARK,\n> - HRX3_A_MARK,\n> - CAN0_TX_A_MARK,\n> - CANFD0_TX_A_MARK,\n> - RD_WRx_IMARK,\n> - MSIOF3_RXD_D_MARK,\n> - TX3_A_MARK,\n> - HTX3_A_MARK,\n> - CAN0_RX_A_MARK,\n> - CANFD0_RX_A_MARK,\n> -\n> - /* IPSR5 */\n> - WE0x_IMARK,\n> - MSIIOF3_TXD_D_MARK,\n> - CTS3x_MARK,\n> - HCTS3x_MARK,\n> - SCL6_B_MARK,\n> - CAN_CLK_MARK,\n> - IECLK_A_MARK,\n> - WE1x_IMARK,\n> - MSIOF3_SS1_D_MARK,\n> - RTS3x_TANS_MARK,\n> - HRTS3x_MARK,\n> - SDA6_B_MARK,\n> - CAN1_RX_MARK,\n> - CANFD1_RX_MARK,\n> - IERX_A_MARK,\n> - EX_WAIT0_A_IMARK,\n> - QCLK_MARK,\n> - VI4_CLK_MARK,\n> - DU_DOTCLKOUT0_MARK,\n> - D0_IMARK,\n> - MSIOF2_SS1_B_MARK,\n> - MSIOF3_SCK_A_MARK,\n> - VI4_DATA16_MARK,\n> - VI5_DATA0_MARK,\n> - D1_IMARK,\n> - MSIOF2_SS2_B_MARK,\n> - MSIOF3_SYNC_A_MARK,\n> - VI4_DATA17_MARK,\n> - VI5_DATA1_MARK,\n> - D2_IMARK,\n> - MSIOF3_RXD_A_MARK,\n> - VI4_DATA18_MARK,\n> - VI5_DATA2_MARK,\n> - D3_IMARK,\n> - MSIOF3_TXD_A_MARK,\n> - VI4_DATA19_MARK,\n> - VI5_DATA3_MARK,\n> - D4_IMARK,\n> - MSIOF2_SCK_B_MARK,\n> - VI4_DATA20_MARK,\n> - VI5_DATA4_MARK,\n> -\n> - /* IPSR6 */\n> - D5_IMARK,\n> - MSIOF2_SYNC_B_MARK,\n> - VI4_DATA21_MARK,\n> - VI5_DATA5_MARK,\n> - D6_IMARK,\n> - MSIOF2_RXD_B_MARK,\n> - VI4_DATA22_MARK,\n> - VI5_DATA6_MARK,\n> - D7_IMARK,\n> - MSIOF2_TXD_B_MARK,\n> - VI4_DATA23_MARK,\n> - VI5_DATA7_MARK,\n> - D8_IMARK,\n> - LCDOUT0_MARK,\n> - MSIOF2_SCK_D_MARK,\n> - SCK4_C_MARK,\n> - VI4_DATA0_A_MARK,\n> - DU_DR0_MARK,\n> - D9_IMARK,\n> - LCDOUT1_MARK,\n> - MSIOF2_SYNC_D_MARK,\n> - VI4_DATA1_A_MARK,\n> - DU_DR1_MARK,\n> - D10_IMARK,\n> - LCDOUT2_MARK,\n> - MSIOF2_RXD_D_MARK,\n> - HRX3_B_MARK,\n> - VI4_DATA2_A_MARK,\n> - CTS4x_C_MARK,\n> - DU_DR2_MARK,\n> - D11_IMARK,\n> - LCDOUT3_MARK,\n> - MSIOF2_TXD_D_MARK,\n> - HTX3_B_MARK,\n> - VI4_DATA3_A_MARK,\n> - RTS4x_TANS_C_MARK,\n> - DU_DR3_MARK,\n> - D12_IMARK,\n> - LCDOUT4_MARK,\n> - MSIOF2_SS1_D_MARK,\n> - RX4_C_MARK,\n> - VI4_DATA4_A_MARK,\n> - DU_DR4_MARK,\n> -\n> - /* IPSR7 */\n> - D13_IMARK,\n> - LCDOUT5_MARK,\n> - MSIOF2_SS2_D_MARK,\n> - TX4_C_MARK,\n> - VI4_DATA5_A_MARK,\n> - DU_DR5_MARK,\n> - D14_IMARK,\n> - LCDOUT6_MARK,\n> - MSIOF3_SS1_A_MARK,\n> - HRX3_C_MARK,\n> - VI4_DATA6_A_MARK,\n> - DU_DR6_MARK,\n> - SCL6_C_MARK,\n> - D15_IMARK,\n> - LCDOUT7_MARK,\n> - MSIOF3_SS2_A_MARK,\n> - HTX3_C_MARK,\n> - VI4_DATA7_A_MARK,\n> - DU_DR7_MARK,\n> - SDA6_C_MARK,\n> - FSCLKST_MARK,\n> - SD0_CLK_IMARK,\n> - MSIOF1_SCK_E_MARK,\n> - STP_OPWM_0_B_MARK,\n> - SD0_CMD_IMARK,\n> - MSIOF1_SYNC_E_MARK,\n> - STP_IVCXO27_0_B_MARK,\n> - SD0_DAT0_IMARK,\n> - MSIOF1_RXD_E_MARK,\n> - TS_SCK0_B_MARK,\n> - STP_ISCLK_0_B_MARK,\n> - SD0_DAT1_IMARK,\n> - MSIOF1_TXD_E_MARK,\n> - TS_SPSYNC0_B_MARK,\n> - STP_ISSYNC_0_B_MARK,\n> -\n> - /* IPSR8 */\n> - SD0_DAT2_IMARK,\n> - MSIOF1_SS1_E_MARK,\n> - TS_SDAT0_B_MARK,\n> - STP_ISD_0_B_MARK,\n> - SD0_DAT3_IMARK,\n> - MSIOF1_SS2_E_MARK,\n> - TS_SDEN0_B_MARK,\n> - STP_ISEN_0_B_MARK,\n> - SD1_CLK_IMARK,\n> - MSIOF1_SCK_G_MARK,\n> - SIM0_CLK_A_MARK,\n> - SD1_CMD_IMARK,\n> - MSIOF1_SYNC_G_MARK,\n> - NFCEx_B_MARK,\n> - SIM0_D_A_MARK,\n> - STP_IVCXO27_1_B_MARK,\n> - SD1_DAT0_IMARK,\n> - SD2_DAT4_MARK,\n> - MSIOF1_RXD_G_MARK,\n> - NFWPx_B_MARK,\n> - TS_SCK1_B_MARK,\n> - STP_ISCLK_1_B_MARK,\n> - SD1_DAT1_IMARK,\n> - SD2_DAT5_MARK,\n> - MSIOF1_TXD_G_MARK,\n> - NFDATA14_B_MARK,\n> - TS_SPSYNC1_B_MARK,\n> - STP_ISSYNC_1_B_MARK,\n> - SD1_DAT2_IMARK,\n> - SD2_DAT6_MARK,\n> - MSIOF1_SS1_G_MARK,\n> - NFDATA15_B_MARK,\n> - TS_SDAT1_B_MARK,\n> - STP_IOD_1_B_MARK,\n> - SD1_DAT3_IMARK,\n> - SD2_DAT7_MARK,\n> - MSIOF1_SS2_G_MARK,\n> - NFRBx_B_MARK,\n> - TS_SDEN1_B_MARK,\n> - STP_ISEN_1_B_MARK,\n> -\n> - /* IPSR9 */\n> - SD2_CLK_IMARK,\n> - NFDATA8_MARK,\n> - SD2_CMD_IMARK,\n> - NFDATA9_MARK,\n> - SD2_DAT0_IMARK,\n> - NFDATA10_MARK,\n> - SD2_DAT1_IMARK,\n> - NFDATA11_MARK,\n> - SD2_DAT2_IMARK,\n> - NFDATA12_MARK,\n> - SD2_DAT3_IMARK,\n> - NFDATA13_MARK,\n> - SD2_DS_IMARK,\n> - NFALE_MARK,\n> - SATA_DEVSLP_B_MARK,\n> - SD3_CLK_IMARK,\n> - NFWEx_MARK,\n> -\n> - /* IPSR10 */\n> - SD3_CMD_IMARK,\n> - NFREx_MARK,\n> - SD3_DAT0_IMARK,\n> - NFDATA0_MARK,\n> - SD3_DAT1_IMARK,\n> - NFDATA1_MARK,\n> - SD3_DAT2_IMARK,\n> - NFDATA2_MARK,\n> - SD3_DAT3_IMARK,\n> - NFDATA3_MARK,\n> - SD3_DAT4_IMARK,\n> - SD2_CD_A_MARK,\n> - NFDATA4_MARK,\n> - SD3_DAT5_IMARK,\n> - SD2_WP_A_MARK,\n> - NFDATA5_MARK,\n> - SD3_DAT6_IMARK,\n> - SD3_CD_MARK,\n> - NFDATA6_MARK,\n> -\n> - /* IPSR11 */\n> - SD3_DAT7_IMARK,\n> - SD3_WP_MARK,\n> - NFDATA7_MARK,\n> - SD3_DS_IMARK,\n> - NFCLE_MARK,\n> - SD0_CD_IMARK,\n> - NFDATA14_A_MARK,\n> - SCL2_B_MARK,\n> - SIM0_RST_A_MARK,\n> - SD0_WP_IMARK,\n> - NFDATA15_A_MARK,\n> - SDA2_B_MARK,\n> - SD1_CD_IMARK,\n> - NFRBx_A_MARK,\n> - SIM0_CLK_B_MARK,\n> - SD1_WP_IMARK,\n> - NFCEx_A_MARK,\n> - SIM0_D_B_MARK,\n> - SCK0_IMARK,\n> - HSCK1_B_MARK,\n> - MSIOF1_SS2_B_MARK,\n> - AUDIO_CLKC_B_MARK,\n> - SDA2_A_MARK,\n> - SIM0_RST_B_MARK,\n> - STP_OPWM_0_C_MARK,\n> - RIF0_CLK_B_MARK,\n> - ADICHS2_MARK,\n> - SCK5_B_MARK,\n> - RX0_IMARK,\n> - HRX1_B_MARK,\n> - TS_SCK0_C_MARK,\n> - STP_ISCLK_0_C_MARK,\n> - RIF0_D0_B_MARK,\n> -\n> - /* IPSR12 */\n> - TX0_IMARK,\n> - HTX1_B_MARK,\n> - TS_SPSYNC0_C_MARK,\n> - STP_ISSYNC_0_C_MARK,\n> - RIF0_D1_B_MARK,\n> - CTS0x_IMARK,\n> - HCTS1x_B_MARK,\n> - MSIOF1_SYNC_B_MARK,\n> - TS_SPSYNC1_C_MARK,\n> - STP_ISSYNC_1_C_MARK,\n> - RIF1_SYNC_B_MARK,\n> - AUDIO_CLKOUT_C_MARK,\n> - ADICS_SAMP_MARK,\n> - RTS0x_TANS_IMARK,\n> - HRTS1x_B_MARK,\n> - MSIOF1_SS1_B_MARK,\n> - AUDIO_CLKA_B_MARK,\n> - SCL2_A_MARK,\n> - STP_IVCXO27_1_C_MARK,\n> - RIF0_SYNC_B_MARK,\n> - ADICHS1_MARK,\n> - RX1_A_IMARK,\n> - HRX1_A_MARK,\n> - TS_SDAT0_C_MARK,\n> - STP_ISD_0_C_MARK,\n> - RIF1_CLK_C_MARK,\n> - TX1_A_IMARK,\n> - HTX1_A_MARK,\n> - TS_SDEN0_C_MARK,\n> - STP_ISEN_0_C_MARK,\n> - RIF1_D0_C_MARK,\n> - CTS1x_IMARK,\n> - HCTS1x_A_MARK,\n> - MSIOF1_RXD_B_MARK,\n> - TS_SDEN1_C_MARK,\n> - STP_ISEN_1_C_MARK,\n> - RIF1_D0_B_MARK,\n> - ADIDATA_MARK,\n> - RTS1x_TANS_IMARK,\n> - HRTS1x_A_MARK,\n> - MSIOF1_TXD_B_MARK,\n> - TS_SDAT1_C_MARK,\n> - STP_ISD_1_C_MARK,\n> - RIF1_D1_B_MARK,\n> - ADICHS0_MARK,\n> - SCK2_IMARK,\n> - SCIF_CLK_B_MARK,\n> - MSIOF1_SCK_B_MARK,\n> - TS_SCK1_C_MARK,\n> - STP_ISCLK_1_C_MARK,\n> - RIF1_CLK_B_MARK,\n> - ADICLK_MARK,\n> -\n> - /* IPSR13 */\n> - TX2_A_IMARK,\n> - SD2_CD_B_MARK,\n> - SCL1_A_MARK,\n> - FMCLK_A_MARK,\n> - RIF1_D1_C_MARK,\n> - FSO_CFE_0x_MARK,\n> - RX2_A_IMARK,\n> - SD2_WP_B_MARK,\n> - SDA1_A_MARK,\n> - FMIN_A_MARK,\n> - RIF1_SYNC_C_MARK,\n> - FSO_CFE_1x_MARK,\n> - HSCK0_IMARK,\n> - MSIOF1_SCK_D_MARK,\n> - AUDIO_CLKB_A_MARK,\n> - SSI_SDATA1_B_MARK,\n> - TS_SCK0_D_MARK,\n> - STP_ISCLK_0_D_MARK,\n> - RIF0_CLK_C_MARK,\n> - RX5_B_MARK,\n> - HRX0_IMARK,\n> - MSIOF1_RXD_D_MARK,\n> - SSI_SDATA2_B_MARK,\n> - TS_SDEN0_D_MARK,\n> - STP_ISEN_0_D_MARK,\n> - RIF0_D0_C_MARK,\n> - HTX0_IMARK,\n> - MSIOF1_TXD_D_MARK,\n> - SSI_SDATA9_B_MARK,\n> - TS_SDAT0_D_MARK,\n> - STP_ISD_0_D_MARK,\n> - RIF0_D1_C_MARK,\n> - HCTS0x_IMARK,\n> - RX2_B_MARK,\n> - MSIOF1_SYNC_D_MARK,\n> - SSI_SCK9_A_MARK,\n> - TS_SPSYNC0_D_MARK,\n> - STP_ISSYNC_0_D_MARK,\n> - RIF0_SYNC_C_MARK,\n> - AUDIO_CLKOUT1_A_MARK,\n> - HRTS0x_IMARK,\n> - TX2_B_MARK,\n> - MSIOF1_SS1_D_MARK,\n> - SSI_WS9_A_MARK,\n> - STP_IVCXO27_0_D_MARK,\n> - BPFCLK_A_MARK,\n> - AUDIO_CLKOUT2_A_MARK,\n> - MSIOF0_SYNC_IMARK,\n> - AUDIO_CLKOUT_A_MARK,\n> - TX5_B_MARK,\n> - BPFCLK_D_MARK,\n> -\n> - /* IPSR14 */\n> - MSIOF0_SS1_IMARK,\n> - RX5_A_MARK,\n> - NFWPx_A_MARK,\n> - AUDIO_CLKA_C_MARK,\n> - SSI_SCK2_A_MARK,\n> - STP_IVCXO27_0_C_MARK,\n> - AUDIO_CLKOUT3_A_MARK,\n> - TCLK1_B_MARK,\n> - MSIOF0_SS2_IMARK,\n> - TX5_A_MARK,\n> - MSIOF1_SS2_D_MARK,\n> - AUDIO_CLKC_A_MARK,\n> - SSI_WS2_A_MARK,\n> - STP_OPWM_0_D_MARK,\n> - AUDIO_CLKOUT_D_MARK,\n> - SPEEDIN_B_MARK,\n> - MLB_CLK_IMARK,\n> - MSIOF1_SCK_F_MARK,\n> - SCL1_B_MARK,\n> - MLB_SIG_IMARK,\n> - RX1_B_MARK,\n> - MSIOF1_SYNC_F_MARK,\n> - SDA1_B_MARK,\n> - MLB_DAT_IMARK,\n> - TX1_B_MARK,\n> - MSIOF1_RXD_F_MARK,\n> - SSI_SCK01239_IMARK,\n> - MSIOF1_TXD_F_MARK,\n> - MOUT0_MARK,\n> - SSI_WS01239_IMARK,\n> - MSIOF1_SS1_F_MARK,\n> - MOUT1_MARK,\n> - SSI_SDATA0_IMARK,\n> - MSIOF1_SS2_F_MARK,\n> - MOUT2_MARK,\n> -\n> - /* IPSR15 */\n> - SSI_SDATA1_A_IMARK,\n> - MOUT5_MARK,\n> - SSI_SDATA2_A_IMARK,\n> - SSI_SCK1_B_MARK,\n> - MOUT6_MARK,\n> - SSI_SCK34_IMARK,\n> - MSIOF1_SS1_A_MARK,\n> - STP_OPWM_0_A_MARK,\n> - SSI_WS34_IMARK,\n> - HCTS2x_A_MARK,\n> - MSIOF1_SS2_A_MARK,\n> - STP_IVCXO27_0_A_MARK,\n> - SSI_SDATA3_IMARK,\n> - HRTS2x_A_MARK,\n> - MSIOF1_TXD_A_MARK,\n> - TS_SCK0_A_MARK,\n> - STP_ISCLK_0_A_MARK,\n> - RIF0_D1_A_MARK,\n> - RIF2_D0_A_MARK,\n> - SSI_SCK4_IMARK,\n> - HRX2_A_MARK,\n> - MSIOF1_SCK_A_MARK,\n> - TS_SDAT0_A_MARK,\n> - STP_ISD_0_A_MARK,\n> - RIF0_CLK_A_MARK,\n> - RIF2_CLK_A_MARK,\n> - SSI_WS4_IMARK,\n> - HTX2_A_MARK,\n> - MSIOF1_SYNC_A_MARK,\n> - TS_SDEN0_A_MARK,\n> - STP_ISEN_0_A_MARK,\n> - RIF0_SYNC_A_MARK,\n> - RIF2_SYNC_A_MARK,\n> - SSI_SDATA4_IMARK,\n> - HSCK2_A_MARK,\n> - MSIOF1_RXD_A_MARK,\n> - TS_SPSYNC0_A_MARK,\n> - STP_ISSYNC_0_A_MARK,\n> - RIF0_D0_A_MARK,\n> - RIF2_D1_A_MARK,\n> -\n> - /* IPSR16 */\n> - SSI_SCK6_IMARK,\n> - SIM0_RST_D_MARK,\n> - SSI_WS6_IMARK,\n> - SIM0_D_D_MARK,\n> - SSI_SDATA6_IMARK,\n> - SIM0_CLK_D_MARK,\n> - SATA_DEVSLP_A_MARK,\n> - SSI_SCK78_IMARK,\n> - HRX2_B_MARK,\n> - MSIOF1_SCK_C_MARK,\n> - TS_SCK1_A_MARK,\n> - STP_ISCLK_1_A_MARK,\n> - RIF1_CLK_A_MARK,\n> - RIF3_CLK_A_MARK,\n> - SSI_WS78_IMARK,\n> - HTX2_B_MARK,\n> - MSIOF1_SYNC_C_MARK,\n> - TS_SDAT1_A_MARK,\n> - STP_ISD_1_A_MARK,\n> - RIF1_SYNC_A_MARK,\n> - RIF3_SYNC_A_MARK,\n> - SSI_SDATA7_IMARK,\n> - HCTS2x_B_MARK,\n> - MSIOF1_RXD_C_MARK,\n> - TS_SDEN1_A_MARK,\n> - STP_ISEN_1_A_MARK,\n> - RIF1_D0_A_MARK,\n> - RIF3_D0_A_MARK,\n> - TCLK2_A_MARK,\n> - SSI_SDATA8_IMARK,\n> - HRTS2x_B_MARK,\n> - MSIOF1_TXD_C_MARK,\n> - TS_SPSYNC1_A_MARK,\n> - STP_ISSYNC_1_A_MARK,\n> - RIF1_D1_A_MARK,\n> - RIF3_D1_A_MARK,\n> - SSI_SDATA9_A_IMARK,\n> - HSCK2_B_MARK,\n> - MSIOF1_SS1_C_MARK,\n> - HSCK1_A_MARK,\n> - SSI_WS1_B_MARK,\n> - SCK1_MARK,\n> - STP_IVCXO27_1_A_MARK,\n> - SCK5_A_MARK,\n> -\n> - /* IPSR17 */\n> - AUDIO_CLKA_A_IMARK,\n> - CC5_OSCOUT_MARK,\n> - AUDIO_CLKB_B_IMARK,\n> - SCIF_CLK_A_MARK,\n> - STP_IVCXO27_1_D_MARK,\n> - REMOCON_A_MARK,\n> - TCLK1_A_MARK,\n> - USB0_PWEN_IMARK,\n> - SIM0_RST_C_MARK,\n> - TS_SCK1_D_MARK,\n> - STP_ISCLK_1_D_MARK,\n> - BPFCLK_B_MARK,\n> - RIF3_CLK_B_MARK,\n> - HSCK2_C_MARK,\n> - USB0_OVC_IMARK,\n> - SIM0_D_C_MARK,\n> - TS_SDAT1_D_MARK,\n> - STP_ISD_1_D_MARK,\n> - RIF3_SYNC_B_MARK,\n> - HRX2_C_MARK,\n> - USB1_PWEN_IMARK,\n> - SIM0_CLK_C_MARK,\n> - SSI_SCK1_A_MARK,\n> - TS_SCK0_E_MARK,\n> - STP_ISCLK_0_E_MARK,\n> - FMCLK_B_MARK,\n> - RIF2_CLK_B_MARK,\n> - SPEEDIN_A_MARK,\n> - HTX2_C_MARK,\n> - USB1_OVC_IMARK,\n> - MSIOF1_SS2_C_MARK,\n> - SSI_WS1_A_MARK,\n> - TS_SDAT0_E_MARK,\n> - STP_ISD_0_E_MARK,\n> - FMIN_B_MARK,\n> - RIF2_SYNC_B_MARK,\n> - REMOCON_B_MARK,\n> - HCTS2x_C_MARK,\n> - USB30_PWEN_IMARK,\n> - AUDIO_CLKOUT_B_MARK,\n> - SSI_SCK2_B_MARK,\n> - TS_SDEN1_D_MARK,\n> - STP_ISEN_1_D_MARK,\n> - STP_OPWM_0_E_MARK,\n> - RIF3_D0_B_MARK,\n> - TCLK2_B_MARK,\n> - TPU0TO0_MARK,\n> - BPFCLK_C_MARK,\n> - HRTS2x_C_MARK,\n> - USB30_OVC_IMARK,\n> - AUDIO_CLKOUT1_B_MARK,\n> - SSI_WS2_B_MARK,\n> - TS_SPSYNC1_D_MARK,\n> - STP_ISSYNC_1_D_MARK,\n> - STP_IVCXO27_0_E_MARK,\n> - RIF3_D1_B_MARK,\n> - FSO_TOEx_MARK,\n> - TPU0TO1_MARK,\n> -\n> - /* IPSR18 */\n> - USB3_PWEN_IMARK,\n> - AUDIO_CLKOUT2_B_MARK,\n> - SSI_SCK9_B_MARK,\n> - TS_SDEN0_E_MARK,\n> - STP_ISEN_0_E_MARK,\n> - RIF2_D0_B_MARK,\n> - TPU0TO2_MARK,\n> - FMCLK_C_MARK,\n> - FMCLK_D_MARK,\n> -\n> - USB3_OVC_IMARK,\n> - AUDIO_CLKOUT3_B_MARK,\n> - SSI_WS9_B_MARK,\n> - TS_SPSYNC0_E_MARK,\n> - STP_ISSYNC_0_E_MARK,\n> - RIF2_D1_B_MARK,\n> - TPU0TO3_MARK,\n> - FMIN_C_MARK,\n> - FMIN_D_MARK,\n> -\n> - PINMUX_MARK_END,\n> -};\n> -\n> -static pinmux_enum_t pinmux_data[] = {\n> - PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */\n> -\n> - /* GPSR0 */\n> - PINMUX_DATA(D15_GMARK, GFN_D15),\n> - PINMUX_DATA(D14_GMARK, GFN_D14),\n> - PINMUX_DATA(D13_GMARK, GFN_D13),\n> - PINMUX_DATA(D12_GMARK, GFN_D12),\n> - PINMUX_DATA(D11_GMARK, GFN_D11),\n> - PINMUX_DATA(D10_GMARK, GFN_D10),\n> - PINMUX_DATA(D9_GMARK, GFN_D9),\n> - PINMUX_DATA(D8_GMARK, GFN_D8),\n> - PINMUX_DATA(D7_GMARK, GFN_D7),\n> - PINMUX_DATA(D6_GMARK, GFN_D6),\n> - PINMUX_DATA(D5_GMARK, GFN_D5),\n> - PINMUX_DATA(D4_GMARK, GFN_D4),\n> - PINMUX_DATA(D3_GMARK, GFN_D3),\n> - PINMUX_DATA(D2_GMARK, GFN_D2),\n> - PINMUX_DATA(D1_GMARK, GFN_D1),\n> - PINMUX_DATA(D0_GMARK, GFN_D0),\n> -\n> - /* GPSR1 */\n> - PINMUX_DATA(CLKOUT_GMARK, GFN_CLKOUT),\n> - PINMUX_DATA(EX_WAIT0_A_GMARK, GFN_EX_WAIT0_A),\n> - PINMUX_DATA(WE1x_GMARK, GFN_WE1x),\n> - PINMUX_DATA(WE0x_GMARK, GFN_WE0x),\n> - PINMUX_DATA(RD_WRx_GMARK, GFN_RD_WRx),\n> - PINMUX_DATA(RDx_GMARK, GFN_RDx),\n> - PINMUX_DATA(BSx_GMARK, GFN_BSx),\n> - PINMUX_DATA(CS1x_A26_GMARK, GFN_CS1x_A26),\n> - PINMUX_DATA(CS0x_GMARK, GFN_CS0x),\n> - PINMUX_DATA(A19_GMARK, GFN_A19),\n> - PINMUX_DATA(A18_GMARK, GFN_A18),\n> - PINMUX_DATA(A17_GMARK, GFN_A17),\n> - PINMUX_DATA(A16_GMARK, GFN_A16),\n> - PINMUX_DATA(A15_GMARK, GFN_A15),\n> - PINMUX_DATA(A14_GMARK, GFN_A14),\n> - PINMUX_DATA(A13_GMARK, GFN_A13),\n> - PINMUX_DATA(A12_GMARK, GFN_A12),\n> - PINMUX_DATA(A11_GMARK, GFN_A11),\n> - PINMUX_DATA(A10_GMARK, GFN_A10),\n> - PINMUX_DATA(A9_GMARK, GFN_A9),\n> - PINMUX_DATA(A8_GMARK, GFN_A8),\n> - PINMUX_DATA(A7_GMARK, GFN_A7),\n> - PINMUX_DATA(A6_GMARK, GFN_A6),\n> - PINMUX_DATA(A5_GMARK, GFN_A5),\n> - PINMUX_DATA(A4_GMARK, GFN_A4),\n> - PINMUX_DATA(A3_GMARK, GFN_A3),\n> - PINMUX_DATA(A2_GMARK, GFN_A2),\n> - PINMUX_DATA(A1_GMARK, GFN_A1),\n> - PINMUX_DATA(A0_GMARK, GFN_A0),\n> -\n> - /* GPSR2 */\n> - PINMUX_DATA(AVB_AVTP_CAPTURE_A_GMARK, GFN_AVB_AVTP_CAPTURE_A),\n> - PINMUX_DATA(AVB_AVTP_MATCH_A_GMARK, GFN_AVB_AVTP_MATCH_A),\n> - PINMUX_DATA(AVB_LINK_GMARK, GFN_AVB_LINK),\n> - PINMUX_DATA(AVB_PHY_INT_GMARK, GFN_AVB_PHY_INT),\n> - PINMUX_DATA(AVB_MAGIC_GMARK, GFN_AVB_MAGIC),\n> - PINMUX_DATA(AVB_MDC_GMARK, GFN_AVB_MDC),\n> - PINMUX_DATA(PWM2_A_GMARK, GFN_PWM2_A),\n> - PINMUX_DATA(PWM1_A_GMARK, GFN_PWM1_A),\n> - PINMUX_DATA(PWM0_GMARK, GFN_PWM0),\n> - PINMUX_DATA(IRQ5_GMARK, GFN_IRQ5),\n> - PINMUX_DATA(IRQ4_GMARK, GFN_IRQ4),\n> - PINMUX_DATA(IRQ3_GMARK, GFN_IRQ3),\n> - PINMUX_DATA(IRQ2_GMARK, GFN_IRQ2),\n> - PINMUX_DATA(IRQ1_GMARK, GFN_IRQ1),\n> - PINMUX_DATA(IRQ0_GMARK, GFN_IRQ0),\n> -\n> - /* GPSR3 */\n> - PINMUX_DATA(SD1_WP_GMARK, GFN_SD1_WP),\n> - PINMUX_DATA(SD1_CD_GMARK, GFN_SD1_CD),\n> - PINMUX_DATA(SD0_WP_GMARK, GFN_SD0_WP),\n> - PINMUX_DATA(SD0_CD_GMARK, GFN_SD0_CD),\n> - PINMUX_DATA(SD1_DAT3_GMARK, GFN_SD1_DAT3),\n> - PINMUX_DATA(SD1_DAT2_GMARK, GFN_SD1_DAT2),\n> - PINMUX_DATA(SD1_DAT1_GMARK, GFN_SD1_DAT1),\n> - PINMUX_DATA(SD1_DAT0_GMARK, GFN_SD1_DAT0),\n> - PINMUX_DATA(SD1_CMD_GMARK, GFN_SD1_CMD),\n> - PINMUX_DATA(SD1_CLK_GMARK, GFN_SD1_CLK),\n> - PINMUX_DATA(SD0_DAT3_GMARK, GFN_SD0_DAT3),\n> - PINMUX_DATA(SD0_DAT2_GMARK, GFN_SD0_DAT2),\n> - PINMUX_DATA(SD0_DAT1_GMARK, GFN_SD0_DAT1),\n> - PINMUX_DATA(SD0_DAT0_GMARK, GFN_SD0_DAT0),\n> - PINMUX_DATA(SD0_CMD_GMARK, GFN_SD0_CMD),\n> - PINMUX_DATA(SD0_CLK_GMARK, GFN_SD0_CLK),\n> -\n> - /* GPSR4 */\n> - PINMUX_DATA(SD3_DS_GMARK, GFN_SD3_DS),\n> - PINMUX_DATA(SD3_DAT7_GMARK, GFN_SD3_DAT7),\n> - PINMUX_DATA(SD3_DAT6_GMARK, GFN_SD3_DAT6),\n> - PINMUX_DATA(SD3_DAT5_GMARK, GFN_SD3_DAT5),\n> - PINMUX_DATA(SD3_DAT4_GMARK, GFN_SD3_DAT4),\n> - PINMUX_DATA(SD3_DAT3_GMARK, GFN_SD3_DAT3),\n> - PINMUX_DATA(SD3_DAT2_GMARK, GFN_SD3_DAT2),\n> - PINMUX_DATA(SD3_DAT1_GMARK, GFN_SD3_DAT1),\n> - PINMUX_DATA(SD3_DAT0_GMARK, GFN_SD3_DAT0),\n> - PINMUX_DATA(SD3_CMD_GMARK, GFN_SD3_CMD),\n> - PINMUX_DATA(SD3_CLK_GMARK, GFN_SD3_CLK),\n> - PINMUX_DATA(SD2_DS_GMARK, GFN_SD2_DS),\n> - PINMUX_DATA(SD2_DAT3_GMARK, GFN_SD2_DAT3),\n> - PINMUX_DATA(SD2_DAT2_GMARK, GFN_SD2_DAT2),\n> - PINMUX_DATA(SD2_DAT1_GMARK, GFN_SD2_DAT1),\n> - PINMUX_DATA(SD2_DAT0_GMARK, GFN_SD2_DAT0),\n> - PINMUX_DATA(SD2_CMD_GMARK, GFN_SD2_CMD),\n> - PINMUX_DATA(SD2_CLK_GMARK, GFN_SD2_CLK),\n> -\n> - /* GPSR5 */\n> - PINMUX_DATA(MLB_DAT_GMARK, GFN_MLB_DAT),\n> - PINMUX_DATA(MLB_SIG_GMARK, GFN_MLB_SIG),\n> - PINMUX_DATA(MLB_CLK_GMARK, GFN_MLB_CLK),\n> - PINMUX_DATA(MSIOF0_RXD_MARK, FN_MSIOF0_RXD),\n> - PINMUX_DATA(MSIOF0_SS2_GMARK, GFN_MSIOF0_SS2),\n> - PINMUX_DATA(MSIOF0_TXD_MARK, FN_MSIOF0_TXD),\n> - PINMUX_DATA(MSIOF0_SS1_GMARK, GFN_MSIOF0_SS1),\n> - PINMUX_DATA(MSIOF0_SYNC_GMARK, GFN_MSIOF0_SYNC),\n> - PINMUX_DATA(MSIOF0_SCK_MARK, FN_MSIOF0_SCK),\n> - PINMUX_DATA(HRTS0x_GMARK, GFN_HRTS0x),\n> - PINMUX_DATA(HCTS0x_GMARK, GFN_HCTS0x),\n> - PINMUX_DATA(HTX0_GMARK, GFN_HTX0),\n> - PINMUX_DATA(HRX0_GMARK, GFN_HRX0),\n> - PINMUX_DATA(HSCK0_GMARK, GFN_HSCK0),\n> - PINMUX_DATA(RX2_A_GMARK, GFN_RX2_A),\n> - PINMUX_DATA(TX2_A_GMARK, GFN_TX2_A),\n> - PINMUX_DATA(SCK2_GMARK, GFN_SCK2),\n> - PINMUX_DATA(RTS1x_TANS_GMARK, GFN_RTS1x_TANS),\n> - PINMUX_DATA(CTS1x_GMARK, GFN_CTS1x),\n> - PINMUX_DATA(TX1_A_GMARK, GFN_TX1_A),\n> - PINMUX_DATA(RX1_A_GMARK, GFN_RX1_A),\n> - PINMUX_DATA(RTS0x_TANS_GMARK, GFN_RTS0x_TANS),\n> - PINMUX_DATA(CTS0x_GMARK, GFN_CTS0x),\n> - PINMUX_DATA(TX0_GMARK, GFN_TX0),\n> - PINMUX_DATA(RX0_GMARK, GFN_RX0),\n> - PINMUX_DATA(SCK0_GMARK, GFN_SCK0),\n> -\n> - /* GPSR6 */\n> - PINMUX_DATA(USB3_OVC_GMARK, GFN_USB3_OVC),\n> - PINMUX_DATA(USB3_PWEN_GMARK, GFN_USB3_PWEN),\n> - PINMUX_DATA(USB30_OVC_GMARK, GFN_USB30_OVC),\n> - PINMUX_DATA(USB30_PWEN_GMARK, GFN_USB30_PWEN),\n> - PINMUX_DATA(USB1_OVC_GMARK, GFN_USB1_OVC),\n> - PINMUX_DATA(USB1_PWEN_GMARK, GFN_USB1_PWEN),\n> - PINMUX_DATA(USB0_OVC_GMARK, GFN_USB0_OVC),\n> - PINMUX_DATA(USB0_PWEN_GMARK, GFN_USB0_PWEN),\n> - PINMUX_DATA(AUDIO_CLKB_B_GMARK, GFN_AUDIO_CLKB_B),\n> - PINMUX_DATA(AUDIO_CLKA_A_GMARK, GFN_AUDIO_CLKA_A),\n> - PINMUX_DATA(SSI_SDATA9_A_GMARK, GFN_SSI_SDATA9_A),\n> - PINMUX_DATA(SSI_SDATA8_GMARK, GFN_SSI_SDATA8),\n> - PINMUX_DATA(SSI_SDATA7_GMARK, GFN_SSI_SDATA7),\n> - PINMUX_DATA(SSI_WS78_GMARK, GFN_SSI_WS78),\n> - PINMUX_DATA(SSI_SCK78_GMARK, GFN_SSI_SCK78),\n> - PINMUX_DATA(SSI_SDATA6_GMARK, GFN_SSI_SDATA6),\n> - PINMUX_DATA(SSI_WS6_GMARK, GFN_SSI_WS6),\n> - PINMUX_DATA(SSI_SCK6_GMARK, GFN_SSI_SCK6),\n> - PINMUX_DATA(SSI_SDATA5_MARK, FN_SSI_SDATA5),\n> - PINMUX_DATA(SSI_WS5_MARK, FN_SSI_WS5),\n> - PINMUX_DATA(SSI_SCK5_MARK, FN_SSI_SCK5),\n> - PINMUX_DATA(SSI_SDATA4_GMARK, GFN_SSI_SDATA4),\n> - PINMUX_DATA(SSI_WS4_GMARK, GFN_SSI_WS4),\n> - PINMUX_DATA(SSI_SCK4_GMARK, GFN_SSI_SCK4),\n> - PINMUX_DATA(SSI_SDATA3_GMARK, GFN_SSI_SDATA3),\n> - PINMUX_DATA(SSI_WS34_GMARK, GFN_SSI_WS34),\n> - PINMUX_DATA(SSI_SCK34_GMARK, GFN_SSI_SCK34),\n> - PINMUX_DATA(SSI_SDATA2_A_GMARK, GFN_SSI_SDATA2_A),\n> - PINMUX_DATA(SSI_SDATA1_A_GMARK, GFN_SSI_SDATA1_A),\n> - PINMUX_DATA(SSI_SDATA0_GMARK, GFN_SSI_SDATA0),\n> - PINMUX_DATA(SSI_WS01239_GMARK, GFN_SSI_WS01239),\n> - PINMUX_DATA(SSI_SCK01239_GMARK, GFN_SSI_SCK01239),\n> -\n> - /* GPSR7 */\n> - PINMUX_DATA(HDMI1_CEC_MARK, FN_HDMI1_CEC),\n> - PINMUX_DATA(HDMI0_CEC_MARK, FN_HDMI0_CEC),\n> - PINMUX_DATA(AVS2_MARK, FN_AVS2),\n> - PINMUX_DATA(AVS1_MARK, FN_AVS1),\n> -};\n> -\n> -static struct pinmux_gpio pinmux_gpios[] = {\n> - PINMUX_GPIO_GP_ALL(),\n> - /* GPSR0 */\n> - GPIO_GFN(D15),\n> - GPIO_GFN(D14),\n> - GPIO_GFN(D13),\n> - GPIO_GFN(D12),\n> - GPIO_GFN(D11),\n> - GPIO_GFN(D10),\n> - GPIO_GFN(D9),\n> - GPIO_GFN(D8),\n> - GPIO_GFN(D7),\n> - GPIO_GFN(D6),\n> - GPIO_GFN(D5),\n> - GPIO_GFN(D4),\n> - GPIO_GFN(D3),\n> - GPIO_GFN(D2),\n> - GPIO_GFN(D1),\n> - GPIO_GFN(D0),\n> - /* GPSR1 */\n> - GPIO_GFN(CLKOUT),\n> - GPIO_GFN(EX_WAIT0_A),\n> - GPIO_GFN(WE1x),\n> - GPIO_GFN(WE0x),\n> - GPIO_GFN(RD_WRx),\n> - GPIO_GFN(RDx),\n> - GPIO_GFN(BSx),\n> - GPIO_GFN(CS1x_A26),\n> - GPIO_GFN(CS0x),\n> - GPIO_GFN(A19),\n> - GPIO_GFN(A18),\n> - GPIO_GFN(A17),\n> - GPIO_GFN(A16),\n> - GPIO_GFN(A15),\n> - GPIO_GFN(A14),\n> - GPIO_GFN(A13),\n> - GPIO_GFN(A12),\n> - GPIO_GFN(A11),\n> - GPIO_GFN(A10),\n> - GPIO_GFN(A9),\n> - GPIO_GFN(A8),\n> - GPIO_GFN(A7),\n> - GPIO_GFN(A6),\n> - GPIO_GFN(A5),\n> - GPIO_GFN(A4),\n> - GPIO_GFN(A3),\n> - GPIO_GFN(A2),\n> - GPIO_GFN(A1),\n> - GPIO_GFN(A0),\n> -\n> - /* GPSR2 */\n> - GPIO_GFN(AVB_AVTP_CAPTURE_A),\n> - GPIO_GFN(AVB_AVTP_MATCH_A),\n> - GPIO_GFN(AVB_LINK),\n> - GPIO_GFN(AVB_PHY_INT),\n> - GPIO_GFN(AVB_MAGIC),\n> - GPIO_GFN(AVB_MDC),\n> - GPIO_GFN(PWM2_A),\n> - GPIO_GFN(PWM1_A),\n> - GPIO_GFN(PWM0),\n> - GPIO_GFN(IRQ5),\n> - GPIO_GFN(IRQ4),\n> - GPIO_GFN(IRQ3),\n> - GPIO_GFN(IRQ2),\n> - GPIO_GFN(IRQ1),\n> - GPIO_GFN(IRQ0),\n> -\n> - /* GPSR3 */\n> - GPIO_GFN(SD1_WP),\n> - GPIO_GFN(SD1_CD),\n> - GPIO_GFN(SD0_WP),\n> - GPIO_GFN(SD0_CD),\n> - GPIO_GFN(SD1_DAT3),\n> - GPIO_GFN(SD1_DAT2),\n> - GPIO_GFN(SD1_DAT1),\n> - GPIO_GFN(SD1_DAT0),\n> - GPIO_GFN(SD1_CMD),\n> - GPIO_GFN(SD1_CLK),\n> - GPIO_GFN(SD0_DAT3),\n> - GPIO_GFN(SD0_DAT2),\n> - GPIO_GFN(SD0_DAT1),\n> - GPIO_GFN(SD0_DAT0),\n> - GPIO_GFN(SD0_CMD),\n> - GPIO_GFN(SD0_CLK),\n> -\n> - /* GPSR4 */\n> - GPIO_GFN(SD3_DS),\n> - GPIO_GFN(SD3_DAT7),\n> - GPIO_GFN(SD3_DAT6),\n> - GPIO_GFN(SD3_DAT5),\n> - GPIO_GFN(SD3_DAT4),\n> - GPIO_GFN(SD3_DAT3),\n> - GPIO_GFN(SD3_DAT2),\n> - GPIO_GFN(SD3_DAT1),\n> - GPIO_GFN(SD3_DAT0),\n> - GPIO_GFN(SD3_CMD),\n> - GPIO_GFN(SD3_CLK),\n> - GPIO_GFN(SD2_DS),\n> - GPIO_GFN(SD2_DAT3),\n> - GPIO_GFN(SD2_DAT2),\n> - GPIO_GFN(SD2_DAT1),\n> - GPIO_GFN(SD2_DAT0),\n> - GPIO_GFN(SD2_CMD),\n> - GPIO_GFN(SD2_CLK),\n> -\n> - /* GPSR5 */\n> - GPIO_GFN(MLB_DAT),\n> - GPIO_GFN(MLB_SIG),\n> - GPIO_GFN(MLB_CLK),\n> - GPIO_FN(MSIOF0_RXD),\n> - GPIO_GFN(MSIOF0_SS2),\n> - GPIO_FN(MSIOF0_TXD),\n> - GPIO_GFN(MSIOF0_SS1),\n> - GPIO_GFN(MSIOF0_SYNC),\n> - GPIO_FN(MSIOF0_SCK),\n> - GPIO_GFN(HRTS0x),\n> - GPIO_GFN(HCTS0x),\n> - GPIO_GFN(HTX0),\n> - GPIO_GFN(HRX0),\n> - GPIO_GFN(HSCK0),\n> - GPIO_GFN(RX2_A),\n> - GPIO_GFN(TX2_A),\n> - GPIO_GFN(SCK2),\n> - GPIO_GFN(RTS1x_TANS),\n> - GPIO_GFN(CTS1x),\n> - GPIO_GFN(TX1_A),\n> - GPIO_GFN(RX1_A),\n> - GPIO_GFN(RTS0x_TANS),\n> - GPIO_GFN(CTS0x),\n> - GPIO_GFN(TX0),\n> - GPIO_GFN(RX0),\n> - GPIO_GFN(SCK0),\n> -\n> - /* GPSR6 */\n> - GPIO_GFN(USB3_OVC),\n> - GPIO_GFN(USB3_PWEN),\n> - GPIO_GFN(USB30_OVC),\n> - GPIO_GFN(USB30_PWEN),\n> - GPIO_GFN(USB1_OVC),\n> - GPIO_GFN(USB1_PWEN),\n> - GPIO_GFN(USB0_OVC),\n> - GPIO_GFN(USB0_PWEN),\n> - GPIO_GFN(AUDIO_CLKB_B),\n> - GPIO_GFN(AUDIO_CLKA_A),\n> - GPIO_GFN(SSI_SDATA9_A),\n> - GPIO_GFN(SSI_SDATA8),\n> - GPIO_GFN(SSI_SDATA7),\n> - GPIO_GFN(SSI_WS78),\n> - GPIO_GFN(SSI_SCK78),\n> - GPIO_GFN(SSI_SDATA6),\n> - GPIO_GFN(SSI_WS6),\n> - GPIO_GFN(SSI_SCK6),\n> - GPIO_FN(SSI_SDATA5),\n> - GPIO_FN(SSI_WS5),\n> - GPIO_FN(SSI_SCK5),\n> - GPIO_GFN(SSI_SDATA4),\n> - GPIO_GFN(SSI_WS4),\n> - GPIO_GFN(SSI_SCK4),\n> - GPIO_GFN(SSI_SDATA3),\n> - GPIO_GFN(SSI_WS34),\n> - GPIO_GFN(SSI_SCK34),\n> - GPIO_GFN(SSI_SDATA2_A),\n> - GPIO_GFN(SSI_SDATA1_A),\n> - GPIO_GFN(SSI_SDATA0),\n> - GPIO_GFN(SSI_WS01239),\n> - GPIO_GFN(SSI_SCK01239),\n> -\n> - /* GPSR7 */\n> - GPIO_FN(HDMI1_CEC),\n> - GPIO_FN(HDMI0_CEC),\n> - GPIO_FN(AVS2),\n> - GPIO_FN(AVS1),\n> -\n> - /* IPSR0 */\n> - GPIO_IFN(AVB_MDC),\n> - GPIO_FN(MSIOF2_SS2_C),\n> - GPIO_IFN(AVB_MAGIC),\n> - GPIO_FN(MSIOF2_SS1_C),\n> - GPIO_FN(SCK4_A),\n> - GPIO_IFN(AVB_PHY_INT),\n> - GPIO_FN(MSIOF2_SYNC_C),\n> - GPIO_FN(RX4_A),\n> - GPIO_IFN(AVB_LINK),\n> - GPIO_FN(MSIOF2_SCK_C),\n> - GPIO_FN(TX4_A),\n> - GPIO_IFN(AVB_AVTP_MATCH_A),\n> - GPIO_FN(MSIOF2_RXD_C),\n> - GPIO_FN(CTS4x_A),\n> - GPIO_FN(FSCLKST2x_A),\n> - GPIO_IFN(AVB_AVTP_CAPTURE_A),\n> - GPIO_FN(MSIOF2_TXD_C),\n> - GPIO_FN(RTS4x_TANS_A),\n> - GPIO_IFN(IRQ0),\n> - GPIO_FN(QPOLB),\n> - GPIO_FN(DU_CDE),\n> - GPIO_FN(VI4_DATA0_B),\n> - GPIO_FN(CAN0_TX_B),\n> - GPIO_FN(CANFD0_TX_B),\n> - GPIO_FN(MSIOF3_SS2_E),\n> - GPIO_IFN(IRQ1),\n> - GPIO_FN(QPOLA),\n> - GPIO_FN(DU_DISP),\n> - GPIO_FN(VI4_DATA1_B),\n> - GPIO_FN(CAN0_RX_B),\n> - GPIO_FN(CANFD0_RX_B),\n> - GPIO_FN(MSIOF3_SS1_E),\n> -\n> - /* IPSR1 */\n> - GPIO_IFN(IRQ2),\n> - GPIO_FN(QCPV_QDE),\n> - GPIO_FN(DU_EXODDF_DU_ODDF_DISP_CDE),\n> - GPIO_FN(VI4_DATA2_B),\n> - GPIO_FN(MSIOF3_SYNC_E),\n> - GPIO_FN(PWM3_B),\n> - GPIO_IFN(IRQ3),\n> - GPIO_FN(QSTVB_QVE),\n> - GPIO_FN(DU_DOTCLKOUT1),\n> - GPIO_FN(VI4_DATA3_B),\n> - GPIO_FN(MSIOF3_SCK_E),\n> - GPIO_FN(PWM4_B),\n> - GPIO_IFN(IRQ4),\n> - GPIO_FN(QSTH_QHS),\n> - GPIO_FN(DU_EXHSYNC_DU_HSYNC),\n> - GPIO_FN(VI4_DATA4_B),\n> - GPIO_FN(MSIOF3_RXD_E),\n> - GPIO_FN(PWM5_B),\n> - GPIO_IFN(IRQ5),\n> - GPIO_FN(QSTB_QHE),\n> - GPIO_FN(DU_EXVSYNC_DU_VSYNC),\n> - GPIO_FN(VI4_DATA5_B),\n> - GPIO_FN(FSCLKST2x_B),\n> - GPIO_FN(MSIOF3_TXD_E),\n> - GPIO_FN(PWM6_B),\n> - GPIO_IFN(PWM0),\n> - GPIO_FN(AVB_AVTP_PPS),\n> - GPIO_FN(VI4_DATA6_B),\n> - GPIO_FN(IECLK_B),\n> - GPIO_IFN(PWM1_A),\n> - GPIO_FN(HRX3_D),\n> - GPIO_FN(VI4_DATA7_B),\n> - GPIO_FN(IERX_B),\n> - GPIO_IFN(PWM2_A),\n> - GPIO_FN(HTX3_D),\n> - GPIO_FN(IETX_B),\n> - GPIO_IFN(A0),\n> - GPIO_FN(LCDOUT16),\n> - GPIO_FN(MSIOF3_SYNC_B),\n> - GPIO_FN(VI4_DATA8),\n> - GPIO_FN(DU_DB0),\n> - GPIO_FN(PWM3_A),\n> -\n> - /* IPSR2 */\n> - GPIO_IFN(A1),\n> - GPIO_FN(LCDOUT17),\n> - GPIO_FN(MSIOF3_TXD_B),\n> - GPIO_FN(VI4_DATA9),\n> - GPIO_FN(DU_DB1),\n> - GPIO_FN(PWM4_A),\n> - GPIO_IFN(A2),\n> - GPIO_FN(LCDOUT18),\n> - GPIO_FN(MSIOF3_SCK_B),\n> - GPIO_FN(VI4_DATA10),\n> - GPIO_FN(DU_DB2),\n> - GPIO_FN(PWM5_A),\n> - GPIO_IFN(A3),\n> - GPIO_FN(LCDOUT19),\n> - GPIO_FN(MSIOF3_RXD_B),\n> - GPIO_FN(VI4_DATA11),\n> - GPIO_FN(DU_DB3),\n> - GPIO_FN(PWM6_A),\n> - GPIO_IFN(A4),\n> - GPIO_FN(LCDOUT20),\n> - GPIO_FN(MSIOF3_SS1_B),\n> - GPIO_FN(VI4_DATA12),\n> - GPIO_FN(VI5_DATA12),\n> - GPIO_FN(DU_DB4),\n> - GPIO_IFN(A5),\n> - GPIO_FN(LCDOUT21),\n> - GPIO_FN(MSIOF3_SS2_B),\n> - GPIO_FN(SCK4_B),\n> - GPIO_FN(VI4_DATA13),\n> - GPIO_FN(VI5_DATA13),\n> - GPIO_FN(DU_DB5),\n> - GPIO_IFN(A6),\n> - GPIO_FN(LCDOUT22),\n> - GPIO_FN(MSIOF2_SS1_A),\n> - GPIO_FN(RX4_B),\n> - GPIO_FN(VI4_DATA14),\n> - GPIO_FN(VI5_DATA14),\n> - GPIO_FN(DU_DB6),\n> - GPIO_IFN(A7),\n> - GPIO_FN(LCDOUT23),\n> - GPIO_FN(MSIOF2_SS2_A),\n> - GPIO_FN(TX4_B),\n> - GPIO_FN(VI4_DATA15),\n> - GPIO_FN(V15_DATA15),\n> - GPIO_FN(DU_DB7),\n> - GPIO_IFN(A8),\n> - GPIO_FN(RX3_B),\n> - GPIO_FN(MSIOF2_SYNC_A),\n> - GPIO_FN(HRX4_B),\n> - GPIO_FN(SDA6_A),\n> - GPIO_FN(AVB_AVTP_MATCH_B),\n> - GPIO_FN(PWM1_B),\n> -\n> - /* IPSR3 */\n> - GPIO_IFN(A9),\n> - GPIO_FN(MSIOF2_SCK_A),\n> - GPIO_FN(CTS4x_B),\n> - GPIO_FN(VI5_VSYNCx),\n> - GPIO_IFN(A10),\n> - GPIO_FN(MSIOF2_RXD_A),\n> - GPIO_FN(RTS4n_TANS_B),\n> - GPIO_FN(VI5_HSYNCx),\n> - GPIO_IFN(A11),\n> - GPIO_FN(TX3_B),\n> - GPIO_FN(MSIOF2_TXD_A),\n> - GPIO_FN(HTX4_B),\n> - GPIO_FN(HSCK4),\n> - GPIO_FN(VI5_FIELD),\n> - GPIO_FN(SCL6_A),\n> - GPIO_FN(AVB_AVTP_CAPTURE_B),\n> - GPIO_FN(PWM2_B),\n> - GPIO_IFN(A12),\n> - GPIO_FN(LCDOUT12),\n> - GPIO_FN(MSIOF3_SCK_C),\n> - GPIO_FN(HRX4_A),\n> - GPIO_FN(VI5_DATA8),\n> - GPIO_FN(DU_DG4),\n> - GPIO_IFN(A13),\n> - GPIO_FN(LCDOUT13),\n> - GPIO_FN(MSIOF3_SYNC_C),\n> - GPIO_FN(HTX4_A),\n> - GPIO_FN(VI5_DATA9),\n> - GPIO_FN(DU_DG5),\n> - GPIO_IFN(A14),\n> - GPIO_FN(LCDOUT14),\n> - GPIO_FN(MSIOF3_RXD_C),\n> - GPIO_FN(HCTS4x),\n> - GPIO_FN(VI5_DATA10),\n> - GPIO_FN(DU_DG6),\n> - GPIO_IFN(A15),\n> - GPIO_FN(LCDOUT15),\n> - GPIO_FN(MSIOF3_TXD_C),\n> - GPIO_FN(HRTS4x),\n> - GPIO_FN(VI5_DATA11),\n> - GPIO_FN(DU_DG7),\n> - GPIO_IFN(A16),\n> - GPIO_FN(LCDOUT8),\n> - GPIO_FN(VI4_FIELD),\n> - GPIO_FN(DU_DG0),\n> -\n> - /* IPSR4 */\n> - GPIO_IFN(A17),\n> - GPIO_FN(LCDOUT9),\n> - GPIO_FN(VI4_VSYNCx),\n> - GPIO_FN(DU_DG1),\n> - GPIO_IFN(A18),\n> - GPIO_FN(LCDOUT10),\n> - GPIO_FN(VI4_HSYNCx),\n> - GPIO_FN(DU_DG2),\n> - GPIO_IFN(A19),\n> - GPIO_FN(LCDOUT11),\n> - GPIO_FN(VI4_CLKENB),\n> - GPIO_FN(DU_DG3),\n> - GPIO_IFN(CS0x),\n> - GPIO_FN(VI5_CLKENB),\n> - GPIO_IFN(CS1x_A26),\n> - GPIO_FN(VI5_CLK),\n> - GPIO_FN(EX_WAIT0_B),\n> - GPIO_IFN(BSx),\n> - GPIO_FN(QSTVA_QVS),\n> - GPIO_FN(MSIOF3_SCK_D),\n> - GPIO_FN(SCK3),\n> - GPIO_FN(HSCK3),\n> - GPIO_FN(CAN1_TX),\n> - GPIO_FN(CANFD1_TX),\n> - GPIO_FN(IETX_A),\n> - GPIO_IFN(RDx),\n> - GPIO_FN(MSIOF3_SYNC_D),\n> - GPIO_FN(RX3_A),\n> - GPIO_FN(HRX3_A),\n> - GPIO_FN(CAN0_TX_A),\n> - GPIO_FN(CANFD0_TX_A),\n> - GPIO_IFN(RD_WRx),\n> - GPIO_FN(MSIOF3_RXD_D),\n> - GPIO_FN(TX3_A),\n> - GPIO_FN(HTX3_A),\n> - GPIO_FN(CAN0_RX_A),\n> - GPIO_FN(CANFD0_RX_A),\n> -\n> - /* IPSR5 */\n> - GPIO_IFN(WE0x),\n> - GPIO_FN(MSIIOF3_TXD_D),\n> - GPIO_FN(CTS3x),\n> - GPIO_FN(HCTS3x),\n> - GPIO_FN(SCL6_B),\n> - GPIO_FN(CAN_CLK),\n> - GPIO_FN(IECLK_A),\n> - GPIO_IFN(WE1x),\n> - GPIO_FN(MSIOF3_SS1_D),\n> - GPIO_FN(RTS3x_TANS),\n> - GPIO_FN(HRTS3x),\n> - GPIO_FN(SDA6_B),\n> - GPIO_FN(CAN1_RX),\n> - GPIO_FN(CANFD1_RX),\n> - GPIO_FN(IERX_A),\n> - GPIO_IFN(EX_WAIT0_A),\n> - GPIO_FN(QCLK),\n> - GPIO_FN(VI4_CLK),\n> - GPIO_FN(DU_DOTCLKOUT0),\n> - GPIO_IFN(D0),\n> - GPIO_FN(MSIOF2_SS1_B),\n> - GPIO_FN(MSIOF3_SCK_A),\n> - GPIO_FN(VI4_DATA16),\n> - GPIO_FN(VI5_DATA0),\n> - GPIO_IFN(D1),\n> - GPIO_FN(MSIOF2_SS2_B),\n> - GPIO_FN(MSIOF3_SYNC_A),\n> - GPIO_FN(VI4_DATA17),\n> - GPIO_FN(VI5_DATA1),\n> - GPIO_IFN(D2),\n> - GPIO_FN(MSIOF3_RXD_A),\n> - GPIO_FN(VI4_DATA18),\n> - GPIO_FN(VI5_DATA2),\n> - GPIO_IFN(D3),\n> - GPIO_FN(MSIOF3_TXD_A),\n> - GPIO_FN(VI4_DATA19),\n> - GPIO_FN(VI5_DATA3),\n> - GPIO_IFN(D4),\n> - GPIO_FN(MSIOF2_SCK_B),\n> - GPIO_FN(VI4_DATA20),\n> - GPIO_FN(VI5_DATA4),\n> -\n> - /* IPSR6 */\n> - GPIO_IFN(D5),\n> - GPIO_FN(MSIOF2_SYNC_B),\n> - GPIO_FN(VI4_DATA21),\n> - GPIO_FN(VI5_DATA5),\n> - GPIO_IFN(D6),\n> - GPIO_FN(MSIOF2_RXD_B),\n> - GPIO_FN(VI4_DATA22),\n> - GPIO_FN(VI5_DATA6),\n> - GPIO_IFN(D7),\n> - GPIO_FN(MSIOF2_TXD_B),\n> - GPIO_FN(VI4_DATA23),\n> - GPIO_FN(VI5_DATA7),\n> - GPIO_IFN(D8),\n> - GPIO_FN(LCDOUT0),\n> - GPIO_FN(MSIOF2_SCK_D),\n> - GPIO_FN(SCK4_C),\n> - GPIO_FN(VI4_DATA0_A),\n> - GPIO_FN(DU_DR0),\n> - GPIO_IFN(D9),\n> - GPIO_FN(LCDOUT1),\n> - GPIO_FN(MSIOF2_SYNC_D),\n> - GPIO_FN(VI4_DATA1_A),\n> - GPIO_FN(DU_DR1),\n> - GPIO_IFN(D10),\n> - GPIO_FN(LCDOUT2),\n> - GPIO_FN(MSIOF2_RXD_D),\n> - GPIO_FN(HRX3_B),\n> - GPIO_FN(VI4_DATA2_A),\n> - GPIO_FN(CTS4x_C),\n> - GPIO_FN(DU_DR2),\n> - GPIO_IFN(D11),\n> - GPIO_FN(LCDOUT3),\n> - GPIO_FN(MSIOF2_TXD_D),\n> - GPIO_FN(HTX3_B),\n> - GPIO_FN(VI4_DATA3_A),\n> - GPIO_FN(RTS4x_TANS_C),\n> - GPIO_FN(DU_DR3),\n> - GPIO_IFN(D12),\n> - GPIO_FN(LCDOUT4),\n> - GPIO_FN(MSIOF2_SS1_D),\n> - GPIO_FN(RX4_C),\n> - GPIO_FN(VI4_DATA4_A),\n> - GPIO_FN(DU_DR4),\n> -\n> - /* IPSR7 */\n> - GPIO_IFN(D13),\n> - GPIO_FN(LCDOUT5),\n> - GPIO_FN(MSIOF2_SS2_D),\n> - GPIO_FN(TX4_C),\n> - GPIO_FN(VI4_DATA5_A),\n> - GPIO_FN(DU_DR5),\n> - GPIO_IFN(D14),\n> - GPIO_FN(LCDOUT6),\n> - GPIO_FN(MSIOF3_SS1_A),\n> - GPIO_FN(HRX3_C),\n> - GPIO_FN(VI4_DATA6_A),\n> - GPIO_FN(DU_DR6),\n> - GPIO_FN(SCL6_C),\n> - GPIO_IFN(D15),\n> - GPIO_FN(LCDOUT7),\n> - GPIO_FN(MSIOF3_SS2_A),\n> - GPIO_FN(HTX3_C),\n> - GPIO_FN(VI4_DATA7_A),\n> - GPIO_FN(DU_DR7),\n> - GPIO_FN(SDA6_C),\n> - GPIO_FN(FSCLKST),\n> - GPIO_IFN(SD0_CLK),\n> - GPIO_FN(MSIOF1_SCK_E),\n> - GPIO_FN(STP_OPWM_0_B),\n> - GPIO_IFN(SD0_CMD),\n> - GPIO_FN(MSIOF1_SYNC_E),\n> - GPIO_FN(STP_IVCXO27_0_B),\n> - GPIO_IFN(SD0_DAT0),\n> - GPIO_FN(MSIOF1_RXD_E),\n> - GPIO_FN(TS_SCK0_B),\n> - GPIO_FN(STP_ISCLK_0_B),\n> - GPIO_IFN(SD0_DAT1),\n> - GPIO_FN(MSIOF1_TXD_E),\n> - GPIO_FN(TS_SPSYNC0_B),\n> - GPIO_FN(STP_ISSYNC_0_B),\n> -\n> - /* IPSR8 */\n> - GPIO_IFN(SD0_DAT2),\n> - GPIO_FN(MSIOF1_SS1_E),\n> - GPIO_FN(TS_SDAT0_B),\n> - GPIO_FN(STP_ISD_0_B),\n> - GPIO_IFN(SD0_DAT3),\n> - GPIO_FN(MSIOF1_SS2_E),\n> - GPIO_FN(TS_SDEN0_B),\n> - GPIO_FN(STP_ISEN_0_B),\n> - GPIO_IFN(SD1_CLK),\n> - GPIO_FN(MSIOF1_SCK_G),\n> - GPIO_FN(SIM0_CLK_A),\n> - GPIO_IFN(SD1_CMD),\n> - GPIO_FN(MSIOF1_SYNC_G),\n> - GPIO_FN(NFCEx_B),\n> - GPIO_FN(SIM0_D_A),\n> - GPIO_FN(STP_IVCXO27_1_B),\n> - GPIO_IFN(SD1_DAT0),\n> - GPIO_FN(SD2_DAT4),\n> - GPIO_FN(MSIOF1_RXD_G),\n> - GPIO_FN(NFWPx_B),\n> - GPIO_FN(TS_SCK1_B),\n> - GPIO_FN(STP_ISCLK_1_B),\n> - GPIO_IFN(SD1_DAT1),\n> - GPIO_FN(SD2_DAT5),\n> - GPIO_FN(MSIOF1_TXD_G),\n> - GPIO_FN(NFDATA14_B),\n> - GPIO_FN(TS_SPSYNC1_B),\n> - GPIO_FN(STP_ISSYNC_1_B),\n> - GPIO_IFN(SD1_DAT2),\n> - GPIO_FN(SD2_DAT6),\n> - GPIO_FN(MSIOF1_SS1_G),\n> - GPIO_FN(NFDATA15_B),\n> - GPIO_FN(TS_SDAT1_B),\n> - GPIO_FN(STP_IOD_1_B),\n> - GPIO_IFN(SD1_DAT3),\n> - GPIO_FN(SD2_DAT7),\n> - GPIO_FN(MSIOF1_SS2_G),\n> - GPIO_FN(NFRBx_B),\n> - GPIO_FN(TS_SDEN1_B),\n> - GPIO_FN(STP_ISEN_1_B),\n> -\n> - /* IPSR9 */\n> - GPIO_IFN(SD2_CLK),\n> - GPIO_FN(NFDATA8),\n> - GPIO_IFN(SD2_CMD),\n> - GPIO_FN(NFDATA9),\n> - GPIO_IFN(SD2_DAT0),\n> - GPIO_FN(NFDATA10),\n> - GPIO_IFN(SD2_DAT1),\n> - GPIO_FN(NFDATA11),\n> - GPIO_IFN(SD2_DAT2),\n> - GPIO_FN(NFDATA12),\n> - GPIO_IFN(SD2_DAT3),\n> - GPIO_FN(NFDATA13),\n> - GPIO_IFN(SD2_DS),\n> - GPIO_FN(NFALE),\n> - GPIO_FN(SATA_DEVSLP_B),\n> - GPIO_IFN(SD3_CLK),\n> - GPIO_FN(NFWEx),\n> -\n> - /* IPSR10 */\n> - GPIO_IFN(SD3_CMD),\n> - GPIO_FN(NFREx),\n> - GPIO_IFN(SD3_DAT0),\n> - GPIO_FN(NFDATA0),\n> - GPIO_IFN(SD3_DAT1),\n> - GPIO_FN(NFDATA1),\n> - GPIO_IFN(SD3_DAT2),\n> - GPIO_FN(NFDATA2),\n> - GPIO_IFN(SD3_DAT3),\n> - GPIO_FN(NFDATA3),\n> - GPIO_IFN(SD3_DAT4),\n> - GPIO_FN(SD2_CD_A),\n> - GPIO_FN(NFDATA4),\n> - GPIO_IFN(SD3_DAT5),\n> - GPIO_FN(SD2_WP_A),\n> - GPIO_FN(NFDATA5),\n> - GPIO_IFN(SD3_DAT6),\n> - GPIO_FN(SD3_CD),\n> - GPIO_FN(NFDATA6),\n> -\n> - /* IPSR11 */\n> - GPIO_IFN(SD3_DAT7),\n> - GPIO_FN(SD3_WP),\n> - GPIO_FN(NFDATA7),\n> - GPIO_IFN(SD3_DS),\n> - GPIO_FN(NFCLE),\n> - GPIO_IFN(SD0_CD),\n> - GPIO_FN(NFDATA14_A),\n> - GPIO_FN(SCL2_B),\n> - GPIO_FN(SIM0_RST_A),\n> - GPIO_IFN(SD0_WP),\n> - GPIO_FN(NFDATA15_A),\n> - GPIO_FN(SDA2_B),\n> - GPIO_IFN(SD1_CD),\n> - GPIO_FN(NFRBx_A),\n> - GPIO_FN(SIM0_CLK_B),\n> - GPIO_IFN(SD1_WP),\n> - GPIO_FN(NFCEx_A),\n> - GPIO_FN(SIM0_D_B),\n> - GPIO_IFN(SCK0),\n> - GPIO_FN(HSCK1_B),\n> - GPIO_FN(MSIOF1_SS2_B),\n> - GPIO_FN(AUDIO_CLKC_B),\n> - GPIO_FN(SDA2_A),\n> - GPIO_FN(SIM0_RST_B),\n> - GPIO_FN(STP_OPWM_0_C),\n> - GPIO_FN(RIF0_CLK_B),\n> - GPIO_FN(ADICHS2),\n> - GPIO_FN(SCK5_B),\n> - GPIO_IFN(RX0),\n> - GPIO_FN(HRX1_B),\n> - GPIO_FN(TS_SCK0_C),\n> - GPIO_FN(STP_ISCLK_0_C),\n> - GPIO_FN(RIF0_D0_B),\n> -\n> - /* IPSR12 */\n> - GPIO_IFN(TX0),\n> - GPIO_FN(HTX1_B),\n> - GPIO_FN(TS_SPSYNC0_C),\n> - GPIO_FN(STP_ISSYNC_0_C),\n> - GPIO_FN(RIF0_D1_B),\n> - GPIO_IFN(CTS0x),\n> - GPIO_FN(HCTS1x_B),\n> - GPIO_FN(MSIOF1_SYNC_B),\n> - GPIO_FN(TS_SPSYNC1_C),\n> - GPIO_FN(STP_ISSYNC_1_C),\n> - GPIO_FN(RIF1_SYNC_B),\n> - GPIO_FN(AUDIO_CLKOUT_C),\n> - GPIO_FN(ADICS_SAMP),\n> - GPIO_IFN(RTS0x_TANS),\n> - GPIO_FN(HRTS1x_B),\n> - GPIO_FN(MSIOF1_SS1_B),\n> - GPIO_FN(AUDIO_CLKA_B),\n> - GPIO_FN(SCL2_A),\n> - GPIO_FN(STP_IVCXO27_1_C),\n> - GPIO_FN(RIF0_SYNC_B),\n> - GPIO_FN(ADICHS1),\n> - GPIO_IFN(RX1_A),\n> - GPIO_FN(HRX1_A),\n> - GPIO_FN(TS_SDAT0_C),\n> - GPIO_FN(STP_ISD_0_C),\n> - GPIO_FN(RIF1_CLK_C),\n> - GPIO_IFN(TX1_A),\n> - GPIO_FN(HTX1_A),\n> - GPIO_FN(TS_SDEN0_C),\n> - GPIO_FN(STP_ISEN_0_C),\n> - GPIO_FN(RIF1_D0_C),\n> - GPIO_IFN(CTS1x),\n> - GPIO_FN(HCTS1x_A),\n> - GPIO_FN(MSIOF1_RXD_B),\n> - GPIO_FN(TS_SDEN1_C),\n> - GPIO_FN(STP_ISEN_1_C),\n> - GPIO_FN(RIF1_D0_B),\n> - GPIO_FN(ADIDATA),\n> - GPIO_IFN(RTS1x_TANS),\n> - GPIO_FN(HRTS1x_A),\n> - GPIO_FN(MSIOF1_TXD_B),\n> - GPIO_FN(TS_SDAT1_C),\n> - GPIO_FN(STP_ISD_1_C),\n> - GPIO_FN(RIF1_D1_B),\n> - GPIO_FN(ADICHS0),\n> - GPIO_IFN(SCK2),\n> - GPIO_FN(SCIF_CLK_B),\n> - GPIO_FN(MSIOF1_SCK_B),\n> - GPIO_FN(TS_SCK1_C),\n> - GPIO_FN(STP_ISCLK_1_C),\n> - GPIO_FN(RIF1_CLK_B),\n> - GPIO_FN(ADICLK),\n> -\n> - /* IPSR13 */\n> - GPIO_IFN(TX2_A),\n> - GPIO_FN(SD2_CD_B),\n> - GPIO_FN(SCL1_A),\n> - GPIO_FN(FMCLK_A),\n> - GPIO_FN(RIF1_D1_C),\n> - GPIO_FN(FSO_CFE_0x),\n> - GPIO_IFN(RX2_A),\n> - GPIO_FN(SD2_WP_B),\n> - GPIO_FN(SDA1_A),\n> - GPIO_FN(FMIN_A),\n> - GPIO_FN(RIF1_SYNC_C),\n> - GPIO_FN(FSO_CFE_1x),\n> - GPIO_IFN(HSCK0),\n> - GPIO_FN(MSIOF1_SCK_D),\n> - GPIO_FN(AUDIO_CLKB_A),\n> - GPIO_FN(SSI_SDATA1_B),\n> - GPIO_FN(TS_SCK0_D),\n> - GPIO_FN(STP_ISCLK_0_D),\n> - GPIO_FN(RIF0_CLK_C),\n> - GPIO_FN(RX5_B),\n> - GPIO_IFN(HRX0),\n> - GPIO_FN(MSIOF1_RXD_D),\n> - GPIO_FN(SSI_SDATA2_B),\n> - GPIO_FN(TS_SDEN0_D),\n> - GPIO_FN(STP_ISEN_0_D),\n> - GPIO_FN(RIF0_D0_C),\n> - GPIO_IFN(HTX0),\n> - GPIO_FN(MSIOF1_TXD_D),\n> - GPIO_FN(SSI_SDATA9_B),\n> - GPIO_FN(TS_SDAT0_D),\n> - GPIO_FN(STP_ISD_0_D),\n> - GPIO_FN(RIF0_D1_C),\n> - GPIO_IFN(HCTS0x),\n> - GPIO_FN(RX2_B),\n> - GPIO_FN(MSIOF1_SYNC_D),\n> - GPIO_FN(SSI_SCK9_A),\n> - GPIO_FN(TS_SPSYNC0_D),\n> - GPIO_FN(STP_ISSYNC_0_D),\n> - GPIO_FN(RIF0_SYNC_C),\n> - GPIO_FN(AUDIO_CLKOUT1_A),\n> - GPIO_IFN(HRTS0x),\n> - GPIO_FN(TX2_B),\n> - GPIO_FN(MSIOF1_SS1_D),\n> - GPIO_FN(SSI_WS9_A),\n> - GPIO_FN(STP_IVCXO27_0_D),\n> - GPIO_FN(BPFCLK_A),\n> - GPIO_FN(AUDIO_CLKOUT2_A),\n> - GPIO_IFN(MSIOF0_SYNC),\n> - GPIO_FN(AUDIO_CLKOUT_A),\n> - GPIO_FN(TX5_B),\n> - GPIO_FN(BPFCLK_D),\n> -\n> - /* IPSR14 */\n> - GPIO_IFN(MSIOF0_SS1),\n> - GPIO_FN(RX5_A),\n> - GPIO_FN(NFWPx_A),\n> - GPIO_FN(AUDIO_CLKA_C),\n> - GPIO_FN(SSI_SCK2_A),\n> - GPIO_FN(STP_IVCXO27_0_C),\n> - GPIO_FN(AUDIO_CLKOUT3_A),\n> - GPIO_FN(TCLK1_B),\n> - GPIO_IFN(MSIOF0_SS2),\n> - GPIO_FN(TX5_A),\n> - GPIO_FN(MSIOF1_SS2_D),\n> - GPIO_FN(AUDIO_CLKC_A),\n> - GPIO_FN(SSI_WS2_A),\n> - GPIO_FN(STP_OPWM_0_D),\n> - GPIO_FN(AUDIO_CLKOUT_D),\n> - GPIO_FN(SPEEDIN_B),\n> - GPIO_IFN(MLB_CLK),\n> - GPIO_FN(MSIOF1_SCK_F),\n> - GPIO_FN(SCL1_B),\n> - GPIO_IFN(MLB_SIG),\n> - GPIO_FN(RX1_B),\n> - GPIO_FN(MSIOF1_SYNC_F),\n> - GPIO_FN(SDA1_B),\n> - GPIO_IFN(MLB_DAT),\n> - GPIO_FN(TX1_B),\n> - GPIO_FN(MSIOF1_RXD_F),\n> - GPIO_IFN(SSI_SCK01239),\n> - GPIO_FN(MSIOF1_TXD_F),\n> - GPIO_FN(MOUT0),\n> - GPIO_IFN(SSI_WS01239),\n> - GPIO_FN(MSIOF1_SS1_F),\n> - GPIO_FN(MOUT1),\n> - GPIO_IFN(SSI_SDATA0),\n> - GPIO_FN(MSIOF1_SS2_F),\n> - GPIO_FN(MOUT2),\n> -\n> - /* IPSR15 */\n> - GPIO_IFN(SSI_SDATA1_A),\n> - GPIO_FN(MOUT5),\n> - GPIO_IFN(SSI_SDATA2_A),\n> - GPIO_FN(SSI_SCK1_B),\n> - GPIO_FN(MOUT6),\n> - GPIO_IFN(SSI_SCK34),\n> - GPIO_FN(MSIOF1_SS1_A),\n> - GPIO_FN(STP_OPWM_0_A),\n> - GPIO_IFN(SSI_WS34),\n> - GPIO_FN(HCTS2x_A),\n> - GPIO_FN(MSIOF1_SS2_A),\n> - GPIO_FN(STP_IVCXO27_0_A),\n> - GPIO_IFN(SSI_SDATA3),\n> - GPIO_FN(HRTS2x_A),\n> - GPIO_FN(MSIOF1_TXD_A),\n> - GPIO_FN(TS_SCK0_A),\n> - GPIO_FN(STP_ISCLK_0_A),\n> - GPIO_FN(RIF0_D1_A),\n> - GPIO_FN(RIF2_D0_A),\n> - GPIO_IFN(SSI_SCK4),\n> - GPIO_FN(HRX2_A),\n> - GPIO_FN(MSIOF1_SCK_A),\n> - GPIO_FN(TS_SDAT0_A),\n> - GPIO_FN(STP_ISD_0_A),\n> - GPIO_FN(RIF0_CLK_A),\n> - GPIO_FN(RIF2_CLK_A),\n> - GPIO_IFN(SSI_WS4),\n> - GPIO_FN(HTX2_A),\n> - GPIO_FN(MSIOF1_SYNC_A),\n> - GPIO_FN(TS_SDEN0_A),\n> - GPIO_FN(STP_ISEN_0_A),\n> - GPIO_FN(RIF0_SYNC_A),\n> - GPIO_FN(RIF2_SYNC_A),\n> - GPIO_IFN(SSI_SDATA4),\n> - GPIO_FN(HSCK2_A),\n> - GPIO_FN(MSIOF1_RXD_A),\n> - GPIO_FN(TS_SPSYNC0_A),\n> - GPIO_FN(STP_ISSYNC_0_A),\n> - GPIO_FN(RIF0_D0_A),\n> - GPIO_FN(RIF2_D1_A),\n> -\n> - /* IPSR16 */\n> - GPIO_IFN(SSI_SCK6),\n> - GPIO_FN(SIM0_RST_D),\n> - GPIO_IFN(SSI_WS6),\n> - GPIO_FN(SIM0_D_D),\n> - GPIO_IFN(SSI_SDATA6),\n> - GPIO_FN(SIM0_CLK_D),\n> - GPIO_FN(SATA_DEVSLP_A),\n> - GPIO_IFN(SSI_SCK78),\n> - GPIO_FN(HRX2_B),\n> - GPIO_FN(MSIOF1_SCK_C),\n> - GPIO_FN(TS_SCK1_A),\n> - GPIO_FN(STP_ISCLK_1_A),\n> - GPIO_FN(RIF1_CLK_A),\n> - GPIO_FN(RIF3_CLK_A),\n> - GPIO_IFN(SSI_WS78),\n> - GPIO_FN(HTX2_B),\n> - GPIO_FN(MSIOF1_SYNC_C),\n> - GPIO_FN(TS_SDAT1_A),\n> - GPIO_FN(STP_ISD_1_A),\n> - GPIO_FN(RIF1_SYNC_A),\n> - GPIO_FN(RIF3_SYNC_A),\n> - GPIO_IFN(SSI_SDATA7),\n> - GPIO_FN(HCTS2x_B),\n> - GPIO_FN(MSIOF1_RXD_C),\n> - GPIO_FN(TS_SDEN1_A),\n> - GPIO_FN(STP_ISEN_1_A),\n> - GPIO_FN(RIF1_D0_A),\n> - GPIO_FN(RIF3_D0_A),\n> - GPIO_FN(TCLK2_A),\n> - GPIO_IFN(SSI_SDATA8),\n> - GPIO_FN(HRTS2x_B),\n> - GPIO_FN(MSIOF1_TXD_C),\n> - GPIO_FN(TS_SPSYNC1_A),\n> - GPIO_FN(STP_ISSYNC_1_A),\n> - GPIO_FN(RIF1_D1_A),\n> - GPIO_FN(RIF3_D1_A),\n> - GPIO_IFN(SSI_SDATA9_A),\n> - GPIO_FN(HSCK2_B),\n> - GPIO_FN(MSIOF1_SS1_C),\n> - GPIO_FN(HSCK1_A),\n> - GPIO_FN(SSI_WS1_B),\n> - GPIO_FN(SCK1),\n> - GPIO_FN(STP_IVCXO27_1_A),\n> - GPIO_FN(SCK5_A),\n> -\n> - /* IPSR17 */\n> - GPIO_IFN(AUDIO_CLKA_A),\n> - GPIO_FN(CC5_OSCOUT),\n> - GPIO_IFN(AUDIO_CLKB_B),\n> - GPIO_FN(SCIF_CLK_A),\n> - GPIO_FN(STP_IVCXO27_1_D),\n> - GPIO_FN(REMOCON_A),\n> - GPIO_FN(TCLK1_A),\n> - GPIO_IFN(USB0_PWEN),\n> - GPIO_FN(SIM0_RST_C),\n> - GPIO_FN(TS_SCK1_D),\n> - GPIO_FN(STP_ISCLK_1_D),\n> - GPIO_FN(BPFCLK_B),\n> - GPIO_FN(RIF3_CLK_B),\n> - GPIO_FN(HSCK2_C),\n> - GPIO_IFN(USB0_OVC),\n> - GPIO_FN(SIM0_D_C),\n> - GPIO_FN(TS_SDAT1_D),\n> - GPIO_FN(STP_ISD_1_D),\n> - GPIO_FN(RIF3_SYNC_B),\n> - GPIO_FN(HRX2_C),\n> - GPIO_IFN(USB1_PWEN),\n> - GPIO_FN(SIM0_CLK_C),\n> - GPIO_FN(SSI_SCK1_A),\n> - GPIO_FN(TS_SCK0_E),\n> - GPIO_FN(STP_ISCLK_0_E),\n> - GPIO_FN(FMCLK_B),\n> - GPIO_FN(RIF2_CLK_B),\n> - GPIO_FN(SPEEDIN_A),\n> - GPIO_FN(HTX2_C),\n> - GPIO_IFN(USB1_OVC),\n> - GPIO_FN(MSIOF1_SS2_C),\n> - GPIO_FN(SSI_WS1_A),\n> - GPIO_FN(TS_SDAT0_E),\n> - GPIO_FN(STP_ISD_0_E),\n> - GPIO_FN(FMIN_B),\n> - GPIO_FN(RIF2_SYNC_B),\n> - GPIO_FN(REMOCON_B),\n> - GPIO_FN(HCTS2x_C),\n> - GPIO_IFN(USB30_PWEN),\n> - GPIO_FN(AUDIO_CLKOUT_B),\n> - GPIO_FN(SSI_SCK2_B),\n> - GPIO_FN(TS_SDEN1_D),\n> - GPIO_FN(STP_ISEN_1_D),\n> - GPIO_FN(STP_OPWM_0_E),\n> - GPIO_FN(RIF3_D0_B),\n> - GPIO_FN(TCLK2_B),\n> - GPIO_FN(TPU0TO0),\n> - GPIO_FN(BPFCLK_C),\n> - GPIO_FN(HRTS2x_C),\n> - GPIO_IFN(USB30_OVC),\n> - GPIO_FN(AUDIO_CLKOUT1_B),\n> - GPIO_FN(SSI_WS2_B),\n> - GPIO_FN(TS_SPSYNC1_D),\n> - GPIO_FN(STP_ISSYNC_1_D),\n> - GPIO_FN(STP_IVCXO27_0_E),\n> - GPIO_FN(RIF3_D1_B),\n> - GPIO_FN(FSO_TOEx),\n> - GPIO_FN(TPU0TO1),\n> -\n> - /* IPSR18 */\n> - GPIO_IFN(USB3_PWEN),\n> - GPIO_FN(AUDIO_CLKOUT2_B),\n> - GPIO_FN(SSI_SCK9_B),\n> - GPIO_FN(TS_SDEN0_E),\n> - GPIO_FN(STP_ISEN_0_E),\n> - GPIO_FN(RIF2_D0_B),\n> - GPIO_FN(TPU0TO2),\n> - GPIO_FN(FMCLK_C),\n> - GPIO_FN(FMCLK_D),\n> -\n> - GPIO_IFN(USB3_OVC),\n> - GPIO_FN(AUDIO_CLKOUT3_B),\n> - GPIO_FN(SSI_WS9_B),\n> - GPIO_FN(TS_SPSYNC0_E),\n> - GPIO_FN(STP_ISSYNC_0_E),\n> - GPIO_FN(RIF2_D1_B),\n> - GPIO_FN(TPU0TO3),\n> - GPIO_FN(FMIN_C),\n> - GPIO_FN(FMIN_D),\n> -};\n> -\n> -static struct pinmux_cfg_reg pinmux_config_regs[] = {\n> - /* GPSR0(0xE6060100) md[3:1] controls initial value */\n> - /* md[3:1] .. 0 : 0x0000FFFF */\n> - /* .. other : 0x00000000 */\n> - { PINMUX_CFG_REG(\"GPSR0\", 0xE6060100, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - GP_0_15_FN, GFN_D15,\n> - GP_0_14_FN, GFN_D14,\n> - GP_0_13_FN, GFN_D13,\n> - GP_0_12_FN, GFN_D12,\n> - GP_0_11_FN, GFN_D11,\n> - GP_0_10_FN, GFN_D10,\n> - GP_0_9_FN, GFN_D9,\n> - GP_0_8_FN, GFN_D8,\n> - GP_0_7_FN, GFN_D7,\n> - GP_0_6_FN, GFN_D6,\n> - GP_0_5_FN, GFN_D5,\n> - GP_0_4_FN, GFN_D4,\n> - GP_0_3_FN, GFN_D3,\n> - GP_0_2_FN, GFN_D2,\n> - GP_0_1_FN, GFN_D1,\n> - GP_0_0_FN, GFN_D0 }\n> - },\n> - /* GPSR1(0xE6060104) is md[3:1] controls initial value */\n> - /* md[3:1] .. 0 : 0x0EFFFFFF */\n> - /* .. other : 0x00000000 */\n> - { PINMUX_CFG_REG(\"GPSR1\", 0xE6060104, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_1_28_FN, GFN_CLKOUT,\n> - GP_1_27_FN, GFN_EX_WAIT0_A,\n> - GP_1_26_FN, GFN_WE1x,\n> - GP_1_25_FN, GFN_WE0x,\n> - GP_1_24_FN, GFN_RD_WRx,\n> - GP_1_23_FN, GFN_RDx,\n> - GP_1_22_FN, GFN_BSx,\n> - GP_1_21_FN, GFN_CS1x_A26,\n> - GP_1_20_FN, GFN_CS0x,\n> - GP_1_19_FN, GFN_A19,\n> - GP_1_18_FN, GFN_A18,\n> - GP_1_17_FN, GFN_A17,\n> - GP_1_16_FN, GFN_A16,\n> - GP_1_15_FN, GFN_A15,\n> - GP_1_14_FN, GFN_A14,\n> - GP_1_13_FN, GFN_A13,\n> - GP_1_12_FN, GFN_A12,\n> - GP_1_11_FN, GFN_A11,\n> - GP_1_10_FN, GFN_A10,\n> - GP_1_9_FN, GFN_A9,\n> - GP_1_8_FN, GFN_A8,\n> - GP_1_7_FN, GFN_A7,\n> - GP_1_6_FN, GFN_A6,\n> - GP_1_5_FN, GFN_A5,\n> - GP_1_4_FN, GFN_A4,\n> - GP_1_3_FN, GFN_A3,\n> - GP_1_2_FN, GFN_A2,\n> - GP_1_1_FN, GFN_A1,\n> - GP_1_0_FN, GFN_A0 }\n> - },\n> - /* GPSR2(0xE6060108) is md[3:1] controls */\n> - /* md[3:1] .. 0 : 0x000003C0 */\n> - /* .. other : 0x00000200 */\n> - { PINMUX_CFG_REG(\"GPSR2\", 0xE6060108, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - GP_2_14_FN, GFN_AVB_AVTP_CAPTURE_A,\n> - GP_2_13_FN, GFN_AVB_AVTP_MATCH_A,\n> - GP_2_12_FN, GFN_AVB_LINK,\n> - GP_2_11_FN, GFN_AVB_PHY_INT,\n> - GP_2_10_FN, GFN_AVB_MAGIC,\n> - GP_2_9_FN, GFN_AVB_MDC,\n> - GP_2_8_FN, GFN_PWM2_A,\n> - GP_2_7_FN, GFN_PWM1_A,\n> - GP_2_6_FN, GFN_PWM0,\n> - GP_2_5_FN, GFN_IRQ5,\n> - GP_2_4_FN, GFN_IRQ4,\n> - GP_2_3_FN, GFN_IRQ3,\n> - GP_2_2_FN, GFN_IRQ2,\n> - GP_2_1_FN, GFN_IRQ1,\n> - GP_2_0_FN, GFN_IRQ0 }\n> - },\n> -\n> - /* GPSR3 */\n> - { PINMUX_CFG_REG(\"GPSR3\", 0xE606010C, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - GP_3_15_FN, GFN_SD1_WP,\n> - GP_3_14_FN, GFN_SD1_CD,\n> - GP_3_13_FN, GFN_SD0_WP,\n> - GP_3_12_FN, GFN_SD0_CD,\n> - GP_3_11_FN, GFN_SD1_DAT3,\n> - GP_3_10_FN, GFN_SD1_DAT2,\n> - GP_3_9_FN, GFN_SD1_DAT1,\n> - GP_3_8_FN, GFN_SD1_DAT0,\n> - GP_3_7_FN, GFN_SD1_CMD,\n> - GP_3_6_FN, GFN_SD1_CLK,\n> - GP_3_5_FN, GFN_SD0_DAT3,\n> - GP_3_4_FN, GFN_SD0_DAT2,\n> - GP_3_3_FN, GFN_SD0_DAT1,\n> - GP_3_2_FN, GFN_SD0_DAT0,\n> - GP_3_1_FN, GFN_SD0_CMD,\n> - GP_3_0_FN, GFN_SD0_CLK }\n> - },\n> - /* GPSR4 */\n> - { PINMUX_CFG_REG(\"GPSR4\", 0xE6060110, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_4_17_FN, GFN_SD3_DS,\n> - GP_4_16_FN, GFN_SD3_DAT7,\n> -\n> - GP_4_15_FN, GFN_SD3_DAT6,\n> - GP_4_14_FN, GFN_SD3_DAT5,\n> - GP_4_13_FN, GFN_SD3_DAT4,\n> - GP_4_12_FN, GFN_SD3_DAT3,\n> - GP_4_11_FN, GFN_SD3_DAT2,\n> - GP_4_10_FN, GFN_SD3_DAT1,\n> - GP_4_9_FN, GFN_SD3_DAT0,\n> - GP_4_8_FN, GFN_SD3_CMD,\n> - GP_4_7_FN, GFN_SD3_CLK,\n> - GP_4_6_FN, GFN_SD2_DS,\n> - GP_4_5_FN, GFN_SD2_DAT3,\n> - GP_4_4_FN, GFN_SD2_DAT2,\n> - GP_4_3_FN, GFN_SD2_DAT1,\n> - GP_4_2_FN, GFN_SD2_DAT0,\n> - GP_4_1_FN, GFN_SD2_CMD,\n> - GP_4_0_FN, GFN_SD2_CLK }\n> - },\n> - /* GPSR5 */\n> - { PINMUX_CFG_REG(\"GPSR5\", 0xE6060114, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_5_25_FN, GFN_MLB_DAT,\n> - GP_5_24_FN, GFN_MLB_SIG,\n> - GP_5_23_FN, GFN_MLB_CLK,\n> - GP_5_22_FN, FN_MSIOF0_RXD,\n> - GP_5_21_FN, GFN_MSIOF0_SS2,\n> - GP_5_20_FN, FN_MSIOF0_TXD,\n> - GP_5_19_FN, GFN_MSIOF0_SS1,\n> - GP_5_18_FN, GFN_MSIOF0_SYNC,\n> - GP_5_17_FN, FN_MSIOF0_SCK,\n> - GP_5_16_FN, GFN_HRTS0x,\n> - GP_5_15_FN, GFN_HCTS0x,\n> - GP_5_14_FN, GFN_HTX0,\n> - GP_5_13_FN, GFN_HRX0,\n> - GP_5_12_FN, GFN_HSCK0,\n> - GP_5_11_FN, GFN_RX2_A,\n> - GP_5_10_FN, GFN_TX2_A,\n> - GP_5_9_FN, GFN_SCK2,\n> - GP_5_8_FN, GFN_RTS1x_TANS,\n> - GP_5_7_FN, GFN_CTS1x,\n> - GP_5_6_FN, GFN_TX1_A,\n> - GP_5_5_FN, GFN_RX1_A,\n> - GP_5_4_FN, GFN_RTS0x_TANS,\n> - GP_5_3_FN, GFN_CTS0x,\n> - GP_5_2_FN, GFN_TX0,\n> - GP_5_1_FN, GFN_RX0,\n> - GP_5_0_FN, GFN_SCK0 }\n> - },\n> - /* GPSR6 */\n> - { PINMUX_CFG_REG(\"GPSR6\", 0xE6060118, 32, 1) {\n> - GP_6_31_FN, GFN_USB3_OVC,\n> - GP_6_30_FN, GFN_USB3_PWEN,\n> - GP_6_29_FN, GFN_USB30_OVC,\n> - GP_6_28_FN, GFN_USB30_PWEN,\n> - GP_6_27_FN, GFN_USB1_OVC,\n> - GP_6_26_FN, GFN_USB1_PWEN,\n> - GP_6_25_FN, GFN_USB0_OVC,\n> - GP_6_24_FN, GFN_USB0_PWEN,\n> - GP_6_23_FN, GFN_AUDIO_CLKB_B,\n> - GP_6_22_FN, GFN_AUDIO_CLKA_A,\n> - GP_6_21_FN, GFN_SSI_SDATA9_A,\n> - GP_6_20_FN, GFN_SSI_SDATA8,\n> - GP_6_19_FN, GFN_SSI_SDATA7,\n> - GP_6_18_FN, GFN_SSI_WS78,\n> - GP_6_17_FN, GFN_SSI_SCK78,\n> - GP_6_16_FN, GFN_SSI_SDATA6,\n> - GP_6_15_FN, GFN_SSI_WS6,\n> - GP_6_14_FN, GFN_SSI_SCK6,\n> - GP_6_13_FN, FN_SSI_SDATA5,\n> - GP_6_12_FN, FN_SSI_WS5,\n> - GP_6_11_FN, FN_SSI_SCK5,\n> - GP_6_10_FN, GFN_SSI_SDATA4,\n> - GP_6_9_FN, GFN_SSI_WS4,\n> - GP_6_8_FN, GFN_SSI_SCK4,\n> - GP_6_7_FN, GFN_SSI_SDATA3,\n> - GP_6_6_FN, GFN_SSI_WS34,\n> - GP_6_5_FN, GFN_SSI_SCK34,\n> - GP_6_4_FN, GFN_SSI_SDATA2_A,\n> - GP_6_3_FN, GFN_SSI_SDATA1_A,\n> - GP_6_2_FN, GFN_SSI_SDATA0,\n> - GP_6_1_FN, GFN_SSI_WS01239,\n> - GP_6_0_FN, GFN_SSI_SCK01239 }\n> - },\n> - /* GPSR7 */\n> - { PINMUX_CFG_REG(\"GPSR7\", 0xE606011C, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_7_3_FN, FN_HDMI1_CEC,\n> - GP_7_2_FN, FN_HDMI0_CEC,\n> - GP_7_1_FN, FN_AVS2,\n> - GP_7_0_FN, FN_AVS1 }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR0\", 0xE6060200, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR0_31_28 [4] */\n> - IFN_IRQ1, FN_QPOLA, 0, FN_DU_DISP,\n> - FN_VI4_DATA1_B, FN_CAN0_RX_B, FN_CANFD0_RX_B, FN_MSIOF3_SS1_E,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_27_24 [4] */\n> - IFN_IRQ0, FN_QPOLB, 0, FN_DU_CDE,\n> - FN_VI4_DATA0_B, FN_CAN0_TX_B, FN_CANFD0_TX_B, FN_MSIOF3_SS2_E,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_23_20 [4] */\n> - IFN_AVB_AVTP_CAPTURE_A, 0, FN_MSIOF2_TXD_C, FN_RTS4x_TANS_A,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_19_16 [4] */\n> - IFN_AVB_AVTP_MATCH_A, 0, FN_MSIOF2_RXD_C, FN_CTS4x_A,\n> - 0, FN_FSCLKST2x_A, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_15_12 [4] */\n> - IFN_AVB_LINK, 0, FN_MSIOF2_SCK_C, FN_TX4_A,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_11_8 [4] */\n> - IFN_AVB_PHY_INT, 0, FN_MSIOF2_SYNC_C, FN_RX4_A,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_7_4 [4] */\n> - IFN_AVB_MAGIC, 0, FN_MSIOF2_SS1_C, FN_SCK4_A,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_3_0 [4] */\n> - IFN_AVB_MDC, 0, FN_MSIOF2_SS2_C, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR1\", 0xE6060204, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR1_31_28 [4] */\n> - IFN_A0, FN_LCDOUT16, FN_MSIOF3_SYNC_B, 0,\n> - FN_VI4_DATA8, 0, FN_DU_DB0, 0,\n> - 0, FN_PWM3_A, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_27_24 [4] */\n> - IFN_PWM2_A, 0, 0, FN_HTX3_D,\n> - 0, 0, 0, 0,\n> - 0, FN_IETX_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_23_20 [4] */\n> - IFN_PWM1_A, 0, 0, FN_HRX3_D,\n> - FN_VI4_DATA7_B, 0, 0, 0,\n> - 0, FN_IERX_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_19_16 [4] */\n> - IFN_PWM0, FN_AVB_AVTP_PPS, 0, 0,\n> - FN_VI4_DATA6_B, 0, 0, 0,\n> - 0, FN_IECLK_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_15_12 [4] */\n> - IFN_IRQ5, FN_QSTB_QHE, 0, FN_DU_EXVSYNC_DU_VSYNC,\n> - FN_VI4_DATA5_B, FN_FSCLKST2x_B, 0, FN_MSIOF3_TXD_E,\n> - 0, FN_PWM6_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_11_8 [4] */\n> - IFN_IRQ4, FN_QSTH_QHS, 0, FN_DU_EXHSYNC_DU_HSYNC,\n> - FN_VI4_DATA4_B, 0, 0, FN_MSIOF3_RXD_E,\n> - 0, FN_PWM5_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_7_4 [4] */\n> - IFN_IRQ3, FN_QSTVB_QVE, 0, FN_DU_DOTCLKOUT1,\n> - FN_VI4_DATA3_B, 0, 0, FN_MSIOF3_SCK_E,\n> - 0, FN_PWM4_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_3_0 [4] */\n> - IFN_IRQ2, FN_QCPV_QDE, 0, FN_DU_EXODDF_DU_ODDF_DISP_CDE,\n> - FN_VI4_DATA2_B, 0, 0, FN_MSIOF3_SYNC_E,\n> - 0, FN_PWM3_B, 0, 0,\n> - 0, 0, 0, 0\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR2\", 0xE6060208, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR2_31_28 [4] */\n> - IFN_A8, FN_RX3_B, FN_MSIOF2_SYNC_A, FN_HRX4_B,\n> - 0, 0, 0, FN_SDA6_A,\n> - FN_AVB_AVTP_MATCH_B, FN_PWM1_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_27_24 [4] */\n> - IFN_A7, FN_LCDOUT23, FN_MSIOF2_SS2_A, FN_TX4_B,\n> - FN_VI4_DATA15, FN_V15_DATA15, FN_DU_DB7, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_23_20 [4] */\n> - IFN_A6, FN_LCDOUT22, FN_MSIOF2_SS1_A, FN_RX4_B,\n> - FN_VI4_DATA14, FN_VI5_DATA14, FN_DU_DB6, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_19_16 [4] */\n> - IFN_A5, FN_LCDOUT21, FN_MSIOF3_SS2_B, FN_SCK4_B,\n> - FN_VI4_DATA13, FN_VI5_DATA13, FN_DU_DB5, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_15_12 [4] */\n> - IFN_A4, FN_LCDOUT20, FN_MSIOF3_SS1_B, 0,\n> - FN_VI4_DATA12, FN_VI5_DATA12, FN_DU_DB4, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_11_8 [4] */\n> - IFN_A3, FN_LCDOUT19, FN_MSIOF3_RXD_B, 0,\n> - FN_VI4_DATA11, 0, FN_DU_DB3, 0,\n> - 0, FN_PWM6_A, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_7_4 [4] */\n> - IFN_A2, FN_LCDOUT18, FN_MSIOF3_SCK_B, 0,\n> - FN_VI4_DATA10, 0, FN_DU_DB2, 0,\n> - 0, FN_PWM5_A, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_3_0 [4] */\n> - IFN_A1, FN_LCDOUT17, FN_MSIOF3_TXD_B, 0,\n> - FN_VI4_DATA9, 0, FN_DU_DB1, 0,\n> - 0, FN_PWM4_A, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR3\", 0xE606020C, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR3_31_28 [4] */\n> - IFN_A16, FN_LCDOUT8, 0, 0,\n> - FN_VI4_FIELD, 0, FN_DU_DG0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_27_24 [4] */\n> - IFN_A15, FN_LCDOUT15, FN_MSIOF3_TXD_C, 0,\n> - FN_HRTS4x, FN_VI5_DATA11, FN_DU_DG7, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_23_20 [4] */\n> - IFN_A14, FN_LCDOUT14, FN_MSIOF3_RXD_C, 0,\n> - FN_HCTS4x, FN_VI5_DATA10, FN_DU_DG6, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_19_16 [4] */\n> - IFN_A13, FN_LCDOUT13, FN_MSIOF3_SYNC_C, 0,\n> - FN_HTX4_A, FN_VI5_DATA9, FN_DU_DG5, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_15_12 [4] */\n> - IFN_A12, FN_LCDOUT12, FN_MSIOF3_SCK_C, 0,\n> - FN_HRX4_A, FN_VI5_DATA8, FN_DU_DG4, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_11_8 [4] */\n> - IFN_A11, FN_TX3_B, FN_MSIOF2_TXD_A, FN_HTX4_B,\n> - FN_HSCK4, FN_VI5_FIELD, 0, FN_SCL6_A,\n> - FN_AVB_AVTP_CAPTURE_B, FN_PWM2_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_7_4 [4] */\n> - IFN_A10, 0, FN_MSIOF2_RXD_A, FN_RTS4n_TANS_B,\n> - 0, FN_VI5_HSYNCx, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_3_0 [4] */\n> - IFN_A9, 0, FN_MSIOF2_SCK_A, FN_CTS4x_B,\n> - 0, FN_VI5_VSYNCx, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR4\", 0xE6060210, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR4_31_28 [4] */\n> - IFN_RD_WRx, 0, FN_MSIOF3_RXD_D, FN_TX3_A,\n> - FN_HTX3_A, 0, 0, 0,\n> - FN_CAN0_RX_A, FN_CANFD0_RX_A, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_27_24 [4] */\n> - IFN_RDx, 0, FN_MSIOF3_SYNC_D, FN_RX3_A,\n> - FN_HRX3_A, 0, 0, 0,\n> - FN_CAN0_TX_A, FN_CANFD0_TX_A, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_23_20 [4] */\n> - IFN_BSx, FN_QSTVA_QVS, FN_MSIOF3_SCK_D, FN_SCK3,\n> - FN_HSCK3, 0, 0, 0,\n> - FN_CAN1_TX, FN_CANFD1_TX, FN_IETX_A, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_19_16 [4] */\n> - IFN_CS1x_A26, 0, 0, 0,\n> - 0, FN_VI5_CLK, 0, FN_EX_WAIT0_B,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_15_12 [4] */\n> - IFN_CS0x, 0, 0, 0,\n> - 0, FN_VI5_CLKENB, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_11_8 [4] */\n> - IFN_A19, FN_LCDOUT11, 0, 0,\n> - FN_VI4_CLKENB, 0, FN_DU_DG3, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_7_4 [4] */\n> - IFN_A18, FN_LCDOUT10, 0, 0,\n> - FN_VI4_HSYNCx, 0, FN_DU_DG2, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_3_0 [4] */\n> - IFN_A17, FN_LCDOUT9, 0, 0,\n> - FN_VI4_VSYNCx, 0, FN_DU_DG1, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR5\", 0xE6060214, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR5_31_28 [4] */\n> - IFN_D4, FN_MSIOF2_SCK_B, 0, 0,\n> - FN_VI4_DATA20, FN_VI5_DATA4, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_27_24 [4] */\n> - IFN_D3, 0, FN_MSIOF3_TXD_A, 0,\n> - FN_VI4_DATA19, FN_VI5_DATA3, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_23_20 [4] */\n> - IFN_D2, 0, FN_MSIOF3_RXD_A, 0,\n> - FN_VI4_DATA18, FN_VI5_DATA2, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_19_16 [4] */\n> - IFN_D1, FN_MSIOF2_SS2_B, FN_MSIOF3_SYNC_A, 0,\n> - FN_VI4_DATA17, FN_VI5_DATA1, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_15_12 [4] */\n> - IFN_D0, FN_MSIOF2_SS1_B, FN_MSIOF3_SCK_A, 0,\n> - FN_VI4_DATA16, FN_VI5_DATA0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_11_8 [4] */\n> - IFN_EX_WAIT0_A, FN_QCLK, 0, 0,\n> - FN_VI4_CLK, 0, FN_DU_DOTCLKOUT0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_7_4 [4] */\n> - IFN_WE1x, 0, FN_MSIOF3_SS1_D, FN_RTS3x_TANS,\n> - FN_HRTS3x, 0, 0, FN_SDA6_B,\n> - FN_CAN1_RX, FN_CANFD1_RX, FN_IERX_A, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_3_0 [4] */\n> - IFN_WE0x, 0, FN_MSIIOF3_TXD_D, FN_CTS3x,\n> - FN_HCTS3x, 0, 0, FN_SCL6_B,\n> - FN_CAN_CLK, 0, FN_IECLK_A, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR6\", 0xE6060218, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR6_31_28 [4] */\n> - IFN_D12, FN_LCDOUT4, FN_MSIOF2_SS1_D, FN_RX4_C,\n> - FN_VI4_DATA4_A, 0, FN_DU_DR4, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_27_24 [4] */\n> - IFN_D11, FN_LCDOUT3, FN_MSIOF2_TXD_D, FN_HTX3_B,\n> - FN_VI4_DATA3_A, FN_RTS4x_TANS_C, FN_DU_DR3, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_23_20 [4] */\n> - IFN_D10, FN_LCDOUT2, FN_MSIOF2_RXD_D, FN_HRX3_B,\n> - FN_VI4_DATA2_A, FN_CTS4x_C, FN_DU_DR2, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_19_16 [4] */\n> - IFN_D9, FN_LCDOUT1, FN_MSIOF2_SYNC_D, 0,\n> - FN_VI4_DATA1_A, 0, FN_DU_DR1, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_15_12 [4] */\n> - IFN_D8, FN_LCDOUT0, FN_MSIOF2_SCK_D, FN_SCK4_C,\n> - FN_VI4_DATA0_A, 0, FN_DU_DR0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_11_8 [4] */\n> - IFN_D7, FN_MSIOF2_TXD_B, 0, 0,\n> - FN_VI4_DATA23, FN_VI5_DATA7, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_7_4 [4] */\n> - IFN_D6, FN_MSIOF2_RXD_B, 0, 0,\n> - FN_VI4_DATA22, FN_VI5_DATA6, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_3_0 [4] */\n> - IFN_D5, FN_MSIOF2_SYNC_B, 0, 0,\n> - FN_VI4_DATA21, FN_VI5_DATA5, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR7\", 0xE606021C, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR7_31_28 [4] */\n> - IFN_SD0_DAT1, 0, FN_MSIOF1_TXD_E, 0,\n> - 0, FN_TS_SPSYNC0_B, FN_STP_ISSYNC_0_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_27_24 [4] */\n> - IFN_SD0_DAT0, 0, FN_MSIOF1_RXD_E, 0,\n> - 0, FN_TS_SCK0_B, FN_STP_ISCLK_0_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_23_20 [4] */\n> - IFN_SD0_CMD, 0, FN_MSIOF1_SYNC_E, 0,\n> - 0, 0, FN_STP_IVCXO27_0_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_19_16 [4] */\n> - IFN_SD0_CLK, 0, FN_MSIOF1_SCK_E, 0,\n> - 0, 0, FN_STP_OPWM_0_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_15_12 [4] */\n> - FN_FSCLKST, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_11_8 [4] */\n> - IFN_D15, FN_LCDOUT7, FN_MSIOF3_SS2_A, FN_HTX3_C,\n> - FN_VI4_DATA7_A, 0, FN_DU_DR7, FN_SDA6_C,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_7_4 [4] */\n> - IFN_D14, FN_LCDOUT6, FN_MSIOF3_SS1_A, FN_HRX3_C,\n> - FN_VI4_DATA6_A, 0, FN_DU_DR6, FN_SCL6_C,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_3_0 [4] */\n> - IFN_D13, FN_LCDOUT5, FN_MSIOF2_SS2_D, FN_TX4_C,\n> - FN_VI4_DATA5_A, 0, FN_DU_DR5, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR8\", 0xE6060220, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR8_31_28 [4] */\n> - IFN_SD1_DAT3, FN_SD2_DAT7, FN_MSIOF1_SS2_G, FN_NFRBx_B,\n> - 0, FN_TS_SDEN1_B, FN_STP_ISEN_1_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_27_24 [4] */\n> - IFN_SD1_DAT2, FN_SD2_DAT6, FN_MSIOF1_SS1_G, FN_NFDATA15_B,\n> - 0, FN_TS_SDAT1_B, FN_STP_IOD_1_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_23_20 [4] */\n> - IFN_SD1_DAT1, FN_SD2_DAT5, FN_MSIOF1_TXD_G, FN_NFDATA14_B,\n> - 0, FN_TS_SPSYNC1_B, FN_STP_ISSYNC_1_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_19_16 [4] */\n> - IFN_SD1_DAT0, FN_SD2_DAT4, FN_MSIOF1_RXD_G, FN_NFWPx_B,\n> - 0, FN_TS_SCK1_B, FN_STP_ISCLK_1_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_15_12 [4] */\n> - IFN_SD1_CMD, 0, FN_MSIOF1_SYNC_G, FN_NFCEx_B,\n> - 0, FN_SIM0_D_A, FN_STP_IVCXO27_1_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_11_8 [4] */\n> - IFN_SD1_CLK, 0, FN_MSIOF1_SCK_G, 0,\n> - 0, FN_SIM0_CLK_A, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_7_4 [4] */\n> - IFN_SD0_DAT3, 0, FN_MSIOF1_SS2_E, 0,\n> - 0, FN_TS_SDEN0_B, FN_STP_ISEN_0_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_3_0 [4] */\n> - IFN_SD0_DAT2, 0, FN_MSIOF1_SS1_E, 0,\n> - 0, FN_TS_SDAT0_B, FN_STP_ISD_0_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR9\", 0xE6060224, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR9_31_28 [4] */\n> - IFN_SD3_CLK, 0, FN_NFWEx, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_27_24 [4] */\n> - IFN_SD2_DS, 0, FN_NFALE, 0,\n> - 0, 0, 0, 0,\n> - FN_SATA_DEVSLP_B, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_23_20 [4] */\n> - IFN_SD2_DAT3, 0, FN_NFDATA13, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_19_16 [4] */\n> - IFN_SD2_DAT2, 0, FN_NFDATA12, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_15_12 [4] */\n> - IFN_SD2_DAT1, 0, FN_NFDATA11, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_11_8 [4] */\n> - IFN_SD2_DAT0, 0, FN_NFDATA10, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_7_4 [4] */\n> - IFN_SD2_CMD, 0, FN_NFDATA9, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_3_0 [4] */\n> - IFN_SD2_CLK, 0, FN_NFDATA8, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR10\", 0xE6060228, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR10_31_28 [4] */\n> - IFN_SD3_DAT6, FN_SD3_CD, FN_NFDATA6, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_27_24 [4] */\n> - IFN_SD3_DAT5, FN_SD2_WP_A, FN_NFDATA5, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_23_20 [4] */\n> - IFN_SD3_DAT4, FN_SD2_CD_A, FN_NFDATA4, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_19_16 [4] */\n> - IFN_SD3_DAT3, 0, FN_NFDATA3, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_15_12 [4] */\n> - IFN_SD3_DAT2, 0, FN_NFDATA2, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_11_8 [4] */\n> - IFN_SD3_DAT1, 0, FN_NFDATA1, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_7_4 [4] */\n> - IFN_SD3_DAT0, 0, FN_NFDATA0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_3_0 [4] */\n> - IFN_SD3_CMD, 0, FN_NFREx, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR11\", 0xE606022C, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR11_31_28 [4] */\n> - IFN_RX0, FN_HRX1_B, 0, 0,\n> - 0, FN_TS_SCK0_C, FN_STP_ISCLK_0_C, FN_RIF0_D0_B,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR11_27_24 [4] */\n> - IFN_SCK0, FN_HSCK1_B, FN_MSIOF1_SS2_B, FN_AUDIO_CLKC_B,\n> - FN_SDA2_A, FN_SIM0_RST_B, FN_STP_OPWM_0_C, FN_RIF0_CLK_B,\n> - FN_ADICHS2, FN_SCK5_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR11_23_20 [4] */\n> - IFN_SD1_WP, 0, FN_NFCEx_A, 0,\n> - 0, FN_SIM0_D_B, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR11_19_16 [4] */\n> - IFN_SD1_CD, 0, FN_NFRBx_A, 0,\n> - 0, FN_SIM0_CLK_B, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR11_15_12 [4] */\n> - IFN_SD0_WP, 0, FN_NFDATA15_A, 0,\n> - FN_SDA2_B, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR11_11_8 [4] */\n> - IFN_SD0_CD, 0, FN_NFDATA14_A, 0,\n> - FN_SCL2_B, FN_SIM0_RST_A, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR11_7_4 [4] */\n> - IFN_SD3_DS, 0, FN_NFCLE, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR11_3_0 [4] */\n> - IFN_SD3_DAT7, FN_SD3_WP, FN_NFDATA7, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR12\", 0xE6060230, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR12_31_28 [4] */\n> - IFN_SCK2, FN_SCIF_CLK_B, FN_MSIOF1_SCK_B, 0,\n> - 0, FN_TS_SCK1_C, FN_STP_ISCLK_1_C, FN_RIF1_CLK_B,\n> - 0, FN_ADICLK, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR12_27_24 [4] */\n> - IFN_RTS1x_TANS, FN_HRTS1x_A, FN_MSIOF1_TXD_B, 0,\n> - 0, FN_TS_SDAT1_C, FN_STP_ISD_1_C, FN_RIF1_D1_B,\n> - 0, FN_ADICHS0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR12_23_20 [4] */\n> - IFN_CTS1x, FN_HCTS1x_A, FN_MSIOF1_RXD_B, 0,\n> - 0, FN_TS_SDEN1_C, FN_STP_ISEN_1_C, FN_RIF1_D0_B,\n> - 0, FN_ADIDATA, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR12_19_16 [4] */\n> - IFN_TX1_A, FN_HTX1_A, 0, 0,\n> - 0, FN_TS_SDEN0_C, FN_STP_ISEN_0_C, FN_RIF1_D0_C,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR12_15_12 [4] */\n> - IFN_RX1_A, FN_HRX1_A, 0, 0,\n> - 0, FN_TS_SDAT0_C, FN_STP_ISD_0_C, FN_RIF1_CLK_C,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR12_11_8 [4] */\n> - IFN_RTS0x_TANS, FN_HRTS1x_B, FN_MSIOF1_SS1_B, FN_AUDIO_CLKA_B,\n> - FN_SCL2_A, 0, FN_STP_IVCXO27_1_C, FN_RIF0_SYNC_B,\n> - 0, FN_ADICHS1, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR12_7_4 [4] */\n> - IFN_CTS0x, FN_HCTS1x_B, FN_MSIOF1_SYNC_B, 0,\n> - 0, FN_TS_SPSYNC1_C, FN_STP_ISSYNC_1_C, FN_RIF1_SYNC_B,\n> - FN_AUDIO_CLKOUT_C, FN_ADICS_SAMP, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR12_3_0 [4] */\n> - IFN_TX0, FN_HTX1_B, 0, 0,\n> - 0, FN_TS_SPSYNC0_C, FN_STP_ISSYNC_0_C, FN_RIF0_D1_B,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR13\", 0xE6060234, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR13_31_28 [4] */\n> - IFN_MSIOF0_SYNC, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - FN_AUDIO_CLKOUT_A, 0, FN_TX5_B, 0,\n> - 0, FN_BPFCLK_D, 0, 0,\n> - /* IPSR13_27_24 [4] */\n> - IFN_HRTS0x, FN_TX2_B, FN_MSIOF1_SS1_D, 0,\n> - FN_SSI_WS9_A, 0, FN_STP_IVCXO27_0_D, FN_BPFCLK_A,\n> - FN_AUDIO_CLKOUT2_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR13_23_20 [4] */\n> - IFN_HCTS0x, FN_RX2_B, FN_MSIOF1_SYNC_D, 0,\n> - FN_SSI_SCK9_A, FN_TS_SPSYNC0_D,\n> - FN_STP_ISSYNC_0_D, FN_RIF0_SYNC_C,\n> - FN_AUDIO_CLKOUT1_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR13_19_16 [4] */\n> - IFN_HTX0, 0, FN_MSIOF1_TXD_D, 0,\n> - FN_SSI_SDATA9_B, FN_TS_SDAT0_D, FN_STP_ISD_0_D, FN_RIF0_D1_C,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR13_15_12 [4] */\n> - IFN_HRX0, 0, FN_MSIOF1_RXD_D, 0,\n> - FN_SSI_SDATA2_B, FN_TS_SDEN0_D, FN_STP_ISEN_0_D, FN_RIF0_D0_C,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR13_11_8 [4] */\n> - IFN_HSCK0, 0, FN_MSIOF1_SCK_D, FN_AUDIO_CLKB_A,\n> - FN_SSI_SDATA1_B, FN_TS_SCK0_D, FN_STP_ISCLK_0_D, FN_RIF0_CLK_C,\n> - 0, 0, FN_RX5_B, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR13_7_4 [4] */\n> - IFN_RX2_A, 0, 0, FN_SD2_WP_B,\n> - FN_SDA1_A, 0, FN_FMIN_A, FN_RIF1_SYNC_C,\n> - 0, FN_FSO_CFE_1x, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR13_3_0 [4] */\n> - IFN_TX2_A, 0, 0, FN_SD2_CD_B,\n> - FN_SCL1_A, 0, FN_FMCLK_A, FN_RIF1_D1_C,\n> - 0, FN_FSO_CFE_0x, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR14\", 0xE6060238, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR14_31_28 [4] */\n> - IFN_SSI_SDATA0, 0, FN_MSIOF1_SS2_F, 0,\n> - 0, 0, 0, FN_MOUT2,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR14_27_24 [4] */\n> - IFN_SSI_WS01239, 0, FN_MSIOF1_SS1_F, 0,\n> - 0, 0, 0, 0, FN_MOUT1,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR14_23_20 [4] */\n> - IFN_SSI_SCK01239, 0, FN_MSIOF1_TXD_F, 0,\n> - 0, 0, 0, FN_MOUT0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR14_19_16 [4] */\n> - IFN_MLB_DAT, FN_TX1_B, FN_MSIOF1_RXD_F, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR14_15_12 [4] */\n> - IFN_MLB_SIG, FN_RX1_B, FN_MSIOF1_SYNC_F, 0,\n> - FN_SDA1_B, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR14_11_8 [4] */\n> - IFN_MLB_CLK, 0, FN_MSIOF1_SCK_F, 0,\n> - FN_SCL1_B, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR14_7_4 [4] */\n> - IFN_MSIOF0_SS2, FN_TX5_A, FN_MSIOF1_SS2_D, FN_AUDIO_CLKC_A,\n> - FN_SSI_WS2_A, 0, FN_STP_OPWM_0_D, 0,\n> - FN_AUDIO_CLKOUT_D, 0, FN_SPEEDIN_B, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR14_3_0 [4] */\n> - IFN_MSIOF0_SS1, FN_RX5_A, FN_NFWPx_A, FN_AUDIO_CLKA_C,\n> - FN_SSI_SCK2_A, 0, FN_STP_IVCXO27_0_C, 0,\n> - FN_AUDIO_CLKOUT3_A, 0, FN_TCLK1_B, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR15\", 0xE606023C, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR15_31_28 [4] */\n> - IFN_SSI_SDATA4, FN_HSCK2_A, FN_MSIOF1_RXD_A, 0,\n> - 0, FN_TS_SPSYNC0_A, FN_STP_ISSYNC_0_A, FN_RIF0_D0_A,\n> - FN_RIF2_D1_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_27_24 [4] */\n> - IFN_SSI_WS4, FN_HTX2_A, FN_MSIOF1_SYNC_A, 0,\n> - 0, FN_TS_SDEN0_A, FN_STP_ISEN_0_A, FN_RIF0_SYNC_A,\n> - FN_RIF2_SYNC_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_23_20 [4] */\n> - IFN_SSI_SCK4, FN_HRX2_A, FN_MSIOF1_SCK_A, 0,\n> - 0, FN_TS_SDAT0_A, FN_STP_ISD_0_A, FN_RIF0_CLK_A,\n> - FN_RIF2_CLK_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_19_16 [4] */\n> - IFN_SSI_SDATA3, FN_HRTS2x_A, FN_MSIOF1_TXD_A, 0,\n> - 0, FN_TS_SCK0_A, FN_STP_ISCLK_0_A, FN_RIF0_D1_A,\n> - FN_RIF2_D0_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_15_12 [4] */\n> - IFN_SSI_WS34, FN_HCTS2x_A, FN_MSIOF1_SS2_A, 0,\n> - 0, 0, FN_STP_IVCXO27_0_A, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_11_8 [4] */\n> - IFN_SSI_SCK34, 0, FN_MSIOF1_SS1_A, 0,\n> - 0, 0, FN_STP_OPWM_0_A, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_7_4 [4] */\n> - IFN_SSI_SDATA2_A, 0, 0, 0,\n> - FN_SSI_SCK1_B, 0, 0, FN_MOUT6,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_3_0 [4] */\n> - IFN_SSI_SDATA1_A, 0, 0, 0,\n> - 0, 0, 0, FN_MOUT5,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR16\", 0xE6060240, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR16_31_28 [4] */\n> - IFN_SSI_SDATA9_A, FN_HSCK2_B, FN_MSIOF1_SS1_C, FN_HSCK1_A,\n> - FN_SSI_WS1_B, FN_SCK1, FN_STP_IVCXO27_1_A, FN_SCK5_A,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR16_27_24 [4] */\n> - IFN_SSI_SDATA8, FN_HRTS2x_B, FN_MSIOF1_TXD_C, 0,\n> - 0, FN_TS_SPSYNC1_A, FN_STP_ISSYNC_1_A, FN_RIF1_D1_A,\n> - FN_RIF3_D1_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR16_23_20 [4] */\n> - IFN_SSI_SDATA7, FN_HCTS2x_B, FN_MSIOF1_RXD_C, 0,\n> - 0, FN_TS_SDEN1_A, FN_STP_ISEN_1_A, FN_RIF1_D0_A,\n> - FN_RIF3_D0_A, 0, FN_TCLK2_A, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR16_19_16 [4] */\n> - IFN_SSI_WS78, FN_HTX2_B, FN_MSIOF1_SYNC_C, 0,\n> - 0, FN_TS_SDAT1_A, FN_STP_ISD_1_A, FN_RIF1_SYNC_A,\n> - FN_RIF3_SYNC_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR16_15_12 [4] */\n> - IFN_SSI_SCK78, FN_HRX2_B, FN_MSIOF1_SCK_C, 0,\n> - 0, FN_TS_SCK1_A, FN_STP_ISCLK_1_A, FN_RIF1_CLK_A,\n> - FN_RIF3_CLK_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR16_11_8 [4] */\n> - IFN_SSI_SDATA6, 0, 0, FN_SIM0_CLK_D,\n> - 0, 0, 0, 0,\n> - FN_SATA_DEVSLP_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR16_7_4 [4] */\n> - IFN_SSI_WS6, 0, 0, FN_SIM0_D_D,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR16_3_0 [4] */\n> - IFN_SSI_SCK6, 0, 0, FN_SIM0_RST_D,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR17\", 0xE6060244, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR17_31_28 [4] */\n> - IFN_USB30_OVC, 0, 0, FN_AUDIO_CLKOUT1_B,\n> - FN_SSI_WS2_B, FN_TS_SPSYNC1_D, FN_STP_ISSYNC_1_D, FN_STP_IVCXO27_0_E,\n> - FN_RIF3_D1_B, 0, FN_FSO_TOEx, FN_TPU0TO1,\n> - 0, 0, 0, 0,\n> - /* IPSR17_27_24 [4] */\n> - IFN_USB30_PWEN, 0, 0, FN_AUDIO_CLKOUT_B,\n> - FN_SSI_SCK2_B, FN_TS_SDEN1_D, FN_STP_ISEN_1_D, FN_STP_OPWM_0_E,\n> - FN_RIF3_D0_B, 0, FN_TCLK2_B, FN_TPU0TO0,\n> - FN_BPFCLK_C, FN_HRTS2x_C, 0, 0,\n> - /* IPSR17_23_20 [4] */\n> - IFN_USB1_OVC, 0, FN_MSIOF1_SS2_C, 0,\n> - FN_SSI_WS1_A, FN_TS_SDAT0_E, FN_STP_ISD_0_E, FN_FMIN_B,\n> - FN_RIF2_SYNC_B, 0, FN_REMOCON_B, 0,\n> - 0, FN_HCTS2x_C, 0, 0,\n> - /* IPSR17_19_16 [4] */\n> - IFN_USB1_PWEN, 0, 0, FN_SIM0_CLK_C,\n> - FN_SSI_SCK1_A, FN_TS_SCK0_E, FN_STP_ISCLK_0_E, FN_FMCLK_B,\n> - FN_RIF2_CLK_B, 0, FN_SPEEDIN_A, 0,\n> - 0, FN_HTX2_C, 0, 0,\n> - /* IPSR17_15_12 [4] */\n> - IFN_USB0_OVC, 0, 0, FN_SIM0_D_C,\n> - 0, FN_TS_SDAT1_D, FN_STP_ISD_1_D, 0,\n> - FN_RIF3_SYNC_B, 0, 0, 0,\n> - 0, FN_HRX2_C, 0, 0,\n> - /* IPSR17_11_8 [4] */\n> - IFN_USB0_PWEN, 0, 0, FN_SIM0_RST_C,\n> - 0, FN_TS_SCK1_D, FN_STP_ISCLK_1_D, FN_BPFCLK_B,\n> - FN_RIF3_CLK_B, 0, 0, 0,\n> - 0, FN_HSCK2_C, 0, 0,\n> - /* IPSR17_7_4 [4] */\n> - IFN_AUDIO_CLKB_B, FN_SCIF_CLK_A, 0, 0,\n> - 0, 0, FN_STP_IVCXO27_1_D, FN_REMOCON_A,\n> - 0, 0, FN_TCLK1_A, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR17_3_0 [4] */\n> - IFN_AUDIO_CLKA_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, FN_CC5_OSCOUT,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR18\", 0xE6060248, 32,\n> - 1, 1, 1, 1, 1, 1, 1, 1,\n> - 1, 1, 1, 1, 1, 1, 1, 1,\n> - 1, 1, 1, 1, 1, 1, 1, 1,\n> - 4, 4) {\n> - /* reserved [31..24] */\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - /* reserved [23..16] */\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - /* reserved [15..8] */\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - /* IPSR18_7_4 [4] */\n> - IFN_USB3_OVC, 0, 0, FN_AUDIO_CLKOUT3_B,\n> - FN_SSI_WS9_B, FN_TS_SPSYNC0_E, FN_STP_ISSYNC_0_E, 0,\n> - FN_RIF2_D1_B, 0, 0, FN_TPU0TO3,\n> - FN_FMIN_C, FN_FMIN_D, 0, 0,\n> - /* IPSR18_3_0 [4] */\n> - IFN_USB3_PWEN, 0, 0, FN_AUDIO_CLKOUT2_B,\n> - FN_SSI_SCK9_B, FN_TS_SDEN0_E, FN_STP_ISEN_0_E, 0,\n> - FN_RIF2_D0_B, 0, 0, FN_TPU0TO2,\n> - FN_FMCLK_C, FN_FMCLK_D, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"MOD_SEL0\", 0xE6060500, 32,\n> - 3, 2, 3, 1, 1, 1, 1, 1, 2, 1,\n> - 1, 2, 1, 1, 1, 2, 2, 1, 2, 1, 1, 1) {\n> - /* MOD_SEL0 */\n> - /* sel_msiof3[3](0,1,2,3,4) */\n> - FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,\n> - FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,\n> - FN_SEL_MSIOF3_4, 0,\n> - 0, 0,\n> - /* sel_msiof2[2](0,1,2,3) */\n> - FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,\n> - FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,\n> - /* sel_msiof1[3](0,1,2,3,4,5,6) */\n> - FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,\n> - FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,\n> - FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,\n> - FN_SEL_MSIOF1_6, 0,\n> - /* sel_lbsc[1](0,1) */\n> - FN_SEL_LBSC_0, FN_SEL_LBSC_1,\n> - /* sel_iebus[1](0,1) */\n> - FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,\n> - /* sel_i2c2[1](0,1) */\n> - FN_SEL_I2C2_0, FN_SEL_I2C2_1,\n> - /* sel_i2c1[1](0,1) */\n> - FN_SEL_I2C1_0, FN_SEL_I2C1_1,\n> - /* sel_hscif4[1](0,1) */\n> - FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,\n> - /* sel_hscif3[2](0,1,2,3) */\n> - FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,\n> - FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,\n> - /* sel_hscif1[1](0,1) */\n> - FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,\n> - /* reserved[1] */\n> - 0, 0,\n> - /* sel_hscif2[2](0,1,2) */\n> - FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,\n> - FN_SEL_HSCIF2_2, 0,\n> - /* sel_etheravb[1](0,1) */\n> - FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,\n> - /* sel_drif3[1](0,1) */\n> - FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,\n> - /* sel_drif2[1](0,1) */\n> - FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,\n> - /* sel_drif1[2](0,1,2) */\n> - FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,\n> - FN_SEL_DRIF1_2, 0,\n> - /* sel_drif0[2](0,1,2) */\n> - FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,\n> - FN_SEL_DRIF0_2, 0,\n> - /* sel_canfd0[1](0,1) */\n> - FN_SEL_CANFD_0, FN_SEL_CANFD_1,\n> - /* sel_adg_a[2](0,1,2) */\n> - FN_SEL_ADG_A_0, FN_SEL_ADG_A_1,\n> - FN_SEL_ADG_A_2, 0,\n> - /* reserved[3]*/\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"MOD_SEL1\", 0xE6060504, 32,\n> - 2, 3, 1, 2,\n> - 3, 1, 1, 2, 1,\n> - 2, 1, 1, 1, 1, 1, 1,\n> - 1, 1, 1, 1, 1, 1, 1, 1) {\n> - /* sel_tsif1[2](0,1,2,3) */\n> - FN_SEL_TSIF1_0, FN_SEL_TSIF1_1,\n> - FN_SEL_TSIF1_2, FN_SEL_TSIF1_3,\n> - /* sel_tsif0[3](0,1,2,3,4) */\n> - FN_SEL_TSIF0_0, FN_SEL_TSIF0_1,\n> - FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,\n> - FN_SEL_TSIF0_4, 0,\n> - 0, 0,\n> - /* sel_timer_tmu1[1](0,1) */\n> - FN_SEL_TIMER_TMU1_0, FN_SEL_TIMER_TMU1_1,\n> - /* sel_ssp1_1[2](0,1,2,3) */\n> - FN_SEL_SSP1_1_0, FN_SEL_SSP1_1_1,\n> - FN_SEL_SSP1_1_2, FN_SEL_SSP1_1_3,\n> - /* sel_ssp1_0[3](0,1,2,3,4) */\n> - FN_SEL_SSP1_0_0, FN_SEL_SSP1_0_1,\n> - FN_SEL_SSP1_0_2, FN_SEL_SSP1_0_3,\n> - FN_SEL_SSP1_0_4, 0,\n> - 0, 0,\n> - /* sel_ssi1[1](0,1) */\n> - FN_SEL_SSI_0, FN_SEL_SSI_1,\n> - /* sel_speed_pulse_if[1](0,1) */\n> - FN_SEL_SPEED_PULSE_IF_0, FN_SEL_SPEED_PULSE_IF_1,\n> - /* sel_simcard[2](0,1,2,3) */\n> - FN_SEL_SIMCARD_0, FN_SEL_SIMCARD_1,\n> - FN_SEL_SIMCARD_2, FN_SEL_SIMCARD_3,\n> - /* sel_sdhi2[1](0,1) */\n> - FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,\n> - /* sel_scif4[2](0,1,2) */\n> - FN_SEL_SCIF4_0, FN_SEL_SCIF4_1,\n> - FN_SEL_SCIF4_2, 0,\n> - /* sel_scif3[1](0,1) */\n> - FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,\n> - /* sel_scif2[1](0,1) */\n> - FN_SEL_SCIF2_0, FN_SEL_SCIF2_1,\n> - /* sel_scif1[1](0,1) */\n> - FN_SEL_SCIF1_0, FN_SEL_SCIF1_1,\n> - /* sel_scif[1](0,1) */\n> - FN_SEL_SCIF_0, FN_SEL_SCIF_1,\n> - /* sel_remocon[1](0,1) */\n> - FN_SEL_REMOCON_0, FN_SEL_REMOCON_1,\n> - /* reserved[8..7] */\n> - 0, 0,\n> - 0, 0,\n> - /* sel_rcan0[1](0,1) */\n> - FN_SEL_RCAN_0, FN_SEL_RCAN_1,\n> - /* sel_pwm6[1](0,1) */\n> - FN_SEL_PWM6_0, FN_SEL_PWM6_1,\n> - /* sel_pwm5[1](0,1) */\n> - FN_SEL_PWM5_0, FN_SEL_PWM5_1,\n> - /* sel_pwm4[1](0,1) */\n> - FN_SEL_PWM4_0, FN_SEL_PWM4_1,\n> - /* sel_pwm3[1](0,1) */\n> - FN_SEL_PWM3_0, FN_SEL_PWM3_1,\n> - /* sel_pwm2[1](0,1) */\n> - FN_SEL_PWM2_0, FN_SEL_PWM2_1,\n> - /* sel_pwm1[1](0,1) */\n> - FN_SEL_PWM1_0, FN_SEL_PWM1_1,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"MOD_SEL2\", 0xE6060508, 32,\n> - 1, 1, 1, 2, 1, 3, 1, 1, 1, 1, 1, 1, 1,\n> - 1, 1, 1, 1, 1, 1, 1, 1,\n> - 1, 1, 1, 1, 1, 1, 1, 1) {\n> - /* i2c_sel_5[1](0,1) */\n> - FN_I2C_SEL_5_0, FN_I2C_SEL_5_1,\n> - /* i2c_sel_3[1](0,1) */\n> - FN_I2C_SEL_3_0, FN_I2C_SEL_3_1,\n> - /* i2c_sel_0[1](0,1) */\n> - FN_I2C_SEL_0_0, FN_I2C_SEL_0_1,\n> - /* sel_fm[2](0,1,2,3) */\n> - FN_SEL_FM_0, FN_SEL_FM_1,\n> - FN_SEL_FM_2, FN_SEL_FM_3,\n> - /* sel_scif5[1](0,1) */\n> - FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,\n> - /* sel_i2c6[3](0,1,2) */\n> - FN_SEL_I2C6_0, FN_SEL_I2C6_1,\n> - FN_SEL_I2C6_2, 0,\n> - /* sel_ndfc[1](0,1) */\n> - FN_SEL_NDFC_0, FN_SEL_NDFC_1,\n> - /* sel_ssi2[1](0,1) */\n> - FN_SEL_SSI2_0, FN_SEL_SSI2_1,\n> - /* sel_ssi9[1](0,1) */\n> - FN_SEL_SSI9_0, FN_SEL_SSI9_1,\n> - /* sel_timer_tmu2[1](0,1) */\n> - FN_SEL_TIMER_TMU2_0, FN_SEL_TIMER_TMU2_1,\n> - /* sel_adg_b[1](0,1) */\n> - FN_SEL_ADG_B_0, FN_SEL_ADG_B_1,\n> - /* sel_adg_c[1](0,1) */\n> - FN_SEL_ADG_C_0, FN_SEL_ADG_C_1,\n> - /* reserved[16..16] */\n> - 0, 0,\n> - /* reserved[15..8] */\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - /* reserved[7..1] */\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - /* sel_vin4[1](0,1) */\n> - FN_SEL_VIN4_0, FN_SEL_VIN4_1,\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL0\", 0xE6050004, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - GP_0_15_IN, GP_0_15_OUT,\n> - GP_0_14_IN, GP_0_14_OUT,\n> - GP_0_13_IN, GP_0_13_OUT,\n> - GP_0_12_IN, GP_0_12_OUT,\n> - GP_0_11_IN, GP_0_11_OUT,\n> - GP_0_10_IN, GP_0_10_OUT,\n> - GP_0_9_IN, GP_0_9_OUT,\n> - GP_0_8_IN, GP_0_8_OUT,\n> - GP_0_7_IN, GP_0_7_OUT,\n> - GP_0_6_IN, GP_0_6_OUT,\n> - GP_0_5_IN, GP_0_5_OUT,\n> - GP_0_4_IN, GP_0_4_OUT,\n> - GP_0_3_IN, GP_0_3_OUT,\n> - GP_0_2_IN, GP_0_2_OUT,\n> - GP_0_1_IN, GP_0_1_OUT,\n> - GP_0_0_IN, GP_0_0_OUT,\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL1\", 0xE6051004, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_1_28_IN, GP_1_28_OUT,\n> - GP_1_27_IN, GP_1_27_OUT,\n> - GP_1_26_IN, GP_1_26_OUT,\n> - GP_1_25_IN, GP_1_25_OUT,\n> - GP_1_24_IN, GP_1_24_OUT,\n> - GP_1_23_IN, GP_1_23_OUT,\n> - GP_1_22_IN, GP_1_22_OUT,\n> - GP_1_21_IN, GP_1_21_OUT,\n> - GP_1_20_IN, GP_1_20_OUT,\n> - GP_1_19_IN, GP_1_19_OUT,\n> - GP_1_18_IN, GP_1_18_OUT,\n> - GP_1_17_IN, GP_1_17_OUT,\n> - GP_1_16_IN, GP_1_16_OUT,\n> - GP_1_15_IN, GP_1_15_OUT,\n> - GP_1_14_IN, GP_1_14_OUT,\n> - GP_1_13_IN, GP_1_13_OUT,\n> - GP_1_12_IN, GP_1_12_OUT,\n> - GP_1_11_IN, GP_1_11_OUT,\n> - GP_1_10_IN, GP_1_10_OUT,\n> - GP_1_9_IN, GP_1_9_OUT,\n> - GP_1_8_IN, GP_1_8_OUT,\n> - GP_1_7_IN, GP_1_7_OUT,\n> - GP_1_6_IN, GP_1_6_OUT,\n> - GP_1_5_IN, GP_1_5_OUT,\n> - GP_1_4_IN, GP_1_4_OUT,\n> - GP_1_3_IN, GP_1_3_OUT,\n> - GP_1_2_IN, GP_1_2_OUT,\n> - GP_1_1_IN, GP_1_1_OUT,\n> - GP_1_0_IN, GP_1_0_OUT,\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL2\", 0xE6052004, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - GP_2_14_IN, GP_2_14_OUT,\n> - GP_2_13_IN, GP_2_13_OUT,\n> - GP_2_12_IN, GP_2_12_OUT,\n> - GP_2_11_IN, GP_2_11_OUT,\n> - GP_2_10_IN, GP_2_10_OUT,\n> - GP_2_9_IN, GP_2_9_OUT,\n> - GP_2_8_IN, GP_2_8_OUT,\n> - GP_2_7_IN, GP_2_7_OUT,\n> - GP_2_6_IN, GP_2_6_OUT,\n> - GP_2_5_IN, GP_2_5_OUT,\n> - GP_2_4_IN, GP_2_4_OUT,\n> - GP_2_3_IN, GP_2_3_OUT,\n> - GP_2_2_IN, GP_2_2_OUT,\n> - GP_2_1_IN, GP_2_1_OUT,\n> - GP_2_0_IN, GP_2_0_OUT,\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL3\", 0xE6053004, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - GP_3_15_IN, GP_3_15_OUT,\n> - GP_3_14_IN, GP_3_14_OUT,\n> - GP_3_13_IN, GP_3_13_OUT,\n> - GP_3_12_IN, GP_3_12_OUT,\n> - GP_3_11_IN, GP_3_11_OUT,\n> - GP_3_10_IN, GP_3_10_OUT,\n> - GP_3_9_IN, GP_3_9_OUT,\n> - GP_3_8_IN, GP_3_8_OUT,\n> - GP_3_7_IN, GP_3_7_OUT,\n> - GP_3_6_IN, GP_3_6_OUT,\n> - GP_3_5_IN, GP_3_5_OUT,\n> - GP_3_4_IN, GP_3_4_OUT,\n> - GP_3_3_IN, GP_3_3_OUT,\n> - GP_3_2_IN, GP_3_2_OUT,\n> - GP_3_1_IN, GP_3_1_OUT,\n> - GP_3_0_IN, GP_3_0_OUT,\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL4\", 0xE6054004, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_4_17_IN, GP_4_17_OUT,\n> - GP_4_16_IN, GP_4_16_OUT,\n> -\n> - GP_4_15_IN, GP_4_15_OUT,\n> - GP_4_14_IN, GP_4_14_OUT,\n> - GP_4_13_IN, GP_4_13_OUT,\n> - GP_4_12_IN, GP_4_12_OUT,\n> - GP_4_11_IN, GP_4_11_OUT,\n> - GP_4_10_IN, GP_4_10_OUT,\n> - GP_4_9_IN, GP_4_9_OUT,\n> - GP_4_8_IN, GP_4_8_OUT,\n> - GP_4_7_IN, GP_4_7_OUT,\n> - GP_4_6_IN, GP_4_6_OUT,\n> - GP_4_5_IN, GP_4_5_OUT,\n> - GP_4_4_IN, GP_4_4_OUT,\n> - GP_4_3_IN, GP_4_3_OUT,\n> - GP_4_2_IN, GP_4_2_OUT,\n> - GP_4_1_IN, GP_4_1_OUT,\n> - GP_4_0_IN, GP_4_0_OUT,\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL5\", 0xE6055004, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_5_25_IN, GP_5_25_OUT,\n> - GP_5_24_IN, GP_5_24_OUT,\n> -\n> - GP_5_23_IN, GP_5_23_OUT,\n> - GP_5_22_IN, GP_5_22_OUT,\n> - GP_5_21_IN, GP_5_21_OUT,\n> - GP_5_20_IN, GP_5_20_OUT,\n> - GP_5_19_IN, GP_5_19_OUT,\n> - GP_5_18_IN, GP_5_18_OUT,\n> - GP_5_17_IN, GP_5_17_OUT,\n> - GP_5_16_IN, GP_5_16_OUT,\n> -\n> - GP_5_15_IN, GP_5_15_OUT,\n> - GP_5_14_IN, GP_5_14_OUT,\n> - GP_5_13_IN, GP_5_13_OUT,\n> - GP_5_12_IN, GP_5_12_OUT,\n> - GP_5_11_IN, GP_5_11_OUT,\n> - GP_5_10_IN, GP_5_10_OUT,\n> - GP_5_9_IN, GP_5_9_OUT,\n> - GP_5_8_IN, GP_5_8_OUT,\n> - GP_5_7_IN, GP_5_7_OUT,\n> - GP_5_6_IN, GP_5_6_OUT,\n> - GP_5_5_IN, GP_5_5_OUT,\n> - GP_5_4_IN, GP_5_4_OUT,\n> - GP_5_3_IN, GP_5_3_OUT,\n> - GP_5_2_IN, GP_5_2_OUT,\n> - GP_5_1_IN, GP_5_1_OUT,\n> - GP_5_0_IN, GP_5_0_OUT,\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL6\", 0xE6055404, 32, 1) {\n> - GP_INOUTSEL(6)\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL7\", 0xE6055804, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_6_3_IN, GP_6_3_OUT,\n> - GP_6_2_IN, GP_6_2_OUT,\n> - GP_6_1_IN, GP_6_1_OUT,\n> - GP_6_0_IN, GP_6_0_OUT,\n> - }\n> - },\n> - { },\n> -};\n> -\n> -static struct pinmux_data_reg pinmux_data_regs[] = {\n> - /* use OUTDT registers? */\n> - { PINMUX_DATA_REG(\"INDT0\", 0xE6050008, 32) {\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - GP_0_15_DATA, GP_0_14_DATA, GP_0_13_DATA, GP_0_12_DATA,\n> - GP_0_11_DATA, GP_0_10_DATA, GP_0_9_DATA, GP_0_8_DATA,\n> - GP_0_7_DATA, GP_0_6_DATA, GP_0_5_DATA, GP_0_4_DATA,\n> - GP_0_3_DATA, GP_0_2_DATA, GP_0_1_DATA, GP_0_0_DATA }\n> - },\n> - { PINMUX_DATA_REG(\"INDT1\", 0xE6051008, 32) {\n> - 0, 0, 0, GP_1_28_DATA,\n> - GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA,\n> - GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,\n> - GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,\n> - GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,\n> - GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,\n> - GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,\n> - GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }\n> - },\n> - { PINMUX_DATA_REG(\"INDT2\", 0xE6052008, 32) {\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA,\n> - GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA,\n> - GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA,\n> - GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA }\n> - },\n> - { PINMUX_DATA_REG(\"INDT3\", 0xE6053008, 32) {\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - GP_3_15_DATA, GP_3_14_DATA, GP_3_13_DATA, GP_3_12_DATA,\n> - GP_3_11_DATA, GP_3_10_DATA, GP_3_9_DATA, GP_3_8_DATA,\n> - GP_3_7_DATA, GP_3_6_DATA, GP_3_5_DATA, GP_3_4_DATA,\n> - GP_3_3_DATA, GP_3_2_DATA, GP_3_1_DATA, GP_3_0_DATA }\n> - },\n> - { PINMUX_DATA_REG(\"INDT4\", 0xE6054008, 32) {\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0, 0, 0, GP_4_17_DATA, GP_4_16_DATA,\n> - GP_4_15_DATA, GP_4_14_DATA, GP_4_13_DATA, GP_4_12_DATA,\n> - GP_4_11_DATA, GP_4_10_DATA, GP_4_9_DATA, GP_4_8_DATA,\n> - GP_4_7_DATA, GP_4_6_DATA, GP_4_5_DATA, GP_4_4_DATA,\n> - GP_4_3_DATA, GP_4_2_DATA, GP_4_1_DATA, GP_4_0_DATA }\n> - },\n> - { PINMUX_DATA_REG(\"INDT5\", 0xE6055008, 32) {\n> - 0, 0, 0, 0,\n> - 0, 0, GP_5_25_DATA, GP_5_24_DATA,\n> - GP_5_23_DATA, GP_5_22_DATA, GP_5_21_DATA, GP_5_20_DATA,\n> - GP_5_19_DATA, GP_5_18_DATA, GP_5_17_DATA, GP_5_16_DATA,\n> - GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA,\n> - GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,\n> - GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,\n> - GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }\n> - },\n> - { PINMUX_DATA_REG(\"INDT6\", 0xE6055408, 32) {\n> - GP_INDT(6) }\n> - },\n> - { PINMUX_DATA_REG(\"INDT7\", 0xE6055808, 32) {\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA }\n> - },\n> - { },\n> -};\n> -\n> -\n> -static struct pinmux_info r8a7795_pinmux_info = {\n> - .name = \"r8a7795_pfc\",\n> -\n> - .unlock_reg = 0xe6060000, /* PMMR */\n> -\n> - .reserved_id = PINMUX_RESERVED,\n> - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },\n> - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },\n> - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },\n> - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },\n> - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },\n> -\n> - .first_gpio = GPIO_GP_0_0,\n> - .last_gpio = GPIO_FN_FMIN_D,\n> -\n> - .gpios = pinmux_gpios,\n> - .cfg_regs = pinmux_config_regs,\n> - .data_regs = pinmux_data_regs,\n> -\n> - .gpio_data = pinmux_data,\n> - .gpio_data_size = ARRAY_SIZE(pinmux_data),\n> -};\n> -\n> -void r8a7795_pinmux_init(void)\n> -{\n> - register_pinmux(&r8a7795_pinmux_info);\n> -}\n> diff --git a/arch/arm/mach-rmobile/pfc-r8a7796.c b/arch/arm/mach-rmobile/pfc-r8a7796.c\n> deleted file mode 100644\n> index f734f96dd0..0000000000\n> --- a/arch/arm/mach-rmobile/pfc-r8a7796.c\n> +++ /dev/null\n> @@ -1,5253 +0,0 @@\n> -/*\n> - * arch/arm/cpu/armv8/rcar_gen3/pfc-r8a7796.c\n> - * This file is r8a7796 processor support - PFC hardware block.\n> - *\n> - * Copyright (C) 2016 Renesas Electronics Corporation\n> - *\n> - * SPDX-License-Identifier: GPL-2.0+\n> - */\n> -\n> -#include \n> -#include \n> -#include \n> -\n> -#define CPU_32_PORT(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \\\n> - PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \\\n> - PORT_1(fn, pfx##31, sfx)\n> -\n> -#define CPU_32_PORT1(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \\\n> - PORT_10(fn, pfx##2, sfx)\n> -\n> -#define CPU_32_PORT2(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \\\n> - PORT_10(fn, pfx##2, sfx)\n> -\n> -#define CPU_32_PORT_29(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), \\\n> - PORT_10(fn, pfx##1, sfx), \\\n> - PORT_1(fn, pfx##20, sfx), \\\n> - PORT_1(fn, pfx##21, sfx), \\\n> - PORT_1(fn, pfx##22, sfx), \\\n> - PORT_1(fn, pfx##23, sfx), \\\n> - PORT_1(fn, pfx##24, sfx), \\\n> - PORT_1(fn, pfx##25, sfx), \\\n> - PORT_1(fn, pfx##26, sfx), \\\n> - PORT_1(fn, pfx##27, sfx), \\\n> - PORT_1(fn, pfx##28, sfx)\n> -\n> -#define CPU_32_PORT_26(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), \\\n> - PORT_10(fn, pfx##1, sfx), \\\n> - PORT_1(fn, pfx##20, sfx), \\\n> - PORT_1(fn, pfx##21, sfx), \\\n> - PORT_1(fn, pfx##22, sfx), \\\n> - PORT_1(fn, pfx##23, sfx), \\\n> - PORT_1(fn, pfx##24, sfx), \\\n> - PORT_1(fn, pfx##25, sfx)\n> -\n> -#define CPU_32_PORT_18(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), \\\n> - PORT_1(fn, pfx##10, sfx), \\\n> - PORT_1(fn, pfx##11, sfx), \\\n> - PORT_1(fn, pfx##12, sfx), \\\n> - PORT_1(fn, pfx##13, sfx), \\\n> - PORT_1(fn, pfx##14, sfx), \\\n> - PORT_1(fn, pfx##15, sfx), \\\n> - PORT_1(fn, pfx##16, sfx), \\\n> - PORT_1(fn, pfx##17, sfx)\n> -\n> -#define CPU_32_PORT_16(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), \\\n> - PORT_1(fn, pfx##10, sfx), \\\n> - PORT_1(fn, pfx##11, sfx), \\\n> - PORT_1(fn, pfx##12, sfx), \\\n> - PORT_1(fn, pfx##13, sfx), \\\n> - PORT_1(fn, pfx##14, sfx), \\\n> - PORT_1(fn, pfx##15, sfx)\n> -\n> -#define CPU_32_PORT_15(fn, pfx, sfx) \\\n> - PORT_10(fn, pfx, sfx), \\\n> - PORT_1(fn, pfx##10, sfx), \\\n> - PORT_1(fn, pfx##11, sfx), \\\n> - PORT_1(fn, pfx##12, sfx), \\\n> - PORT_1(fn, pfx##13, sfx), \\\n> - PORT_1(fn, pfx##14, sfx)\n> -\n> -#define CPU_32_PORT_4(fn, pfx, sfx) \\\n> - PORT_1(fn, pfx##0, sfx), \\\n> - PORT_1(fn, pfx##1, sfx), \\\n> - PORT_1(fn, pfx##2, sfx), \\\n> - PORT_1(fn, pfx##3, sfx)\n> -\n> -\n> -/* --gen3-- */\n> -/* GP_0_0_DATA -> GP_7_4_DATA */\n> -/* except for GP0[16] - [31],\n> - GP1[28] - [31],\n> - GP2[15] - [31],\n> - GP3[16] - [31],\n> - GP4[18] - [31],\n> - GP5[26] - [31],\n> - GP7[4] - [31] */\n> -\n> -#define CPU_ALL_PORT(fn, pfx, sfx) \\\n> - CPU_32_PORT_16(fn, pfx##_0_, sfx), \\\n> - CPU_32_PORT_29(fn, pfx##_1_, sfx), \\\n> - CPU_32_PORT_15(fn, pfx##_2_, sfx), \\\n> - CPU_32_PORT_16(fn, pfx##_3_, sfx), \\\n> - CPU_32_PORT_18(fn, pfx##_4_, sfx), \\\n> - CPU_32_PORT_26(fn, pfx##_5_, sfx), \\\n> - CPU_32_PORT(fn, pfx##_6_, sfx), \\\n> - CPU_32_PORT_4(fn, pfx##_7_, sfx)\n> -\n> -#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)\n> -#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \\\n> - GP##pfx##_IN, GP##pfx##_OUT)\n> -\n> -#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT\n> -#define _GP_INDT(pfx, sfx) GP##pfx##_DATA\n> -\n> -#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)\n> -#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)\n> -#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)\n> -\n> -\n> -#define PORT_10_REV(fn, pfx, sfx) \\\n> - PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \\\n> - PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \\\n> - PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \\\n> - PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \\\n> - PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)\n> -\n> -#define CPU_32_PORT_REV(fn, pfx, sfx) \\\n> - PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \\\n> - PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \\\n> - PORT_10_REV(fn, pfx, sfx)\n> -\n> -#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)\n> -#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)\n> -\n> -#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)\n> -#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \\\n> - FN_##ipsr, FN_##fn)\n> -\n> -enum {\n> - PINMUX_RESERVED = 0,\n> -\n> - PINMUX_DATA_BEGIN,\n> - GP_ALL(DATA),\n> - PINMUX_DATA_END,\n> -\n> - PINMUX_INPUT_BEGIN,\n> - GP_ALL(IN),\n> - PINMUX_INPUT_END,\n> -\n> - PINMUX_OUTPUT_BEGIN,\n> - GP_ALL(OUT),\n> - PINMUX_OUTPUT_END,\n> -\n> - PINMUX_FUNCTION_BEGIN,\n> - GP_ALL(FN),\n> -\n> - /* GPSR0 */\n> - GFN_D15,\n> - GFN_D14,\n> - GFN_D13,\n> - GFN_D12,\n> - GFN_D11,\n> - GFN_D10,\n> - GFN_D9,\n> - GFN_D8,\n> - GFN_D7,\n> - GFN_D6,\n> - GFN_D5,\n> - GFN_D4,\n> - GFN_D3,\n> - GFN_D2,\n> - GFN_D1,\n> - GFN_D0,\n> -\n> - /* GPSR1 */\n> - GFN_CLKOUT,\n> - GFN_EX_WAIT0_A,\n> - GFN_WE1x,\n> - GFN_WE0x,\n> - GFN_RD_WRx,\n> - GFN_RDx,\n> - GFN_BSx,\n> - GFN_CS1x_A26,\n> - GFN_CS0x,\n> - GFN_A19,\n> - GFN_A18,\n> - GFN_A17,\n> - GFN_A16,\n> - GFN_A15,\n> - GFN_A14,\n> - GFN_A13,\n> - GFN_A12,\n> - GFN_A11,\n> - GFN_A10,\n> - GFN_A9,\n> - GFN_A8,\n> - GFN_A7,\n> - GFN_A6,\n> - GFN_A5,\n> - GFN_A4,\n> - GFN_A3,\n> - GFN_A2,\n> - GFN_A1,\n> - GFN_A0,\n> -\n> - /* GPSR2 */\n> - GFN_AVB_AVTP_CAPTURE_A,\n> - GFN_AVB_AVTP_MATCH_A,\n> - GFN_AVB_LINK,\n> - GFN_AVB_PHY_INT,\n> - GFN_AVB_MAGIC,\n> - GFN_AVB_MDC,\n> - GFN_PWM2_A,\n> - GFN_PWM1_A,\n> - GFN_PWM0,\n> - GFN_IRQ5,\n> - GFN_IRQ4,\n> - GFN_IRQ3,\n> - GFN_IRQ2,\n> - GFN_IRQ1,\n> - GFN_IRQ0,\n> -\n> - /* GPSR3 */\n> - GFN_SD1_WP,\n> - GFN_SD1_CD,\n> - GFN_SD0_WP,\n> - GFN_SD0_CD,\n> - GFN_SD1_DAT3,\n> - GFN_SD1_DAT2,\n> - GFN_SD1_DAT1,\n> - GFN_SD1_DAT0,\n> - GFN_SD1_CMD,\n> - GFN_SD1_CLK,\n> - GFN_SD0_DAT3,\n> - GFN_SD0_DAT2,\n> - GFN_SD0_DAT1,\n> - GFN_SD0_DAT0,\n> - GFN_SD0_CMD,\n> - GFN_SD0_CLK,\n> -\n> - /* GPSR4 */\n> - GFN_SD3_DS,\n> - GFN_SD3_DAT7,\n> - GFN_SD3_DAT6,\n> - GFN_SD3_DAT5,\n> - GFN_SD3_DAT4,\n> - FN_SD3_DAT3,\n> - FN_SD3_DAT2,\n> - FN_SD3_DAT1,\n> - FN_SD3_DAT0,\n> - FN_SD3_CMD,\n> - FN_SD3_CLK,\n> - GFN_SD2_DS,\n> - GFN_SD2_DAT3,\n> - GFN_SD2_DAT2,\n> - GFN_SD2_DAT1,\n> - GFN_SD2_DAT0,\n> - FN_SD2_CMD,\n> - GFN_SD2_CLK,\n> -\n> - /* GPSR5 */\n> - GFN_MLB_DAT,\n> - GFN_MLB_SIG,\n> - GFN_MLB_CLK,\n> - FN_MSIOF0_RXD,\n> - GFN_MSIOF0_SS2,\n> - FN_MSIOF0_TXD,\n> - GFN_MSIOF0_SS1,\n> - GFN_MSIOF0_SYNC,\n> - FN_MSIOF0_SCK,\n> - GFN_HRTS0x,\n> - GFN_HCTS0x,\n> - GFN_HTX0,\n> - GFN_HRX0,\n> - GFN_HSCK0,\n> - GFN_RX2_A,\n> - GFN_TX2_A,\n> - GFN_SCK2,\n> - GFN_RTS1x_TANS,\n> - GFN_CTS1x,\n> - GFN_TX1_A,\n> - GFN_RX1_A,\n> - GFN_RTS0x_TANS,\n> - GFN_CTS0x,\n> - GFN_TX0,\n> - GFN_RX0,\n> - GFN_SCK0,\n> -\n> - /* GPSR6 */\n> - GFN_GP6_30,\n> - GFN_GP6_31,\n> - GFN_USB30_OVC,\n> - GFN_USB30_PWEN,\n> - GFN_USB1_OVC,\n> - GFN_USB1_PWEN,\n> - GFN_USB0_OVC,\n> - GFN_USB0_PWEN,\n> - GFN_AUDIO_CLKB_B,\n> - GFN_AUDIO_CLKA_A,\n> - GFN_SSI_SDATA9_A,\n> - GFN_SSI_SDATA8,\n> - GFN_SSI_SDATA7,\n> - GFN_SSI_WS78,\n> - GFN_SSI_SCK78,\n> - GFN_SSI_SDATA6,\n> - GFN_SSI_WS6,\n> - GFN_SSI_SCK6,\n> - FN_SSI_SDATA5,\n> - FN_SSI_WS5,\n> - FN_SSI_SCK5,\n> - GFN_SSI_SDATA4,\n> - GFN_SSI_WS4,\n> - GFN_SSI_SCK4,\n> - GFN_SSI_SDATA3,\n> - GFN_SSI_WS34,\n> - GFN_SSI_SCK34,\n> - GFN_SSI_SDATA2_A,\n> - GFN_SSI_SDATA1_A,\n> - GFN_SSI_SDATA0,\n> - GFN_SSI_WS01239,\n> - GFN_SSI_SCK01239,\n> -\n> - /* GPSR7 */\n> - FN_HDMI1_CEC,\n> - FN_HDMI0_CEC,\n> - FN_AVS2,\n> - FN_AVS1,\n> -\n> - /* IPSR0 */\n> - IFN_AVB_MDC,\n> - FN_MSIOF2_SS2_C,\n> - IFN_AVB_MAGIC,\n> - FN_MSIOF2_SS1_C,\n> - FN_SCK4_A,\n> - IFN_AVB_PHY_INT,\n> - FN_MSIOF2_SYNC_C,\n> - FN_RX4_A,\n> - IFN_AVB_LINK,\n> - FN_MSIOF2_SCK_C,\n> - FN_TX4_A,\n> - IFN_AVB_AVTP_MATCH_A,\n> - FN_MSIOF2_RXD_C,\n> - FN_CTS4x_A,\n> - IFN_AVB_AVTP_CAPTURE_A,\n> - FN_MSIOF2_TXD_C,\n> - FN_RTS4x_TANS_A,\n> - IFN_IRQ0,\n> - FN_QPOLB,\n> - FN_DU_CDE,\n> - FN_VI4_DATA0_B,\n> - FN_CAN0_TX_B,\n> - FN_CANFD0_TX_B,\n> - FN_MSIOF3_SS2_E,\n> - IFN_IRQ1,\n> - FN_QPOLA,\n> - FN_DU_DISP,\n> - FN_VI4_DATA1_B,\n> - FN_CAN0_RX_B,\n> - FN_CANFD0_RX_B,\n> - FN_MSIOF3_SS1_E,\n> -\n> - /* IPSR1 */\n> - IFN_IRQ2,\n> - FN_QCPV_QDE,\n> - FN_DU_EXODDF_DU_ODDF_DISP_CDE,\n> - FN_VI4_DATA2_B,\n> - FN_MSIOF3_SYNC_E,\n> - FN_PWM3_B,\n> - IFN_IRQ3,\n> - FN_QSTVB_QVE,\n> - FN_DU_DOTCLKOUT1,\n> - FN_VI4_DATA3_B,\n> - FN_MSIOF3_SCK_E,\n> - FN_PWM4_B,\n> - IFN_IRQ4,\n> - FN_QSTH_QHS,\n> - FN_DU_EXHSYNC_DU_HSYNC,\n> - FN_VI4_DATA4_B,\n> - FN_MSIOF3_RXD_E,\n> - FN_PWM5_B,\n> - IFN_IRQ5,\n> - FN_QSTB_QHE,\n> - FN_DU_EXVSYNC_DU_VSYNC,\n> - FN_VI4_DATA5_B,\n> - FN_MSIOF3_TXD_E,\n> - FN_PWM6_B,\n> - IFN_PWM0,\n> - FN_AVB_AVTP_PPS,\n> - FN_VI4_DATA6_B,\n> - FN_IECLK_B,\n> - IFN_PWM1_A,\n> - FN_HRX3_D,\n> - FN_VI4_DATA7_B,\n> - FN_IERX_B,\n> - IFN_PWM2_A,\n> - FN_PWMFSW0,\n> - FN_HTX3_D,\n> - FN_IETX_B,\n> - IFN_A0,\n> - FN_LCDOUT16,\n> - FN_MSIOF3_SYNC_B,\n> - FN_VI4_DATA8,\n> - FN_DU_DB0,\n> - FN_PWM3_A,\n> -\n> - /* IPSR2 */\n> - IFN_A1,\n> - FN_LCDOUT17,\n> - FN_MSIOF3_TXD_B,\n> - FN_VI4_DATA9,\n> - FN_DU_DB1,\n> - FN_PWM4_A,\n> - IFN_A2,\n> - FN_LCDOUT18,\n> - FN_MSIOF3_SCK_B,\n> - FN_VI4_DATA10,\n> - FN_DU_DB2,\n> - FN_PWM5_A,\n> - IFN_A3,\n> - FN_LCDOUT19,\n> - FN_MSIOF3_RXD_B,\n> - FN_VI4_DATA11,\n> - FN_DU_DB3,\n> - FN_PWM6_A,\n> - IFN_A4,\n> - FN_LCDOUT20,\n> - FN_MSIOF3_SS1_B,\n> - FN_VI4_DATA12,\n> - FN_VI5_DATA12,\n> - FN_DU_DB4,\n> - IFN_A5,\n> - FN_LCDOUT21,\n> - FN_MSIOF3_SS2_B,\n> - FN_SCK4_B,\n> - FN_VI4_DATA13,\n> - FN_VI5_DATA13,\n> - FN_DU_DB5,\n> - IFN_A6,\n> - FN_LCDOUT22,\n> - FN_MSIOF2_SS1_A,\n> - FN_RX4_B,\n> - FN_VI4_DATA14,\n> - FN_VI5_DATA14,\n> - FN_DU_DB6,\n> - IFN_A7,\n> - FN_LCDOUT23,\n> - FN_MSIOF2_SS2_A,\n> - FN_TX4_B,\n> - FN_VI4_DATA15,\n> - FN_V15_DATA15,\n> - FN_DU_DB7,\n> - IFN_A8,\n> - FN_RX3_B,\n> - FN_MSIOF2_SYNC_A,\n> - FN_HRX4_B,\n> - FN_SDA6_A,\n> - FN_AVB_AVTP_MATCH_B,\n> - FN_PWM1_B,\n> -\n> - /* IPSR3 */\n> - IFN_A9,\n> - FN_MSIOF2_SCK_A,\n> - FN_CTS4x_B,\n> - FN_VI5_VSYNCx,\n> - IFN_A10,\n> - FN_MSIOF2_RXD_A,\n> - FN_RTS4n_TANS_B,\n> - FN_VI5_HSYNCx,\n> - IFN_A11,\n> - FN_TX3_B,\n> - FN_MSIOF2_TXD_A,\n> - FN_HTX4_B,\n> - FN_HSCK4,\n> - FN_VI5_FIELD,\n> - FN_SCL6_A,\n> - FN_AVB_AVTP_CAPTURE_B,\n> - FN_PWM2_B,\n> - FN_SPV_EVEN,\n> - IFN_A12,\n> - FN_LCDOUT12,\n> - FN_MSIOF3_SCK_C,\n> - FN_HRX4_A,\n> - FN_VI5_DATA8,\n> - FN_DU_DG4,\n> - IFN_A13,\n> - FN_LCDOUT13,\n> - FN_MSIOF3_SYNC_C,\n> - FN_HTX4_A,\n> - FN_VI5_DATA9,\n> - FN_DU_DG5,\n> - IFN_A14,\n> - FN_LCDOUT14,\n> - FN_MSIOF3_RXD_C,\n> - FN_HCTS4x,\n> - FN_VI5_DATA10,\n> - FN_DU_DG6,\n> - IFN_A15,\n> - FN_LCDOUT15,\n> - FN_MSIOF3_TXD_C,\n> - FN_HRTS4x,\n> - FN_VI5_DATA11,\n> - FN_DU_DG7,\n> - IFN_A16,\n> - FN_LCDOUT8,\n> - FN_VI4_FIELD,\n> - FN_DU_DG0,\n> -\n> - /* IPSR4 */\n> - IFN_A17,\n> - FN_LCDOUT9,\n> - FN_VI4_VSYNCx,\n> - FN_DU_DG1,\n> - IFN_A18,\n> - FN_LCDOUT10,\n> - FN_VI4_HSYNCx,\n> - FN_DU_DG2,\n> - IFN_A19,\n> - FN_LCDOUT11,\n> - FN_VI4_CLKENB,\n> - FN_DU_DG3,\n> - IFN_CS0x,\n> - FN_VI5_CLKENB,\n> - IFN_CS1x_A26,\n> - FN_VI5_CLK,\n> - FN_EX_WAIT0_B,\n> - IFN_BSx,\n> - FN_QSTVA_QVS,\n> - FN_MSIOF3_SCK_D,\n> - FN_SCK3,\n> - FN_HSCK3,\n> - FN_CAN1_TX,\n> - FN_CANFD1_TX,\n> - FN_IETX_A,\n> - IFN_RDx,\n> - FN_MSIOF3_SYNC_D,\n> - FN_RX3_A,\n> - FN_HRX3_A,\n> - FN_CAN0_TX_A,\n> - FN_CANFD0_TX_A,\n> - IFN_RD_WRx,\n> - FN_MSIOF3_RXD_D,\n> - FN_TX3_A,\n> - FN_HTX3_A,\n> - FN_CAN0_RX_A,\n> - FN_CANFD0_RX_A,\n> -\n> - /* IPSR5 */\n> - IFN_WE0x,\n> - FN_MSIIOF3_TXD_D,\n> - FN_CTS3x,\n> - FN_HCTS3x,\n> - FN_SCL6_B,\n> - FN_CAN_CLK,\n> - FN_IECLK_A,\n> - IFN_WE1x,\n> - FN_MSIOF3_SS1_D,\n> - FN_RTS3x_TANS,\n> - FN_HRTS3x,\n> - FN_SDA6_B,\n> - FN_CAN1_RX,\n> - FN_CANFD1_RX,\n> - FN_IERX_A,\n> - IFN_EX_WAIT0_A,\n> - FN_QCLK,\n> - FN_VI4_CLK,\n> - FN_DU_DOTCLKOUT0,\n> - IFN_D0,\n> - FN_MSIOF2_SS1_B,\n> - FN_MSIOF3_SCK_A,\n> - FN_VI4_DATA16,\n> - FN_VI5_DATA0,\n> - IFN_D1,\n> - FN_MSIOF2_SS2_B,\n> - FN_MSIOF3_SYNC_A,\n> - FN_VI4_DATA17,\n> - FN_VI5_DATA1,\n> - IFN_D2,\n> - FN_MSIOF3_RXD_A,\n> - FN_VI4_DATA18,\n> - FN_VI5_DATA2,\n> - IFN_D3,\n> - FN_MSIOF3_TXD_A,\n> - FN_VI4_DATA19,\n> - FN_VI5_DATA3,\n> - IFN_D4,\n> - FN_MSIOF2_SCK_B,\n> - FN_VI4_DATA20,\n> - FN_VI5_DATA4,\n> -\n> - /* IPSR6 */\n> - IFN_D5,\n> - FN_MSIOF2_SYNC_B,\n> - FN_VI4_DATA21,\n> - FN_VI5_DATA5,\n> - IFN_D6,\n> - FN_MSIOF2_RXD_B,\n> - FN_VI4_DATA22,\n> - FN_VI5_DATA6,\n> - IFN_D7,\n> - FN_MSIOF2_TXD_B,\n> - FN_VI4_DATA23,\n> - FN_VI5_DATA7,\n> - IFN_D8,\n> - FN_LCDOUT0,\n> - FN_MSIOF2_SCK_D,\n> - FN_SCK4_C,\n> - FN_VI4_DATA0_A,\n> - FN_DU_DR0,\n> - IFN_D9,\n> - FN_LCDOUT1,\n> - FN_MSIOF2_SYNC_D,\n> - FN_VI4_DATA1_A,\n> - FN_DU_DR1,\n> - IFN_D10,\n> - FN_LCDOUT2,\n> - FN_MSIOF2_RXD_D,\n> - FN_HRX3_B,\n> - FN_VI4_DATA2_A,\n> - FN_CTS4x_C,\n> - FN_DU_DR2,\n> - IFN_D11,\n> - FN_LCDOUT3,\n> - FN_MSIOF2_TXD_D,\n> - FN_HTX3_B,\n> - FN_VI4_DATA3_A,\n> - FN_RTS4x_TANS_C,\n> - FN_DU_DR3,\n> - IFN_D12,\n> - FN_LCDOUT4,\n> - FN_MSIOF2_SS1_D,\n> - FN_RX4_C,\n> - FN_VI4_DATA4_A,\n> - FN_DU_DR4,\n> -\n> - /* IPSR7 */\n> - IFN_D13,\n> - FN_LCDOUT5,\n> - FN_MSIOF2_SS2_D,\n> - FN_TX4_C,\n> - FN_VI4_DATA5_A,\n> - FN_DU_DR5,\n> - IFN_D14,\n> - FN_LCDOUT6,\n> - FN_MSIOF3_SS1_A,\n> - FN_HRX3_C,\n> - FN_VI4_DATA6_A,\n> - FN_DU_DR6,\n> - FN_SCL6_C,\n> - IFN_D15,\n> - FN_LCDOUT7,\n> - FN_MSIOF3_SS2_A,\n> - FN_HTX3_C,\n> - FN_VI4_DATA7_A,\n> - FN_DU_DR7,\n> - FN_SDA6_C,\n> - FN_FSCLKST,\n> - IFN_SD0_CLK,\n> - FN_MSIOF1_SCK_E,\n> - FN_STP_OPWM_0_B,\n> - IFN_SD0_CMD,\n> - FN_MSIOF1_SYNC_E,\n> - FN_STP_IVCXO27_0_B,\n> - IFN_SD0_DAT0,\n> - FN_MSIOF1_RXD_E,\n> - FN_TS_SCK0_B,\n> - FN_STP_ISCLK_0_B,\n> - IFN_SD0_DAT1,\n> - FN_MSIOF1_TXD_E,\n> - FN_TS_SPSYNC0_B,\n> - FN_STP_ISSYNC_0_B,\n> -\n> - /* IPSR8 */\n> - IFN_SD0_DAT2,\n> - FN_MSIOF1_SS1_E,\n> - FN_TS_SDAT0_B,\n> - FN_STP_ISD_0_B,\n> -\n> - IFN_SD0_DAT3,\n> - FN_MSIOF1_SS2_E,\n> - FN_TS_SDEN0_B,\n> - FN_STP_ISEN_0_B,\n> -\n> - IFN_SD1_CLK,\n> - FN_MSIOF1_SCK_G,\n> - FN_SIM0_CLK_A,\n> -\n> - IFN_SD1_CMD,\n> - FN_MSIOF1_SYNC_G,\n> - FN_NFCEx_B,\n> - FN_SIM0_D_A,\n> - FN_STP_IVCXO27_1_B,\n> -\n> - IFN_SD1_DAT0,\n> - FN_SD2_DAT4,\n> - FN_MSIOF1_RXD_G,\n> - FN_NFWPx_B,\n> - FN_TS_SCK1_B,\n> - FN_STP_ISCLK_1_B,\n> -\n> - IFN_SD1_DAT1,\n> - FN_SD2_DAT5,\n> - FN_MSIOF1_TXD_G,\n> - FN_NFDATA14_B,\n> - FN_TS_SPSYNC1_B,\n> - FN_STP_ISSYNC_1_B,\n> -\n> - IFN_SD1_DAT2,\n> - FN_SD2_DAT6,\n> - FN_MSIOF1_SS1_G,\n> - FN_NFDATA15_B,\n> - FN_TS_SDAT1_B,\n> - FN_STP_IOD_1_B,\n> -\n> - IFN_SD1_DAT3,\n> - FN_SD2_DAT7,\n> - FN_MSIOF1_SS2_G,\n> - FN_NFRBx_B,\n> - FN_TS_SDEN1_B,\n> - FN_STP_ISEN_1_B,\n> -\n> - /* IPSR9 */\n> - IFN_SD2_CLK,\n> - FN_NFDATA8,\n> -\n> - IFN_SD2_CMD,\n> - FN_NFDATA9,\n> -\n> - IFN_SD2_DAT0,\n> - FN_NFDATA10,\n> -\n> - IFN_SD2_DAT1,\n> - FN_NFDATA11,\n> -\n> - IFN_SD2_DAT2,\n> - FN_NFDATA12,\n> -\n> - IFN_SD2_DAT3,\n> - FN_NFDATA13,\n> -\n> - IFN_SD2_DS,\n> - FN_NFALE,\n> -\n> - IFN_SD3_CLK,\n> - FN_NFWEx,\n> -\n> - /* IPSR10 */\n> - IFN_SD3_CMD,\n> - FN_NFREx,\n> -\n> - IFN_SD3_DAT0,\n> - FN_NFDATA0,\n> -\n> - IFN_SD3_DAT1,\n> - FN_NFDATA1,\n> -\n> - IFN_SD3_DAT2,\n> - FN_NFDATA2,\n> -\n> - IFN_SD3_DAT3,\n> - FN_NFDATA3,\n> -\n> - IFN_SD3_DAT4,\n> - FN_SD2_CD_A,\n> - FN_NFDATA4,\n> -\n> - IFN_SD3_DAT5,\n> - FN_SD2_WP_A,\n> - FN_NFDATA5,\n> -\n> - IFN_SD3_DAT6,\n> - FN_SD3_CD,\n> - FN_NFDATA6,\n> -\n> - /* IPSR11 */\n> - IFN_SD3_DAT7,\n> - FN_SD3_WP,\n> - FN_NFDATA7,\n> -\n> - IFN_SD3_DS,\n> - FN_NFCLE,\n> -\n> - IFN_SD0_CD,\n> - FN_NFDATA14_A,\n> - FN_SCL2_B,\n> - FN_SIM0_RST_A,\n> -\n> - IFN_SD0_WP,\n> - FN_NFDATA15_A,\n> - FN_SDA2_B,\n> -\n> - IFN_SD1_CD,\n> - FN_NFRBx_A,\n> - FN_SIM0_CLK_B,\n> -\n> - IFN_SD1_WP,\n> - FN_NFCEx_A,\n> - FN_SIM0_D_B,\n> -\n> - IFN_SCK0,\n> - FN_HSCK1_B,\n> - FN_MSIOF1_SS2_B,\n> - FN_AUDIO_CLKC_B,\n> - FN_SDA2_A,\n> - FN_SIM0_RST_B,\n> - FN_STP_OPWM_0_C,\n> - FN_RIF0_CLK_B,\n> - FN_ADICHS2,\n> - FN_SCK5_B,\n> -\n> - IFN_RX0,\n> - FN_HRX1_B,\n> - FN_TS_SCK0_C,\n> - FN_STP_ISCLK_0_C,\n> - FN_RIF0_D0_B,\n> -\n> - /* IPSR12 */\n> - IFN_TX0,\n> - FN_HTX1_B,\n> - FN_TS_SPSYNC0_C,\n> - FN_STP_ISSYNC_0_C,\n> - FN_RIF0_D1_B,\n> -\n> - IFN_CTS0x,\n> - FN_HCTS1x_B,\n> - FN_MSIOF1_SYNC_B,\n> - FN_TS_SPSYNC1_C,\n> - FN_STP_ISSYNC_1_C,\n> - FN_RIF1_SYNC_B,\n> - FN_AUDIO_CLKOUT_C,\n> - FN_ADICS_SAMP,\n> -\n> - IFN_RTS0x_TANS,\n> - FN_HRTS1x_B,\n> - FN_MSIOF1_SS1_B,\n> - FN_AUDIO_CLKA_B,\n> - FN_SCL2_A,\n> - FN_STP_IVCXO27_1_C,\n> - FN_RIF0_SYNC_B,\n> - FN_ADICHS1,\n> -\n> - IFN_RX1_A,\n> - FN_HRX1_A,\n> - FN_TS_SDAT0_C,\n> - FN_STP_ISD_0_C,\n> - FN_RIF1_CLK_C,\n> -\n> - IFN_TX1_A,\n> - FN_HTX1_A,\n> - FN_TS_SDEN0_C,\n> - FN_STP_ISEN_0_C,\n> - FN_RIF1_D0_C,\n> -\n> - IFN_CTS1x,\n> - FN_HCTS1x_A,\n> - FN_MSIOF1_RXD_B,\n> - FN_TS_SDEN1_C,\n> - FN_STP_ISEN_1_C,\n> - FN_RIF1_D0_B,\n> - FN_ADIDATA,\n> -\n> - IFN_RTS1x_TANS,\n> - FN_HRTS1x_A,\n> - FN_MSIOF1_TXD_B,\n> - FN_TS_SDAT1_C,\n> - FN_STP_ISD_1_C,\n> - FN_RIF1_D1_B,\n> - FN_ADICHS0,\n> -\n> - IFN_SCK2,\n> - FN_SCIF_CLK_B,\n> - FN_MSIOF1_SCK_B,\n> - FN_TS_SCK1_C,\n> - FN_STP_ISCLK_1_C,\n> - FN_RIF1_CLK_B,\n> - FN_ADICLK,\n> -\n> - /* IPSR13 */\n> - IFN_TX2_A,\n> - FN_SD2_CD_B,\n> - FN_SCL1_A,\n> - FN_FMCLK_A,\n> - FN_RIF1_D1_C,\n> - FN_FSO_CFE_0_B,\n> -\n> - IFN_RX2_A,\n> - FN_SD2_WP_B,\n> - FN_SDA1_A,\n> - FN_FMIN_A,\n> - FN_RIF1_SYNC_C,\n> - FN_FSO_CEF_1_B,\n> -\n> - IFN_HSCK0,\n> - FN_MSIOF1_SCK_D,\n> - FN_AUDIO_CLKB_A,\n> - FN_SSI_SDATA1_B,\n> - FN_TS_SCK0_D,\n> - FN_STP_ISCLK_0_D,\n> - FN_RIF0_CLK_C,\n> - FN_RX5_B,\n> -\n> - IFN_HRX0,\n> - FN_MSIOF1_RXD_D,\n> - FN_SS1_SDATA2_B,\n> - FN_TS_SDEN0_D,\n> - FN_STP_ISEN_0_D,\n> - FN_RIF0_D0_C,\n> -\n> - IFN_HTX0,\n> - FN_MSIOF1_TXD_D,\n> - FN_SSI_SDATA9_B,\n> - FN_TS_SDAT0_D,\n> - FN_STP_ISD_0_D,\n> - FN_RIF0_D1_C,\n> -\n> - IFN_HCTS0x,\n> - FN_RX2_B,\n> - FN_MSIOF1_SYNC_D,\n> - FN_SSI_SCK9_A,\n> - FN_TS_SPSYNC0_D,\n> - FN_STP_ISSYNC_0_D,\n> - FN_RIF0_SYNC_C,\n> - FN_AUDIO_CLKOUT1_A,\n> -\n> - IFN_HRTS0x,\n> - FN_TX2_B,\n> - FN_MSIOF1_SS1_D,\n> - FN_SSI_WS9_A,\n> - FN_STP_IVCXO27_0_D,\n> - FN_BPFCLK_A,\n> - FN_AUDIO_CLKOUT2_A,\n> -\n> - IFN_MSIOF0_SYNC,\n> - FN_AUDIO_CLKOUT_A,\n> - FN_TX5_B,\n> - FN_BPFCLK_D,\n> -\n> - /* IPSR14 */\n> - IFN_MSIOF0_SS1,\n> - FN_RX5_A,\n> - FN_NFWPx_A,\n> - FN_AUDIO_CLKA_C,\n> - FN_SSI_SCK2_A,\n> - FN_STP_IVCXO27_0_C,\n> - FN_AUDIO_CLKOUT3_A,\n> - FN_TCLK1_B,\n> -\n> - IFN_MSIOF0_SS2,\n> - FN_TX5_A,\n> - FN_MSIOF1_SS2_D,\n> - FN_AUDIO_CLKC_A,\n> - FN_SSI_WS2_A,\n> - FN_STP_OPWM_0_D,\n> - FN_AUDIO_CLKOUT_D,\n> - FN_SPEEDIN_B,\n> -\n> - IFN_MLB_CLK,\n> - FN_MSIOF1_SCK_F,\n> - FN_SCL1_B,\n> -\n> - IFN_MLB_SIG,\n> - FN_RX1_B,\n> - FN_MSIOF1_SYNC_F,\n> - FN_SDA1_B,\n> -\n> - IFN_MLB_DAT,\n> - FN_TX1_B,\n> - FN_MSIOF1_RXD_F,\n> -\n> - IFN_SSI_SCK0129,\n> - FN_MSIOF1_TXD_F,\n> - FN_MOUT0,\n> -\n> - IFN_SSI_WS0129,\n> - FN_MSIOF1_SS1_F,\n> - FN_MOUT1,\n> -\n> - IFN_SSI_SDATA0,\n> - FN_MSIOF1_SS2_F,\n> - FN_MOUT2,\n> -\n> - /* IPSR15 */\n> - IFN_SSI_SDATA1_A,\n> - FN_MOUT5,\n> -\n> - IFN_SSI_SDATA2_A,\n> - FN_SSI_SCK1_B,\n> - FN_MOUT6,\n> -\n> - IFN_SSI_SCK34,\n> - FN_MSIOF1_SS1_A,\n> - FN_STP_OPWM_0_A,\n> -\n> - IFN_SSI_WS34,\n> - FN_HCTS2x_A,\n> - FN_MSIOF1_SS2_A,\n> - FN_STP_IVCXO27_0_A,\n> -\n> - IFN_SSI_SDATA3,\n> - FN_HRTS2x_A,\n> - FN_MSIOF1_TXD_A,\n> - FN_TS_SCK0_A,\n> - FN_STP_ISCLK_0_A,\n> - FN_RIF0_D1_A,\n> - FN_RIF2_D0_A,\n> -\n> - IFN_SSI_SCK4,\n> - FN_HRX2_A,\n> - FN_MSIOF1_SCK_A,\n> - FN_TS_SDAT0_A,\n> - FN_STP_ISD_0_A,\n> - FN_RIF0_CLK_A,\n> - FN_RIF2_CLK_A,\n> -\n> - IFN_SSI_WS4,\n> - FN_HTX2_A,\n> - FN_MSIOF1_SYNC_A,\n> - FN_TS_SDEN0_A,\n> - FN_STP_ISEN_0_A,\n> - FN_RIF0_SYNC_A,\n> - FN_RIF2_SYNC_A,\n> -\n> - IFN_SSI_SDATA4,\n> - FN_HSCK2_A,\n> - FN_MSIOF1_RXD_A,\n> - FN_TS_SPSYNC0_A,\n> - FN_STP_ISSYNC_0_A,\n> - FN_RIF0_D0_A,\n> - FN_RIF2_D1_A,\n> -\n> - /* IPSR16 */\n> - IFN_SSI_SCK6,\n> - FN_SIM0_RST_D,\n> - FN_FSO_TOE_A,\n> -\n> - IFN_SSI_WS6,\n> - FN_SIM0_D_D,\n> -\n> - IFN_SSI_SDATA6,\n> - FN_SIM0_CLK_D,\n> -\n> - IFN_SSI_SCK78,\n> - FN_HRX2_B,\n> - FN_MSIOF1_SCK_C,\n> - FN_TS_SCK1_A,\n> - FN_STP_ISCLK_1_A,\n> - FN_RIF1_CLK_A,\n> - FN_RIF3_CLK_A,\n> -\n> - IFN_SSI_WS78,\n> - FN_HTX2_B,\n> - FN_MSIOF1_SYNC_C,\n> - FN_TS_SDAT1_A,\n> - FN_STP_ISD_1_A,\n> - FN_RIF1_SYNC_A,\n> - FN_RIF3_SYNC_A,\n> -\n> - IFN_SSI_SDATA7,\n> - FN_HCTS2x_B,\n> - FN_MSIOF1_RXD_C,\n> - FN_TS_SDEN1_A,\n> - FN_STP_IEN_1_A,\n> - FN_RIF1_D0_A,\n> - FN_RIF3_D0_A,\n> - FN_TCLK2_A,\n> -\n> - IFN_SSI_SDATA8,\n> - FN_HRTS2x_B,\n> - FN_MSIOF1_TXD_C,\n> - FN_TS_SPSYNC1_A,\n> - FN_STP_ISSYNC_1_A,\n> - FN_RIF1_D1_A,\n> - FN_EIF3_D1_A,\n> -\n> - IFN_SSI_SDATA9_A,\n> - FN_HSCK2_B,\n> - FN_MSIOF1_SS1_C,\n> - FN_HSCK1_A,\n> - FN_SSI_WS1_B,\n> - FN_SCK1,\n> - FN_STP_IVCXO27_1_A,\n> - FN_SCK5,\n> -\n> - /* IPSR17 */\n> - IFN_AUDIO_CLKA_A,\n> - FN_CC5_OSCOUT,\n> -\n> - IFN_AUDIO_CLKB_B,\n> - FN_SCIF_CLK_A,\n> - FN_STP_IVCXO27_1_D,\n> - FN_REMOCON_A,\n> - FN_TCLK1_A,\n> -\n> - IFN_USB0_PWEN,\n> - FN_SIM0_RST_C,\n> - FN_TS_SCK1_D,\n> - FN_STP_ISCLK_1_D,\n> - FN_BPFCLK_B,\n> - FN_RIF3_CLK_B,\n> - FN_FSO_CFE_1_A,\n> - FN_HSCK2_C,\n> -\n> - IFN_USB0_OVC,\n> - FN_SIM0_D_C,\n> - FN_TS_SDAT1_D,\n> - FN_STP_ISD_1_D,\n> - FN_RIF3_SYNC_B,\n> - FN_HRX2_C,\n> -\n> - IFN_USB1_PWEN,\n> - FN_SIM0_CLK_C,\n> - FN_SSI_SCK1_A,\n> - FN_TS_SCK0_E,\n> - FN_STP_ISCLK_0_E,\n> - FN_FMCLK_B,\n> - FN_RIF2_CLK_B,\n> - FN_SPEEDIN_A,\n> - FN_HTX2_C,\n> -\n> - IFN_USB1_OVC,\n> - FN_MSIOF1_SS2_C,\n> - FN_SSI_WS1_A,\n> - FN_TS_SDAT0_E,\n> - FN_STP_ISD_0_E,\n> - FN_FMIN_B,\n> - FN_RIF2_SYNC_B,\n> - FN_REMOCON_B,\n> - FN_HCTS2x_C,\n> -\n> - IFN_USB30_PWEN,\n> - FN_AUDIO_CLKOUT_B,\n> - FN_SSI_SCK2_B,\n> - FN_TS_SDEN1_D,\n> - FN_STP_ISEN_1_D,\n> - FN_STP_OPWM_0_E,\n> - FN_RIF3_D0_B,\n> - FN_TCLK2_B,\n> - FN_TPU0TO0,\n> - FN_BPFCLK_C,\n> - FN_HRTS2x_C,\n> -\n> - IFN_USB30_OVC,\n> - FN_AUDIO_CLKOUT1_B,\n> - FN_SSI_WS2_B,\n> - FN_TS_SPSYNC1_D,\n> - FN_STP_ISSYNC_1_D,\n> - FN_STP_IVCXO27_0_E,\n> - FN_RIF3_D1_B,\n> - FN_FSO_TOE_B,\n> - FN_TPU0TO1,\n> -\n> - /* IPSR18 */\n> - IFN_GP6_30,\n> - FN_AUDIO_CLKOUT2_B,\n> - FN_SSI_SCK9_B,\n> - FN_TS_SDEN0_E,\n> - FN_STP_ISEN_0_E,\n> - FN_RIF2_D0_B,\n> - FN_FSO_CFE_0_A,\n> - FN_TPU0TO2,\n> - FN_FMCLK_C,\n> - FN_FMCLK_D,\n> -\n> - IFN_GP6_31,\n> - FN_AUDIO_CLKOUT3_B,\n> - FN_SSI_WS9_B,\n> - FN_TS_SPSYNC0_E,\n> - FN_STP_ISSYNC_0_E,\n> - FN_RIF2_D1_B,\n> - FN_TPU0TO3,\n> - FN_FMIN_C,\n> - FN_FMIN_D,\n> -\n> - /* MOD_SEL0 */\n> - FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,\n> - FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,\n> - FN_SEL_MSIOF3_4, FN_SEL_MSIOF3_5,\n> - FN_SEL_MSIOF3_6,\n> - FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,\n> - FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,\n> - FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,\n> - FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,\n> - FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,\n> - FN_SEL_MSIOF1_6,\n> - FN_SEL_LBSC_0, FN_SEL_LBSC_1,\n> - FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,\n> - FN_SEL_I2C2_0, FN_SEL_I2C2_1,\n> - FN_SEL_I2C1_0, FN_SEL_I2C1_1,\n> - FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,\n> - FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,\n> - FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,\n> - FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,\n> - FN_SEL_HSCIF2_2,\n> - FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,\n> - FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,\n> - FN_SEL_FSO_0, FN_SEL_FSO_1,\n> - FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,\n> - FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,\n> - FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,\n> - FN_SEL_DRIF1_2,\n> - FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,\n> - FN_SEL_DRIF0_2,\n> - FN_SEL_CANFD_0, FN_SEL_CANFD_1,\n> - FN_SEL_ADG_0, FN_SEL_ADG_1,\n> - FN_SEL_ADG_2, FN_SEL_ADG_3,\n> -\n> - /* MOD_SEL1 */\n> - FN_SEL_TSIF1_0,\n> - FN_SEL_TSIF1_1,\n> - FN_SEL_TSIF1_2,\n> - FN_SEL_TSIF1_3,\n> - FN_SEL_TSIF0_0,\n> - FN_SEL_TSIF0_1,\n> - FN_SEL_TSIF0_2,\n> - FN_SEL_TSIF0_3,\n> - FN_SEL_TSIF0_4,\n> - FN_SEL_TIMER_TMU_0,\n> - FN_SEL_TIMER_TMU_1,\n> - FN_SEL_SSP1_1_0,\n> - FN_SEL_SSP1_1_1,\n> - FN_SEL_SSP1_1_2,\n> - FN_SEL_SSP1_1_3,\n> - FN_SEL_SSP1_0_0,\n> - FN_SEL_SSP1_0_1,\n> - FN_SEL_SSP1_0_2,\n> - FN_SEL_SSP1_0_3,\n> - FN_SEL_SSP1_0_4,\n> - FN_SEL_SSI_0,\n> - FN_SEL_SSI_1,\n> - FN_SEL_SPEED_PULSE_IF_0,\n> - FN_SEL_SPEED_PULSE_IF_1,\n> - FN_SEL_SIMCARD_0,\n> - FN_SEL_SIMCARD_1,\n> - FN_SEL_SIMCARD_2,\n> - FN_SEL_SIMCARD_3,\n> - FN_SEL_SDHI2_0,\n> - FN_SEL_SDHI2_1,\n> - FN_SEL_SCIF4_0,\n> - FN_SEL_SCIF4_1,\n> - FN_SEL_SCIF4_2,\n> - FN_SEL_SCIF3_0,\n> - FN_SEL_SCIF3_1,\n> - FN_SEL_SCIF2_0,\n> - FN_SEL_SCIF2_1,\n> - FN_SEL_SCIF1_0,\n> - FN_SEL_SCIF1_1,\n> - FN_SEL_SCIF_0,\n> - FN_SEL_SCIF_1,\n> - FN_SEL_REMOCON_0,\n> - FN_SEL_REMOCON_1,\n> - FN_SEL_RCAN_0,\n> - FN_SEL_RCAN_1,\n> - FN_SEL_PWM6_0,\n> - FN_SEL_PWM6_1,\n> - FN_SEL_PWM5_0,\n> - FN_SEL_PWM5_1,\n> - FN_SEL_PWM4_0,\n> - FN_SEL_PWM4_1,\n> - FN_SEL_PWM3_0,\n> - FN_SEL_PWM3_1,\n> - FN_SEL_PWM2_0,\n> - FN_SEL_PWM2_1,\n> - FN_SEL_PWM1_0,\n> - FN_SEL_PWM1_1,\n> -\n> - /* MOD_SEL2 */\n> - FN_I2C_SEL_5_0,\n> - FN_I2C_SEL_5_1,\n> - FN_I2C_SEL_3_0,\n> - FN_I2C_SEL_3_1,\n> - FN_I2C_SEL_0_0,\n> - FN_I2C_SEL_0_1,\n> - FN_SEL_FM_0,\n> - FN_SEL_FM_1,\n> - FN_SEL_FM_2,\n> - FN_SEL_FM_3,\n> - FN_SEL_SCIF5_0,\n> - FN_SEL_SCIF5_1,\n> - FN_SEL_I2C6_0,\n> - FN_SEL_I2C6_1,\n> - FN_SEL_I2C6_2,\n> - FN_SEL_NDF_0,\n> - FN_SEL_NDF_1,\n> - FN_SEL_SSI2_0,\n> - FN_SEL_SSI2_1,\n> - FN_SEL_SSI9_0,\n> - FN_SEL_SSI9_1,\n> - FN_SEL_TIMER_TMU2_0,\n> - FN_SEL_TIMER_TMU2_1,\n> - FN_SEL_ADG_B_0,\n> - FN_SEL_ADG_B_1,\n> - FN_SEL_ADG_C_0,\n> - FN_SEL_ADG_C_1,\n> - FN_SEL_VIN4_0,\n> - FN_SEL_VIN4_1,\n> -\n> - PINMUX_FUNCTION_END,\n> -\n> - PINMUX_MARK_BEGIN,\n> -\n> - /* GPSR0 */\n> - D15_GMARK,\n> - D14_GMARK,\n> - D13_GMARK,\n> - D12_GMARK,\n> - D11_GMARK,\n> - D10_GMARK,\n> - D9_GMARK,\n> - D8_GMARK,\n> - D7_GMARK,\n> - D6_GMARK,\n> - D5_GMARK,\n> - D4_GMARK,\n> - D3_GMARK,\n> - D2_GMARK,\n> - D1_GMARK,\n> - D0_GMARK,\n> -\n> - /* GPSR1 */\n> - CLKOUT_GMARK,\n> - EX_WAIT0_A_GMARK,\n> - WE1x_GMARK,\n> - WE0x_GMARK,\n> - RD_WRx_GMARK,\n> - RDx_GMARK,\n> - BSx_GMARK,\n> - CS1x_A26_GMARK,\n> - CS0x_GMARK,\n> - A19_GMARK,\n> - A18_GMARK,\n> - A17_GMARK,\n> - A16_GMARK,\n> - A15_GMARK,\n> - A14_GMARK,\n> - A13_GMARK,\n> - A12_GMARK,\n> - A11_GMARK,\n> - A10_GMARK,\n> - A9_GMARK,\n> - A8_GMARK,\n> - A7_GMARK,\n> - A6_GMARK,\n> - A5_GMARK,\n> - A4_GMARK,\n> - A3_GMARK,\n> - A2_GMARK,\n> - A1_GMARK,\n> - A0_GMARK,\n> -\n> - /* GPSR2 */\n> - AVB_AVTP_CAPTURE_A_GMARK,\n> - AVB_AVTP_MATCH_A_GMARK,\n> - AVB_LINK_GMARK,\n> - AVB_PHY_INT_GMARK,\n> - AVB_MAGIC_GMARK,\n> - AVB_MDC_GMARK,\n> - PWM2_A_GMARK,\n> - PWM1_A_GMARK,\n> - PWM0_GMARK,\n> - IRQ5_GMARK,\n> - IRQ4_GMARK,\n> - IRQ3_GMARK,\n> - IRQ2_GMARK,\n> - IRQ1_GMARK,\n> - IRQ0_GMARK,\n> -\n> - /* GPSR3 */\n> - SD1_WP_GMARK,\n> - SD1_CD_GMARK,\n> - SD0_WP_GMARK,\n> - SD0_CD_GMARK,\n> - SD1_DAT3_GMARK,\n> - SD1_DAT2_GMARK,\n> - SD1_DAT1_GMARK,\n> - SD1_DAT0_GMARK,\n> - SD1_CMD_GMARK,\n> - SD1_CLK_GMARK,\n> - SD0_DAT3_GMARK,\n> - SD0_DAT2_GMARK,\n> - SD0_DAT1_GMARK,\n> - SD0_DAT0_GMARK,\n> - SD0_CMD_GMARK,\n> - SD0_CLK_GMARK,\n> -\n> - /* GPSR4 */\n> - SD3_DS_GMARK,\n> - SD3_DAT7_GMARK,\n> - SD3_DAT6_GMARK,\n> - SD3_DAT5_GMARK,\n> - SD3_DAT4_GMARK,\n> - SD3_DAT3_MARK,\n> - SD3_DAT2_MARK,\n> - SD3_DAT1_MARK,\n> - SD3_DAT0_MARK,\n> - SD3_CMD_MARK,\n> - SD3_CLK_MARK,\n> - SD2_DS_GMARK,\n> - SD2_DAT3_GMARK,\n> - SD2_DAT2_GMARK,\n> - SD2_DAT1_GMARK,\n> - SD2_DAT0_GMARK,\n> - SD2_CMD_MARK,\n> - SD2_CLK_GMARK,\n> -\n> - /* GPSR5 */\n> - MLB_DAT_GMARK,\n> - MLB_SIG_GMARK,\n> - MLB_CLK_GMARK,\n> - MSIOF0_RXD_MARK,\n> - MSIOF0_SS2_GMARK,\n> - MSIOF0_TXD_MARK,\n> - MSIOF0_SS1_GMARK,\n> - MSIOF0_SYNC_GMARK,\n> - MSIOF0_SCK_MARK,\n> - HRTS0x_GMARK,\n> - HCTS0x_GMARK,\n> - HTX0_GMARK,\n> - HRX0_GMARK,\n> - HSCK0_GMARK,\n> - RX2_A_GMARK,\n> - TX2_A_GMARK,\n> - SCK2_GMARK,\n> - RTS1x_TANS_GMARK,\n> - CTS1x_GMARK,\n> - TX1_A_GMARK,\n> - RX1_A_GMARK,\n> - RTS0x_TANS_GMARK,\n> - CTS0x_GMARK,\n> - TX0_GMARK,\n> - RX0_GMARK,\n> - SCK0_GMARK,\n> -\n> - /* GPSR6 */\n> - GP6_30_GMARK,\n> - GP6_31_GMARK,\n> - USB30_OVC_GMARK,\n> - USB30_PWEN_GMARK,\n> - USB1_OVC_GMARK,\n> - USB1_PWEN_GMARK,\n> - USB0_OVC_GMARK,\n> - USB0_PWEN_GMARK,\n> - AUDIO_CLKB_B_GMARK,\n> - AUDIO_CLKA_A_GMARK,\n> - SSI_SDATA9_A_GMARK,\n> - SSI_SDATA8_GMARK,\n> - SSI_SDATA7_GMARK,\n> - SSI_WS78_GMARK,\n> - SSI_SCK78_GMARK,\n> - SSI_SDATA6_GMARK,\n> - SSI_WS6_GMARK,\n> - SSI_SCK6_GMARK,\n> - SSI_SDATA5_MARK,\n> - SSI_WS5_MARK,\n> - SSI_SCK5_MARK,\n> - SSI_SDATA4_GMARK,\n> - SSI_WS4_GMARK,\n> - SSI_SCK4_GMARK,\n> - SSI_SDATA3_GMARK,\n> - SSI_WS34_GMARK,\n> - SSI_SCK34_GMARK,\n> - SSI_SDATA2_A_GMARK,\n> - SSI_SDATA1_A_GMARK,\n> - SSI_SDATA0_GMARK,\n> - SSI_WS01239_GMARK,\n> - SSI_SCK01239_GMARK,\n> -\n> - /* GPSR7 */\n> - HDMI1_CEC_MARK,\n> - HDMI0_CEC_MARK,\n> - AVS2_MARK,\n> - AVS1_MARK,\n> -\n> - /* IPSR0 */\n> - AVB_MDC_IMARK,\n> - MSIOF2_SS2_C_MARK,\n> - AVB_MAGIC_IMARK,\n> - MSIOF2_SS1_C_MARK,\n> - SCK4_A_MARK,\n> - AVB_PHY_INT_IMARK,\n> - MSIOF2_SYNC_C_MARK,\n> - RX4_A_MARK,\n> - AVB_LINK_IMARK,\n> - MSIOF2_SCK_C_MARK,\n> - TX4_A_MARK,\n> - AVB_AVTP_MATCH_A_IMARK,\n> - MSIOF2_RXD_C_MARK,\n> - CTS4x_A_MARK,\n> - AVB_AVTP_CAPTURE_A_IMARK,\n> - MSIOF2_TXD_C_MARK,\n> - RTS4x_TANS_A_MARK,\n> - IRQ0_IMARK,\n> - QPOLB_MARK,\n> - DU_CDE_MARK,\n> - VI4_DATA0_B_MARK,\n> - CAN0_TX_B_MARK,\n> - CANFD0_TX_B_MARK,\n> - MSIOF3_SS2_E_MARK,\n> - IRQ1_IMARK,\n> - QPOLA_MARK,\n> - DU_DISP_MARK,\n> - VI4_DATA1_B_MARK,\n> - CAN0_RX_B_MARK,\n> - CANFD0_RX_B_MARK,\n> - MSIOF3_SS1_E_MARK,\n> -\n> - /* IPSR1 */\n> - IRQ2_IMARK,\n> - QCPV_QDE_MARK,\n> - DU_EXODDF_DU_ODDF_DISP_CDE_MARK,\n> - VI4_DATA2_B_MARK,\n> - MSIOF3_SYNC_E_MARK,\n> - PWM3_B_MARK,\n> - IRQ3_IMARK,\n> - QSTVB_QVE_MARK,\n> - DU_DOTCLKOUT1_MARK,\n> - VI4_DATA3_B_MARK,\n> - MSIOF3_SCK_E_MARK,\n> - PWM4_B_MARK,\n> - IRQ4_IMARK,\n> - QSTH_QHS_MARK,\n> - DU_EXHSYNC_DU_HSYNC_MARK,\n> - VI4_DATA4_B_MARK,\n> - MSIOF3_RXD_E_MARK,\n> - PWM5_B_MARK,\n> - IRQ5_IMARK,\n> - QSTB_QHE_MARK,\n> - DU_EXVSYNC_DU_VSYNC_MARK,\n> - VI4_DATA5_B_MARK,\n> - MSIOF3_TXD_E_MARK,\n> - PWM6_B_MARK,\n> - PWM0_IMARK,\n> - AVB_AVTP_PPS_MARK,\n> - VI4_DATA6_B_MARK,\n> - IECLK_B_MARK,\n> - PWM1_A_IMARK,\n> - HRX3_D_MARK,\n> - VI4_DATA7_B_MARK,\n> - IERX_B_MARK,\n> - PWM2_A_IMARK,\n> - PWMFSW0_MARK,\n> - HTX3_D_MARK,\n> - IETX_B_MARK,\n> - A0_IMARK,\n> - LCDOUT16_MARK,\n> - MSIOF3_SYNC_B_MARK,\n> - VI4_DATA8_MARK,\n> - DU_DB0_MARK,\n> - PWM3_A_MARK,\n> -\n> - /* IPSR2 */\n> - A1_IMARK,\n> - LCDOUT17_MARK,\n> - MSIOF3_TXD_B_MARK,\n> - VI4_DATA9_MARK,\n> - DU_DB1_MARK,\n> - PWM4_A_MARK,\n> - A2_IMARK,\n> - LCDOUT18_MARK,\n> - MSIOF3_SCK_B_MARK,\n> - VI4_DATA10_MARK,\n> - DU_DB2_MARK,\n> - PWM5_A_MARK,\n> - A3_IMARK,\n> - LCDOUT19_MARK,\n> - MSIOF3_RXD_B_MARK,\n> - VI4_DATA11_MARK,\n> - DU_DB3_MARK,\n> - PWM6_A_MARK,\n> - A4_IMARK,\n> - LCDOUT20_MARK,\n> - MSIOF3_SS1_B_MARK,\n> - VI4_DATA12_MARK,\n> - VI5_DATA12_MARK,\n> - DU_DB4_MARK,\n> - A5_IMARK,\n> - LCDOUT21_MARK,\n> - MSIOF3_SS2_B_MARK,\n> - SCK4_B_MARK,\n> - VI4_DATA13_MARK,\n> - VI5_DATA13_MARK,\n> - DU_DB5_MARK,\n> - A6_IMARK,\n> - LCDOUT22_MARK,\n> - MSIOF2_SS1_A_MARK,\n> - RX4_B_MARK,\n> - VI4_DATA14_MARK,\n> - VI5_DATA14_MARK,\n> - DU_DB6_MARK,\n> - A7_IMARK,\n> - LCDOUT23_MARK,\n> - MSIOF2_SS2_A_MARK,\n> - TX4_B_MARK,\n> - VI4_DATA15_MARK,\n> - V15_DATA15_MARK,\n> - DU_DB7_MARK,\n> - A8_IMARK,\n> - RX3_B_MARK,\n> - MSIOF2_SYNC_A_MARK,\n> - HRX4_B_MARK,\n> - SDA6_A_MARK,\n> - AVB_AVTP_MATCH_B_MARK,\n> - PWM1_B_MARK,\n> -\n> - /* IPSR3 */\n> - A9_IMARK,\n> - MSIOF2_SCK_A_MARK,\n> - CTS4x_B_MARK,\n> - VI5_VSYNCx_MARK,\n> - A10_IMARK,\n> - MSIOF2_RXD_A_MARK,\n> - RTS4n_TANS_B_MARK,\n> - VI5_HSYNCx_MARK,\n> - A11_IMARK,\n> - TX3_B_MARK,\n> - MSIOF2_TXD_A_MARK,\n> - HTX4_B_MARK,\n> - HSCK4_MARK,\n> - VI5_FIELD_MARK,\n> - SCL6_A_MARK,\n> - AVB_AVTP_CAPTURE_B_MARK,\n> - PWM2_B_MARK,\n> - SPV_EVEN_MARK,\n> - A12_IMARK,\n> - LCDOUT12_MARK,\n> - MSIOF3_SCK_C_MARK,\n> - HRX4_A_MARK,\n> - VI5_DATA8_MARK,\n> - DU_DG4_MARK,\n> - A13_IMARK,\n> - LCDOUT13_MARK,\n> - MSIOF3_SYNC_C_MARK,\n> - HTX4_A_MARK,\n> - VI5_DATA9_MARK,\n> - DU_DG5_MARK,\n> - A14_IMARK,\n> - LCDOUT14_MARK,\n> - MSIOF3_RXD_C_MARK,\n> - HCTS4x_MARK,\n> - VI5_DATA10_MARK,\n> - DU_DG6_MARK,\n> - A15_IMARK,\n> - LCDOUT15_MARK,\n> - MSIOF3_TXD_C_MARK,\n> - HRTS4x_MARK,\n> - VI5_DATA11_MARK,\n> - DU_DG7_MARK,\n> - A16_IMARK,\n> - LCDOUT8_MARK,\n> - VI4_FIELD_MARK,\n> - DU_DG0_MARK,\n> -\n> - /* IPSR4 */\n> - A17_IMARK,\n> - LCDOUT9_MARK,\n> - VI4_VSYNCx_MARK,\n> - DU_DG1_MARK,\n> - A18_IMARK,\n> - LCDOUT10_MARK,\n> - VI4_HSYNCx_MARK,\n> - DU_DG2_MARK,\n> - A19_IMARK,\n> - LCDOUT11_MARK,\n> - VI4_CLKENB_MARK,\n> - DU_DG3_MARK,\n> - CS0x_IMARK,\n> - VI5_CLKENB_MARK,\n> - CS1x_A26_IMARK,\n> - VI5_CLK_MARK,\n> - EX_WAIT0_B_MARK,\n> - BSx_IMARK,\n> - QSTVA_QVS_MARK,\n> - MSIOF3_SCK_D_MARK,\n> - SCK3_MARK,\n> - HSCK3_MARK,\n> - CAN1_TX_MARK,\n> - CANFD1_TX_MARK,\n> - IETX_A_MARK,\n> - RDx_IMARK,\n> - MSIOF3_SYNC_D_MARK,\n> - RX3_A_MARK,\n> - HRX3_A_MARK,\n> - CAN0_TX_A_MARK,\n> - CANFD0_TX_A_MARK,\n> - RD_WRx_IMARK,\n> - MSIOF3_RXD_D_MARK,\n> - TX3_A_MARK,\n> - HTX3_A_MARK,\n> - CAN0_RX_A_MARK,\n> - CANFD0_RX_A_MARK,\n> -\n> - /* IPSR5 */\n> - WE0x_IMARK,\n> - MSIIOF3_TXD_D_MARK,\n> - CTS3x_MARK,\n> - HCTS3x_MARK,\n> - SCL6_B_MARK,\n> - CAN_CLK_MARK,\n> - IECLK_A_MARK,\n> - WE1x_IMARK,\n> - MSIOF3_SS1_D_MARK,\n> - RTS3x_TANS_MARK,\n> - HRTS3x_MARK,\n> - SDA6_B_MARK,\n> - CAN1_RX_MARK,\n> - CANFD1_RX_MARK,\n> - IERX_A_MARK,\n> - EX_WAIT0_A_IMARK,\n> - QCLK_MARK,\n> - VI4_CLK_MARK,\n> - DU_DOTCLKOUT0_MARK,\n> - D0_IMARK,\n> - MSIOF2_SS1_B_MARK,\n> - MSIOF3_SCK_A_MARK,\n> - VI4_DATA16_MARK,\n> - VI5_DATA0_MARK,\n> - D1_IMARK,\n> - MSIOF2_SS2_B_MARK,\n> - MSIOF3_SYNC_A_MARK,\n> - VI4_DATA17_MARK,\n> - VI5_DATA1_MARK,\n> - D2_IMARK,\n> - MSIOF3_RXD_A_MARK,\n> - VI4_DATA18_MARK,\n> - VI5_DATA2_MARK,\n> - D3_IMARK,\n> - MSIOF3_TXD_A_MARK,\n> - VI4_DATA19_MARK,\n> - VI5_DATA3_MARK,\n> - D4_IMARK,\n> - MSIOF2_SCK_B_MARK,\n> - VI4_DATA20_MARK,\n> - VI5_DATA4_MARK,\n> -\n> - /* IPSR6 */\n> - D5_IMARK,\n> - MSIOF2_SYNC_B_MARK,\n> - VI4_DATA21_MARK,\n> - VI5_DATA5_MARK,\n> - D6_IMARK,\n> - MSIOF2_RXD_B_MARK,\n> - VI4_DATA22_MARK,\n> - VI5_DATA6_MARK,\n> - D7_IMARK,\n> - MSIOF2_TXD_B_MARK,\n> - VI4_DATA23_MARK,\n> - VI5_DATA7_MARK,\n> - D8_IMARK,\n> - LCDOUT0_MARK,\n> - MSIOF2_SCK_D_MARK,\n> - SCK4_C_MARK,\n> - VI4_DATA0_A_MARK,\n> - DU_DR0_MARK,\n> - D9_IMARK,\n> - LCDOUT1_MARK,\n> - MSIOF2_SYNC_D_MARK,\n> - VI4_DATA1_A_MARK,\n> - DU_DR1_MARK,\n> - D10_IMARK,\n> - LCDOUT2_MARK,\n> - MSIOF2_RXD_D_MARK,\n> - HRX3_B_MARK,\n> - VI4_DATA2_A_MARK,\n> - CTS4x_C_MARK,\n> - DU_DR2_MARK,\n> - D11_IMARK,\n> - LCDOUT3_MARK,\n> - MSIOF2_TXD_D_MARK,\n> - HTX3_B_MARK,\n> - VI4_DATA3_A_MARK,\n> - RTS4x_TANS_C_MARK,\n> - DU_DR3_MARK,\n> - D12_IMARK,\n> - LCDOUT4_MARK,\n> - MSIOF2_SS1_D_MARK,\n> - RX4_C_MARK,\n> - VI4_DATA4_A_MARK,\n> - DU_DR4_MARK,\n> -\n> - /* IPSR7 */\n> - D13_IMARK,\n> - LCDOUT5_MARK,\n> - MSIOF2_SS2_D_MARK,\n> - TX4_C_MARK,\n> - VI4_DATA5_A_MARK,\n> - DU_DR5_MARK,\n> - D14_IMARK,\n> - LCDOUT6_MARK,\n> - MSIOF3_SS1_A_MARK,\n> - HRX3_C_MARK,\n> - VI4_DATA6_A_MARK,\n> - DU_DR6_MARK,\n> - SCL6_C_MARK,\n> - D15_IMARK,\n> - LCDOUT7_MARK,\n> - MSIOF3_SS2_A_MARK,\n> - HTX3_C_MARK,\n> - VI4_DATA7_A_MARK,\n> - DU_DR7_MARK,\n> - SDA6_C_MARK,\n> - FSCLKST_MARK,\n> - SD0_CLK_IMARK,\n> - MSIOF1_SCK_E_MARK,\n> - STP_OPWM_0_B_MARK,\n> - SD0_CMD_IMARK,\n> - MSIOF1_SYNC_E_MARK,\n> - STP_IVCXO27_0_B_MARK,\n> - SD0_DAT0_IMARK,\n> - MSIOF1_RXD_E_MARK,\n> - TS_SCK0_B_MARK,\n> - STP_ISCLK_0_B_MARK,\n> - SD0_DAT1_IMARK,\n> - MSIOF1_TXD_E_MARK,\n> - TS_SPSYNC0_B_MARK,\n> - STP_ISSYNC_0_B_MARK,\n> -\n> - /* IPSR8 */\n> - SD0_DAT2_IMARK,\n> - MSIOF1_SS1_E_MARK,\n> - TS_SDAT0_B_MARK,\n> - STP_ISD_0_B_MARK,\n> -\n> - SD0_DAT3_IMARK,\n> - MSIOF1_SS2_E_MARK,\n> - TS_SDEN0_B_MARK,\n> - STP_ISEN_0_B_MARK,\n> -\n> - SD1_CLK_IMARK,\n> - MSIOF1_SCK_G_MARK,\n> - SIM0_CLK_A_MARK,\n> -\n> - SD1_CMD_IMARK,\n> - MSIOF1_SYNC_G_MARK,\n> - NFCEx_B_MARK,\n> - SIM0_D_A_MARK,\n> - STP_IVCXO27_1_B_MARK,\n> -\n> - SD1_DAT0_IMARK,\n> - SD2_DAT4_MARK,\n> - MSIOF1_RXD_G_MARK,\n> - NFWPx_B_MARK,\n> - TS_SCK1_B_MARK,\n> - STP_ISCLK_1_B_MARK,\n> -\n> - SD1_DAT1_IMARK,\n> - SD2_DAT5_MARK,\n> - MSIOF1_TXD_G_MARK,\n> - NFDATA14_B_MARK,\n> - TS_SPSYNC1_B_MARK,\n> - STP_ISSYNC_1_B_MARK,\n> -\n> - SD1_DAT2_IMARK,\n> - SD2_DAT6_MARK,\n> - MSIOF1_SS1_G_MARK,\n> - NFDATA15_B_MARK,\n> - TS_SDAT1_B_MARK,\n> - STP_IOD_1_B_MARK,\n> -\n> - SD1_DAT3_IMARK,\n> - SD2_DAT7_MARK,\n> - MSIOF1_SS2_G_MARK,\n> - NFRBx_B_MARK,\n> - TS_SDEN1_B_MARK,\n> - STP_ISEN_1_B_MARK,\n> -\n> - /* IPSR9 */\n> - SD2_CLK_IMARK,\n> - NFDATA8_MARK,\n> -\n> - SD2_CMD_IMARK,\n> - NFDATA9_MARK,\n> -\n> - SD2_DAT0_IMARK,\n> - NFDATA10_MARK,\n> -\n> - SD2_DAT1_IMARK,\n> - NFDATA11_MARK,\n> -\n> - SD2_DAT2_IMARK,\n> - NFDATA12_MARK,\n> -\n> - SD2_DAT3_IMARK,\n> - NFDATA13_MARK,\n> -\n> - SD2_DS_IMARK,\n> - NFALE_MARK,\n> -\n> - SD3_CLK_IMARK,\n> - NFWEx_MARK,\n> -\n> - /* IPSR10 */\n> - SD3_CMD_IMARK,\n> - NFREx_MARK,\n> -\n> - SD3_DAT0_IMARK,\n> - NFDATA0_MARK,\n> -\n> - SD3_DAT1_IMARK,\n> - NFDATA1_MARK,\n> -\n> - SD3_DAT2_IMARK,\n> - NFDATA2_MARK,\n> -\n> - SD3_DAT3_IMARK,\n> - NFDATA3_MARK,\n> -\n> - SD3_DAT4_IMARK,\n> - SD2_CD_A_MARK,\n> - NFDATA4_MARK,\n> -\n> - SD3_DAT5_IMARK,\n> - SD2_WP_A_MARK,\n> - NFDATA5_MARK,\n> -\n> - SD3_DAT6_IMARK,\n> - SD3_CD_MARK,\n> - NFDATA6_MARK,\n> -\n> - /* IPSR11 */\n> - SD3_DAT7_IMARK,\n> - SD3_WP_MARK,\n> - NFDATA7_MARK,\n> -\n> - SD3_DS_IMARK,\n> - NFCLE_MARK,\n> -\n> - SD0_CD_IMARK,\n> - NFDATA14_A_MARK,\n> - SCL2_B_MARK,\n> - SIM0_RST_A_MARK,\n> -\n> - SD0_WP_IMARK,\n> - NFDATA15_A_MARK,\n> - SDA2_B_MARK,\n> -\n> - SD1_CD_IMARK,\n> - NFRBx_A_MARK,\n> - SIM0_CLK_B_MARK,\n> -\n> - SD1_WP_IMARK,\n> - NFCEx_A_MARK,\n> - SIM0_D_B_MARK,\n> -\n> - SCK0_IMARK,\n> - HSCK1_B_MARK,\n> - MSIOF1_SS2_B_MARK,\n> - AUDIO_CLKC_B_MARK,\n> - SDA2_A_MARK,\n> - SIM0_RST_B_MARK,\n> - STP_OPWM_0_C_MARK,\n> - RIF0_CLK_B_MARK,\n> - ADICHS2_MARK,\n> - SCK5_B_MARK,\n> -\n> - RX0_IMARK,\n> - HRX1_B_MARK,\n> - TS_SCK0_C_MARK,\n> - STP_ISCLK_0_C_MARK,\n> - RIF0_D0_B_MARK,\n> -\n> - /* IPSR12 */\n> - TX0_IMARK,\n> - HTX1_B_MARK,\n> - TS_SPSYNC0_C_MARK,\n> - STP_ISSYNC_0_C_MARK,\n> - RIF0_D1_B_MARK,\n> -\n> - CTS0x_IMARK,\n> - HCTS1x_B_MARK,\n> - MSIOF1_SYNC_B_MARK,\n> - TS_SPSYNC1_C_MARK,\n> - STP_ISSYNC_1_C_MARK,\n> - RIF1_SYNC_B_MARK,\n> - AUDIO_CLKOUT_C_MARK,\n> - ADICS_SAMP_MARK,\n> -\n> - RTS0x_TANS_IMARK,\n> - HRTS1x_B_MARK,\n> - MSIOF1_SS1_B_MARK,\n> - AUDIO_CLKA_B_MARK,\n> - SCL2_A_MARK,\n> - STP_IVCXO27_1_C_MARK,\n> - RIF0_SYNC_B_MARK,\n> - ADICHS1_MARK,\n> -\n> - RX1_A_IMARK,\n> - HRX1_A_MARK,\n> - TS_SDAT0_C_MARK,\n> - STP_ISD_0_C_MARK,\n> - RIF1_CLK_C_MARK,\n> -\n> - TX1_A_IMARK,\n> - HTX1_A_MARK,\n> - TS_SDEN0_C_MARK,\n> - STP_ISEN_0_C_MARK,\n> - RIF1_D0_C_MARK,\n> -\n> - CTS1x_IMARK,\n> - HCTS1x_A_MARK,\n> - MSIOF1_RXD_B_MARK,\n> - TS_SDEN1_C_MARK,\n> - STP_ISEN_1_C_MARK,\n> - RIF1_D0_B_MARK,\n> - ADIDATA_MARK,\n> -\n> - RTS1x_TANS_IMARK,\n> - HRTS1x_A_MARK,\n> - MSIOF1_TXD_B_MARK,\n> - TS_SDAT1_C_MARK,\n> - STP_ISD_1_C_MARK,\n> - RIF1_D1_B_MARK,\n> - ADICHS0_MARK,\n> -\n> - SCK2_IMARK,\n> - SCIF_CLK_B_MARK,\n> - MSIOF1_SCK_B_MARK,\n> - TS_SCK1_C_MARK,\n> - STP_ISCLK_1_C_MARK,\n> - RIF1_CLK_B_MARK,\n> - ADICLK_MARK,\n> -\n> - /* IPSR13 */\n> - TX2_A_IMARK,\n> - SD2_CD_B_MARK,\n> - SCL1_A_MARK,\n> - FMCLK_A_MARK,\n> - RIF1_D1_C_MARK,\n> - FSO_CFE_0_B_MARK,\n> -\n> - RX2_A_IMARK,\n> - SD2_WP_B_MARK,\n> - SDA1_A_MARK,\n> - FMIN_A_MARK,\n> - RIF1_SYNC_C_MARK,\n> - FSO_CEF_1_B_MARK,\n> -\n> - HSCK0_IMARK,\n> - MSIOF1_SCK_D_MARK,\n> - AUDIO_CLKB_A_MARK,\n> - SSI_SDATA1_B_MARK,\n> - TS_SCK0_D_MARK,\n> - STP_ISCLK_0_D_MARK,\n> - RIF0_CLK_C_MARK,\n> - RX5_B_MARK,\n> -\n> - HRX0_IMARK,\n> - MSIOF1_RXD_D_MARK,\n> - SS1_SDATA2_B_MARK,\n> - TS_SDEN0_D_MARK,\n> - STP_ISEN_0_D_MARK,\n> - RIF0_D0_C_MARK,\n> -\n> - HTX0_IMARK,\n> - MSIOF1_TXD_D_MARK,\n> - SSI_SDATA9_B_MARK,\n> - TS_SDAT0_D_MARK,\n> - STP_ISD_0_D_MARK,\n> - RIF0_D1_C_MARK,\n> -\n> - HCTS0x_IMARK,\n> - RX2_B_MARK,\n> - MSIOF1_SYNC_D_MARK,\n> - SSI_SCK9_A_MARK,\n> - TS_SPSYNC0_D_MARK,\n> - STP_ISSYNC_0_D_MARK,\n> - RIF0_SYNC_C_MARK,\n> - AUDIO_CLKOUT1_A_MARK,\n> -\n> - HRTS0x_IMARK,\n> - TX2_B_MARK,\n> - MSIOF1_SS1_D_MARK,\n> - SSI_WS9_A_MARK,\n> - STP_IVCXO27_0_D_MARK,\n> - BPFCLK_A_MARK,\n> - AUDIO_CLKOUT2_A_MARK,\n> -\n> - MSIOF0_SYNC_IMARK,\n> - AUDIO_CLKOUT_A_MARK,\n> - TX5_B_MARK,\n> - BPFCLK_D_MARK,\n> -\n> - /* IPSR14 */\n> - MSIOF0_SS1_IMARK,\n> - RX5_A_MARK,\n> - NFWPx_A_MARK,\n> - AUDIO_CLKA_C_MARK,\n> - SSI_SCK2_A_MARK,\n> - STP_IVCXO27_0_C_MARK,\n> - AUDIO_CLKOUT3_A_MARK,\n> - TCLK1_B_MARK,\n> -\n> - MSIOF0_SS2_IMARK,\n> - TX5_A_MARK,\n> - MSIOF1_SS2_D_MARK,\n> - AUDIO_CLKC_A_MARK,\n> - SSI_WS2_A_MARK,\n> - STP_OPWM_0_D_MARK,\n> - AUDIO_CLKOUT_D_MARK,\n> - SPEEDIN_B_MARK,\n> -\n> - MLB_CLK_IMARK,\n> - MSIOF1_SCK_F_MARK,\n> - SCL1_B_MARK,\n> -\n> - MLB_SIG_IMARK,\n> - RX1_B_MARK,\n> - MSIOF1_SYNC_F_MARK,\n> - SDA1_B_MARK,\n> -\n> - MLB_DAT_IMARK,\n> - TX1_B_MARK,\n> - MSIOF1_RXD_F_MARK,\n> -\n> - SSI_SCK0129_IMARK,\n> - MSIOF1_TXD_F_MARK,\n> - MOUT0_MARK,\n> -\n> - SSI_WS0129_IMARK,\n> - MSIOF1_SS1_F_MARK,\n> - MOUT1_MARK,\n> -\n> - SSI_SDATA0_IMARK,\n> - MSIOF1_SS2_F_MARK,\n> - MOUT2_MARK,\n> -\n> - /* IPSR15 */\n> - SSI_SDATA1_A_IMARK,\n> - MOUT5_MARK,\n> -\n> - SSI_SDATA2_A_IMARK,\n> - SSI_SCK1_B_MARK,\n> - MOUT6_MARK,\n> -\n> - SSI_SCK34_IMARK,\n> - MSIOF1_SS1_A_MARK,\n> - STP_OPWM_0_A_MARK,\n> -\n> - SSI_WS34_IMARK,\n> - HCTS2x_A_MARK,\n> - MSIOF1_SS2_A_MARK,\n> - STP_IVCXO27_0_A_MARK,\n> -\n> - SSI_SDATA3_IMARK,\n> - HRTS2x_A_MARK,\n> - MSIOF1_TXD_A_MARK,\n> - TS_SCK0_A_MARK,\n> - STP_ISCLK_0_A_MARK,\n> - RIF0_D1_A_MARK,\n> - RIF2_D0_A_MARK,\n> -\n> - SSI_SCK4_IMARK,\n> - HRX2_A_MARK,\n> - MSIOF1_SCK_A_MARK,\n> - TS_SDAT0_A_MARK,\n> - STP_ISD_0_A_MARK,\n> - RIF0_CLK_A_MARK,\n> - RIF2_CLK_A_MARK,\n> -\n> - SSI_WS4_IMARK,\n> - HTX2_A_MARK,\n> - MSIOF1_SYNC_A_MARK,\n> - TS_SDEN0_A_MARK,\n> - STP_ISEN_0_A_MARK,\n> - RIF0_SYNC_A_MARK,\n> - RIF2_SYNC_A_MARK,\n> -\n> - SSI_SDATA4_IMARK,\n> - HSCK2_A_MARK,\n> - MSIOF1_RXD_A_MARK,\n> - TS_SPSYNC0_A_MARK,\n> - STP_ISSYNC_0_A_MARK,\n> - RIF0_D0_A_MARK,\n> - RIF2_D1_A_MARK,\n> -\n> - /* IPSR16 */\n> - SSI_SCK6_IMARK,\n> - SIM0_RST_D_MARK,\n> - FSO_TOE_A_MARK,\n> -\n> - SSI_WS6_IMARK,\n> - SIM0_D_D_MARK,\n> -\n> - SSI_SDATA6_IMARK,\n> - SIM0_CLK_D_MARK,\n> -\n> - SSI_SCK78_IMARK,\n> - HRX2_B_MARK,\n> - MSIOF1_SCK_C_MARK,\n> - TS_SCK1_A_MARK,\n> - STP_ISCLK_1_A_MARK,\n> - RIF1_CLK_A_MARK,\n> - RIF3_CLK_A_MARK,\n> -\n> - SSI_WS78_IMARK,\n> - HTX2_B_MARK,\n> - MSIOF1_SYNC_C_MARK,\n> - TS_SDAT1_A_MARK,\n> - STP_ISD_1_A_MARK,\n> - RIF1_SYNC_A_MARK,\n> - RIF3_SYNC_A_MARK,\n> -\n> - SSI_SDATA7_IMARK,\n> - HCTS2x_B_MARK,\n> - MSIOF1_RXD_C_MARK,\n> - TS_SDEN1_A_MARK,\n> - STP_IEN_1_A_MARK,\n> - RIF1_D0_A_MARK,\n> - RIF3_D0_A_MARK,\n> - TCLK2_A_MARK,\n> -\n> - SSI_SDATA8_IMARK,\n> - HRTS2x_B_MARK,\n> - MSIOF1_TXD_C_MARK,\n> - TS_SPSYNC1_A_MARK,\n> - STP_ISSYNC_1_A_MARK,\n> - RIF1_D1_A_MARK,\n> - EIF3_D1_A_MARK,\n> -\n> - SSI_SDATA9_A_IMARK,\n> - HSCK2_B_MARK,\n> - MSIOF1_SS1_C_MARK,\n> - HSCK1_A_MARK,\n> - SSI_WS1_B_MARK,\n> - SCK1_MARK,\n> - STP_IVCXO27_1_A_MARK,\n> - SCK5_MARK,\n> -\n> - /* IPSR17 */\n> - AUDIO_CLKA_A_IMARK,\n> - CC5_OSCOUT_MARK,\n> -\n> - AUDIO_CLKB_B_IMARK,\n> - SCIF_CLK_A_MARK,\n> - STP_IVCXO27_1_D_MARK,\n> - REMOCON_A_MARK,\n> - TCLK1_A_MARK,\n> -\n> - USB0_PWEN_IMARK,\n> - SIM0_RST_C_MARK,\n> - TS_SCK1_D_MARK,\n> - STP_ISCLK_1_D_MARK,\n> - BPFCLK_B_MARK,\n> - RIF3_CLK_B_MARK,\n> - FSO_CFE_1_A_MARK,\n> - HSCK2_C_MARK,\n> -\n> - USB0_OVC_IMARK,\n> - SIM0_D_C_MARK,\n> - TS_SDAT1_D_MARK,\n> - STP_ISD_1_D_MARK,\n> - RIF3_SYNC_B_MARK,\n> - HRX2_C_MARK,\n> -\n> - USB1_PWEN_IMARK,\n> - SIM0_CLK_C_MARK,\n> - SSI_SCK1_A_MARK,\n> - TS_SCK0_E_MARK,\n> - STP_ISCLK_0_E_MARK,\n> - FMCLK_B_MARK,\n> - RIF2_CLK_B_MARK,\n> - SPEEDIN_A_MARK,\n> - HTX2_C_MARK,\n> -\n> - USB1_OVC_IMARK,\n> - MSIOF1_SS2_C_MARK,\n> - SSI_WS1_A_MARK,\n> - TS_SDAT0_E_MARK,\n> - STP_ISD_0_E_MARK,\n> - FMIN_B_MARK,\n> - RIF2_SYNC_B_MARK,\n> - REMOCON_B_MARK,\n> - HCTS2x_C_MARK,\n> -\n> - USB30_PWEN_IMARK,\n> - AUDIO_CLKOUT_B_MARK,\n> - SSI_SCK2_B_MARK,\n> - TS_SDEN1_D_MARK,\n> - STP_ISEN_1_D_MARK,\n> - STP_OPWM_0_E_MARK,\n> - RIF3_D0_B_MARK,\n> - TCLK2_B_MARK,\n> - TPU0TO0_MARK,\n> - BPFCLK_C_MARK,\n> - HRTS2x_C_MARK,\n> -\n> - USB30_OVC_IMARK,\n> - AUDIO_CLKOUT1_B_MARK,\n> - SSI_WS2_B_MARK,\n> - TS_SPSYNC1_D_MARK,\n> - STP_ISSYNC_1_D_MARK,\n> - STP_IVCXO27_0_E_MARK,\n> - RIF3_D1_B_MARK,\n> - FSO_TOE_B_MARK,\n> - TPU0TO1_MARK,\n> -\n> - /* IPSR18 */\n> - GP6_30_IMARK,\n> - AUDIO_CLKOUT2_B_MARK,\n> - SSI_SCK9_B_MARK,\n> - TS_SDEN0_E_MARK,\n> - STP_ISEN_0_E_MARK,\n> - RIF2_D0_B_MARK,\n> - FSO_CFE_0_A_MARK,\n> - TPU0TO2_MARK,\n> - FMCLK_C_MARK,\n> - FMCLK_D_MARK,\n> -\n> - GP6_31_IMARK,\n> - AUDIO_CLKOUT3_B_MARK,\n> - SSI_WS9_B_MARK,\n> - TS_SPSYNC0_E_MARK,\n> - STP_ISSYNC_0_E_MARK,\n> - RIF2_D1_B_MARK,\n> - TPU0TO3_MARK,\n> - FMIN_C_MARK,\n> - FMIN_D_MARK,\n> -\n> - PINMUX_MARK_END,\n> -};\n> -\n> -static pinmux_enum_t pinmux_data[] = {\n> - PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */\n> -\n> - /* GPSR0 */\n> - PINMUX_DATA(D15_GMARK, GFN_D15),\n> - PINMUX_DATA(D14_GMARK, GFN_D14),\n> - PINMUX_DATA(D13_GMARK, GFN_D13),\n> - PINMUX_DATA(D12_GMARK, GFN_D12),\n> - PINMUX_DATA(D11_GMARK, GFN_D11),\n> - PINMUX_DATA(D10_GMARK, GFN_D10),\n> - PINMUX_DATA(D9_GMARK, GFN_D9),\n> - PINMUX_DATA(D8_GMARK, GFN_D8),\n> - PINMUX_DATA(D7_GMARK, GFN_D7),\n> - PINMUX_DATA(D6_GMARK, GFN_D6),\n> - PINMUX_DATA(D5_GMARK, GFN_D5),\n> - PINMUX_DATA(D4_GMARK, GFN_D4),\n> - PINMUX_DATA(D3_GMARK, GFN_D3),\n> - PINMUX_DATA(D2_GMARK, GFN_D2),\n> - PINMUX_DATA(D1_GMARK, GFN_D1),\n> - PINMUX_DATA(D0_GMARK, GFN_D0),\n> -\n> - /* GPSR1 */\n> - PINMUX_DATA(CLKOUT_GMARK, GFN_CLKOUT),\n> - PINMUX_DATA(EX_WAIT0_A_GMARK, GFN_EX_WAIT0_A),\n> - PINMUX_DATA(WE1x_GMARK, GFN_WE1x),\n> - PINMUX_DATA(WE0x_GMARK, GFN_WE0x),\n> - PINMUX_DATA(RD_WRx_GMARK, GFN_RD_WRx),\n> - PINMUX_DATA(RDx_GMARK, GFN_RDx),\n> - PINMUX_DATA(BSx_GMARK, GFN_BSx),\n> - PINMUX_DATA(CS1x_A26_GMARK, GFN_CS1x_A26),\n> - PINMUX_DATA(CS0x_GMARK, GFN_CS0x),\n> - PINMUX_DATA(A19_GMARK, GFN_A19),\n> - PINMUX_DATA(A18_GMARK, GFN_A18),\n> - PINMUX_DATA(A17_GMARK, GFN_A17),\n> - PINMUX_DATA(A16_GMARK, GFN_A16),\n> - PINMUX_DATA(A15_GMARK, GFN_A15),\n> - PINMUX_DATA(A14_GMARK, GFN_A14),\n> - PINMUX_DATA(A13_GMARK, GFN_A13),\n> - PINMUX_DATA(A12_GMARK, GFN_A12),\n> - PINMUX_DATA(A11_GMARK, GFN_A11),\n> - PINMUX_DATA(A10_GMARK, GFN_A10),\n> - PINMUX_DATA(A9_GMARK, GFN_A9),\n> - PINMUX_DATA(A8_GMARK, GFN_A8),\n> - PINMUX_DATA(A7_GMARK, GFN_A7),\n> - PINMUX_DATA(A6_GMARK, GFN_A6),\n> - PINMUX_DATA(A5_GMARK, GFN_A5),\n> - PINMUX_DATA(A4_GMARK, GFN_A4),\n> - PINMUX_DATA(A3_GMARK, GFN_A3),\n> - PINMUX_DATA(A2_GMARK, GFN_A2),\n> - PINMUX_DATA(A1_GMARK, GFN_A1),\n> - PINMUX_DATA(A0_GMARK, GFN_A0),\n> -\n> - /* GPSR2 */\n> - PINMUX_DATA(AVB_AVTP_CAPTURE_A_GMARK, GFN_AVB_AVTP_CAPTURE_A),\n> - PINMUX_DATA(AVB_AVTP_MATCH_A_GMARK, GFN_AVB_AVTP_MATCH_A),\n> - PINMUX_DATA(AVB_LINK_GMARK, GFN_AVB_LINK),\n> - PINMUX_DATA(AVB_PHY_INT_GMARK, GFN_AVB_PHY_INT),\n> - PINMUX_DATA(AVB_MAGIC_GMARK, GFN_AVB_MAGIC),\n> - PINMUX_DATA(AVB_MDC_GMARK, GFN_AVB_MDC),\n> - PINMUX_DATA(PWM2_A_GMARK, GFN_PWM2_A),\n> - PINMUX_DATA(PWM1_A_GMARK, GFN_PWM1_A),\n> - PINMUX_DATA(PWM0_GMARK, GFN_PWM0),\n> - PINMUX_DATA(IRQ5_GMARK, GFN_IRQ5),\n> - PINMUX_DATA(IRQ4_GMARK, GFN_IRQ4),\n> - PINMUX_DATA(IRQ3_GMARK, GFN_IRQ3),\n> - PINMUX_DATA(IRQ2_GMARK, GFN_IRQ2),\n> - PINMUX_DATA(IRQ1_GMARK, GFN_IRQ1),\n> - PINMUX_DATA(IRQ0_GMARK, GFN_IRQ0),\n> -\n> - /* GPSR3 */\n> - PINMUX_DATA(SD1_WP_GMARK, GFN_SD1_WP),\n> - PINMUX_DATA(SD1_CD_GMARK, GFN_SD1_CD),\n> - PINMUX_DATA(SD0_WP_GMARK, GFN_SD0_WP),\n> - PINMUX_DATA(SD0_CD_GMARK, GFN_SD0_CD),\n> - PINMUX_DATA(SD1_DAT3_GMARK, GFN_SD1_DAT3),\n> - PINMUX_DATA(SD1_DAT2_GMARK, GFN_SD1_DAT2),\n> - PINMUX_DATA(SD1_DAT1_GMARK, GFN_SD1_DAT1),\n> - PINMUX_DATA(SD1_DAT0_GMARK, GFN_SD1_DAT0),\n> - PINMUX_DATA(SD1_CMD_GMARK, GFN_SD1_CMD),\n> - PINMUX_DATA(SD1_CLK_GMARK, GFN_SD1_CLK),\n> - PINMUX_DATA(SD0_DAT3_GMARK, GFN_SD0_DAT3),\n> - PINMUX_DATA(SD0_DAT2_GMARK, GFN_SD0_DAT2),\n> - PINMUX_DATA(SD0_DAT1_GMARK, GFN_SD0_DAT1),\n> - PINMUX_DATA(SD0_DAT0_GMARK, GFN_SD0_DAT0),\n> - PINMUX_DATA(SD0_CMD_GMARK, GFN_SD0_CMD),\n> - PINMUX_DATA(SD0_CLK_GMARK, GFN_SD0_CLK),\n> -\n> - /* GPSR4 */\n> - PINMUX_DATA(SD3_DS_GMARK, GFN_SD3_DS),\n> - PINMUX_DATA(SD3_DAT7_GMARK, GFN_SD3_DAT7),\n> - PINMUX_DATA(SD3_DAT6_GMARK, GFN_SD3_DAT6),\n> - PINMUX_DATA(SD3_DAT5_GMARK, GFN_SD3_DAT5),\n> - PINMUX_DATA(SD3_DAT4_GMARK, GFN_SD3_DAT4),\n> - PINMUX_DATA(SD3_DAT3_MARK, FN_SD3_DAT3),\n> - PINMUX_DATA(SD3_DAT2_MARK, FN_SD3_DAT2),\n> - PINMUX_DATA(SD3_DAT1_MARK, FN_SD3_DAT1),\n> - PINMUX_DATA(SD3_DAT0_MARK, FN_SD3_DAT0),\n> - PINMUX_DATA(SD3_CMD_MARK, FN_SD3_CMD),\n> - PINMUX_DATA(SD3_CLK_MARK, FN_SD3_CLK),\n> - PINMUX_DATA(SD2_DS_GMARK, GFN_SD2_DS),\n> - PINMUX_DATA(SD2_DAT3_GMARK, GFN_SD2_DAT3),\n> - PINMUX_DATA(SD2_DAT2_GMARK, GFN_SD2_DAT2),\n> - PINMUX_DATA(SD2_DAT1_GMARK, GFN_SD2_DAT1),\n> - PINMUX_DATA(SD2_DAT0_GMARK, GFN_SD2_DAT0),\n> - PINMUX_DATA(SD2_CMD_MARK, FN_SD2_CMD),\n> - PINMUX_DATA(SD2_CLK_GMARK, GFN_SD2_CLK),\n> -\n> - /* GPSR5 */\n> - PINMUX_DATA(MLB_DAT_GMARK, GFN_MLB_DAT),\n> - PINMUX_DATA(MLB_SIG_GMARK, GFN_MLB_SIG),\n> - PINMUX_DATA(MLB_CLK_GMARK, GFN_MLB_CLK),\n> - PINMUX_DATA(MSIOF0_RXD_MARK, FN_MSIOF0_RXD),\n> - PINMUX_DATA(MSIOF0_SS2_GMARK, GFN_MSIOF0_SS2),\n> - PINMUX_DATA(MSIOF0_TXD_MARK, FN_MSIOF0_TXD),\n> - PINMUX_DATA(MSIOF0_SS1_GMARK, GFN_MSIOF0_SS1),\n> - PINMUX_DATA(MSIOF0_SYNC_GMARK, GFN_MSIOF0_SYNC),\n> - PINMUX_DATA(MSIOF0_SCK_MARK, FN_MSIOF0_SCK),\n> - PINMUX_DATA(HRTS0x_GMARK, GFN_HRTS0x),\n> - PINMUX_DATA(HCTS0x_GMARK, GFN_HCTS0x),\n> - PINMUX_DATA(HTX0_GMARK, GFN_HTX0),\n> - PINMUX_DATA(HRX0_GMARK, GFN_HRX0),\n> - PINMUX_DATA(HSCK0_GMARK, GFN_HSCK0),\n> - PINMUX_DATA(RX2_A_GMARK, GFN_RX2_A),\n> - PINMUX_DATA(TX2_A_GMARK, GFN_TX2_A),\n> - PINMUX_DATA(SCK2_GMARK, GFN_SCK2),\n> - PINMUX_DATA(RTS1x_TANS_GMARK, GFN_RTS1x_TANS),\n> - PINMUX_DATA(CTS1x_GMARK, GFN_CTS1x),\n> - PINMUX_DATA(TX1_A_GMARK, GFN_TX1_A),\n> - PINMUX_DATA(RX1_A_GMARK, GFN_RX1_A),\n> - PINMUX_DATA(RTS0x_TANS_GMARK, GFN_RTS0x_TANS),\n> - PINMUX_DATA(CTS0x_GMARK, GFN_CTS0x),\n> - PINMUX_DATA(TX0_GMARK, GFN_TX0),\n> - PINMUX_DATA(RX0_GMARK, GFN_RX0),\n> - PINMUX_DATA(SCK0_GMARK, GFN_SCK0),\n> -\n> - /* GPSR6 */\n> - PINMUX_DATA(GP6_30_GMARK, GFN_GP6_30),\n> - PINMUX_DATA(GP6_31_GMARK, GFN_GP6_31),\n> - PINMUX_DATA(USB30_OVC_GMARK, GFN_USB30_OVC),\n> - PINMUX_DATA(USB30_PWEN_GMARK, GFN_USB30_PWEN),\n> - PINMUX_DATA(USB1_OVC_GMARK, GFN_USB1_OVC),\n> - PINMUX_DATA(USB1_PWEN_GMARK, GFN_USB1_PWEN),\n> - PINMUX_DATA(USB0_OVC_GMARK, GFN_USB0_OVC),\n> - PINMUX_DATA(USB0_PWEN_GMARK, GFN_USB0_PWEN),\n> - PINMUX_DATA(AUDIO_CLKB_B_GMARK, GFN_AUDIO_CLKB_B),\n> - PINMUX_DATA(AUDIO_CLKA_A_GMARK, GFN_AUDIO_CLKA_A),\n> - PINMUX_DATA(SSI_SDATA9_A_GMARK, GFN_SSI_SDATA9_A),\n> - PINMUX_DATA(SSI_SDATA8_GMARK, GFN_SSI_SDATA8),\n> - PINMUX_DATA(SSI_SDATA7_GMARK, GFN_SSI_SDATA7),\n> - PINMUX_DATA(SSI_WS78_GMARK, GFN_SSI_WS78),\n> - PINMUX_DATA(SSI_SCK78_GMARK, GFN_SSI_SCK78),\n> - PINMUX_DATA(SSI_SDATA6_GMARK, GFN_SSI_SDATA6),\n> - PINMUX_DATA(SSI_WS6_GMARK, GFN_SSI_WS6),\n> - PINMUX_DATA(SSI_SCK6_GMARK, GFN_SSI_SCK6),\n> - PINMUX_DATA(SSI_SDATA5_MARK, FN_SSI_SDATA5),\n> - PINMUX_DATA(SSI_WS5_MARK, FN_SSI_WS5),\n> - PINMUX_DATA(SSI_SCK5_MARK, FN_SSI_SCK5),\n> - PINMUX_DATA(SSI_SDATA4_GMARK, GFN_SSI_SDATA4),\n> - PINMUX_DATA(SSI_WS4_GMARK, GFN_SSI_WS4),\n> - PINMUX_DATA(SSI_SCK4_GMARK, GFN_SSI_SCK4),\n> - PINMUX_DATA(SSI_SDATA3_GMARK, GFN_SSI_SDATA3),\n> - PINMUX_DATA(SSI_WS34_GMARK, GFN_SSI_WS34),\n> - PINMUX_DATA(SSI_SCK34_GMARK, GFN_SSI_SCK34),\n> - PINMUX_DATA(SSI_SDATA2_A_GMARK, GFN_SSI_SDATA2_A),\n> - PINMUX_DATA(SSI_SDATA1_A_GMARK, GFN_SSI_SDATA1_A),\n> - PINMUX_DATA(SSI_SDATA0_GMARK, GFN_SSI_SDATA0),\n> - PINMUX_DATA(SSI_WS01239_GMARK, GFN_SSI_WS01239),\n> - PINMUX_DATA(SSI_SCK01239_GMARK, GFN_SSI_SCK01239),\n> -\n> - /* GPSR7 */\n> - PINMUX_DATA(HDMI1_CEC_MARK, FN_HDMI1_CEC),\n> - PINMUX_DATA(HDMI0_CEC_MARK, FN_HDMI0_CEC),\n> - PINMUX_DATA(AVS2_MARK, FN_AVS2),\n> - PINMUX_DATA(AVS1_MARK, FN_AVS1),\n> -\n> - /* ipsr setting .. underconstruction */\n> -};\n> -\n> -static struct pinmux_gpio pinmux_gpios[] = {\n> - PINMUX_GPIO_GP_ALL(),\n> - /* GPSR0 */\n> - GPIO_GFN(D15),\n> - GPIO_GFN(D14),\n> - GPIO_GFN(D13),\n> - GPIO_GFN(D12),\n> - GPIO_GFN(D11),\n> - GPIO_GFN(D10),\n> - GPIO_GFN(D9),\n> - GPIO_GFN(D8),\n> - GPIO_GFN(D7),\n> - GPIO_GFN(D6),\n> - GPIO_GFN(D5),\n> - GPIO_GFN(D4),\n> - GPIO_GFN(D3),\n> - GPIO_GFN(D2),\n> - GPIO_GFN(D1),\n> - GPIO_GFN(D0),\n> - /* GPSR1 */\n> - GPIO_GFN(CLKOUT),\n> - GPIO_GFN(EX_WAIT0_A),\n> - GPIO_GFN(WE1x),\n> - GPIO_GFN(WE0x),\n> - GPIO_GFN(RD_WRx),\n> - GPIO_GFN(RDx),\n> - GPIO_GFN(BSx),\n> - GPIO_GFN(CS1x_A26),\n> - GPIO_GFN(CS0x),\n> - GPIO_GFN(A19),\n> - GPIO_GFN(A18),\n> - GPIO_GFN(A17),\n> - GPIO_GFN(A16),\n> - GPIO_GFN(A15),\n> - GPIO_GFN(A14),\n> - GPIO_GFN(A13),\n> - GPIO_GFN(A12),\n> - GPIO_GFN(A11),\n> - GPIO_GFN(A10),\n> - GPIO_GFN(A9),\n> - GPIO_GFN(A8),\n> - GPIO_GFN(A7),\n> - GPIO_GFN(A6),\n> - GPIO_GFN(A5),\n> - GPIO_GFN(A4),\n> - GPIO_GFN(A3),\n> - GPIO_GFN(A2),\n> - GPIO_GFN(A1),\n> - GPIO_GFN(A0),\n> -\n> - /* GPSR2 */\n> - GPIO_GFN(AVB_AVTP_CAPTURE_A),\n> - GPIO_GFN(AVB_AVTP_MATCH_A),\n> - GPIO_GFN(AVB_LINK),\n> - GPIO_GFN(AVB_PHY_INT),\n> - GPIO_GFN(AVB_MAGIC),\n> - GPIO_GFN(AVB_MDC),\n> - GPIO_GFN(PWM2_A),\n> - GPIO_GFN(PWM1_A),\n> - GPIO_GFN(PWM0),\n> - GPIO_GFN(IRQ5),\n> - GPIO_GFN(IRQ4),\n> - GPIO_GFN(IRQ3),\n> - GPIO_GFN(IRQ2),\n> - GPIO_GFN(IRQ1),\n> - GPIO_GFN(IRQ0),\n> -\n> - /* GPSR3 */\n> - GPIO_GFN(SD1_WP),\n> - GPIO_GFN(SD1_CD),\n> - GPIO_GFN(SD0_WP),\n> - GPIO_GFN(SD0_CD),\n> - GPIO_GFN(SD1_DAT3),\n> - GPIO_GFN(SD1_DAT2),\n> - GPIO_GFN(SD1_DAT1),\n> - GPIO_GFN(SD1_DAT0),\n> - GPIO_GFN(SD1_CMD),\n> - GPIO_GFN(SD1_CLK),\n> - GPIO_GFN(SD0_DAT3),\n> - GPIO_GFN(SD0_DAT2),\n> - GPIO_GFN(SD0_DAT1),\n> - GPIO_GFN(SD0_DAT0),\n> - GPIO_GFN(SD0_CMD),\n> - GPIO_GFN(SD0_CLK),\n> -\n> - /* GPSR4 */\n> - GPIO_GFN(SD3_DS),\n> - GPIO_GFN(SD3_DAT7),\n> - GPIO_GFN(SD3_DAT6),\n> - GPIO_GFN(SD3_DAT5),\n> - GPIO_GFN(SD3_DAT4),\n> - GPIO_FN(SD3_DAT3),\n> - GPIO_FN(SD3_DAT2),\n> - GPIO_FN(SD3_DAT1),\n> - GPIO_FN(SD3_DAT0),\n> - GPIO_FN(SD3_CMD),\n> - GPIO_FN(SD3_CLK),\n> - GPIO_GFN(SD2_DS),\n> - GPIO_GFN(SD2_DAT3),\n> - GPIO_GFN(SD2_DAT2),\n> - GPIO_GFN(SD2_DAT1),\n> - GPIO_GFN(SD2_DAT0),\n> - GPIO_FN(SD2_CMD),\n> - GPIO_GFN(SD2_CLK),\n> -\n> - /* GPSR5 */\n> - GPIO_GFN(MLB_DAT),\n> - GPIO_GFN(MLB_SIG),\n> - GPIO_GFN(MLB_CLK),\n> - GPIO_FN(MSIOF0_RXD),\n> - GPIO_GFN(MSIOF0_SS2),\n> - GPIO_FN(MSIOF0_TXD),\n> - GPIO_GFN(MSIOF0_SS1),\n> - GPIO_GFN(MSIOF0_SYNC),\n> - GPIO_FN(MSIOF0_SCK),\n> - GPIO_GFN(HRTS0x),\n> - GPIO_GFN(HCTS0x),\n> - GPIO_GFN(HTX0),\n> - GPIO_GFN(HRX0),\n> - GPIO_GFN(HSCK0),\n> - GPIO_GFN(RX2_A),\n> - GPIO_GFN(TX2_A),\n> - GPIO_GFN(SCK2),\n> - GPIO_GFN(RTS1x_TANS),\n> - GPIO_GFN(CTS1x),\n> - GPIO_GFN(TX1_A),\n> - GPIO_GFN(RX1_A),\n> - GPIO_GFN(RTS0x_TANS),\n> - GPIO_GFN(CTS0x),\n> - GPIO_GFN(TX0),\n> - GPIO_GFN(RX0),\n> - GPIO_GFN(SCK0),\n> -\n> - /* GPSR6 */\n> - GPIO_GFN(GP6_30),\n> - GPIO_GFN(GP6_31),\n> - GPIO_GFN(USB30_OVC),\n> - GPIO_GFN(USB30_PWEN),\n> - GPIO_GFN(USB1_OVC),\n> - GPIO_GFN(USB1_PWEN),\n> - GPIO_GFN(USB0_OVC),\n> - GPIO_GFN(USB0_PWEN),\n> - GPIO_GFN(AUDIO_CLKB_B),\n> - GPIO_GFN(AUDIO_CLKA_A),\n> - GPIO_GFN(SSI_SDATA9_A),\n> - GPIO_GFN(SSI_SDATA8),\n> - GPIO_GFN(SSI_SDATA7),\n> - GPIO_GFN(SSI_WS78),\n> - GPIO_GFN(SSI_SCK78),\n> - GPIO_GFN(SSI_SDATA6),\n> - GPIO_GFN(SSI_WS6),\n> - GPIO_GFN(SSI_SCK6),\n> - GPIO_FN(SSI_SDATA5),\n> - GPIO_FN(SSI_WS5),\n> - GPIO_FN(SSI_SCK5),\n> - GPIO_GFN(SSI_SDATA4),\n> - GPIO_GFN(SSI_WS4),\n> - GPIO_GFN(SSI_SCK4),\n> - GPIO_GFN(SSI_SDATA3),\n> - GPIO_GFN(SSI_WS34),\n> - GPIO_GFN(SSI_SCK34),\n> - GPIO_GFN(SSI_SDATA2_A),\n> - GPIO_GFN(SSI_SDATA1_A),\n> - GPIO_GFN(SSI_SDATA0),\n> - GPIO_GFN(SSI_WS01239),\n> - GPIO_GFN(SSI_SCK01239),\n> -\n> - /* GPSR7 */\n> - GPIO_FN(HDMI1_CEC),\n> - GPIO_FN(HDMI0_CEC),\n> - GPIO_FN(AVS2),\n> - GPIO_FN(AVS1),\n> -\n> - /* IPSR0 */\n> - GPIO_IFN(AVB_MDC),\n> - GPIO_FN(MSIOF2_SS2_C),\n> - GPIO_IFN(AVB_MAGIC),\n> - GPIO_FN(MSIOF2_SS1_C),\n> - GPIO_FN(SCK4_A),\n> - GPIO_IFN(AVB_PHY_INT),\n> - GPIO_FN(MSIOF2_SYNC_C),\n> - GPIO_FN(RX4_A),\n> - GPIO_IFN(AVB_LINK),\n> - GPIO_FN(MSIOF2_SCK_C),\n> - GPIO_FN(TX4_A),\n> - GPIO_IFN(AVB_AVTP_MATCH_A),\n> - GPIO_FN(MSIOF2_RXD_C),\n> - GPIO_FN(CTS4x_A),\n> - GPIO_IFN(AVB_AVTP_CAPTURE_A),\n> - GPIO_FN(MSIOF2_TXD_C),\n> - GPIO_FN(RTS4x_TANS_A),\n> - GPIO_IFN(IRQ0),\n> - GPIO_FN(QPOLB),\n> - GPIO_FN(DU_CDE),\n> - GPIO_FN(VI4_DATA0_B),\n> - GPIO_FN(CAN0_TX_B),\n> - GPIO_FN(CANFD0_TX_B),\n> - GPIO_FN(MSIOF3_SS2_E),\n> - GPIO_IFN(IRQ1),\n> - GPIO_FN(QPOLA),\n> - GPIO_FN(DU_DISP),\n> - GPIO_FN(VI4_DATA1_B),\n> - GPIO_FN(CAN0_RX_B),\n> - GPIO_FN(CANFD0_RX_B),\n> - GPIO_FN(MSIOF3_SS1_E),\n> -\n> - /* IPSR1 */\n> - GPIO_IFN(IRQ2),\n> - GPIO_FN(QCPV_QDE),\n> - GPIO_FN(DU_EXODDF_DU_ODDF_DISP_CDE),\n> - GPIO_FN(VI4_DATA2_B),\n> - GPIO_FN(MSIOF3_SYNC_E),\n> - GPIO_FN(PWM3_B),\n> - GPIO_IFN(IRQ3),\n> - GPIO_FN(QSTVB_QVE),\n> - GPIO_FN(DU_DOTCLKOUT1),\n> - GPIO_FN(VI4_DATA3_B),\n> - GPIO_FN(MSIOF3_SCK_E),\n> - GPIO_FN(PWM4_B),\n> - GPIO_IFN(IRQ4),\n> - GPIO_FN(QSTH_QHS),\n> - GPIO_FN(DU_EXHSYNC_DU_HSYNC),\n> - GPIO_FN(VI4_DATA4_B),\n> - GPIO_FN(MSIOF3_RXD_E),\n> - GPIO_FN(PWM5_B),\n> - GPIO_IFN(IRQ5),\n> - GPIO_FN(QSTB_QHE),\n> - GPIO_FN(DU_EXVSYNC_DU_VSYNC),\n> - GPIO_FN(VI4_DATA5_B),\n> - GPIO_FN(MSIOF3_TXD_E),\n> - GPIO_FN(PWM6_B),\n> - GPIO_IFN(PWM0),\n> - GPIO_FN(AVB_AVTP_PPS),\n> - GPIO_FN(VI4_DATA6_B),\n> - GPIO_FN(IECLK_B),\n> - GPIO_IFN(PWM1_A),\n> - GPIO_FN(HRX3_D),\n> - GPIO_FN(VI4_DATA7_B),\n> - GPIO_FN(IERX_B),\n> - GPIO_IFN(PWM2_A),\n> - GPIO_FN(PWMFSW0),\n> - GPIO_FN(HTX3_D),\n> - GPIO_FN(IETX_B),\n> - GPIO_IFN(A0),\n> - GPIO_FN(LCDOUT16),\n> - GPIO_FN(MSIOF3_SYNC_B),\n> - GPIO_FN(VI4_DATA8),\n> - GPIO_FN(DU_DB0),\n> - GPIO_FN(PWM3_A),\n> -\n> - /* IPSR2 */\n> - GPIO_IFN(A1),\n> - GPIO_FN(LCDOUT17),\n> - GPIO_FN(MSIOF3_TXD_B),\n> - GPIO_FN(VI4_DATA9),\n> - GPIO_FN(DU_DB1),\n> - GPIO_FN(PWM4_A),\n> - GPIO_IFN(A2),\n> - GPIO_FN(LCDOUT18),\n> - GPIO_FN(MSIOF3_SCK_B),\n> - GPIO_FN(VI4_DATA10),\n> - GPIO_FN(DU_DB2),\n> - GPIO_FN(PWM5_A),\n> - GPIO_IFN(A3),\n> - GPIO_FN(LCDOUT19),\n> - GPIO_FN(MSIOF3_RXD_B),\n> - GPIO_FN(VI4_DATA11),\n> - GPIO_FN(DU_DB3),\n> - GPIO_FN(PWM6_A),\n> - GPIO_IFN(A4),\n> - GPIO_FN(LCDOUT20),\n> - GPIO_FN(MSIOF3_SS1_B),\n> - GPIO_FN(VI4_DATA12),\n> - GPIO_FN(VI5_DATA12),\n> - GPIO_FN(DU_DB4),\n> - GPIO_IFN(A5),\n> - GPIO_FN(LCDOUT21),\n> - GPIO_FN(MSIOF3_SS2_B),\n> - GPIO_FN(SCK4_B),\n> - GPIO_FN(VI4_DATA13),\n> - GPIO_FN(VI5_DATA13),\n> - GPIO_FN(DU_DB5),\n> - GPIO_IFN(A6),\n> - GPIO_FN(LCDOUT22),\n> - GPIO_FN(MSIOF2_SS1_A),\n> - GPIO_FN(RX4_B),\n> - GPIO_FN(VI4_DATA14),\n> - GPIO_FN(VI5_DATA14),\n> - GPIO_FN(DU_DB6),\n> - GPIO_IFN(A7),\n> - GPIO_FN(LCDOUT23),\n> - GPIO_FN(MSIOF2_SS2_A),\n> - GPIO_FN(TX4_B),\n> - GPIO_FN(VI4_DATA15),\n> - GPIO_FN(V15_DATA15),\n> - GPIO_FN(DU_DB7),\n> - GPIO_IFN(A8),\n> - GPIO_FN(RX3_B),\n> - GPIO_FN(MSIOF2_SYNC_A),\n> - GPIO_FN(HRX4_B),\n> - GPIO_FN(SDA6_A),\n> - GPIO_FN(AVB_AVTP_MATCH_B),\n> - GPIO_FN(PWM1_B),\n> -\n> - /* IPSR3 */\n> - GPIO_IFN(A9),\n> - GPIO_FN(MSIOF2_SCK_A),\n> - GPIO_FN(CTS4x_B),\n> - GPIO_FN(VI5_VSYNCx),\n> - GPIO_IFN(A10),\n> - GPIO_FN(MSIOF2_RXD_A),\n> - GPIO_FN(RTS4n_TANS_B),\n> - GPIO_FN(VI5_HSYNCx),\n> - GPIO_IFN(A11),\n> - GPIO_FN(TX3_B),\n> - GPIO_FN(MSIOF2_TXD_A),\n> - GPIO_FN(HTX4_B),\n> - GPIO_FN(HSCK4),\n> - GPIO_FN(VI5_FIELD),\n> - GPIO_FN(SCL6_A),\n> - GPIO_FN(AVB_AVTP_CAPTURE_B),\n> - GPIO_FN(PWM2_B),\n> - GPIO_FN(SPV_EVEN),\n> - GPIO_IFN(A12),\n> - GPIO_FN(LCDOUT12),\n> - GPIO_FN(MSIOF3_SCK_C),\n> - GPIO_FN(HRX4_A),\n> - GPIO_FN(VI5_DATA8),\n> - GPIO_FN(DU_DG4),\n> - GPIO_IFN(A13),\n> - GPIO_FN(LCDOUT13),\n> - GPIO_FN(MSIOF3_SYNC_C),\n> - GPIO_FN(HTX4_A),\n> - GPIO_FN(VI5_DATA9),\n> - GPIO_FN(DU_DG5),\n> - GPIO_IFN(A14),\n> - GPIO_FN(LCDOUT14),\n> - GPIO_FN(MSIOF3_RXD_C),\n> - GPIO_FN(HCTS4x),\n> - GPIO_FN(VI5_DATA10),\n> - GPIO_FN(DU_DG6),\n> - GPIO_IFN(A15),\n> - GPIO_FN(LCDOUT15),\n> - GPIO_FN(MSIOF3_TXD_C),\n> - GPIO_FN(HRTS4x),\n> - GPIO_FN(VI5_DATA11),\n> - GPIO_FN(DU_DG7),\n> - GPIO_IFN(A16),\n> - GPIO_FN(LCDOUT8),\n> - GPIO_FN(VI4_FIELD),\n> - GPIO_FN(DU_DG0),\n> -\n> - /* IPSR4 */\n> - GPIO_IFN(A17),\n> - GPIO_FN(LCDOUT9),\n> - GPIO_FN(VI4_VSYNCx),\n> - GPIO_FN(DU_DG1),\n> - GPIO_IFN(A18),\n> - GPIO_FN(LCDOUT10),\n> - GPIO_FN(VI4_HSYNCx),\n> - GPIO_FN(DU_DG2),\n> - GPIO_IFN(A19),\n> - GPIO_FN(LCDOUT11),\n> - GPIO_FN(VI4_CLKENB),\n> - GPIO_FN(DU_DG3),\n> - GPIO_IFN(CS0x),\n> - GPIO_FN(VI5_CLKENB),\n> - GPIO_IFN(CS1x_A26),\n> - GPIO_FN(VI5_CLK),\n> - GPIO_FN(EX_WAIT0_B),\n> - GPIO_IFN(BSx),\n> - GPIO_FN(QSTVA_QVS),\n> - GPIO_FN(MSIOF3_SCK_D),\n> - GPIO_FN(SCK3),\n> - GPIO_FN(HSCK3),\n> - GPIO_FN(CAN1_TX),\n> - GPIO_FN(CANFD1_TX),\n> - GPIO_FN(IETX_A),\n> - GPIO_IFN(RDx),\n> - GPIO_FN(MSIOF3_SYNC_D),\n> - GPIO_FN(RX3_A),\n> - GPIO_FN(HRX3_A),\n> - GPIO_FN(CAN0_TX_A),\n> - GPIO_FN(CANFD0_TX_A),\n> - GPIO_IFN(RD_WRx),\n> - GPIO_FN(MSIOF3_RXD_D),\n> - GPIO_FN(TX3_A),\n> - GPIO_FN(HTX3_A),\n> - GPIO_FN(CAN0_RX_A),\n> - GPIO_FN(CANFD0_RX_A),\n> -\n> - /* IPSR5 */\n> - GPIO_IFN(WE0x),\n> - GPIO_FN(MSIIOF3_TXD_D),\n> - GPIO_FN(CTS3x),\n> - GPIO_FN(HCTS3x),\n> - GPIO_FN(SCL6_B),\n> - GPIO_FN(CAN_CLK),\n> - GPIO_FN(IECLK_A),\n> - GPIO_IFN(WE1x),\n> - GPIO_FN(MSIOF3_SS1_D),\n> - GPIO_FN(RTS3x_TANS),\n> - GPIO_FN(HRTS3x),\n> - GPIO_FN(SDA6_B),\n> - GPIO_FN(CAN1_RX),\n> - GPIO_FN(CANFD1_RX),\n> - GPIO_FN(IERX_A),\n> - GPIO_IFN(EX_WAIT0_A),\n> - GPIO_FN(QCLK),\n> - GPIO_FN(VI4_CLK),\n> - GPIO_FN(DU_DOTCLKOUT0),\n> - GPIO_IFN(D0),\n> - GPIO_FN(MSIOF2_SS1_B),\n> - GPIO_FN(MSIOF3_SCK_A),\n> - GPIO_FN(VI4_DATA16),\n> - GPIO_FN(VI5_DATA0),\n> - GPIO_IFN(D1),\n> - GPIO_FN(MSIOF2_SS2_B),\n> - GPIO_FN(MSIOF3_SYNC_A),\n> - GPIO_FN(VI4_DATA17),\n> - GPIO_FN(VI5_DATA1),\n> - GPIO_IFN(D2),\n> - GPIO_FN(MSIOF3_RXD_A),\n> - GPIO_FN(VI4_DATA18),\n> - GPIO_FN(VI5_DATA2),\n> - GPIO_IFN(D3),\n> - GPIO_FN(MSIOF3_TXD_A),\n> - GPIO_FN(VI4_DATA19),\n> - GPIO_FN(VI5_DATA3),\n> - GPIO_IFN(D4),\n> - GPIO_FN(MSIOF2_SCK_B),\n> - GPIO_FN(VI4_DATA20),\n> - GPIO_FN(VI5_DATA4),\n> -\n> - /* IPSR6 */\n> - GPIO_IFN(D5),\n> - GPIO_FN(MSIOF2_SYNC_B),\n> - GPIO_FN(VI4_DATA21),\n> - GPIO_FN(VI5_DATA5),\n> - GPIO_IFN(D6),\n> - GPIO_FN(MSIOF2_RXD_B),\n> - GPIO_FN(VI4_DATA22),\n> - GPIO_FN(VI5_DATA6),\n> - GPIO_IFN(D7),\n> - GPIO_FN(MSIOF2_TXD_B),\n> - GPIO_FN(VI4_DATA23),\n> - GPIO_FN(VI5_DATA7),\n> - GPIO_IFN(D8),\n> - GPIO_FN(LCDOUT0),\n> - GPIO_FN(MSIOF2_SCK_D),\n> - GPIO_FN(SCK4_C),\n> - GPIO_FN(VI4_DATA0_A),\n> - GPIO_FN(DU_DR0),\n> - GPIO_IFN(D9),\n> - GPIO_FN(LCDOUT1),\n> - GPIO_FN(MSIOF2_SYNC_D),\n> - GPIO_FN(VI4_DATA1_A),\n> - GPIO_FN(DU_DR1),\n> - GPIO_IFN(D10),\n> - GPIO_FN(LCDOUT2),\n> - GPIO_FN(MSIOF2_RXD_D),\n> - GPIO_FN(HRX3_B),\n> - GPIO_FN(VI4_DATA2_A),\n> - GPIO_FN(CTS4x_C),\n> - GPIO_FN(DU_DR2),\n> - GPIO_IFN(D11),\n> - GPIO_FN(LCDOUT3),\n> - GPIO_FN(MSIOF2_TXD_D),\n> - GPIO_FN(HTX3_B),\n> - GPIO_FN(VI4_DATA3_A),\n> - GPIO_FN(RTS4x_TANS_C),\n> - GPIO_FN(DU_DR3),\n> - GPIO_IFN(D12),\n> - GPIO_FN(LCDOUT4),\n> - GPIO_FN(MSIOF2_SS1_D),\n> - GPIO_FN(RX4_C),\n> - GPIO_FN(VI4_DATA4_A),\n> - GPIO_FN(DU_DR4),\n> -\n> - /* IPSR7 */\n> - GPIO_IFN(D13),\n> - GPIO_FN(LCDOUT5),\n> - GPIO_FN(MSIOF2_SS2_D),\n> - GPIO_FN(TX4_C),\n> - GPIO_FN(VI4_DATA5_A),\n> - GPIO_FN(DU_DR5),\n> - GPIO_IFN(D14),\n> - GPIO_FN(LCDOUT6),\n> - GPIO_FN(MSIOF3_SS1_A),\n> - GPIO_FN(HRX3_C),\n> - GPIO_FN(VI4_DATA6_A),\n> - GPIO_FN(DU_DR6),\n> - GPIO_FN(SCL6_C),\n> - GPIO_IFN(D15),\n> - GPIO_FN(LCDOUT7),\n> - GPIO_FN(MSIOF3_SS2_A),\n> - GPIO_FN(HTX3_C),\n> - GPIO_FN(VI4_DATA7_A),\n> - GPIO_FN(DU_DR7),\n> - GPIO_FN(SDA6_C),\n> - GPIO_FN(FSCLKST),\n> - GPIO_IFN(SD0_CLK),\n> - GPIO_FN(MSIOF1_SCK_E),\n> - GPIO_FN(STP_OPWM_0_B),\n> - GPIO_IFN(SD0_CMD),\n> - GPIO_FN(MSIOF1_SYNC_E),\n> - GPIO_FN(STP_IVCXO27_0_B),\n> - GPIO_IFN(SD0_DAT0),\n> - GPIO_FN(MSIOF1_RXD_E),\n> - GPIO_FN(TS_SCK0_B),\n> - GPIO_FN(STP_ISCLK_0_B),\n> - GPIO_IFN(SD0_DAT1),\n> - GPIO_FN(MSIOF1_TXD_E),\n> - GPIO_FN(TS_SPSYNC0_B),\n> - GPIO_FN(STP_ISSYNC_0_B),\n> -\n> - /* IPSR8 */\n> - GPIO_IFN(SD0_DAT2),\n> - GPIO_FN(MSIOF1_SS1_E),\n> - GPIO_FN(TS_SDAT0_B),\n> - GPIO_FN(STP_ISD_0_B),\n> -\n> - GPIO_IFN(SD0_DAT3),\n> - GPIO_FN(MSIOF1_SS2_E),\n> - GPIO_FN(TS_SDEN0_B),\n> - GPIO_FN(STP_ISEN_0_B),\n> -\n> - GPIO_IFN(SD1_CLK),\n> - GPIO_FN(MSIOF1_SCK_G),\n> - GPIO_FN(SIM0_CLK_A),\n> -\n> - GPIO_IFN(SD1_CMD),\n> - GPIO_FN(MSIOF1_SYNC_G),\n> - GPIO_FN(NFCEx_B),\n> - GPIO_FN(SIM0_D_A),\n> - GPIO_FN(STP_IVCXO27_1_B),\n> -\n> - GPIO_IFN(SD1_DAT0),\n> - GPIO_FN(SD2_DAT4),\n> - GPIO_FN(MSIOF1_RXD_G),\n> - GPIO_FN(NFWPx_B),\n> - GPIO_FN(TS_SCK1_B),\n> - GPIO_FN(STP_ISCLK_1_B),\n> -\n> - GPIO_IFN(SD1_DAT1),\n> - GPIO_FN(SD2_DAT5),\n> - GPIO_FN(MSIOF1_TXD_G),\n> - GPIO_FN(NFDATA14_B),\n> - GPIO_FN(TS_SPSYNC1_B),\n> - GPIO_FN(STP_ISSYNC_1_B),\n> -\n> - GPIO_IFN(SD1_DAT2),\n> - GPIO_FN(SD2_DAT6),\n> - GPIO_FN(MSIOF1_SS1_G),\n> - GPIO_FN(NFDATA15_B),\n> - GPIO_FN(TS_SDAT1_B),\n> - GPIO_FN(STP_IOD_1_B),\n> -\n> - GPIO_IFN(SD1_DAT3),\n> - GPIO_FN(SD2_DAT7),\n> - GPIO_FN(MSIOF1_SS2_G),\n> - GPIO_FN(NFRBx_B),\n> - GPIO_FN(TS_SDEN1_B),\n> - GPIO_FN(STP_ISEN_1_B),\n> -\n> - /* IPSR9 */\n> - GPIO_IFN(SD2_CLK),\n> - GPIO_FN(NFDATA8),\n> -\n> - GPIO_IFN(SD2_CMD),\n> - GPIO_FN(NFDATA9),\n> -\n> - GPIO_IFN(SD2_DAT0),\n> - GPIO_FN(NFDATA10),\n> -\n> - GPIO_IFN(SD2_DAT1),\n> - GPIO_FN(NFDATA11),\n> -\n> - GPIO_IFN(SD2_DAT2),\n> - GPIO_FN(NFDATA12),\n> -\n> - GPIO_IFN(SD2_DAT3),\n> - GPIO_FN(NFDATA13),\n> -\n> - GPIO_IFN(SD2_DS),\n> - GPIO_FN(NFALE),\n> -\n> - GPIO_IFN(SD3_CLK),\n> - GPIO_FN(NFWEx),\n> -\n> - /* IPSR10 */\n> - GPIO_IFN(SD3_CMD),\n> - GPIO_FN(NFREx),\n> -\n> - GPIO_IFN(SD3_DAT0),\n> - GPIO_FN(NFDATA0),\n> -\n> - GPIO_IFN(SD3_DAT1),\n> - GPIO_FN(NFDATA1),\n> -\n> - GPIO_IFN(SD3_DAT2),\n> - GPIO_FN(NFDATA2),\n> -\n> - GPIO_IFN(SD3_DAT3),\n> - GPIO_FN(NFDATA3),\n> -\n> - GPIO_IFN(SD3_DAT4),\n> - GPIO_FN(SD2_CD_A),\n> - GPIO_FN(NFDATA4),\n> -\n> - GPIO_IFN(SD3_DAT5),\n> - GPIO_FN(SD2_WP_A),\n> - GPIO_FN(NFDATA5),\n> -\n> - GPIO_IFN(SD3_DAT6),\n> - GPIO_FN(SD3_CD),\n> - GPIO_FN(NFDATA6),\n> -\n> - /* IPSR11 */\n> - GPIO_IFN(SD3_DAT7),\n> - GPIO_FN(SD3_WP),\n> - GPIO_FN(NFDATA7),\n> -\n> - GPIO_IFN(SD3_DS),\n> - GPIO_FN(NFCLE),\n> -\n> - GPIO_IFN(SD0_CD),\n> - GPIO_FN(NFDATA14_A),\n> - GPIO_FN(SCL2_B),\n> - GPIO_FN(SIM0_RST_A),\n> -\n> - GPIO_IFN(SD0_WP),\n> - GPIO_FN(NFDATA15_A),\n> - GPIO_FN(SDA2_B),\n> -\n> - GPIO_IFN(SD1_CD),\n> - GPIO_FN(NFRBx_A),\n> - GPIO_FN(SIM0_CLK_B),\n> -\n> - GPIO_IFN(SD1_WP),\n> - GPIO_FN(NFCEx_A),\n> - GPIO_FN(SIM0_D_B),\n> -\n> - GPIO_IFN(SCK0),\n> - GPIO_FN(HSCK1_B),\n> - GPIO_FN(MSIOF1_SS2_B),\n> - GPIO_FN(AUDIO_CLKC_B),\n> - GPIO_FN(SDA2_A),\n> - GPIO_FN(SIM0_RST_B),\n> - GPIO_FN(STP_OPWM_0_C),\n> - GPIO_FN(RIF0_CLK_B),\n> - GPIO_FN(ADICHS2),\n> - GPIO_FN(SCK5_B),\n> -\n> - GPIO_IFN(RX0),\n> - GPIO_FN(HRX1_B),\n> - GPIO_FN(TS_SCK0_C),\n> - GPIO_FN(STP_ISCLK_0_C),\n> - GPIO_FN(RIF0_D0_B),\n> -\n> - /* IPSR12 */\n> - GPIO_IFN(TX0),\n> - GPIO_FN(HTX1_B),\n> - GPIO_FN(TS_SPSYNC0_C),\n> - GPIO_FN(STP_ISSYNC_0_C),\n> - GPIO_FN(RIF0_D1_B),\n> -\n> - GPIO_IFN(CTS0x),\n> - GPIO_FN(HCTS1x_B),\n> - GPIO_FN(MSIOF1_SYNC_B),\n> - GPIO_FN(TS_SPSYNC1_C),\n> - GPIO_FN(STP_ISSYNC_1_C),\n> - GPIO_FN(RIF1_SYNC_B),\n> - GPIO_FN(AUDIO_CLKOUT_C),\n> - GPIO_FN(ADICS_SAMP),\n> -\n> - GPIO_IFN(RTS0x_TANS),\n> - GPIO_FN(HRTS1x_B),\n> - GPIO_FN(MSIOF1_SS1_B),\n> - GPIO_FN(AUDIO_CLKA_B),\n> - GPIO_FN(SCL2_A),\n> - GPIO_FN(STP_IVCXO27_1_C),\n> - GPIO_FN(RIF0_SYNC_B),\n> - GPIO_FN(ADICHS1),\n> -\n> - GPIO_IFN(RX1_A),\n> - GPIO_FN(HRX1_A),\n> - GPIO_FN(TS_SDAT0_C),\n> - GPIO_FN(STP_ISD_0_C),\n> - GPIO_FN(RIF1_CLK_C),\n> -\n> - GPIO_IFN(TX1_A),\n> - GPIO_FN(HTX1_A),\n> - GPIO_FN(TS_SDEN0_C),\n> - GPIO_FN(STP_ISEN_0_C),\n> - GPIO_FN(RIF1_D0_C),\n> -\n> - GPIO_IFN(CTS1x),\n> - GPIO_FN(HCTS1x_A),\n> - GPIO_FN(MSIOF1_RXD_B),\n> - GPIO_FN(TS_SDEN1_C),\n> - GPIO_FN(STP_ISEN_1_C),\n> - GPIO_FN(RIF1_D0_B),\n> - GPIO_FN(ADIDATA),\n> -\n> - GPIO_IFN(RTS1x_TANS),\n> - GPIO_FN(HRTS1x_A),\n> - GPIO_FN(MSIOF1_TXD_B),\n> - GPIO_FN(TS_SDAT1_C),\n> - GPIO_FN(STP_ISD_1_C),\n> - GPIO_FN(RIF1_D1_B),\n> - GPIO_FN(ADICHS0),\n> -\n> - GPIO_IFN(SCK2),\n> - GPIO_FN(SCIF_CLK_B),\n> - GPIO_FN(MSIOF1_SCK_B),\n> - GPIO_FN(TS_SCK1_C),\n> - GPIO_FN(STP_ISCLK_1_C),\n> - GPIO_FN(RIF1_CLK_B),\n> - GPIO_FN(ADICLK),\n> -\n> - /* IPSR13 */\n> - GPIO_IFN(TX2_A),\n> - GPIO_FN(SD2_CD_B),\n> - GPIO_FN(SCL1_A),\n> - GPIO_FN(FMCLK_A),\n> - GPIO_FN(RIF1_D1_C),\n> - GPIO_FN(FSO_CFE_0_B),\n> -\n> - GPIO_IFN(RX2_A),\n> - GPIO_FN(SD2_WP_B),\n> - GPIO_FN(SDA1_A),\n> - GPIO_FN(FMIN_A),\n> - GPIO_FN(RIF1_SYNC_C),\n> - GPIO_FN(FSO_CEF_1_B),\n> -\n> - GPIO_IFN(HSCK0),\n> - GPIO_FN(MSIOF1_SCK_D),\n> - GPIO_FN(AUDIO_CLKB_A),\n> - GPIO_FN(SSI_SDATA1_B),\n> - GPIO_FN(TS_SCK0_D),\n> - GPIO_FN(STP_ISCLK_0_D),\n> - GPIO_FN(RIF0_CLK_C),\n> - GPIO_FN(RX5_B),\n> -\n> - GPIO_IFN(HRX0),\n> - GPIO_FN(MSIOF1_RXD_D),\n> - GPIO_FN(SS1_SDATA2_B),\n> - GPIO_FN(TS_SDEN0_D),\n> - GPIO_FN(STP_ISEN_0_D),\n> - GPIO_FN(RIF0_D0_C),\n> -\n> - GPIO_IFN(HTX0),\n> - GPIO_FN(MSIOF1_TXD_D),\n> - GPIO_FN(SSI_SDATA9_B),\n> - GPIO_FN(TS_SDAT0_D),\n> - GPIO_FN(STP_ISD_0_D),\n> - GPIO_FN(RIF0_D1_C),\n> -\n> - GPIO_IFN(HCTS0x),\n> - GPIO_FN(RX2_B),\n> - GPIO_FN(MSIOF1_SYNC_D),\n> - GPIO_FN(SSI_SCK9_A),\n> - GPIO_FN(TS_SPSYNC0_D),\n> - GPIO_FN(STP_ISSYNC_0_D),\n> - GPIO_FN(RIF0_SYNC_C),\n> - GPIO_FN(AUDIO_CLKOUT1_A),\n> -\n> - GPIO_IFN(HRTS0x),\n> - GPIO_FN(TX2_B),\n> - GPIO_FN(MSIOF1_SS1_D),\n> - GPIO_FN(SSI_WS9_A),\n> - GPIO_FN(STP_IVCXO27_0_D),\n> - GPIO_FN(BPFCLK_A),\n> - GPIO_FN(AUDIO_CLKOUT2_A),\n> -\n> - GPIO_IFN(MSIOF0_SYNC),\n> - GPIO_FN(AUDIO_CLKOUT_A),\n> - GPIO_FN(TX5_B),\n> - GPIO_FN(BPFCLK_D),\n> -\n> - /* IPSR14 */\n> - GPIO_IFN(MSIOF0_SS1),\n> - GPIO_FN(RX5_A),\n> - GPIO_FN(NFWPx_A),\n> - GPIO_FN(AUDIO_CLKA_C),\n> - GPIO_FN(SSI_SCK2_A),\n> - GPIO_FN(STP_IVCXO27_0_C),\n> - GPIO_FN(AUDIO_CLKOUT3_A),\n> - GPIO_FN(TCLK1_B),\n> -\n> - GPIO_IFN(MSIOF0_SS2),\n> - GPIO_FN(TX5_A),\n> - GPIO_FN(MSIOF1_SS2_D),\n> - GPIO_FN(AUDIO_CLKC_A),\n> - GPIO_FN(SSI_WS2_A),\n> - GPIO_FN(STP_OPWM_0_D),\n> - GPIO_FN(AUDIO_CLKOUT_D),\n> - GPIO_FN(SPEEDIN_B),\n> -\n> - GPIO_IFN(MLB_CLK),\n> - GPIO_FN(MSIOF1_SCK_F),\n> - GPIO_FN(SCL1_B),\n> -\n> - GPIO_IFN(MLB_SIG),\n> - GPIO_FN(RX1_B),\n> - GPIO_FN(MSIOF1_SYNC_F),\n> - GPIO_FN(SDA1_B),\n> -\n> - GPIO_IFN(MLB_DAT),\n> - GPIO_FN(TX1_B),\n> - GPIO_FN(MSIOF1_RXD_F),\n> -\n> - GPIO_IFN(SSI_SCK0129),\n> - GPIO_FN(MSIOF1_TXD_F),\n> - GPIO_FN(MOUT0),\n> -\n> - GPIO_IFN(SSI_WS0129),\n> - GPIO_FN(MSIOF1_SS1_F),\n> - GPIO_FN(MOUT1),\n> -\n> - GPIO_IFN(SSI_SDATA0),\n> - GPIO_FN(MSIOF1_SS2_F),\n> - GPIO_FN(MOUT2),\n> -\n> - /* IPSR15 */\n> - GPIO_IFN(SSI_SDATA1_A),\n> - GPIO_FN(MOUT5),\n> -\n> - GPIO_IFN(SSI_SDATA2_A),\n> - GPIO_FN(SSI_SCK1_B),\n> - GPIO_FN(MOUT6),\n> -\n> - GPIO_IFN(SSI_SCK34),\n> - GPIO_FN(MSIOF1_SS1_A),\n> - GPIO_FN(STP_OPWM_0_A),\n> -\n> - GPIO_IFN(SSI_WS34),\n> - GPIO_FN(HCTS2x_A),\n> - GPIO_FN(MSIOF1_SS2_A),\n> - GPIO_FN(STP_IVCXO27_0_A),\n> -\n> - GPIO_IFN(SSI_SDATA3),\n> - GPIO_FN(HRTS2x_A),\n> - GPIO_FN(MSIOF1_TXD_A),\n> - GPIO_FN(TS_SCK0_A),\n> - GPIO_FN(STP_ISCLK_0_A),\n> - GPIO_FN(RIF0_D1_A),\n> - GPIO_FN(RIF2_D0_A),\n> -\n> - GPIO_IFN(SSI_SCK4),\n> - GPIO_FN(HRX2_A),\n> - GPIO_FN(MSIOF1_SCK_A),\n> - GPIO_FN(TS_SDAT0_A),\n> - GPIO_FN(STP_ISD_0_A),\n> - GPIO_FN(RIF0_CLK_A),\n> - GPIO_FN(RIF2_CLK_A),\n> -\n> - GPIO_IFN(SSI_WS4),\n> - GPIO_FN(HTX2_A),\n> - GPIO_FN(MSIOF1_SYNC_A),\n> - GPIO_FN(TS_SDEN0_A),\n> - GPIO_FN(STP_ISEN_0_A),\n> - GPIO_FN(RIF0_SYNC_A),\n> - GPIO_FN(RIF2_SYNC_A),\n> -\n> - GPIO_IFN(SSI_SDATA4),\n> - GPIO_FN(HSCK2_A),\n> - GPIO_FN(MSIOF1_RXD_A),\n> - GPIO_FN(TS_SPSYNC0_A),\n> - GPIO_FN(STP_ISSYNC_0_A),\n> - GPIO_FN(RIF0_D0_A),\n> - GPIO_FN(RIF2_D1_A),\n> -\n> - /* IPSR16 */\n> - GPIO_IFN(SSI_SCK6),\n> - GPIO_FN(SIM0_RST_D),\n> - GPIO_FN(FSO_TOE_A),\n> -\n> - GPIO_IFN(SSI_WS6),\n> - GPIO_FN(SIM0_D_D),\n> -\n> - GPIO_IFN(SSI_SDATA6),\n> - GPIO_FN(SIM0_CLK_D),\n> -\n> - GPIO_IFN(SSI_SCK78),\n> - GPIO_FN(HRX2_B),\n> - GPIO_FN(MSIOF1_SCK_C),\n> - GPIO_FN(TS_SCK1_A),\n> - GPIO_FN(STP_ISCLK_1_A),\n> - GPIO_FN(RIF1_CLK_A),\n> - GPIO_FN(RIF3_CLK_A),\n> -\n> - GPIO_IFN(SSI_WS78),\n> - GPIO_FN(HTX2_B),\n> - GPIO_FN(MSIOF1_SYNC_C),\n> - GPIO_FN(TS_SDAT1_A),\n> - GPIO_FN(STP_ISD_1_A),\n> - GPIO_FN(RIF1_SYNC_A),\n> - GPIO_FN(RIF3_SYNC_A),\n> -\n> - GPIO_IFN(SSI_SDATA7),\n> - GPIO_FN(HCTS2x_B),\n> - GPIO_FN(MSIOF1_RXD_C),\n> - GPIO_FN(TS_SDEN1_A),\n> - GPIO_FN(STP_IEN_1_A),\n> - GPIO_FN(RIF1_D0_A),\n> - GPIO_FN(RIF3_D0_A),\n> - GPIO_FN(TCLK2_A),\n> -\n> - GPIO_IFN(SSI_SDATA8),\n> - GPIO_FN(HRTS2x_B),\n> - GPIO_FN(MSIOF1_TXD_C),\n> - GPIO_FN(TS_SPSYNC1_A),\n> - GPIO_FN(STP_ISSYNC_1_A),\n> - GPIO_FN(RIF1_D1_A),\n> - GPIO_FN(EIF3_D1_A),\n> -\n> - GPIO_IFN(SSI_SDATA9_A),\n> - GPIO_FN(HSCK2_B),\n> - GPIO_FN(MSIOF1_SS1_C),\n> - GPIO_FN(HSCK1_A),\n> - GPIO_FN(SSI_WS1_B),\n> - GPIO_FN(SCK1),\n> - GPIO_FN(STP_IVCXO27_1_A),\n> - GPIO_FN(SCK5),\n> -\n> - /* IPSR17 */\n> - GPIO_IFN(AUDIO_CLKA_A),\n> - GPIO_FN(CC5_OSCOUT),\n> -\n> - GPIO_IFN(AUDIO_CLKB_B),\n> - GPIO_FN(SCIF_CLK_A),\n> - GPIO_FN(STP_IVCXO27_1_D),\n> - GPIO_FN(REMOCON_A),\n> - GPIO_FN(TCLK1_A),\n> -\n> - GPIO_IFN(USB0_PWEN),\n> - GPIO_FN(SIM0_RST_C),\n> - GPIO_FN(TS_SCK1_D),\n> - GPIO_FN(STP_ISCLK_1_D),\n> - GPIO_FN(BPFCLK_B),\n> - GPIO_FN(RIF3_CLK_B),\n> - GPIO_FN(FSO_CFE_1_A),\n> - GPIO_FN(HSCK2_C),\n> -\n> - GPIO_IFN(USB0_OVC),\n> - GPIO_FN(SIM0_D_C),\n> - GPIO_FN(TS_SDAT1_D),\n> - GPIO_FN(STP_ISD_1_D),\n> - GPIO_FN(RIF3_SYNC_B),\n> - GPIO_FN(HRX2_C),\n> -\n> - GPIO_IFN(USB1_PWEN),\n> - GPIO_FN(SIM0_CLK_C),\n> - GPIO_FN(SSI_SCK1_A),\n> - GPIO_FN(TS_SCK0_E),\n> - GPIO_FN(STP_ISCLK_0_E),\n> - GPIO_FN(FMCLK_B),\n> - GPIO_FN(RIF2_CLK_B),\n> - GPIO_FN(SPEEDIN_A),\n> - GPIO_FN(HTX2_C),\n> -\n> - GPIO_IFN(USB1_OVC),\n> - GPIO_FN(MSIOF1_SS2_C),\n> - GPIO_FN(SSI_WS1_A),\n> - GPIO_FN(TS_SDAT0_E),\n> - GPIO_FN(STP_ISD_0_E),\n> - GPIO_FN(FMIN_B),\n> - GPIO_FN(RIF2_SYNC_B),\n> - GPIO_FN(REMOCON_B),\n> - GPIO_FN(HCTS2x_C),\n> -\n> - GPIO_IFN(USB30_PWEN),\n> - GPIO_FN(AUDIO_CLKOUT_B),\n> - GPIO_FN(SSI_SCK2_B),\n> - GPIO_FN(TS_SDEN1_D),\n> - GPIO_FN(STP_ISEN_1_D),\n> - GPIO_FN(STP_OPWM_0_E),\n> - GPIO_FN(RIF3_D0_B),\n> - GPIO_FN(TCLK2_B),\n> - GPIO_FN(TPU0TO0),\n> - GPIO_FN(BPFCLK_C),\n> - GPIO_FN(HRTS2x_C),\n> -\n> - GPIO_IFN(USB30_OVC),\n> - GPIO_FN(AUDIO_CLKOUT1_B),\n> - GPIO_FN(SSI_WS2_B),\n> - GPIO_FN(TS_SPSYNC1_D),\n> - GPIO_FN(STP_ISSYNC_1_D),\n> - GPIO_FN(STP_IVCXO27_0_E),\n> - GPIO_FN(RIF3_D1_B),\n> - GPIO_FN(FSO_TOE_B),\n> - GPIO_FN(TPU0TO1),\n> -\n> - /* IPSR18 */\n> - GPIO_IFN(GP6_30),\n> - GPIO_FN(AUDIO_CLKOUT2_B),\n> - GPIO_FN(SSI_SCK9_B),\n> - GPIO_FN(TS_SDEN0_E),\n> - GPIO_FN(STP_ISEN_0_E),\n> - GPIO_FN(RIF2_D0_B),\n> - GPIO_FN(FSO_CFE_0_A),\n> - GPIO_FN(TPU0TO2),\n> - GPIO_FN(FMCLK_C),\n> - GPIO_FN(FMCLK_D),\n> -\n> - GPIO_IFN(GP6_31),\n> - GPIO_FN(AUDIO_CLKOUT3_B),\n> - GPIO_FN(SSI_WS9_B),\n> - GPIO_FN(TS_SPSYNC0_E),\n> - GPIO_FN(STP_ISSYNC_0_E),\n> - GPIO_FN(RIF2_D1_B),\n> - GPIO_FN(TPU0TO3),\n> - GPIO_FN(FMIN_C),\n> - GPIO_FN(FMIN_D),\n> -};\n> -\n> -static struct pinmux_cfg_reg pinmux_config_regs[] = {\n> - /* GPSR0(0xE6060100) md[3:1] controls initial value */\n> - /* md[3:1] .. 0 : 0x0000FFFF */\n> - /* .. other : 0x00000000 */\n> - { PINMUX_CFG_REG(\"GPSR0\", 0xE6060100, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - GP_0_15_FN, GFN_D15,\n> - GP_0_14_FN, GFN_D14,\n> - GP_0_13_FN, GFN_D13,\n> - GP_0_12_FN, GFN_D12,\n> - GP_0_11_FN, GFN_D11,\n> - GP_0_10_FN, GFN_D10,\n> - GP_0_9_FN, GFN_D9,\n> - GP_0_8_FN, GFN_D8,\n> - GP_0_7_FN, GFN_D7,\n> - GP_0_6_FN, GFN_D6,\n> - GP_0_5_FN, GFN_D5,\n> - GP_0_4_FN, GFN_D4,\n> - GP_0_3_FN, GFN_D3,\n> - GP_0_2_FN, GFN_D2,\n> - GP_0_1_FN, GFN_D1,\n> - GP_0_0_FN, GFN_D0 }\n> - },\n> - /* GPSR1(0xE6060104) is md[3:1] controls initial value */\n> - /* md[3:1] .. 0 : 0x0EFFFFFF */\n> - /* .. other : 0x00000000 */\n> - { PINMUX_CFG_REG(\"GPSR1\", 0xE6060104, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_1_28_FN, GFN_CLKOUT,\n> - GP_1_27_FN, GFN_EX_WAIT0_A,\n> - GP_1_26_FN, GFN_WE1x,\n> - GP_1_25_FN, GFN_WE0x,\n> - GP_1_24_FN, GFN_RD_WRx,\n> - GP_1_23_FN, GFN_RDx,\n> - GP_1_22_FN, GFN_BSx,\n> - GP_1_21_FN, GFN_CS1x_A26,\n> - GP_1_20_FN, GFN_CS0x,\n> - GP_1_19_FN, GFN_A19,\n> - GP_1_18_FN, GFN_A18,\n> - GP_1_17_FN, GFN_A17,\n> - GP_1_16_FN, GFN_A16,\n> - GP_1_15_FN, GFN_A15,\n> - GP_1_14_FN, GFN_A14,\n> - GP_1_13_FN, GFN_A13,\n> - GP_1_12_FN, GFN_A12,\n> - GP_1_11_FN, GFN_A11,\n> - GP_1_10_FN, GFN_A10,\n> - GP_1_9_FN, GFN_A9,\n> - GP_1_8_FN, GFN_A8,\n> - GP_1_7_FN, GFN_A7,\n> - GP_1_6_FN, GFN_A6,\n> - GP_1_5_FN, GFN_A5,\n> - GP_1_4_FN, GFN_A4,\n> - GP_1_3_FN, GFN_A3,\n> - GP_1_2_FN, GFN_A2,\n> - GP_1_1_FN, GFN_A1,\n> - GP_1_0_FN, GFN_A0 }\n> - },\n> - /* GPSR2(0xE6060108) is md[3:1] controls */\n> - /* md[3:1] .. 0 : 0x000003C0 */\n> - /* .. other : 0x00000200 */\n> - { PINMUX_CFG_REG(\"GPSR2\", 0xE6060108, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - GP_2_14_FN, GFN_AVB_AVTP_CAPTURE_A,\n> - GP_2_13_FN, GFN_AVB_AVTP_MATCH_A,\n> - GP_2_12_FN, GFN_AVB_LINK,\n> - GP_2_11_FN, GFN_AVB_PHY_INT,\n> - GP_2_10_FN, GFN_AVB_MAGIC,\n> - GP_2_9_FN, GFN_AVB_MDC,\n> - GP_2_8_FN, GFN_PWM2_A,\n> - GP_2_7_FN, GFN_PWM1_A,\n> - GP_2_6_FN, GFN_PWM0,\n> - GP_2_5_FN, GFN_IRQ5,\n> - GP_2_4_FN, GFN_IRQ4,\n> - GP_2_3_FN, GFN_IRQ3,\n> - GP_2_2_FN, GFN_IRQ2,\n> - GP_2_1_FN, GFN_IRQ1,\n> - GP_2_0_FN, GFN_IRQ0 }\n> - },\n> -\n> - /* GPSR3 */\n> - { PINMUX_CFG_REG(\"GPSR3\", 0xE606010C, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - GP_3_15_FN, GFN_SD1_WP,\n> - GP_3_14_FN, GFN_SD1_CD,\n> - GP_3_13_FN, GFN_SD0_WP,\n> - GP_3_12_FN, GFN_SD0_CD,\n> - GP_3_11_FN, GFN_SD1_DAT3,\n> - GP_3_10_FN, GFN_SD1_DAT2,\n> - GP_3_9_FN, GFN_SD1_DAT1,\n> - GP_3_8_FN, GFN_SD1_DAT0,\n> - GP_3_7_FN, GFN_SD1_CMD,\n> - GP_3_6_FN, GFN_SD1_CLK,\n> - GP_3_5_FN, GFN_SD0_DAT3,\n> - GP_3_4_FN, GFN_SD0_DAT2,\n> - GP_3_3_FN, GFN_SD0_DAT1,\n> - GP_3_2_FN, GFN_SD0_DAT0,\n> - GP_3_1_FN, GFN_SD0_CMD,\n> - GP_3_0_FN, GFN_SD0_CLK }\n> - },\n> - /* GPSR4 */\n> - { PINMUX_CFG_REG(\"GPSR4\", 0xE6060110, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_4_17_FN, GFN_SD3_DS,\n> - GP_4_16_FN, GFN_SD3_DAT7,\n> -\n> - GP_4_15_FN, GFN_SD3_DAT6,\n> - GP_4_14_FN, GFN_SD3_DAT5,\n> - GP_4_13_FN, GFN_SD3_DAT4,\n> - GP_4_12_FN, FN_SD3_DAT3,\n> - GP_4_11_FN, FN_SD3_DAT2,\n> - GP_4_10_FN, FN_SD3_DAT1,\n> - GP_4_9_FN, FN_SD3_DAT0,\n> - GP_4_8_FN, FN_SD3_CMD,\n> - GP_4_7_FN, FN_SD3_CLK,\n> - GP_4_6_FN, GFN_SD2_DS,\n> - GP_4_5_FN, GFN_SD2_DAT3,\n> - GP_4_4_FN, GFN_SD2_DAT2,\n> - GP_4_3_FN, GFN_SD2_DAT1,\n> - GP_4_2_FN, GFN_SD2_DAT0,\n> - GP_4_1_FN, FN_SD2_CMD,\n> - GP_4_0_FN, GFN_SD2_CLK }\n> - },\n> - /* GPSR5 */\n> - { PINMUX_CFG_REG(\"GPSR5\", 0xE6060114, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_5_25_FN, GFN_MLB_DAT,\n> - GP_5_24_FN, GFN_MLB_SIG,\n> -\n> - GP_5_23_FN, GFN_MLB_CLK,\n> - GP_5_22_FN, FN_MSIOF0_RXD,\n> - GP_5_21_FN, GFN_MSIOF0_SS2,\n> - GP_5_20_FN, FN_MSIOF0_TXD,\n> - GP_5_19_FN, GFN_MSIOF0_SS1,\n> - GP_5_18_FN, GFN_MSIOF0_SYNC,\n> - GP_5_17_FN, FN_MSIOF0_SCK,\n> - GP_5_16_FN, GFN_HRTS0x,\n> - GP_5_15_FN, GFN_HCTS0x,\n> - GP_5_14_FN, GFN_HTX0,\n> - GP_5_13_FN, GFN_HRX0,\n> - GP_5_12_FN, GFN_HSCK0,\n> - GP_5_11_FN, GFN_RX2_A,\n> - GP_5_10_FN, GFN_TX2_A,\n> - GP_5_9_FN, GFN_SCK2,\n> - GP_5_8_FN, GFN_RTS1x_TANS,\n> - GP_5_7_FN, GFN_CTS1x,\n> - GP_5_6_FN, GFN_TX1_A,\n> - GP_5_5_FN, GFN_RX1_A,\n> - GP_5_4_FN, GFN_RTS0x_TANS,\n> - GP_5_3_FN, GFN_CTS0x,\n> - GP_5_2_FN, GFN_TX0,\n> - GP_5_1_FN, GFN_RX0,\n> - GP_5_0_FN, GFN_SCK0 }\n> - },\n> - /* GPSR6 */\n> - { PINMUX_CFG_REG(\"GPSR6\", 0xE6060118, 32, 1) {\n> - GP_6_31_FN, GFN_GP6_31,\n> - GP_6_30_FN, GFN_GP6_30,\n> - GP_6_29_FN, GFN_USB30_OVC,\n> - GP_6_28_FN, GFN_USB30_PWEN,\n> - GP_6_27_FN, GFN_USB1_OVC,\n> - GP_6_26_FN, GFN_USB1_PWEN,\n> - GP_6_25_FN, GFN_USB0_OVC,\n> - GP_6_24_FN, GFN_USB0_PWEN,\n> - GP_6_23_FN, GFN_AUDIO_CLKB_B,\n> - GP_6_22_FN, GFN_AUDIO_CLKA_A,\n> - GP_6_21_FN, GFN_SSI_SDATA9_A,\n> - GP_6_20_FN, GFN_SSI_SDATA8,\n> - GP_6_19_FN, GFN_SSI_SDATA7,\n> - GP_6_18_FN, GFN_SSI_WS78,\n> - GP_6_17_FN, GFN_SSI_SCK78,\n> - GP_6_16_FN, GFN_SSI_SDATA6,\n> - GP_6_15_FN, GFN_SSI_WS6,\n> - GP_6_14_FN, GFN_SSI_SCK6,\n> - GP_6_13_FN, FN_SSI_SDATA5,\n> - GP_6_12_FN, FN_SSI_WS5,\n> - GP_6_11_FN, FN_SSI_SCK5,\n> - GP_6_10_FN, GFN_SSI_SDATA4,\n> - GP_6_9_FN, GFN_SSI_WS4,\n> - GP_6_8_FN, GFN_SSI_SCK4,\n> - GP_6_7_FN, GFN_SSI_SDATA3,\n> - GP_6_6_FN, GFN_SSI_WS34,\n> - GP_6_5_FN, GFN_SSI_SCK34,\n> - GP_6_4_FN, GFN_SSI_SDATA2_A,\n> - GP_6_3_FN, GFN_SSI_SDATA1_A,\n> - GP_6_2_FN, GFN_SSI_SDATA0,\n> - GP_6_1_FN, GFN_SSI_WS01239,\n> - GP_6_0_FN, GFN_SSI_SCK01239 }\n> - },\n> - /* GPSR7 */\n> - { PINMUX_CFG_REG(\"GPSR7\", 0xE606011C, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_7_3_FN, FN_HDMI1_CEC,\n> - GP_7_2_FN, FN_HDMI0_CEC,\n> - GP_7_1_FN, FN_AVS2,\n> - GP_7_0_FN, FN_AVS1 }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR0\", 0xE6060200, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR0_31_28 [4] */\n> - IFN_IRQ1, FN_QPOLA, 0, FN_DU_DISP,\n> - FN_VI4_DATA1_B, FN_CAN0_RX_B, FN_CANFD0_RX_B,\n> - FN_MSIOF3_SS1_E,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_27_24 [4] */\n> - IFN_IRQ0, FN_QPOLB, 0, FN_DU_CDE,\n> - FN_VI4_DATA0_B, FN_CAN0_TX_B, FN_CANFD0_TX_B,\n> - FN_MSIOF3_SS2_E,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_23_20 [4] */\n> - IFN_AVB_AVTP_CAPTURE_A, 0, FN_MSIOF2_TXD_C, FN_RTS4x_TANS_A,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_19_16 [4] */\n> - IFN_AVB_AVTP_MATCH_A, 0, FN_MSIOF2_RXD_C, FN_CTS4x_A,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_15_12 [4] */\n> - IFN_AVB_LINK, 0, FN_MSIOF2_SCK_C, FN_TX4_A,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_11_8 [4] */\n> - IFN_AVB_PHY_INT, 0, FN_MSIOF2_SYNC_C, FN_RX4_A,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_7_4 [4] */\n> - IFN_AVB_MAGIC, 0, FN_MSIOF2_SS1_C, FN_SCK4_A,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR0_3_0 [4] */\n> - IFN_AVB_MDC, 0, FN_MSIOF2_SS2_C, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR1\", 0xE6060204, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR1_31_28 [4] */\n> - IFN_A0, FN_LCDOUT16, FN_MSIOF3_SYNC_B, 0,\n> - FN_VI4_DATA8, 0, FN_DU_DB0, 0,\n> - 0, FN_PWM3_A, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_27_24 [4] */\n> - IFN_PWM2_A, FN_PWMFSW0, 0, FN_HTX3_D,\n> - 0, 0, 0, 0,\n> - 0, FN_IETX_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_23_20 [4] */\n> - IFN_PWM1_A, 0, 0, FN_HRX3_D,\n> - FN_VI4_DATA7_B, 0, 0, 0,\n> - 0, FN_IERX_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_19_16 [4] */\n> - IFN_PWM0, FN_AVB_AVTP_PPS, 0, 0,\n> - FN_VI4_DATA6_B, 0, 0, 0,\n> - 0, FN_IECLK_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_15_12 [4] */\n> - IFN_IRQ5, FN_QSTB_QHE, 0, FN_DU_EXVSYNC_DU_VSYNC,\n> - FN_VI4_DATA5_B, 0, 0, FN_MSIOF3_TXD_E,\n> - 0, FN_PWM6_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_11_8 [4] */\n> - IFN_IRQ4, FN_QSTH_QHS, 0, FN_DU_EXHSYNC_DU_HSYNC,\n> - FN_VI4_DATA4_B, 0, 0, FN_MSIOF3_RXD_E,\n> - 0, FN_PWM5_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_7_4 [4] */\n> - IFN_IRQ3, FN_QSTVB_QVE, 0, FN_DU_DOTCLKOUT1,\n> - FN_VI4_DATA3_B, 0, 0, FN_MSIOF3_SCK_E,\n> - 0, FN_PWM4_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR1_3_0 [4] */\n> - IFN_IRQ2, FN_QCPV_QDE, 0, FN_DU_EXODDF_DU_ODDF_DISP_CDE,\n> - FN_VI4_DATA2_B, 0, 0, FN_MSIOF3_SYNC_E,\n> - 0, FN_PWM3_B, 0, 0,\n> - 0, 0, 0, 0\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR2\", 0xE6060208, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR2_31_28 [4] */\n> - IFN_A8, FN_RX3_B, FN_MSIOF2_SYNC_A, FN_HRX4_B,\n> - 0, 0, 0, FN_SDA6_A,\n> - FN_AVB_AVTP_MATCH_B, FN_PWM1_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_27_24 [4] */\n> - IFN_A7, FN_LCDOUT23, FN_MSIOF2_SS2_A, FN_TX4_B,\n> - FN_VI4_DATA15, FN_V15_DATA15, FN_DU_DB7, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_23_20 [4] */\n> - IFN_A6, FN_LCDOUT22, FN_MSIOF2_SS1_A, FN_RX4_B,\n> - FN_VI4_DATA14, FN_VI5_DATA14, FN_DU_DB6, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_19_16 [4] */\n> - IFN_A5, FN_LCDOUT21, FN_MSIOF3_SS2_B, FN_SCK4_B,\n> - FN_VI4_DATA13, FN_VI5_DATA13, FN_DU_DB5, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_15_12 [4] */\n> - IFN_A4, FN_LCDOUT20, FN_MSIOF3_SS1_B, 0,\n> - FN_VI4_DATA12, FN_VI5_DATA12, FN_DU_DB4, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_11_8 [4] */\n> - IFN_A3, FN_LCDOUT19, FN_MSIOF3_RXD_B, 0,\n> - FN_VI4_DATA11, 0, FN_DU_DB3, 0,\n> - 0, FN_PWM6_A, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_7_4 [4] */\n> - IFN_A2, FN_LCDOUT18, FN_MSIOF3_SCK_B, 0,\n> - FN_VI4_DATA10, 0, FN_DU_DB2, 0,\n> - 0, FN_PWM5_A, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR2_3_0 [4] */\n> - IFN_A1, FN_LCDOUT17, FN_MSIOF3_TXD_B, 0,\n> - FN_VI4_DATA9, 0, FN_DU_DB1, 0,\n> - 0, FN_PWM4_A, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR3\", 0xE606020C, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR3_31_28 [4] */\n> - IFN_A16, FN_LCDOUT8, 0, 0,\n> - FN_VI4_FIELD, 0, FN_DU_DG0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_27_24 [4] */\n> - IFN_A15, FN_LCDOUT15, FN_MSIOF3_TXD_C, 0,\n> - FN_HRTS4x, FN_VI5_DATA11, FN_DU_DG7, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_23_20 [4] */\n> - IFN_A14, FN_LCDOUT14, FN_MSIOF3_RXD_C, 0,\n> - FN_HCTS4x, FN_VI5_DATA10, FN_DU_DG6, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_19_16 [4] */\n> - IFN_A13, FN_LCDOUT13, FN_MSIOF3_SYNC_C, 0,\n> - FN_HTX4_A, FN_VI5_DATA9, FN_DU_DG5, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_15_12 [4] */\n> - IFN_A12, FN_LCDOUT12, FN_MSIOF3_SCK_C, 0,\n> - FN_HRX4_A, FN_VI5_DATA8, FN_DU_DG4, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_11_8 [4] */\n> - IFN_A11, FN_TX3_B, FN_MSIOF2_TXD_A, FN_HTX4_B,\n> - FN_HSCK4, FN_VI5_FIELD, 0, FN_SCL6_A,\n> - FN_AVB_AVTP_CAPTURE_B, FN_PWM2_B, FN_SPV_EVEN, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_7_4 [4] */\n> - IFN_A10, 0, FN_MSIOF2_RXD_A, FN_RTS4n_TANS_B,\n> - 0, FN_VI5_HSYNCx, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR3_3_0 [4] */\n> - IFN_A9, 0, FN_MSIOF2_SCK_A, FN_CTS4x_B,\n> - 0, FN_VI5_VSYNCx, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR4\", 0xE6060210, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR4_31_28 [4] */\n> - IFN_RD_WRx, 0, FN_MSIOF3_RXD_D, FN_TX3_A,\n> - FN_HTX3_A, 0, 0, 0,\n> - FN_CAN0_RX_A, FN_CANFD0_RX_A, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_27_24 [4] */\n> - IFN_RDx, 0, FN_MSIOF3_SYNC_D, FN_RX3_A,\n> - FN_HRX3_A, 0, 0, 0,\n> - FN_CAN0_TX_A, FN_CANFD0_TX_A, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_23_20 [4] */\n> - IFN_BSx, FN_QSTVA_QVS, FN_MSIOF3_SCK_D, FN_SCK3,\n> - FN_HSCK3, 0, 0, 0,\n> - FN_CAN1_TX, FN_CANFD1_TX, FN_IETX_A, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_19_16 [4] */\n> - IFN_CS1x_A26, 0, 0, 0,\n> - 0, FN_VI5_CLK, 0, FN_EX_WAIT0_B,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_15_12 [4] */\n> - IFN_CS0x, 0, 0, 0,\n> - 0, FN_VI5_CLKENB, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_11_8 [4] */\n> - IFN_A19, FN_LCDOUT11, 0, 0,\n> - FN_VI4_CLKENB, 0, FN_DU_DG3, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_7_4 [4] */\n> - IFN_A18, FN_LCDOUT10, 0, 0,\n> - FN_VI4_HSYNCx, 0, FN_DU_DG2, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR4_3_0 [4] */\n> - IFN_A17, FN_LCDOUT9, 0, 0,\n> - FN_VI4_VSYNCx, 0, FN_DU_DG1, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR5\", 0xE6060214, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR5_31_28 [4] */\n> - IFN_D4, FN_MSIOF2_SCK_B, 0, 0,\n> - FN_VI4_DATA20, FN_VI5_DATA4, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_27_24 [4] */\n> - IFN_D3, 0, FN_MSIOF3_TXD_A, 0,\n> - FN_VI4_DATA19, FN_VI5_DATA3, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_23_20 [4] */\n> - IFN_D2, 0, FN_MSIOF3_RXD_A, 0,\n> - FN_VI4_DATA18, FN_VI5_DATA2, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_19_16 [4] */\n> - IFN_D1, FN_MSIOF2_SS2_B, FN_MSIOF3_SYNC_A, 0,\n> - FN_VI4_DATA17, FN_VI5_DATA1, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_15_12 [4] */\n> - IFN_D0, FN_MSIOF2_SS1_B, FN_MSIOF3_SCK_A, 0,\n> - FN_VI4_DATA16, FN_VI5_DATA0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_11_8 [4] */\n> - IFN_EX_WAIT0_A, FN_QCLK, 0, 0,\n> - FN_VI4_CLK, 0, FN_DU_DOTCLKOUT0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_7_4 [4] */\n> - IFN_WE1x, 0, FN_MSIOF3_SS1_D, FN_RTS3x_TANS,\n> - FN_HRTS3x, 0, 0, FN_SDA6_B,\n> - FN_CAN1_RX, FN_CANFD1_RX, FN_IERX_A, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR5_3_0 [4] */\n> - IFN_WE0x, 0, FN_MSIIOF3_TXD_D, FN_CTS3x,\n> - FN_HCTS3x, 0, 0, FN_SCL6_B,\n> - FN_CAN_CLK, 0, FN_IECLK_A, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR6\", 0xE6060218, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR6_31_28 [4] */\n> - IFN_D12, FN_LCDOUT4, FN_MSIOF2_SS1_D, FN_RX4_C,\n> - FN_VI4_DATA4_A, 0, FN_DU_DR4, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_27_24 [4] */\n> - IFN_D11, FN_LCDOUT3, FN_MSIOF2_TXD_D, FN_HTX3_B,\n> - FN_VI4_DATA3_A, FN_RTS4x_TANS_C, FN_DU_DR3, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_23_20 [4] */\n> - IFN_D10, FN_LCDOUT2, FN_MSIOF2_RXD_D, FN_HRX3_B,\n> - FN_VI4_DATA2_A, FN_CTS4x_C, FN_DU_DR2, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_19_16 [4] */\n> - IFN_D9, FN_LCDOUT1, FN_MSIOF2_SYNC_D, 0,\n> - FN_VI4_DATA1_A, 0, FN_DU_DR1, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_15_12 [4] */\n> - IFN_D8, FN_LCDOUT0, FN_MSIOF2_SCK_D, FN_SCK4_C,\n> - FN_VI4_DATA0_A, 0, FN_DU_DR0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_11_8 [4] */\n> - IFN_D7, FN_MSIOF2_TXD_B, 0, 0,\n> - FN_VI4_DATA23, FN_VI5_DATA7, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_7_4 [4] */\n> - IFN_D6, FN_MSIOF2_RXD_B, 0, 0,\n> - FN_VI4_DATA22, FN_VI5_DATA6, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR6_3_0 [4] */\n> - IFN_D5, FN_MSIOF2_SYNC_B, 0, 0,\n> - FN_VI4_DATA21, FN_VI5_DATA5, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR7\", 0xE606021C, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR7_31_28 [4] */\n> - IFN_SD0_DAT1, 0, FN_MSIOF1_TXD_E, 0,\n> - 0, FN_TS_SPSYNC0_B, FN_STP_ISSYNC_0_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_27_24 [4] */\n> - IFN_SD0_DAT0, 0, FN_MSIOF1_RXD_E, 0,\n> - 0, FN_TS_SCK0_B, FN_STP_ISCLK_0_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_23_20 [4] */\n> - IFN_SD0_CMD, 0, FN_MSIOF1_SYNC_E, 0,\n> - 0, 0, FN_STP_IVCXO27_0_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_19_16 [4] */\n> - IFN_SD0_CLK, 0, FN_MSIOF1_SCK_E, 0,\n> - 0, 0, FN_STP_OPWM_0_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_15_12 [4] */\n> - FN_FSCLKST, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_11_8 [4] */\n> - IFN_D15, FN_LCDOUT7, FN_MSIOF3_SS2_A, FN_HTX3_C,\n> - FN_VI4_DATA7_A, 0, FN_DU_DR7, FN_SDA6_C,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_7_4 [4] */\n> - IFN_D14, FN_LCDOUT6, FN_MSIOF3_SS1_A, FN_HRX3_C,\n> - FN_VI4_DATA6_A, 0, FN_DU_DR6, FN_SCL6_C,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR7_3_0 [4] */\n> - IFN_D13, FN_LCDOUT5, FN_MSIOF2_SS2_D, FN_TX4_C,\n> - FN_VI4_DATA5_A, 0, FN_DU_DR5, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR8\", 0xE6060220, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR8_31_28 [4] */\n> - IFN_SD1_DAT3, FN_SD2_DAT7, FN_MSIOF1_SS2_G,\n> - FN_NFRBx_B,\n> - 0, FN_TS_SDEN1_B, FN_STP_ISEN_1_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_27_24 [4] */\n> - IFN_SD1_DAT2, FN_SD2_DAT6, FN_MSIOF1_SS1_G,\n> - FN_NFDATA15_B,\n> - 0, FN_TS_SDAT1_B, FN_STP_IOD_1_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_23_20 [4] */\n> - IFN_SD1_DAT1, FN_SD2_DAT5, FN_MSIOF1_TXD_G,\n> - FN_NFDATA14_B,\n> - 0, FN_TS_SPSYNC1_B, FN_STP_ISSYNC_1_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_19_16 [4] */\n> - IFN_SD1_DAT0, FN_SD2_DAT4, FN_MSIOF1_RXD_G,\n> - FN_NFWPx_B,\n> - 0, FN_TS_SCK1_B, FN_STP_ISCLK_1_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_15_12 [4] */\n> - IFN_SD1_CMD, 0, FN_MSIOF1_SYNC_G,\n> - FN_NFCEx_B,\n> - 0, FN_SIM0_D_A, FN_STP_IVCXO27_1_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_11_8 [4] */\n> - IFN_SD1_CLK, 0, FN_MSIOF1_SCK_G, 0,\n> - 0, FN_SIM0_CLK_A, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_7_4 [4] */\n> - IFN_SD0_DAT3, 0, FN_MSIOF1_SS2_E, 0,\n> - 0, FN_TS_SDEN0_B, FN_STP_ISEN_0_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR8_3_0 [4] */\n> - IFN_SD0_DAT2, 0, FN_MSIOF1_SS1_E, 0,\n> - 0, FN_TS_SDAT0_B, FN_STP_ISD_0_B, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR9\", 0xE6060224, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR9_31_28 [4] */\n> - IFN_SD3_CLK, 0, FN_NFWEx, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_27_24 [4] */\n> - IFN_SD2_DS, 0, FN_NFALE, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_23_20 [4] */\n> - IFN_SD2_DAT3, 0, FN_NFDATA13, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_19_16 [4] */\n> - IFN_SD2_DAT2, 0, FN_NFDATA12, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_15_12 [4] */\n> - IFN_SD2_DAT1, 0, FN_NFDATA11, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_11_8 [4] */\n> - IFN_SD2_DAT0, 0, FN_NFDATA10, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_7_4 [4] */\n> - IFN_SD2_CMD, 0, FN_NFDATA9, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR9_3_0 [4] */\n> - IFN_SD3_CLK, 0, FN_NFDATA8, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR10\", 0xE6060228, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR10_31_28 [4] */\n> - IFN_SD3_DAT6, FN_SD3_CD, FN_NFDATA6, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_27_24 [4] */\n> - IFN_SD3_DAT5, FN_SD2_WP_A, FN_NFDATA5, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_23_20 [4] */\n> - IFN_SD3_DAT4, FN_SD2_CD_A, FN_NFDATA4, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_19_16 [4] */\n> - IFN_SD3_DAT3, 0, FN_NFDATA3, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_15_12 [4] */\n> - IFN_SD3_DAT2, 0, FN_NFDATA2, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_11_8 [4] */\n> - IFN_SD3_DAT1, 0, FN_NFDATA1, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_7_4 [4] */\n> - IFN_SD3_DAT0, 0, FN_NFDATA0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR10_3_0 [4] */\n> - IFN_SD3_CMD, 0, FN_NFREx, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR11\", 0xE606022C, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR11_31_28 [4] */\n> - IFN_RX0, FN_HRX1_B, 0, 0,\n> - 0, FN_TS_SCK0_C, FN_STP_ISCLK_0_C, FN_RIF0_D0_B,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR11_27_24 [4] */\n> - IFN_SCK0, FN_HSCK1_B, FN_MSIOF1_SS2_B, FN_AUDIO_CLKC_B,\n> - FN_SDA2_A, FN_SIM0_RST_B, FN_STP_OPWM_0_C,\n> - FN_RIF0_CLK_B,\n> - 0, FN_ADICHS2, 0, FN_RIF0_CLK_B,\n> - 0, 0, 0, 0,\n> - /* IPSR11_23_20 [4] */\n> - IFN_SD1_WP, 0, FN_NFCEx_A, 0,\n> - 0, FN_SIM0_D_B, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR11_19_16 [4] */\n> - IFN_SD1_CD, 0, FN_NFRBx_A, 0,\n> - 0, FN_SIM0_CLK_B, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR11_15_12 [4] */\n> - IFN_SD0_WP, 0, FN_NFDATA15_A, 0,\n> - FN_SDA2_B, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR11_11_8 [4] */\n> - IFN_SD0_CD, 0, FN_NFDATA14_A, 0,\n> - FN_SCL2_B, FN_SIM0_RST_A, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR11_7_4 [4] */\n> - IFN_SD3_DS, 0, FN_NFCLE, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR11_3_0 [4] */\n> - IFN_SD3_DAT7, FN_SD3_WP, FN_NFDATA7, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR12\", 0xE6060230, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR12_31_28 [4] */\n> - IFN_SCK2, FN_SCIF_CLK_B, FN_MSIOF1_SCK_B, 0,\n> - 0, FN_TS_SCK1_C, FN_STP_ISCLK_1_C, FN_RIF1_CLK_B,\n> - 0, FN_ADICLK, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR12_27_24 [4] */\n> - IFN_RTS1x_TANS, FN_HRTS1x_A, FN_MSIOF1_TXD_B, 0,\n> - 0, FN_TS_SDAT1_C, FN_STP_ISD_1_C, FN_RIF1_D1_B,\n> - 0, FN_ADICHS0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR12_23_20 [4] */\n> - IFN_CTS1x, FN_HCTS1x_A, FN_MSIOF1_RXD_B, 0,\n> - 0, FN_TS_SDEN1_C, FN_STP_ISEN_1_C, FN_RIF1_D0_B,\n> - 0, FN_ADIDATA, 0, 0,\n> - /* IPSR12_19_16 [4] */\n> - IFN_TX1_A, FN_HTX1_A, 0, 0,\n> - 0, FN_TS_SDEN0_C, FN_STP_ISEN_0_C, FN_RIF1_D0_C,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR12_15_12 [4] */\n> - IFN_RX1_A, FN_HRX1_A, 0, 0,\n> - 0, FN_TS_SDAT0_C, FN_STP_ISD_0_C, FN_RIF1_CLK_C,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR12_11_8 [4] */\n> - IFN_RTS0x_TANS, FN_HRTS1x_B, FN_MSIOF1_SS1_B, FN_AUDIO_CLKA_B,\n> - FN_SCL2_A, 0, FN_STP_IVCXO27_1_C, FN_RIF0_SYNC_B,\n> - 0, FN_ADICHS1, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR12_7_4 [4] */\n> - IFN_CTS0x, FN_HCTS1x_B, FN_MSIOF1_SYNC_B, 0,\n> - 0, FN_TS_SPSYNC1_C, FN_STP_ISSYNC_1_C, FN_RIF1_SYNC_B,\n> - FN_AUDIO_CLKOUT_C, FN_ADICS_SAMP, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR12_3_0 [4] */\n> - IFN_TX0, FN_HTX1_B, 0, 0,\n> - 0, FN_TS_SPSYNC0_C, FN_STP_ISSYNC_0_C, FN_RIF0_D1_B,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR13\", 0xE6060234, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR13_31_28 [4] */\n> - IFN_MSIOF0_SYNC, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - FN_AUDIO_CLKOUT_A, 0, FN_TX5_B, 0,\n> - 0, FN_BPFCLK_D, 0, 0,\n> - /* IPSR13_27_24 [4] */\n> - IFN_HRTS0x, FN_TX2_B, FN_MSIOF1_SS1_D, 0,\n> - FN_SSI_WS9_A, 0, FN_STP_IVCXO27_0_D, FN_BPFCLK_A,\n> - FN_AUDIO_CLKOUT2_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR13_23_20 [4] */\n> - IFN_HCTS0x, FN_RX2_B, FN_MSIOF1_SYNC_D, 0,\n> - FN_SSI_SCK9_A, FN_TS_SPSYNC0_D, FN_STP_ISSYNC_0_D,\n> - FN_RIF0_SYNC_C,\n> - FN_AUDIO_CLKOUT1_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR13_19_16 [4] */\n> - IFN_HTX0, 0, FN_MSIOF1_TXD_D, 0,\n> - FN_SSI_SDATA9_B, FN_TS_SDAT0_D, FN_STP_ISD_0_D, FN_RIF0_D1_C,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR13_15_12 [4] */\n> - IFN_HRX0, 0, FN_MSIOF1_RXD_D, 0,\n> - FN_SS1_SDATA2_B, FN_TS_SDEN0_D, FN_STP_ISEN_0_D, FN_RIF0_D0_C,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR13_11_8 [4] */\n> - IFN_HSCK0, 0, FN_MSIOF1_SCK_D, FN_AUDIO_CLKB_A,\n> - FN_SSI_SDATA1_B, FN_TS_SCK0_D, FN_STP_ISCLK_0_D, FN_RIF0_CLK_C,\n> - 0, 0, FN_RX5_B, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR13_7_4 [4] */\n> - IFN_RX2_A, 0, 0, FN_SD2_WP_B,\n> - FN_SDA1_A, 0, FN_FMIN_A, FN_RIF1_SYNC_C,\n> - 0, FN_FSO_CEF_1_B, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR13_3_0 [4] */\n> - IFN_TX2_A, 0, 0, FN_SD2_CD_B,\n> - FN_SCL1_A, 0, FN_FMCLK_A, FN_RIF1_D1_C,\n> - 0, FN_FSO_CFE_0_B, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR14\", 0xE6060238, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR14_31_28 [4] */\n> - IFN_SSI_SDATA0, 0, FN_MSIOF1_SS2_F, 0,\n> - 0, 0, 0, FN_MOUT2,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR14_27_24 [4] */\n> - IFN_SSI_WS0129, 0, FN_MSIOF1_SS1_F, 0,\n> - 0, 0, 0, FN_MOUT1,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR14_23_20 [4] */\n> - IFN_SSI_SCK0129, 0, FN_MSIOF1_TXD_F, 0,\n> - 0, 0, 0, FN_MOUT0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR14_19_16 [4] */\n> - IFN_MLB_DAT, FN_TX1_B, FN_MSIOF1_RXD_F, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR14_15_12 [4] */\n> - IFN_MLB_SIG, FN_RX1_B, FN_MSIOF1_SYNC_F, 0,\n> - FN_SDA1_B, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR14_11_8 [4] */\n> - IFN_MLB_CLK, 0, FN_MSIOF1_SCK_F, 0,\n> - FN_SCL1_B, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR14_7_4 [4] */\n> - IFN_MSIOF0_SS2, FN_TX5_A, FN_MSIOF1_SS2_D, FN_AUDIO_CLKC_A,\n> - FN_SSI_WS2_A, 0, FN_STP_OPWM_0_D, 0,\n> - FN_AUDIO_CLKOUT_D, 0, FN_SPEEDIN_B, 0,\n> - /* IPSR14_3_0 [4] */\n> - IFN_MSIOF0_SS1, FN_RX5_A, 0, FN_AUDIO_CLKA_C,\n> - FN_SSI_SCK2_A, 0, FN_STP_IVCXO27_0_C, 0,\n> - FN_AUDIO_CLKOUT3_A, 0, FN_TCLK1_B, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR15\", 0xE606023C, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR15_31_28 [4] */\n> - IFN_SSI_SDATA4, FN_HSCK2_A, FN_MSIOF1_RXD_A, 0,\n> - 0, FN_TS_SPSYNC0_A, FN_STP_ISSYNC_0_A, FN_RIF0_D0_A,\n> - FN_RIF2_D1_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_27_24 [4] */\n> - IFN_SSI_WS4, FN_HTX2_A, FN_MSIOF1_SYNC_A, 0,\n> - 0, FN_TS_SDEN0_A, FN_STP_ISEN_0_A, FN_RIF0_SYNC_A,\n> - FN_RIF2_SYNC_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_23_20 [4] */\n> - IFN_SSI_SCK4, FN_HRX2_A, FN_MSIOF1_SCK_A, 0,\n> - 0, FN_TS_SDAT0_A, FN_STP_ISD_0_A, FN_RIF0_CLK_A,\n> - FN_RIF2_CLK_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_19_16 [4] */\n> - IFN_SSI_SDATA3, FN_HRTS2x_A, FN_MSIOF1_TXD_A, 0,\n> - 0, FN_TS_SCK0_A, FN_STP_ISCLK_0_A, FN_RIF0_D1_A,\n> - FN_RIF2_D0_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_15_12 [4] */\n> - IFN_SSI_WS34, FN_HCTS2x_A, FN_MSIOF1_SS2_A, 0,\n> - 0, 0, FN_STP_IVCXO27_0_A, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_11_8 [4] */\n> - IFN_SSI_SCK34, 0, FN_MSIOF1_SS1_A, 0,\n> - 0, 0, FN_STP_OPWM_0_A, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_7_4 [4] */\n> - IFN_SSI_SDATA2_A, 0, 0, 0,\n> - FN_SSI_SCK1_B, 0, 0, FN_MOUT6,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR15_3_0 [4] */\n> - IFN_SSI_SDATA1_A, 0, 0, 0,\n> - 0, 0, 0, FN_MOUT5,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR16\", 0xE6060240, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR16_31_28 [4] */\n> - IFN_SSI_SDATA9_A, FN_HSCK2_B, FN_MSIOF1_SS1_C, FN_HSCK1_A,\n> - FN_SSI_WS1_B, FN_SCK1, FN_STP_IVCXO27_1_A, FN_SCK5,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR16_27_24 [4] */\n> - IFN_SSI_SDATA8, FN_HRTS2x_B, FN_MSIOF1_TXD_C, 0,\n> - 0, FN_TS_SPSYNC1_A, FN_STP_ISSYNC_1_A, FN_RIF1_D1_A,\n> - FN_EIF3_D1_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR16_23_20 [4] */\n> - IFN_SSI_SDATA7, FN_HCTS2x_B, FN_MSIOF1_RXD_C, 0,\n> - 0, FN_TS_SDEN1_A, FN_STP_IEN_1_A, FN_RIF1_D0_A,\n> - FN_RIF3_D0_A, 0, FN_TCLK2_A, 0,\n> - /* IPSR16_19_16 [4] */\n> - IFN_SSI_WS78, FN_HTX2_B, FN_MSIOF1_SYNC_C, 0,\n> - 0, FN_TS_SDAT1_A, FN_STP_ISD_1_A, FN_RIF1_SYNC_A,\n> - FN_RIF3_SYNC_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR16_15_12 [4] */\n> - IFN_SSI_SCK78, FN_HRX2_B, FN_MSIOF1_SCK_C, 0,\n> - 0, FN_TS_SCK1_A, FN_STP_ISCLK_1_A, FN_RIF1_CLK_A,\n> - FN_RIF3_CLK_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR16_11_8 [4] */\n> - IFN_SSI_SDATA6, 0, 0, FN_SIM0_CLK_D,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR16_7_4 [4] */\n> - IFN_SSI_WS6, 0, 0, FN_SIM0_D_D,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR16_3_0 [4] */\n> - IFN_SSI_SCK6, 0, 0, FN_SIM0_RST_D,\n> - 0, 0, 0, 0,\n> - 0, 0, FN_FSO_TOE_A, 0,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR17\", 0xE6060244, 32,\n> - 4, 4, 4, 4, 4, 4, 4, 4) {\n> - /* IPSR17_31_28 [4] */\n> - IFN_USB30_OVC, 0, FN_AUDIO_CLKOUT1_B, 0,\n> - FN_SSI_WS2_B, FN_TS_SPSYNC1_D, FN_STP_ISSYNC_1_D,\n> - FN_STP_IVCXO27_0_E,\n> - FN_RIF3_D1_B, 0, FN_FSO_TOE_B, FN_TPU0TO1,\n> - 0, 0, 0, 0,\n> - /* IPSR17_27_24 [4] */\n> - IFN_USB30_PWEN, 0, 0, FN_AUDIO_CLKOUT_B,\n> - FN_SSI_SCK2_B, FN_TS_SDEN1_D, FN_STP_ISEN_1_D, FN_STP_OPWM_0_E,\n> - FN_RIF3_D0_B, 0, FN_TCLK2_B, FN_TPU0TO0,\n> - FN_BPFCLK_C, FN_HRTS2x_C, 0, 0,\n> - /* IPSR17_23_20 [4] */\n> - IFN_USB1_OVC, 0, FN_MSIOF1_SS2_C, 0,\n> - FN_SSI_WS1_A, FN_TS_SDAT0_E, FN_STP_ISD_0_E, FN_FMIN_B,\n> - FN_RIF2_SYNC_B, 0, FN_REMOCON_B, 0,\n> - 0, FN_HCTS2x_C, 0, 0,\n> - /* IPSR17_19_16 [4] */\n> - IFN_USB1_PWEN, 0, 0, FN_SIM0_CLK_C,\n> - FN_SSI_SCK1_A, FN_TS_SCK0_E, FN_STP_ISCLK_0_E, FN_FMCLK_B,\n> - FN_RIF2_CLK_B, 0, FN_SPEEDIN_A, 0,\n> - 0, FN_HTX2_C, 0, 0,\n> - /* IPSR17_15_12 [4] */\n> - IFN_USB0_OVC, 0, 0, FN_SIM0_D_C,\n> - 0, FN_TS_SDAT1_D, FN_STP_ISD_1_D, 0,\n> - FN_RIF3_SYNC_B, 0, 0, 0,\n> - 0, FN_HRX2_C, 0, 0,\n> - /* IPSR17_11_8 [4] */\n> - IFN_USB0_PWEN, 0, 0, FN_SIM0_RST_C,\n> - 0, FN_TS_SCK1_D, FN_STP_ISCLK_1_D, FN_BPFCLK_B,\n> - FN_RIF3_CLK_B, 0, FN_FSO_CFE_1_A, 0,\n> - 0, FN_HSCK2_C, 0, 0,\n> - /* IPSR17_7_4 [4] */\n> - IFN_AUDIO_CLKB_B, FN_SCIF_CLK_A, 0, 0,\n> - 0, 0, FN_STP_IVCXO27_1_D, FN_REMOCON_A,\n> - 0, 0, FN_TCLK1_A, 0,\n> - 0, 0, 0, 0,\n> - /* IPSR17_3_0 [4] */\n> - IFN_AUDIO_CLKA_A, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - 0, 0, 0, FN_CC5_OSCOUT,\n> - 0, 0, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"IPSR18\", 0xE6060248, 32,\n> - 1, 1, 1, 1, 1, 1, 1, 1,\n> - 1, 1, 1, 1, 1, 1, 1, 1,\n> - 1, 1, 1, 1, 1, 1, 1, 1,\n> - 4, 4) {\n> - /* reserved [31..24] */\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - /* reserved [23..16] */\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - /* reserved [15..8] */\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - /* IPSR18_7_4 [4] */\n> - IFN_GP6_31, 0, 0, FN_AUDIO_CLKOUT3_B,\n> - FN_SSI_WS9_B, FN_TS_SPSYNC0_E, FN_STP_ISSYNC_0_E, 0,\n> - FN_RIF2_D1_B, 0, 0, FN_TPU0TO3,\n> - FN_FMIN_C, FN_FMIN_D, 0, 0,\n> - /* IPSR18_3_0 [4] */\n> - IFN_GP6_30, 0, 0, FN_AUDIO_CLKOUT2_B,\n> - FN_SSI_SCK9_B, FN_TS_SDEN0_E, FN_STP_ISEN_0_E, 0,\n> - FN_RIF2_D0_B, 0, FN_FSO_CFE_0_A, FN_TPU0TO2,\n> - FN_FMCLK_C, FN_FMCLK_D, 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"MOD_SEL0\", 0xE6060500, 32,\n> - 3, 2, 3,\n> - 1, 1, 1, 1, 1, 2, 1,\n> - 1, 2, 1, 1, 1, 2,\n> - 2, 1, 2, 1, 1, 1) {\n> - /* SEL_MSIOF3 [3] */\n> - FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,\n> - FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,\n> - FN_SEL_MSIOF3_4, FN_SEL_MSIOF3_5,\n> - FN_SEL_MSIOF3_6, 0,\n> - /* SEL_MSIOF2 [2] */\n> - FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,\n> - FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,\n> - /* SEL_MSIOF1 [3] */\n> - FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,\n> - FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,\n> - FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,\n> - FN_SEL_MSIOF1_6, 0,\n> -\n> - /* SEL_LBSC [1] */\n> - FN_SEL_LBSC_0, FN_SEL_LBSC_1,\n> - /* SEL_IEBUS [1] */\n> - FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,\n> - /* SEL_I2C2 [1] */\n> - FN_SEL_I2C2_0, FN_SEL_I2C2_1,\n> - /* SEL_I2C1 [1] */\n> - FN_SEL_I2C1_0, FN_SEL_I2C1_1,\n> - /* SEL_HSCIF4 [1] */\n> - FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,\n> - /* SEL_HSCIF3 [2] */\n> - FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,\n> - FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,\n> - /* SEL_HSCIF1 [1] */\n> - FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,\n> -\n> - /* SEL_FSO [1] */\n> - FN_SEL_FSO_0, FN_SEL_FSO_1,\n> - /* SEL_HSCIF2 [2] */\n> - FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,\n> - FN_SEL_HSCIF2_2, 0,\n> - /* SEL_ETHERAVB [1] */\n> - FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,\n> - /* SEL_DRIF3 [1] */\n> - FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,\n> - /* SEL_DRIF2 [1] */\n> - FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,\n> - /* SEL_DRIF1 [2] */\n> - FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,\n> - FN_SEL_DRIF1_2, 0,\n> -\n> - /* SEL_DRIF0 [2] */\n> - FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,\n> - FN_SEL_DRIF0_2, 0,\n> - /* SEL_CANFD0 [1] */\n> - FN_SEL_CANFD_0, FN_SEL_CANFD_1,\n> - /* SEL_ADG [2] */\n> - FN_SEL_ADG_0, FN_SEL_ADG_1,\n> - FN_SEL_ADG_2, FN_SEL_ADG_3,\n> - /* reserved [3] */\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"MOD_SEL1\", 0xE6060504, 32,\n> - 2, 3, 1, 2,\n> - 3, 1, 1, 2, 1,\n> - 2, 1, 1, 1, 1, 1, 1,\n> - 1, 1, 1, 1, 1, 1, 1, 1) {\n> - /* SEL_TSIF1 [2] */\n> - FN_SEL_TSIF1_0,\n> - FN_SEL_TSIF1_1,\n> - FN_SEL_TSIF1_2,\n> - FN_SEL_TSIF1_3,\n> - /* SEL_TSIF0 [3] */\n> - FN_SEL_TSIF0_0,\n> - FN_SEL_TSIF0_1,\n> - FN_SEL_TSIF0_2,\n> - FN_SEL_TSIF0_3,\n> - FN_SEL_TSIF0_4,\n> - 0,\n> - 0,\n> - 0,\n> - /* SEL_TIMER_TMU [1] */\n> - FN_SEL_TIMER_TMU_0,\n> - FN_SEL_TIMER_TMU_1,\n> - /* SEL_SSP1_1 [2] */\n> - FN_SEL_SSP1_1_0,\n> - FN_SEL_SSP1_1_1,\n> - FN_SEL_SSP1_1_2,\n> - FN_SEL_SSP1_1_3,\n> -\n> - /* SEL_SSP1_0 [3] */\n> - FN_SEL_SSP1_0_0,\n> - FN_SEL_SSP1_0_1,\n> - FN_SEL_SSP1_0_2,\n> - FN_SEL_SSP1_0_3,\n> - FN_SEL_SSP1_0_4,\n> - 0,\n> - 0,\n> - 0,\n> - /* SEL_SSI [1] */\n> - FN_SEL_SSI_0,\n> - FN_SEL_SSI_1,\n> - /* SEL_SPEED_PULSE_IF [1] */\n> - FN_SEL_SPEED_PULSE_IF_0,\n> - FN_SEL_SPEED_PULSE_IF_1,\n> - /* SEL_SIMCARD [2] */\n> - FN_SEL_SIMCARD_0,\n> - FN_SEL_SIMCARD_1,\n> - FN_SEL_SIMCARD_2,\n> - FN_SEL_SIMCARD_3,\n> - /* SEL_SDHI2 [1] */\n> - FN_SEL_SDHI2_0,\n> - FN_SEL_SDHI2_1,\n> -\n> - /* SEL_SCIF4 [2] */\n> - FN_SEL_SCIF4_0,\n> - FN_SEL_SCIF4_1,\n> - FN_SEL_SCIF4_2,\n> - 0,\n> - /* SEL_SCIF3 [1] */\n> - FN_SEL_SCIF3_0,\n> - FN_SEL_SCIF3_1,\n> - /* SEL_SCIF2 [1] */\n> - FN_SEL_SCIF2_0,\n> - FN_SEL_SCIF2_1,\n> - /* SEL_SCIF1 [1] */\n> - FN_SEL_SCIF1_0,\n> - FN_SEL_SCIF1_1,\n> - /* SEL_SCIF [1] */\n> - FN_SEL_SCIF_0,\n> - FN_SEL_SCIF_1,\n> - /* SEL_REMOCON [1] */\n> - FN_SEL_REMOCON_0,\n> - FN_SEL_REMOCON_1,\n> - /* reserved [2] */\n> - 0, 0,\n> -\n> - 0, 0,\n> - /* SEL_RCAN [1] */\n> - FN_SEL_RCAN_0,\n> - FN_SEL_RCAN_1,\n> - /* SEL_PWM6 [1] */\n> - FN_SEL_PWM6_0,\n> - FN_SEL_PWM6_1,\n> - /* SEL_PWM5 [1] */\n> - FN_SEL_PWM5_0,\n> - FN_SEL_PWM5_1,\n> - /* SEL_PWM4 [1] */\n> - FN_SEL_PWM4_0,\n> - FN_SEL_PWM4_1,\n> - /* SEL_PWM3 [1] */\n> - FN_SEL_PWM3_0,\n> - FN_SEL_PWM3_1,\n> - /* SEL_PWM2 [1] */\n> - FN_SEL_PWM2_0,\n> - FN_SEL_PWM2_1,\n> - /* SEL_PWM1 [1] */\n> - FN_SEL_PWM1_0,\n> - FN_SEL_PWM1_1,\n> - }\n> - },\n> - { PINMUX_CFG_REG_VAR(\"MOD_SEL2\", 0xE6060508, 32,\n> - 1, 1, 1, 2, 1,\n> - 3, 1, 1, 1, 1, 1, 1,\n> - 1, 1, 1, 1, 1, 1, 1, 1,\n> - 1, 1, 1, 1, 1, 1, 1, 1,\n> - 1) {\n> - /* I2C_SEL_5 [1] */\n> - FN_I2C_SEL_5_0,\n> - FN_I2C_SEL_5_1,\n> - /* I2C_SEL_3 [1] */\n> - FN_I2C_SEL_3_0,\n> - FN_I2C_SEL_3_1,\n> - /* I2C_SEL_0 [1] */\n> - FN_I2C_SEL_0_0,\n> - FN_I2C_SEL_0_1,\n> - /* SEL_FM [2] */\n> - FN_SEL_FM_0,\n> - FN_SEL_FM_1,\n> - FN_SEL_FM_2,\n> - FN_SEL_FM_3,\n> - /* SEL_SCIF5 [1] */\n> - FN_SEL_SCIF5_0,\n> - FN_SEL_SCIF5_1,\n> -\n> - /* SEL_I2C6 [3] */\n> - FN_SEL_I2C6_0,\n> - FN_SEL_I2C6_1,\n> - FN_SEL_I2C6_2,\n> - 0,\n> - 0,\n> - 0,\n> - 0,\n> - 0,\n> - /* SEL_NDF [1] */\n> - FN_SEL_NDF_0,\n> - FN_SEL_NDF_1,\n> - /* SEL_SSI2 [1] */\n> - FN_SEL_SSI2_0,\n> - FN_SEL_SSI2_1,\n> - /* SEL_SSI9 [1] */\n> - FN_SEL_SSI9_0,\n> - FN_SEL_SSI9_1,\n> - /* SEL_TIMER_TME2 [1] */\n> - FN_SEL_TIMER_TMU2_0,\n> - FN_SEL_TIMER_TMU2_1,\n> - /* SEL_ADG_B [1] */\n> - FN_SEL_ADG_B_0,\n> - FN_SEL_ADG_B_1,\n> -\n> - /* SEL_ADG_C [1] */\n> - FN_SEL_ADG_C_0,\n> - FN_SEL_ADG_C_1,\n> - /* reserved [16] */\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - /* SEL_VIN4 [1] */\n> - FN_SEL_VIN4_0,\n> - FN_SEL_VIN4_1,\n> - }\n> - },\n> -\n> - /* under construction */\n> - { PINMUX_CFG_REG(\"INOUTSEL0\", 0xE6050004, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - GP_0_15_IN, GP_0_15_OUT,\n> - GP_0_14_IN, GP_0_14_OUT,\n> - GP_0_13_IN, GP_0_13_OUT,\n> - GP_0_12_IN, GP_0_12_OUT,\n> - GP_0_11_IN, GP_0_11_OUT,\n> - GP_0_10_IN, GP_0_10_OUT,\n> - GP_0_9_IN, GP_0_9_OUT,\n> - GP_0_8_IN, GP_0_8_OUT,\n> - GP_0_7_IN, GP_0_7_OUT,\n> - GP_0_6_IN, GP_0_6_OUT,\n> - GP_0_5_IN, GP_0_5_OUT,\n> - GP_0_4_IN, GP_0_4_OUT,\n> - GP_0_3_IN, GP_0_3_OUT,\n> - GP_0_2_IN, GP_0_2_OUT,\n> - GP_0_1_IN, GP_0_1_OUT,\n> - GP_0_0_IN, GP_0_0_OUT,\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL1\", 0xE6051004, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_1_28_IN, GP_1_28_OUT,\n> - GP_1_27_IN, GP_1_27_OUT,\n> - GP_1_26_IN, GP_1_26_OUT,\n> - GP_1_25_IN, GP_1_25_OUT,\n> - GP_1_24_IN, GP_1_24_OUT,\n> - GP_1_23_IN, GP_1_23_OUT,\n> - GP_1_22_IN, GP_1_22_OUT,\n> - GP_1_21_IN, GP_1_21_OUT,\n> - GP_1_20_IN, GP_1_20_OUT,\n> - GP_1_19_IN, GP_1_19_OUT,\n> - GP_1_18_IN, GP_1_18_OUT,\n> - GP_1_17_IN, GP_1_17_OUT,\n> - GP_1_16_IN, GP_1_16_OUT,\n> - GP_1_15_IN, GP_1_15_OUT,\n> - GP_1_14_IN, GP_1_14_OUT,\n> - GP_1_13_IN, GP_1_13_OUT,\n> - GP_1_12_IN, GP_1_12_OUT,\n> - GP_1_11_IN, GP_1_11_OUT,\n> - GP_1_10_IN, GP_1_10_OUT,\n> - GP_1_9_IN, GP_1_9_OUT,\n> - GP_1_8_IN, GP_1_8_OUT,\n> - GP_1_7_IN, GP_1_7_OUT,\n> - GP_1_6_IN, GP_1_6_OUT,\n> - GP_1_5_IN, GP_1_5_OUT,\n> - GP_1_4_IN, GP_1_4_OUT,\n> - GP_1_3_IN, GP_1_3_OUT,\n> - GP_1_2_IN, GP_1_2_OUT,\n> - GP_1_1_IN, GP_1_1_OUT,\n> - GP_1_0_IN, GP_1_0_OUT,\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL2\", 0xE6052004, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - GP_2_14_IN, GP_2_14_OUT,\n> - GP_2_13_IN, GP_2_13_OUT,\n> - GP_2_12_IN, GP_2_12_OUT,\n> - GP_2_11_IN, GP_2_11_OUT,\n> - GP_2_10_IN, GP_2_10_OUT,\n> - GP_2_9_IN, GP_2_9_OUT,\n> - GP_2_8_IN, GP_2_8_OUT,\n> - GP_2_7_IN, GP_2_7_OUT,\n> - GP_2_6_IN, GP_2_6_OUT,\n> - GP_2_5_IN, GP_2_5_OUT,\n> - GP_2_4_IN, GP_2_4_OUT,\n> - GP_2_3_IN, GP_2_3_OUT,\n> - GP_2_2_IN, GP_2_2_OUT,\n> - GP_2_1_IN, GP_2_1_OUT,\n> - GP_2_0_IN, GP_2_0_OUT,\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL3\", 0xE6053004, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - GP_3_15_IN, GP_3_15_OUT,\n> - GP_3_14_IN, GP_3_14_OUT,\n> - GP_3_13_IN, GP_3_13_OUT,\n> - GP_3_12_IN, GP_3_12_OUT,\n> - GP_3_11_IN, GP_3_11_OUT,\n> - GP_3_10_IN, GP_3_10_OUT,\n> - GP_3_9_IN, GP_3_9_OUT,\n> - GP_3_8_IN, GP_3_8_OUT,\n> - GP_3_7_IN, GP_3_7_OUT,\n> - GP_3_6_IN, GP_3_6_OUT,\n> - GP_3_5_IN, GP_3_5_OUT,\n> - GP_3_4_IN, GP_3_4_OUT,\n> - GP_3_3_IN, GP_3_3_OUT,\n> - GP_3_2_IN, GP_3_2_OUT,\n> - GP_3_1_IN, GP_3_1_OUT,\n> - GP_3_0_IN, GP_3_0_OUT,\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL4\", 0xE6054004, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_4_17_IN, GP_4_17_OUT,\n> - GP_4_16_IN, GP_4_16_OUT,\n> -\n> - GP_4_15_IN, GP_4_15_OUT,\n> - GP_4_14_IN, GP_4_14_OUT,\n> - GP_4_13_IN, GP_4_13_OUT,\n> - GP_4_12_IN, GP_4_12_OUT,\n> - GP_4_11_IN, GP_4_11_OUT,\n> - GP_4_10_IN, GP_4_10_OUT,\n> - GP_4_9_IN, GP_4_9_OUT,\n> - GP_4_8_IN, GP_4_8_OUT,\n> - GP_4_7_IN, GP_4_7_OUT,\n> - GP_4_6_IN, GP_4_6_OUT,\n> - GP_4_5_IN, GP_4_5_OUT,\n> - GP_4_4_IN, GP_4_4_OUT,\n> - GP_4_3_IN, GP_4_3_OUT,\n> - GP_4_2_IN, GP_4_2_OUT,\n> - GP_4_1_IN, GP_4_1_OUT,\n> - GP_4_0_IN, GP_4_0_OUT,\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL5\", 0xE6055004, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_5_25_IN, GP_5_25_OUT,\n> - GP_5_24_IN, GP_5_24_OUT,\n> -\n> - GP_5_23_IN, GP_5_23_OUT,\n> - GP_5_22_IN, GP_5_22_OUT,\n> - GP_5_21_IN, GP_5_21_OUT,\n> - GP_5_20_IN, GP_5_20_OUT,\n> - GP_5_19_IN, GP_5_19_OUT,\n> - GP_5_18_IN, GP_5_18_OUT,\n> - GP_5_17_IN, GP_5_17_OUT,\n> - GP_5_16_IN, GP_5_16_OUT,\n> -\n> - GP_5_15_IN, GP_5_15_OUT,\n> - GP_5_14_IN, GP_5_14_OUT,\n> - GP_5_13_IN, GP_5_13_OUT,\n> - GP_5_12_IN, GP_5_12_OUT,\n> - GP_5_11_IN, GP_5_11_OUT,\n> - GP_5_10_IN, GP_5_10_OUT,\n> - GP_5_9_IN, GP_5_9_OUT,\n> - GP_5_8_IN, GP_5_8_OUT,\n> - GP_5_7_IN, GP_5_7_OUT,\n> - GP_5_6_IN, GP_5_6_OUT,\n> - GP_5_5_IN, GP_5_5_OUT,\n> - GP_5_4_IN, GP_5_4_OUT,\n> - GP_5_3_IN, GP_5_3_OUT,\n> - GP_5_2_IN, GP_5_2_OUT,\n> - GP_5_1_IN, GP_5_1_OUT,\n> - GP_5_0_IN, GP_5_0_OUT,\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL6\", 0xE6055404, 32, 1) {\n> - GP_INOUTSEL(6)\n> - }\n> - },\n> - { PINMUX_CFG_REG(\"INOUTSEL7\", 0xE6055804, 32, 1) {\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> -\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - 0, 0,\n> - GP_6_3_IN, GP_6_3_OUT,\n> - GP_6_2_IN, GP_6_2_OUT,\n> - GP_6_1_IN, GP_6_1_OUT,\n> - GP_6_0_IN, GP_6_0_OUT,\n> - }\n> - },\n> - { },\n> -};\n> -\n> -static struct pinmux_data_reg pinmux_data_regs[] = {\n> - /* use OUTDT registers? */\n> - { PINMUX_DATA_REG(\"INDT0\", 0xE6050008, 32) {\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - GP_0_15_DATA, GP_0_14_DATA, GP_0_13_DATA, GP_0_12_DATA,\n> - GP_0_11_DATA, GP_0_10_DATA, GP_0_9_DATA, GP_0_8_DATA,\n> - GP_0_7_DATA, GP_0_6_DATA, GP_0_5_DATA, GP_0_4_DATA,\n> - GP_0_3_DATA, GP_0_2_DATA, GP_0_1_DATA, GP_0_0_DATA }\n> - },\n> - { PINMUX_DATA_REG(\"INDT1\", 0xE6051008, 32) {\n> - 0, 0, 0, GP_1_28_DATA,\n> - GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA,\n> - GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,\n> - GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,\n> - GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,\n> - GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,\n> - GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,\n> - GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }\n> - },\n> - { PINMUX_DATA_REG(\"INDT2\", 0xE6052008, 32) {\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA,\n> - GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA,\n> - GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA,\n> - GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA }\n> - },\n> - { PINMUX_DATA_REG(\"INDT3\", 0xE6053008, 32) {\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - GP_3_15_DATA, GP_3_14_DATA, GP_3_13_DATA, GP_3_12_DATA,\n> - GP_3_11_DATA, GP_3_10_DATA, GP_3_9_DATA, GP_3_8_DATA,\n> - GP_3_7_DATA, GP_3_6_DATA, GP_3_5_DATA, GP_3_4_DATA,\n> - GP_3_3_DATA, GP_3_2_DATA, GP_3_1_DATA, GP_3_0_DATA }\n> - },\n> - { PINMUX_DATA_REG(\"INDT4\", 0xE6054008, 32) {\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0, 0, 0, GP_4_17_DATA, GP_4_16_DATA,\n> - GP_4_15_DATA, GP_4_14_DATA, GP_4_13_DATA, GP_4_12_DATA,\n> - GP_4_11_DATA, GP_4_10_DATA, GP_4_9_DATA, GP_4_8_DATA,\n> - GP_4_7_DATA, GP_4_6_DATA, GP_4_5_DATA, GP_4_4_DATA,\n> - GP_4_3_DATA, GP_4_2_DATA, GP_4_1_DATA, GP_4_0_DATA }\n> - },\n> - { PINMUX_DATA_REG(\"INDT5\", 0xE6055008, 32) {\n> - 0, 0, 0, 0,\n> - 0, 0, GP_5_25_DATA, GP_5_24_DATA,\n> - GP_5_23_DATA, GP_5_22_DATA, GP_5_21_DATA, GP_5_20_DATA,\n> - GP_5_19_DATA, GP_5_18_DATA, GP_5_17_DATA, GP_5_16_DATA,\n> - GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA,\n> - GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,\n> - GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,\n> - GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }\n> - },\n> - { PINMUX_DATA_REG(\"INDT6\", 0xE6055408, 32) {\n> - GP_INDT(6) }\n> - },\n> - { PINMUX_DATA_REG(\"INDT7\", 0xE6055808, 32) {\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0, 0, 0, 0, 0,\n> - 0, 0, 0, 0,\n> - GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA }\n> - },\n> - { },\n> -};\n> -\n> -static struct pinmux_info r8a7796_pinmux_info = {\n> - .name = \"r8a7796_pfc\",\n> -\n> - .unlock_reg = 0xe6060000, /* PMMR */\n> -\n> - .reserved_id = PINMUX_RESERVED,\n> - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },\n> - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },\n> - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },\n> - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },\n> - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },\n> -\n> - .first_gpio = GPIO_GP_0_0,\n> - .last_gpio = GPIO_FN_FMIN_D,\n> -\n> - .gpios = pinmux_gpios,\n> - .cfg_regs = pinmux_config_regs,\n> - .data_regs = pinmux_data_regs,\n> -\n> - .gpio_data = pinmux_data,\n> - .gpio_data_size = ARRAY_SIZE(pinmux_data),\n> -};\n> -\n> -void r8a7796_pinmux_init(void)\n> -{\n> - register_pinmux(&r8a7796_pinmux_info);\n> -}\n> --\n> 2.11.0\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=nigauri-org.20150623.gappssmtp.com\n\theader.i=@nigauri-org.20150623.gappssmtp.com\n\theader.b=\"RLJUy/7T\"; dkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3y6GVD0f5mz9s5L\n\tfor ;\n\tWed, 4 Oct 2017 11:09:23 +1100 (AEDT)","by lists.denx.de (Postfix, from userid 105)\n\tid 6232BC21FAD; Wed, 4 Oct 2017 00:09:12 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby 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(PDT)","MIME-Version":"1.0","In-Reply-To":"<20170915191359.28712-5-marek.vasut+renesas@gmail.com>","References":"<20170915191359.28712-1-marek.vasut+renesas@gmail.com>\n\t<20170915191359.28712-5-marek.vasut+renesas@gmail.com>","From":"Nobuhiro Iwamatsu ","Date":"Wed, 4 Oct 2017 08:46:36 +0900","Message-ID":"","To":"Marek Vasut ","X-Mailman-Approved-At":"Wed, 04 Oct 2017 00:09:09 +0000","Cc":"U-Boot ,\n\tMarek Vasut ","Subject":"Re: [U-Boot] [PATCH 5/5] ARM: rmobile: Zap Gen3 PFC tables","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1779340,"web_url":"http://patchwork.ozlabs.org/comment/1779340/","msgid":"<35ae9b51-2f88-bed9-b656-84a1c8b67a53@gmail.com>","list_archive_url":null,"date":"2017-10-04T01:05:27","subject":"Re: [U-Boot] [PATCH 5/5] ARM: rmobile: Zap Gen3 PFC tables","submitter":{"id":1124,"url":"http://patchwork.ozlabs.org/api/people/1124/","name":"Marek Vasut","email":"marek.vasut@gmail.com"},"content":"On 10/04/2017 01:46 AM, Nobuhiro Iwamatsu wrote:\n> Hi!\n> \n> This patch breaks the compiling of board/renesas/ulcb/cpld.c\n> ----\n> board/renesas/ulcb/cpld.c: In function 'ulcb_softspi_sda':\n> board/renesas/ulcb/cpld.c:17:16: error: 'GPIO_GP_6_7' undeclared\n> (first use in this function)\n> #define MOSI GPIO_GP_6_7\n> ^\n> board/renesas/ulcb/cpld.c:46:17: note: in expansion of macro 'MOSI'\n> gpio_set_value(MOSI, set);\n> ^~~~\n> \n> ----\n> \n> Could you check about this?\n\nPlease pick:\n\n[PATCH] ARM: rmobile: Fixup ULCB CPLD support after PFC rework\n\nthat fixes it until I obtain a physical ULCB and rewrite the CPLD\nsupport to a proper DM/DT capable driver.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"UlL+RYHs\"; dkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3y6Hl56xDHz9t2V\n\tfor ;\n\tWed, 4 Oct 2017 12:05:37 +1100 (AEDT)","by lists.denx.de (Postfix, from userid 105)\n\tid B0361C21F6A; Wed, 4 Oct 2017 01:05:33 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id ED025C21D5F;\n\tWed, 4 Oct 2017 01:05:30 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","References":"<20170915191359.28712-1-marek.vasut+renesas@gmail.com>\n\t<20170915191359.28712-5-marek.vasut+renesas@gmail.com>\n\t","From":"Marek Vasut ","Message-ID":"<35ae9b51-2f88-bed9-b656-84a1c8b67a53@gmail.com>","Date":"Wed, 4 Oct 2017 03:05:27 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"","Content-Language":"en-US","Cc":"U-Boot ,\n\tMarek Vasut ","Subject":"Re: [U-Boot] [PATCH 5/5] ARM: rmobile: Zap Gen3 PFC tables","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}}]