[{"id":1769644,"web_url":"http://patchwork.ozlabs.org/comment/1769644/","msgid":"<20170916151224.777e5b56@archlinux>","list_archive_url":null,"date":"2017-09-16T22:12:24","subject":"Re: [PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device\n\ttree binding for H3","submitter":{"id":10151,"url":"http://patchwork.ozlabs.org/api/people/10151/","name":"Jonathan Cameron","email":"jic23@kernel.org"},"content":"On Thu, 14 Sep 2017 22:52:46 +0800\nIcenowy Zheng wrote:\n\n> Allwinner H3 features a thermal sensor like the one in A33, but has its\n> register re-arranged, the clock divider moved to CCU (originally the\n> clock divider is in ADC) and added a pair of bus clock and reset.\n> \n> Update the binding document to cover H3.\n> \n> Signed-off-by: Icenowy Zheng \n> Reviewed-by: Chen-Yu Tsai \n> ---\n> Changes in v4:\n> - Add nvmem calibration data (not yet used by the driver)\n> Changes in v3:\n> - Clock name changes.\n> - Example node name changes.\n> - Add interupts (not yet used by the driver).\n> \n> .../devicetree/bindings/mfd/sun4i-gpadc.txt | 30 ++++++++++++++++++++--\n> 1 file changed, 28 insertions(+), 2 deletions(-)\n> \n> diff --git a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> index badff3611a98..6c470d584bf9 100644\n> --- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> @@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can also act as a thermal sensor\n> and sometimes as a touchscreen controller.\n> \n> Required properties:\n> - - compatible: \"allwinner,sun8i-a33-ths\",\n> + - compatible: must contain one of the following compatibles:\n> +\t\t- \"allwinner,sun8i-a33-ths\"\n> +\t\t- \"allwinner,sun8i-h3-ths\"\n> - reg: mmio address range of the chip,\n> - #thermal-sensor-cells: shall be 0,\n> - #io-channel-cells: shall be 0,\n> \n> -Example:\n> +Optional properties:\n> + - nvmem-cells: A phandle to the calibration data provided by a nvmem device.\n> + If unspecified default values shall be used.\n> + - nvmem-cell-names: Should be \"calibration-data\"\n\nI think a cross reference to the nvmem binding docs would be good here.\nIt wasn't something I could remember coming across before. Obviously\ngrep gets you there quickly enough, but a cross reference would be even\nbetter.\n\nAlso would it make sense to have an example with these in?\n\nJonathan\n> +\n> +Required properties for the following compatibles:\n> +\t\t- \"allwinner,sun8i-h3-ths\"\n> + - clocks: the bus clock and the input clock of the ADC,\n> + - clock-names: should be \"bus\" and \"mod\",\n> + - resets: the bus reset of the ADC,\n> + - interrupts: the sampling interrupt of the ADC,\n> +\n> +Example for A33:\n> \tths: ths@01c25000 {\n> \t\tcompatible = \"allwinner,sun8i-a33-ths\";\n> \t\treg = <0x01c25000 0x100>;\n> @@ -17,6 +31,18 @@ Example:\n> \t\t#io-channel-cells = <0>;\n> \t};\n> \n> +Example for H3:\n> +\tths: thermal-sensor@1c25000 {\n> +\t\tcompatible = \"allwinner,sun8i-h3-ths\";\n> +\t\treg = <0x01c25000 0x400>;\n> +\t\tclocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;\n> +\t\tclock-names = \"bus\", \"mod\";\n> +\t\tresets = <&ccu RST_BUS_THS>;\n> +\t\tinterrupts = ;\n> +\t\t#thermal-sensor-cells = <0>;\n> +\t\t#io-channel-cells = <0>;\n> +\t};\n> +\n> sun4i, sun5i and sun6i SoCs are also supported via the older binding:\n> \n> sun4i resistive touchscreen controller\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","mail.kernel.org;\n\tdmarc=none (p=none dis=none) header.from=kernel.org","mail.kernel.org;\n\tspf=none smtp.mailfrom=jic23@kernel.org"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xvmjG6prmz9sRm\n\tfor ;\n\tSun, 17 Sep 2017 08:12:34 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751299AbdIPWM3 (ORCPT\n\t);\n\tSat, 16 Sep 2017 18:12:29 -0400","from mail.kernel.org ([198.145.29.99]:33492 \"EHLO mail.kernel.org\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751294AbdIPWM2 (ORCPT );\n\tSat, 16 Sep 2017 18:12:28 -0400","from archlinux (unknown [207.243.58.180])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby mail.kernel.org (Postfix) with ESMTPSA id 1716622A73;\n\tSat, 16 Sep 2017 22:12:27 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mail.kernel.org 1716622A73","Date":"Sat, 16 Sep 2017 15:12:24 -0700","From":"Jonathan Cameron ","To":"Icenowy Zheng ","Cc":"Lee Jones , Rob Herring ,\n\tMaxime Ripard ,\n\tChen-Yu Tsai ,\n\tQuentin Schulz ,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org, linux-iio@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device\n\ttree binding for H3","Message-ID":"<20170916151224.777e5b56@archlinux>","In-Reply-To":"<20170914145251.21784-2-icenowy@aosc.io>","References":"<20170914145251.21784-1-icenowy@aosc.io>\n\t<20170914145251.21784-2-icenowy@aosc.io>","X-Mailer":"Claws Mail 3.15.1-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu)","MIME-Version":"1.0","Content-Type":"text/plain; charset=US-ASCII","Content-Transfer-Encoding":"7bit","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769908,"web_url":"http://patchwork.ozlabs.org/comment/1769908/","msgid":"<20170918073336.j7finend3g76chsu@flea.lan>","list_archive_url":null,"date":"2017-09-18T07:33:36","subject":"Re: [PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device\n\ttree binding for H3","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote:\n> Allwinner H3 features a thermal sensor like the one in A33, but has its\n> register re-arranged, the clock divider moved to CCU (originally the\n> clock divider is in ADC) and added a pair of bus clock and reset.\n> \n> Update the binding document to cover H3.\n> \n> Signed-off-by: Icenowy Zheng \n> Reviewed-by: Chen-Yu Tsai \n> ---\n> Changes in v4:\n> - Add nvmem calibration data (not yet used by the driver)\n> Changes in v3:\n> - Clock name changes.\n> - Example node name changes.\n> - Add interupts (not yet used by the driver).\n> \n> .../devicetree/bindings/mfd/sun4i-gpadc.txt | 30 ++++++++++++++++++++--\n> 1 file changed, 28 insertions(+), 2 deletions(-)\n> \n> diff --git a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> index badff3611a98..6c470d584bf9 100644\n> --- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> @@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can also act as a thermal sensor\n> and sometimes as a touchscreen controller.\n> \n> Required properties:\n> - - compatible: \"allwinner,sun8i-a33-ths\",\n> + - compatible: must contain one of the following compatibles:\n> +\t\t- \"allwinner,sun8i-a33-ths\"\n> +\t\t- \"allwinner,sun8i-h3-ths\"\n> - reg: mmio address range of the chip,\n> - #thermal-sensor-cells: shall be 0,\n> - #io-channel-cells: shall be 0,\n> \n> -Example:\n> +Optional properties:\n> + - nvmem-cells: A phandle to the calibration data provided by a nvmem device.\n> + If unspecified default values shall be used.\n> + - nvmem-cell-names: Should be \"calibration-data\"\n\nI'd prefer to have which sensor it applies to here. It wouldn't change\nanything for the H3, but it definitely does for example for the A83t\nthat has two sensors, one for each cluster, and one for the GPU, each\nwith calibration data.\n\nWhat about cluster0-calibration?\n\n> +\n> +Required properties for the following compatibles:\n> +\t\t- \"allwinner,sun8i-h3-ths\"\n> + - clocks: the bus clock and the input clock of the ADC,\n> + - clock-names: should be \"bus\" and \"mod\",\n> + - resets: the bus reset of the ADC,\n> + - interrupts: the sampling interrupt of the ADC,\n\nFor resets and interrupts, you should list all of them. If there's\nonly one, then there's no point telling which one it is.\n\n\nThanks,\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xwd6F36tdz9s72\n\tfor ;\n\tMon, 18 Sep 2017 17:33:41 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751961AbdIRHdj (ORCPT\n\t);\n\tMon, 18 Sep 2017 03:33:39 -0400","from mail.free-electrons.com ([62.4.15.54]:54162 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751751AbdIRHdi (ORCPT\n\t); Mon, 18 Sep 2017 03:33:38 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid EC0A8209DF; Mon, 18 Sep 2017 09:33:36 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id B854D2094F;\n\tMon, 18 Sep 2017 09:33:36 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Mon, 18 Sep 2017 09:33:36 +0200","From":"Maxime Ripard ","To":"Icenowy Zheng ","Cc":"Lee Jones , Rob Herring ,\n\tChen-Yu Tsai , Jonathan Cameron ,\n\tQuentin Schulz ,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org, linux-iio@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device\n\ttree binding for H3","Message-ID":"<20170918073336.j7finend3g76chsu@flea.lan>","References":"<20170914145251.21784-1-icenowy@aosc.io>\n\t<20170914145251.21784-2-icenowy@aosc.io>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"45wuklk6dqzrqgab\"","Content-Disposition":"inline","In-Reply-To":"<20170914145251.21784-2-icenowy@aosc.io>","User-Agent":"NeoMutt/20170714 (1.8.3)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769916,"web_url":"http://patchwork.ozlabs.org/comment/1769916/","msgid":"<310CE549-B8CE-4C0C-95B1-B545E38BDAF5@aosc.io>","list_archive_url":null,"date":"2017-09-18T07:36:43","subject":"Re: [PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device\n\ttree binding for H3","submitter":{"id":71295,"url":"http://patchwork.ozlabs.org/api/people/71295/","name":"Icenowy Zheng","email":"icenowy@aosc.io"},"content":"于 2017年9月18日 GMT+08:00 下午3:33:36, Maxime Ripard 写到:\n>On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote:\n>> Allwinner H3 features a thermal sensor like the one in A33, but has\n>its\n>> register re-arranged, the clock divider moved to CCU (originally the\n>> clock divider is in ADC) and added a pair of bus clock and reset.\n>> \n>> Update the binding document to cover H3.\n>> \n>> Signed-off-by: Icenowy Zheng \n>> Reviewed-by: Chen-Yu Tsai \n>> ---\n>> Changes in v4:\n>> - Add nvmem calibration data (not yet used by the driver)\n>> Changes in v3:\n>> - Clock name changes.\n>> - Example node name changes.\n>> - Add interupts (not yet used by the driver).\n>> \n>> .../devicetree/bindings/mfd/sun4i-gpadc.txt | 30\n>++++++++++++++++++++--\n>> 1 file changed, 28 insertions(+), 2 deletions(-)\n>> \n>> diff --git a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n>b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n>> index badff3611a98..6c470d584bf9 100644\n>> --- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n>> +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n>> @@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can also\n>act as a thermal sensor\n>> and sometimes as a touchscreen controller.\n>> \n>> Required properties:\n>> - - compatible: \"allwinner,sun8i-a33-ths\",\n>> + - compatible: must contain one of the following compatibles:\n>> +\t\t- \"allwinner,sun8i-a33-ths\"\n>> +\t\t- \"allwinner,sun8i-h3-ths\"\n>> - reg: mmio address range of the chip,\n>> - #thermal-sensor-cells: shall be 0,\n>> - #io-channel-cells: shall be 0,\n>> \n>> -Example:\n>> +Optional properties:\n>> + - nvmem-cells: A phandle to the calibration data provided by a\n>nvmem device.\n>> + If unspecified default values shall be used.\n>> + - nvmem-cell-names: Should be \"calibration-data\"\n>\n>I'd prefer to have which sensor it applies to here. It wouldn't change\n>anything for the H3, but it definitely does for example for the A83t\n>that has two sensors, one for each cluster, and one for the GPU, each\n>with calibration data.\n>\n>What about cluster0-calibration?\n\nThe calibration data is in fact a 2 word (8 bytes) zone,\nwhich is reserved for 4 sensors on all SoCs, even on H3.\nIt's half word per sensor.\n\nI prefer to just assume a 2 word cell for every SoC.\n\n>\n>> +\n>> +Required properties for the following compatibles:\n>> +\t\t- \"allwinner,sun8i-h3-ths\"\n>> + - clocks: the bus clock and the input clock of the ADC,\n>> + - clock-names: should be \"bus\" and \"mod\",\n>> + - resets: the bus reset of the ADC,\n>> + - interrupts: the sampling interrupt of the ADC,\n>\n>For resets and interrupts, you should list all of them. If there's\n>only one, then there's no point telling which one it is.\n>\n>\n>Thanks,\n>Maxime\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xwdBB4rV9z9ryQ\n\tfor ;\n\tMon, 18 Sep 2017 17:37:06 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751924AbdIRHhF convert rfc822-to-8bit (ORCPT\n\t);\n\tMon, 18 Sep 2017 03:37:05 -0400","from hermes.aosc.io ([199.195.250.187]:57518 \"EHLO hermes.aosc.io\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751916AbdIRHhD (ORCPT );\n\tMon, 18 Sep 2017 03:37:03 -0400","from localhost (localhost [127.0.0.1]) (Authenticated sender:\n\ticenowy@aosc.io)\n\tby hermes.aosc.io (Postfix) with ESMTPSA id 66D6547714;\n\tMon, 18 Sep 2017 07:36:56 +0000 (UTC)"],"Date":"Mon, 18 Sep 2017 15:36:43 +0800","In-Reply-To":"<20170918073336.j7finend3g76chsu@flea.lan>","References":"<20170914145251.21784-1-icenowy@aosc.io>\n\t<20170914145251.21784-2-icenowy@aosc.io>\n\t<20170918073336.j7finend3g76chsu@flea.lan>","MIME-Version":"1.0","Content-Type":"text/plain;\n charset=utf-8","Content-Transfer-Encoding":"8BIT","Subject":"Re: [PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device\n\ttree binding for H3","To":"Maxime Ripard ","CC":"Lee Jones , Rob Herring ,\n\tChen-Yu Tsai , Jonathan Cameron ,\n\tQuentin Schulz ,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org, linux-iio@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","From":"Icenowy Zheng ","Message-ID":"<310CE549-B8CE-4C0C-95B1-B545E38BDAF5@aosc.io>","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769977,"web_url":"http://patchwork.ozlabs.org/comment/1769977/","msgid":"<20170918083045.7bfiialtbm7w6i7j@flea.lan>","list_archive_url":null,"date":"2017-09-18T08:30:45","subject":"Re: [PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device\n\ttree binding for H3","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Mon, Sep 18, 2017 at 03:36:43PM +0800, Icenowy Zheng wrote:\n> 于 2017年9月18日 GMT+08:00 下午3:33:36, Maxime Ripard 写到:\n> >On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote:\n> >> Allwinner H3 features a thermal sensor like the one in A33, but has\n> >its\n> >> register re-arranged, the clock divider moved to CCU (originally the\n> >> clock divider is in ADC) and added a pair of bus clock and reset.\n> >> \n> >> Update the binding document to cover H3.\n> >> \n> >> Signed-off-by: Icenowy Zheng \n> >> Reviewed-by: Chen-Yu Tsai \n> >> ---\n> >> Changes in v4:\n> >> - Add nvmem calibration data (not yet used by the driver)\n> >> Changes in v3:\n> >> - Clock name changes.\n> >> - Example node name changes.\n> >> - Add interupts (not yet used by the driver).\n> >> \n> >> .../devicetree/bindings/mfd/sun4i-gpadc.txt | 30\n> >++++++++++++++++++++--\n> >> 1 file changed, 28 insertions(+), 2 deletions(-)\n> >> \n> >> diff --git a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> >b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> >> index badff3611a98..6c470d584bf9 100644\n> >> --- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> >> +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> >> @@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can also\n> >act as a thermal sensor\n> >> and sometimes as a touchscreen controller.\n> >> \n> >> Required properties:\n> >> - - compatible: \"allwinner,sun8i-a33-ths\",\n> >> + - compatible: must contain one of the following compatibles:\n> >> +\t\t- \"allwinner,sun8i-a33-ths\"\n> >> +\t\t- \"allwinner,sun8i-h3-ths\"\n> >> - reg: mmio address range of the chip,\n> >> - #thermal-sensor-cells: shall be 0,\n> >> - #io-channel-cells: shall be 0,\n> >> \n> >> -Example:\n> >> +Optional properties:\n> >> + - nvmem-cells: A phandle to the calibration data provided by a\n> >nvmem device.\n> >> + If unspecified default values shall be used.\n> >> + - nvmem-cell-names: Should be \"calibration-data\"\n> >\n> >I'd prefer to have which sensor it applies to here. It wouldn't change\n> >anything for the H3, but it definitely does for example for the A83t\n> >that has two sensors, one for each cluster, and one for the GPU, each\n> >with calibration data.\n> >\n> >What about cluster0-calibration?\n> \n> The calibration data is in fact a 2 word (8 bytes) zone,\n> which is reserved for 4 sensors on all SoCs, even on H3.\n> It's half word per sensor.\n> \n> I prefer to just assume a 2 word cell for every SoC.\n\nYou have three different data sources, it should be reprensented as\nsuch.\n\nOtherwise, the client has to get some knowledge of how the data are\nstored in the provider, which is an abstraction violation.\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xwfNv6svKz9s7M\n\tfor ;\n\tMon, 18 Sep 2017 18:31:27 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752299AbdIRIbH (ORCPT\n\t);\n\tMon, 18 Sep 2017 04:31:07 -0400","from mail.free-electrons.com ([62.4.15.54]:57227 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752590AbdIRIbG (ORCPT\n\t); Mon, 18 Sep 2017 04:31:06 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 4FA3E2092D; Mon, 18 Sep 2017 10:31:04 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 362B1207F6;\n\tMon, 18 Sep 2017 10:30:45 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Mon, 18 Sep 2017 10:30:45 +0200","From":"Maxime Ripard ","To":"Icenowy Zheng ","Cc":"Lee Jones , Rob Herring ,\n\tChen-Yu Tsai , Jonathan Cameron ,\n\tQuentin Schulz ,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org, linux-iio@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device\n\ttree binding for H3","Message-ID":"<20170918083045.7bfiialtbm7w6i7j@flea.lan>","References":"<20170914145251.21784-1-icenowy@aosc.io>\n\t<20170914145251.21784-2-icenowy@aosc.io>\n\t<20170918073336.j7finend3g76chsu@flea.lan>\n\t<310CE549-B8CE-4C0C-95B1-B545E38BDAF5@aosc.io>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"r2zkwavsvf5gwuko\"","Content-Disposition":"inline","In-Reply-To":"<310CE549-B8CE-4C0C-95B1-B545E38BDAF5@aosc.io>","User-Agent":"NeoMutt/20170714 (1.8.3)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1770267,"web_url":"http://patchwork.ozlabs.org/comment/1770267/","msgid":"","list_archive_url":null,"date":"2017-09-18T15:47:25","subject":"Re: [linux-sunxi] Re: [PATCH v4 1/6] dt-bindings: update the\n\tAllwinner GPADC device tree binding for H3","submitter":{"id":71295,"url":"http://patchwork.ozlabs.org/api/people/71295/","name":"Icenowy Zheng","email":"icenowy@aosc.io"},"content":"在 2017-09-18 16:30，Maxime Ripard 写道：\n> On Mon, Sep 18, 2017 at 03:36:43PM +0800, Icenowy Zheng wrote:\n>> 于 2017年9月18日 GMT+08:00 下午3:33:36, Maxime Ripard \n>> 写到:\n>> >On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote:\n>> >> Allwinner H3 features a thermal sensor like the one in A33, but has\n>> >its\n>> >> register re-arranged, the clock divider moved to CCU (originally the\n>> >> clock divider is in ADC) and added a pair of bus clock and reset.\n>> >>\n>> >> Update the binding document to cover H3.\n>> >>\n>> >> Signed-off-by: Icenowy Zheng \n>> >> Reviewed-by: Chen-Yu Tsai \n>> >> ---\n>> >> Changes in v4:\n>> >> - Add nvmem calibration data (not yet used by the driver)\n>> >> Changes in v3:\n>> >> - Clock name changes.\n>> >> - Example node name changes.\n>> >> - Add interupts (not yet used by the driver).\n>> >>\n>> >> .../devicetree/bindings/mfd/sun4i-gpadc.txt | 30\n>> >++++++++++++++++++++--\n>> >> 1 file changed, 28 insertions(+), 2 deletions(-)\n>> >>\n>> >> diff --git a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n>> >b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n>> >> index badff3611a98..6c470d584bf9 100644\n>> >> --- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n>> >> +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n>> >> @@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can also\n>> >act as a thermal sensor\n>> >> and sometimes as a touchscreen controller.\n>> >>\n>> >> Required properties:\n>> >> - - compatible: \"allwinner,sun8i-a33-ths\",\n>> >> + - compatible: must contain one of the following compatibles:\n>> >> +\t\t- \"allwinner,sun8i-a33-ths\"\n>> >> +\t\t- \"allwinner,sun8i-h3-ths\"\n>> >> - reg: mmio address range of the chip,\n>> >> - #thermal-sensor-cells: shall be 0,\n>> >> - #io-channel-cells: shall be 0,\n>> >>\n>> >> -Example:\n>> >> +Optional properties:\n>> >> + - nvmem-cells: A phandle to the calibration data provided by a\n>> >nvmem device.\n>> >> + If unspecified default values shall be used.\n>> >> + - nvmem-cell-names: Should be \"calibration-data\"\n>> >\n>> >I'd prefer to have which sensor it applies to here. It wouldn't change\n>> >anything for the H3, but it definitely does for example for the A83t\n>> >that has two sensors, one for each cluster, and one for the GPU, each\n>> >with calibration data.\n>> >\n>> >What about cluster0-calibration?\n\nI prefer sensor0-calibration to sensor3-calibration now.\n(Theortically the new generation THS can support up to 4 sensors)\n\n>> \n>> The calibration data is in fact a 2 word (8 bytes) zone,\n>> which is reserved for 4 sensors on all SoCs, even on H3.\n>> It's half word per sensor.\n>> \n>> I prefer to just assume a 2 word cell for every SoC.\n> \n> You have three different data sources, it should be reprensented as\n> such.\n> \n> Otherwise, the client has to get some knowledge of how the data are\n> stored in the provider, which is an abstraction violation.\n> \n> Maxime\n> \n> --\n> Maxime Ripard, Free Electrons\n> Embedded Linux and Kernel engineering\n> http://free-electrons.com\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xwr4H52b9z9s7G\n\tfor ;\n\tTue, 19 Sep 2017 01:47:43 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753429AbdIRPr2 (ORCPT\n\t);\n\tMon, 18 Sep 2017 11:47:28 -0400","from hermes.aosc.io ([199.195.250.187]:43492 \"EHLO hermes.aosc.io\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1750882AbdIRPr1 (ORCPT );\n\tMon, 18 Sep 2017 11:47:27 -0400","from localhost (localhost [127.0.0.1]) (Authenticated sender:\n\ticenowy@aosc.io)\n\tby hermes.aosc.io (Postfix) with ESMTPSA id C9E994771E;\n\tMon, 18 Sep 2017 15:47:25 +0000 (UTC)"],"MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8;\n format=flowed","Content-Transfer-Encoding":"8bit","Date":"Mon, 18 Sep 2017 23:47:25 +0800","From":"icenowy@aosc.io","To":"maxime.ripard@free-electrons.com","Cc":"Lee Jones , Rob Herring ,\n\tChen-Yu Tsai , Jonathan Cameron ,\n\tQuentin Schulz ,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org, linux-iio@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [linux-sunxi] Re: [PATCH v4 1/6] dt-bindings: update the\n\tAllwinner GPADC device tree binding for H3","In-Reply-To":"<20170918083045.7bfiialtbm7w6i7j@flea.lan>","References":"<20170914145251.21784-1-icenowy@aosc.io>\n\t<20170914145251.21784-2-icenowy@aosc.io>\n\t<20170918073336.j7finend3g76chsu@flea.lan>\n\t<310CE549-B8CE-4C0C-95B1-B545E38BDAF5@aosc.io>\n\t<20170918083045.7bfiialtbm7w6i7j@flea.lan>","Message-ID":"","X-Sender":"icenowy@aosc.io","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1771654,"web_url":"http://patchwork.ozlabs.org/comment/1771654/","msgid":"<20170920075223.jaeswlhcqgu4yhse@flea.home>","list_archive_url":null,"date":"2017-09-20T07:52:23","subject":"Re: [linux-sunxi] Re: [PATCH v4 1/6] dt-bindings: update the\n\tAllwinner GPADC device tree binding for H3","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Mon, Sep 18, 2017 at 03:47:25PM +0000, icenowy@aosc.io wrote:\n> 在 2017-09-18 16:30，Maxime Ripard 写道：\n> > On Mon, Sep 18, 2017 at 03:36:43PM +0800, Icenowy Zheng wrote:\n> > > 于 2017年9月18日 GMT+08:00 下午3:33:36, Maxime Ripard\n> > > 写到:\n> > > >On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote:\n> > > >> Allwinner H3 features a thermal sensor like the one in A33, but has\n> > > >its\n> > > >> register re-arranged, the clock divider moved to CCU (originally the\n> > > >> clock divider is in ADC) and added a pair of bus clock and reset.\n> > > >>\n> > > >> Update the binding document to cover H3.\n> > > >>\n> > > >> Signed-off-by: Icenowy Zheng \n> > > >> Reviewed-by: Chen-Yu Tsai \n> > > >> ---\n> > > >> Changes in v4:\n> > > >> - Add nvmem calibration data (not yet used by the driver)\n> > > >> Changes in v3:\n> > > >> - Clock name changes.\n> > > >> - Example node name changes.\n> > > >> - Add interupts (not yet used by the driver).\n> > > >>\n> > > >> .../devicetree/bindings/mfd/sun4i-gpadc.txt | 30\n> > > >++++++++++++++++++++--\n> > > >> 1 file changed, 28 insertions(+), 2 deletions(-)\n> > > >>\n> > > >> diff --git a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> > > >b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> > > >> index badff3611a98..6c470d584bf9 100644\n> > > >> --- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> > > >> +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> > > >> @@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can also\n> > > >act as a thermal sensor\n> > > >> and sometimes as a touchscreen controller.\n> > > >>\n> > > >> Required properties:\n> > > >> - - compatible: \"allwinner,sun8i-a33-ths\",\n> > > >> + - compatible: must contain one of the following compatibles:\n> > > >> +\t\t- \"allwinner,sun8i-a33-ths\"\n> > > >> +\t\t- \"allwinner,sun8i-h3-ths\"\n> > > >> - reg: mmio address range of the chip,\n> > > >> - #thermal-sensor-cells: shall be 0,\n> > > >> - #io-channel-cells: shall be 0,\n> > > >>\n> > > >> -Example:\n> > > >> +Optional properties:\n> > > >> + - nvmem-cells: A phandle to the calibration data provided by a\n> > > >nvmem device.\n> > > >> + If unspecified default values shall be used.\n> > > >> + - nvmem-cell-names: Should be \"calibration-data\"\n> > > >\n> > > >I'd prefer to have which sensor it applies to here. It wouldn't change\n> > > >anything for the H3, but it definitely does for example for the A83t\n> > > >that has two sensors, one for each cluster, and one for the GPU, each\n> > > >with calibration data.\n> > > >\n> > > >What about cluster0-calibration?\n> \n> I prefer sensor0-calibration to sensor3-calibration now.\n> (Theortically the new generation THS can support up to 4 sensors)\n\nThe mapping that explains what sensor0 means can change in the\nfuture. It's better to be explicit here, and just say upfront what\nit's about.\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxsQz5cLHz9sBW\n\tfor ;\n\tWed, 20 Sep 2017 17:52:27 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751572AbdITHwZ (ORCPT\n\t);\n\tWed, 20 Sep 2017 03:52:25 -0400","from mail.free-electrons.com ([62.4.15.54]:46761 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751510AbdITHwY (ORCPT\n\t); Wed, 20 Sep 2017 03:52:24 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid D4B3520914; Wed, 20 Sep 2017 09:52:22 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id A3AE52090A;\n\tWed, 20 Sep 2017 09:52:22 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Wed, 20 Sep 2017 09:52:23 +0200","From":"Maxime Ripard ","To":"icenowy@aosc.io","Cc":"Lee Jones , Rob Herring ,\n\tChen-Yu Tsai , Jonathan Cameron ,\n\tQuentin Schulz ,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org, linux-iio@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [linux-sunxi] Re: [PATCH v4 1/6] dt-bindings: update the\n\tAllwinner GPADC device tree binding for H3","Message-ID":"<20170920075223.jaeswlhcqgu4yhse@flea.home>","References":"<20170914145251.21784-1-icenowy@aosc.io>\n\t<20170914145251.21784-2-icenowy@aosc.io>\n\t<20170918073336.j7finend3g76chsu@flea.lan>\n\t<310CE549-B8CE-4C0C-95B1-B545E38BDAF5@aosc.io>\n\t<20170918083045.7bfiialtbm7w6i7j@flea.lan>\n\t","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"j6c5m4fcyye26ziz\"","Content-Disposition":"inline","In-Reply-To":"","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1771659,"web_url":"http://patchwork.ozlabs.org/comment/1771659/","msgid":"<27449039-F0D4-4663-B596-C95D4408D471@aosc.io>","list_archive_url":null,"date":"2017-09-20T08:04:02","subject":"Re: [linux-sunxi] Re: [PATCH v4 1/6] dt-bindings: update the\n\tAllwinner GPADC device tree binding for H3","submitter":{"id":71295,"url":"http://patchwork.ozlabs.org/api/people/71295/","name":"Icenowy Zheng","email":"icenowy@aosc.io"},"content":"于 2017年9月20日 GMT+08:00 下午3:52:23, Maxime Ripard 写到:\n>On Mon, Sep 18, 2017 at 03:47:25PM +0000, icenowy@aosc.io wrote:\n>> 在 2017-09-18 16:30，Maxime Ripard 写道：\n>> > On Mon, Sep 18, 2017 at 03:36:43PM +0800, Icenowy Zheng wrote:\n>> > > 于 2017年9月18日 GMT+08:00 下午3:33:36, Maxime Ripard\n>> > > 写到:\n>> > > >On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote:\n>> > > >> Allwinner H3 features a thermal sensor like the one in A33,\n>but has\n>> > > >its\n>> > > >> register re-arranged, the clock divider moved to CCU\n>(originally the\n>> > > >> clock divider is in ADC) and added a pair of bus clock and\n>reset.\n>> > > >>\n>> > > >> Update the binding document to cover H3.\n>> > > >>\n>> > > >> Signed-off-by: Icenowy Zheng \n>> > > >> Reviewed-by: Chen-Yu Tsai \n>> > > >> ---\n>> > > >> Changes in v4:\n>> > > >> - Add nvmem calibration data (not yet used by the driver)\n>> > > >> Changes in v3:\n>> > > >> - Clock name changes.\n>> > > >> - Example node name changes.\n>> > > >> - Add interupts (not yet used by the driver).\n>> > > >>\n>> > > >> .../devicetree/bindings/mfd/sun4i-gpadc.txt | 30\n>> > > >++++++++++++++++++++--\n>> > > >> 1 file changed, 28 insertions(+), 2 deletions(-)\n>> > > >>\n>> > > >> diff --git\n>a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n>> > > >b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n>> > > >> index badff3611a98..6c470d584bf9 100644\n>> > > >> --- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n>> > > >> +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n>> > > >> @@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can\n>also\n>> > > >act as a thermal sensor\n>> > > >> and sometimes as a touchscreen controller.\n>> > > >>\n>> > > >> Required properties:\n>> > > >> - - compatible: \"allwinner,sun8i-a33-ths\",\n>> > > >> + - compatible: must contain one of the following\n>compatibles:\n>> > > >> +\t\t- \"allwinner,sun8i-a33-ths\"\n>> > > >> +\t\t- \"allwinner,sun8i-h3-ths\"\n>> > > >> - reg: mmio address range of the chip,\n>> > > >> - #thermal-sensor-cells: shall be 0,\n>> > > >> - #io-channel-cells: shall be 0,\n>> > > >>\n>> > > >> -Example:\n>> > > >> +Optional properties:\n>> > > >> + - nvmem-cells: A phandle to the calibration data provided\n>by a\n>> > > >nvmem device.\n>> > > >> + If unspecified default values shall be used.\n>> > > >> + - nvmem-cell-names: Should be \"calibration-data\"\n>> > > >\n>> > > >I'd prefer to have which sensor it applies to here. It wouldn't\n>change\n>> > > >anything for the H3, but it definitely does for example for the\n>A83t\n>> > > >that has two sensors, one for each cluster, and one for the GPU,\n>each\n>> > > >with calibration data.\n>> > > >\n>> > > >What about cluster0-calibration?\n>> \n>> I prefer sensor0-calibration to sensor3-calibration now.\n>> (Theortically the new generation THS can support up to 4 sensors)\n>\n>The mapping that explains what sensor0 means can change in the\n>future. It's better to be explicit here, and just say upfront what\n>it's about.\n\nI think for some SoC (e.g. A64) there's no clear explain on\nthe functions of the sensors.\n\nIn addition, in the THS controller the sensors has a\nexplicit sequence, and when referencing it in the DT\nthe number is still needed (in thermal zones).\n\n>\n>Maxime\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxshw2DpJz9sBW\n\tfor ;\n\tWed, 20 Sep 2017 18:04:32 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751671AbdITIE3 convert rfc822-to-8bit (ORCPT\n\t);\n\tWed, 20 Sep 2017 04:04:29 -0400","from hermes.aosc.io ([199.195.250.187]:56267 \"EHLO hermes.aosc.io\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751572AbdITIEZ (ORCPT );\n\tWed, 20 Sep 2017 04:04:25 -0400","from localhost (localhost [127.0.0.1]) (Authenticated sender:\n\ticenowy@aosc.io)\n\tby hermes.aosc.io (Postfix) with ESMTPSA id 54B0047A87;\n\tWed, 20 Sep 2017 08:04:14 +0000 (UTC)"],"Date":"Wed, 20 Sep 2017 16:04:02 +0800","In-Reply-To":"<20170920075223.jaeswlhcqgu4yhse@flea.home>","References":"<20170914145251.21784-1-icenowy@aosc.io>\n\t<20170914145251.21784-2-icenowy@aosc.io>\n\t<20170918073336.j7finend3g76chsu@flea.lan>\n\t<310CE549-B8CE-4C0C-95B1-B545E38BDAF5@aosc.io>\n\t<20170918083045.7bfiialtbm7w6i7j@flea.lan>\n\t\n\t<20170920075223.jaeswlhcqgu4yhse@flea.home>","MIME-Version":"1.0","Content-Type":"text/plain;\n charset=utf-8","Content-Transfer-Encoding":"8BIT","Subject":"Re: [linux-sunxi] Re: [PATCH v4 1/6] dt-bindings: update the\n\tAllwinner GPADC device tree binding for H3","To":"maxime.ripard@free-electrons.com,\n\tMaxime Ripard ","CC":"Lee Jones , Rob Herring ,\n\tChen-Yu Tsai , Jonathan Cameron ,\n\tQuentin Schulz ,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org, linux-iio@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","From":"Icenowy Zheng ","Message-ID":"<27449039-F0D4-4663-B596-C95D4408D471@aosc.io>","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1773078,"web_url":"http://patchwork.ozlabs.org/comment/1773078/","msgid":"<20170921193211.pjsikkez5by46mfh@flea>","list_archive_url":null,"date":"2017-09-21T19:32:11","subject":"Re: [linux-sunxi] Re: [PATCH v4 1/6] dt-bindings: update the\n\tAllwinner GPADC device tree binding for H3","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Wed, Sep 20, 2017 at 08:04:02AM +0000, Icenowy Zheng wrote:\n> 于 2017年9月20日 GMT+08:00 下午3:52:23, Maxime Ripard 写到:\n> >On Mon, Sep 18, 2017 at 03:47:25PM +0000, icenowy@aosc.io wrote:\n> >> 在 2017-09-18 16:30，Maxime Ripard 写道：\n> >> > On Mon, Sep 18, 2017 at 03:36:43PM +0800, Icenowy Zheng wrote:\n> >> > > 于 2017年9月18日 GMT+08:00 下午3:33:36, Maxime Ripard\n> >> > > 写到:\n> >> > > >On Thu, Sep 14, 2017 at 10:52:46PM +0800, Icenowy Zheng wrote:\n> >> > > >> Allwinner H3 features a thermal sensor like the one in A33,\n> >but has\n> >> > > >its\n> >> > > >> register re-arranged, the clock divider moved to CCU\n> >(originally the\n> >> > > >> clock divider is in ADC) and added a pair of bus clock and\n> >reset.\n> >> > > >>\n> >> > > >> Update the binding document to cover H3.\n> >> > > >>\n> >> > > >> Signed-off-by: Icenowy Zheng \n> >> > > >> Reviewed-by: Chen-Yu Tsai \n> >> > > >> ---\n> >> > > >> Changes in v4:\n> >> > > >> - Add nvmem calibration data (not yet used by the driver)\n> >> > > >> Changes in v3:\n> >> > > >> - Clock name changes.\n> >> > > >> - Example node name changes.\n> >> > > >> - Add interupts (not yet used by the driver).\n> >> > > >>\n> >> > > >> .../devicetree/bindings/mfd/sun4i-gpadc.txt | 30\n> >> > > >++++++++++++++++++++--\n> >> > > >> 1 file changed, 28 insertions(+), 2 deletions(-)\n> >> > > >>\n> >> > > >> diff --git\n> >a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> >> > > >b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> >> > > >> index badff3611a98..6c470d584bf9 100644\n> >> > > >> --- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> >> > > >> +++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n> >> > > >> @@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can\n> >also\n> >> > > >act as a thermal sensor\n> >> > > >> and sometimes as a touchscreen controller.\n> >> > > >>\n> >> > > >> Required properties:\n> >> > > >> - - compatible: \"allwinner,sun8i-a33-ths\",\n> >> > > >> + - compatible: must contain one of the following\n> >compatibles:\n> >> > > >> +\t\t- \"allwinner,sun8i-a33-ths\"\n> >> > > >> +\t\t- \"allwinner,sun8i-h3-ths\"\n> >> > > >> - reg: mmio address range of the chip,\n> >> > > >> - #thermal-sensor-cells: shall be 0,\n> >> > > >> - #io-channel-cells: shall be 0,\n> >> > > >>\n> >> > > >> -Example:\n> >> > > >> +Optional properties:\n> >> > > >> + - nvmem-cells: A phandle to the calibration data provided\n> >by a\n> >> > > >nvmem device.\n> >> > > >> + If unspecified default values shall be used.\n> >> > > >> + - nvmem-cell-names: Should be \"calibration-data\"\n> >> > > >\n> >> > > >I'd prefer to have which sensor it applies to here. It wouldn't\n> >change\n> >> > > >anything for the H3, but it definitely does for example for the\n> >A83t\n> >> > > >that has two sensors, one for each cluster, and one for the GPU,\n> >each\n> >> > > >with calibration data.\n> >> > > >\n> >> > > >What about cluster0-calibration?\n> >> \n> >> I prefer sensor0-calibration to sensor3-calibration now.\n> >> (Theortically the new generation THS can support up to 4 sensors)\n> >\n> >The mapping that explains what sensor0 means can change in the\n> >future. It's better to be explicit here, and just say upfront what\n> >it's about.\n> \n> I think for some SoC (e.g. A64) there's no clear explain on\n> the functions of the sensors.\n\nIt's documented in the user manual (\"sensor0 located in the CPU, sensor1 and\nsensor2 located in the GPU\"\n\n> In addition, in the THS controller the sensors has a explicit\n> sequence, and when referencing it in the DT the number is still\n> needed (in thermal zones).\n\nYes, but that's something that can be made easier through defines too.\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xymyc2Hl8z9s7v\n\tfor ;\n\tFri, 22 Sep 2017 05:34:21 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751707AbdIUTcO (ORCPT\n\t);\n\tThu, 21 Sep 2017 15:32:14 -0400","from mail.free-electrons.com ([62.4.15.54]:34195 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751636AbdIUTcN (ORCPT\n\t); Thu, 21 Sep 2017 15:32:13 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 41C6620985; Thu, 21 Sep 2017 21:32:11 +0200 (CEST)","from localhost (LFbn-TOU-1-209-191.w86-201.abo.wanadoo.fr\n\t[86.201.56.191])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 114662092B;\n\tThu, 21 Sep 2017 21:32:11 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT\n\tshortcircuit=ham autolearn=disabled version=3.4.0","Date":"Thu, 21 Sep 2017 21:32:11 +0200","From":"Maxime Ripard ","To":"Icenowy Zheng ","Cc":"Lee Jones , Rob Herring ,\n\tChen-Yu Tsai , Jonathan Cameron ,\n\tQuentin Schulz ,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org, linux-iio@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com","Subject":"Re: [linux-sunxi] Re: [PATCH v4 1/6] dt-bindings: update the\n\tAllwinner GPADC device tree binding for H3","Message-ID":"<20170921193211.pjsikkez5by46mfh@flea>","References":"<20170914145251.21784-1-icenowy@aosc.io>\n\t<20170914145251.21784-2-icenowy@aosc.io>\n\t<20170918073336.j7finend3g76chsu@flea.lan>\n\t<310CE549-B8CE-4C0C-95B1-B545E38BDAF5@aosc.io>\n\t<20170918083045.7bfiialtbm7w6i7j@flea.lan>\n\t\n\t<20170920075223.jaeswlhcqgu4yhse@flea.home>\n\t<27449039-F0D4-4663-B596-C95D4408D471@aosc.io>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"xrpfzdegowdydefx\"","Content-Disposition":"inline","In-Reply-To":"<27449039-F0D4-4663-B596-C95D4408D471@aosc.io>","User-Agent":"NeoMutt/20170914 (1.9.0)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]