[{"id":1771275,"web_url":"http://patchwork.ozlabs.org/comment/1771275/","msgid":"<712822df-6575-070a-a7fa-5ed9298ab2a7@linaro.org>","list_archive_url":null,"date":"2017-09-19T18:19:26","subject":"Re: [Qemu-devel] [PATCH 07/19] nvic: Implement NVIC_ITNS\n\tregisters","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 09/12/2017 01:13 PM, Peter Maydell wrote:\n> For v8M, the NVIC has a new set of registers per interrupt,\n> NVIC_ITNS. These determine whether the interrupt targets Secure\n> or Non-secure state. Implement the register read/write code for\n> these, and make them cause NVIC_IABR, NVIC_ICER, NVIC_ISER,\n> NVIC_ICPR, NVIC_IPR and NVIC_ISPR to RAZ/WI for non-secure\n> accesses to fields corresponding to interrupts which are\n> configured to target secure state.\n> \n> Signed-off-by: Peter Maydell \n\n\nReviewed-by: Richard Henderson \n\n> + s->itns[startvec + i] = value & (1 << i);\n\nIt probably doesn't matter, since a functioning C99 compiler will do this\ntransformation during conversion to bool, but (value >> i) & 1.\n\n\nr~","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"eF4pgU1s\"; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<1505240046-11454-8-git-send-email-peter.maydell@linaro.org>","Content-Type":"text/plain; charset=utf-8","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:4001:c06::231","Subject":"Re: [Qemu-devel] [PATCH 07/19] nvic: Implement NVIC_ITNS\n\tregisters","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"patches@linaro.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}}]