[{"id":1767915,"web_url":"http://patchwork.ozlabs.org/comment/1767915/","msgid":"<20170913141026.43oh4n4foipmahsk@rob-hp-laptop>","list_archive_url":null,"date":"2017-09-13T14:10:26","subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Tue, Sep 12, 2017 at 05:07:41PM +0800, Chaotian Jing wrote:\n> Change the comptiable for support of multi-platform\n> Add description for reg\n> Add description for source_cg\n> Add description for mediatek,latch-ck\n\nThis is at least the 3rd patch with exactly the same vague subject. \nPlease make the subject somewhat unique.\n\n> \n> Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>\n> ---\n>  Documentation/devicetree/bindings/mmc/mtk-sd.txt | 13 ++++++++++---\n>  1 file changed, 10 insertions(+), 3 deletions(-)\n> \n> diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> index 4182ea3..405cd06 100644\n> --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> @@ -7,10 +7,15 @@ This file documents differences between the core properties in mmc.txt\n>  and the properties used by the msdc driver.\n>  \n>  Required properties:\n> -- compatible: Should be \"mediatek,mt8173-mmc\",\"mediatek,mt8135-mmc\"\n> +- compatible: value should be either of the following.\n> +\t\"mediatek,mt8135-mmc\": for mmc host ip compatible with mt8135\n> +\t\"mediatek,mt8173-mmc\": for mmc host ip compatible with mt8173\n> +\t\"mediatek,mt2701-mmc\": for mmc host ip compatible with mt2701\n> +\t\"mediatek,mt2712-mmc\": for mmc host ip compatible with mt2712\n> +- reg: physical base address of the controller and length\n>  - interrupts: Should contain MSDC interrupt number\n> -- clocks: MSDC source clock, HCLK\n> -- clock-names: \"source\", \"hclk\"\n> +- clocks: MSDC source clock, HCLK, source_cg\n> +- clock-names: \"source\", \"hclk\", \"source_cg\"\n\nAll chips support source_cg? That's not backwards compatible for \nexisting compatible strings if the driver requires it.\n\n>  - pinctrl-names: should be \"default\", \"state_uhs\"\n>  - pinctrl-0: should contain default/high speed pin ctrl\n>  - pinctrl-1: should contain uhs mode pin ctrl\n> @@ -30,6 +35,8 @@ Optional properties:\n>  - mediatek,hs400-cmd-resp-sel-rising:  HS400 command response sample selection\n>  \t\t\t\t       If present,HS400 command responses are sampled on rising edges.\n>  \t\t\t\t       If not present,HS400 command responses are sampled on falling edges.\n> +- mediatek,latch-ck: Some projects do not support enhance_rx, need set correct latch-ck to avoid data crc\n\nWhat's a project?\n\n> +\t\t     error caused by stop clock(fifo full)\n>  \n>  Examples:\n>  mmc0: mmc@11230000 {\n> -- \n> 1.8.1.1.dirty\n> \n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xsk8Q41DSz9s78\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tThu, 14 Sep 2017 00:10:30 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751012AbdIMOK3 (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tWed, 13 Sep 2017 10:10:29 -0400","from mail-oi0-f67.google.com ([209.85.218.67]:32914 \"EHLO\n\tmail-oi0-f67.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750993AbdIMOK2 (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Wed, 13 Sep 2017 10:10:28 -0400","by mail-oi0-f67.google.com with SMTP id z73so261967oia.0;\n\tWed, 13 Sep 2017 07:10:28 -0700 (PDT)","from localhost (216-188-254-6.dyn.grandenetworks.net.\n\t[216.188.254.6]) by smtp.gmail.com with ESMTPSA id\n\tm131sm13500756oif.18.2017.09.13.07.10.26\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tWed, 13 Sep 2017 07:10:27 -0700 (PDT)"],"X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=sm5BXeGknhdCIibY6+q4H3uhqAARpWYxhPdGc/BV5+8=;\n\tb=CZ9cw7KQ+WZ4iaszHGFxdsKa9oLmQZvr++qDyo+rDPm8YggH9R4OvPxVRKkUXzDPVo\n\tYr7yI6Sb6fpJAoRCjr1DQM+2V5goYw9tfw6XTRSA+tHvN/tYuvVga6T4FBhjFOzJLWHB\n\tnr527HZgGHLaEDIQeyfKm2WX0uC+ySxVhAADBdQxWotvFX7z7qSLZLDoR/Pu6SXrntQq\n\tJ0MAf5KTVj5NF6UyM6TxdBlIXROFAM3od6ySmcMz+bxflaKvSRcmUZOGXxI3BFX74Nb5\n\tkGM2eYgWEnWyWPEDCZCVacieu0ttGPKR8U3/LGigC1w4kSgo379S9Afr9fyWfiDCZzLm\n\tAqLw==","X-Gm-Message-State":"AHPjjUg2AOI7Vvcv7nodFYnmDjgd0cqqt50abQHRRg6UD9r6foYcZeiX\n\t6dX/Bf1GPRtGojhcX8s=","X-Google-Smtp-Source":"AOwi7QC/+Q/e/zUnx/8s9zNxv20cYAkFiY8I4WVPUK70g04MT8+CQZb3HW9SKCHOUXiQybp0VbkFRQ==","X-Received":"by 10.202.75.211 with SMTP id\n\ty202mr17296872oia.138.1505311827639; \n\tWed, 13 Sep 2017 07:10:27 -0700 (PDT)","Date":"Wed, 13 Sep 2017 09:10:26 -0500","From":"Rob Herring <robh@kernel.org>","To":"Chaotian Jing <chaotian.jing@mediatek.com>","Cc":"Ulf Hansson <ulf.hansson@linaro.org>, Mark Rutland <mark.rutland@arm.com>,\n\tMatthias Brugger <matthias.bgg@gmail.com>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tWill Deacon <will.deacon@arm.com>, yong mao <yong.mao@mediatek.com>, \n\tLinus Walleij <linus.walleij@linaro.org>,\n\tJavier Martinez Canillas <javier@osg.samsung.com>,\n\tHeiner Kallweit <hkallweit1@gmail.com>,\n\tPhong LE <ple@baylibre.com>, linux-mmc@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tsrv_heupstream@mediatek.com","Subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","Message-ID":"<20170913141026.43oh4n4foipmahsk@rob-hp-laptop>","References":"<1505207272-16983-1-git-send-email-chaotian.jing@mediatek.com>\n\t<1505207272-16983-2-git-send-email-chaotian.jing@mediatek.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<1505207272-16983-2-git-send-email-chaotian.jing@mediatek.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1768285,"web_url":"http://patchwork.ozlabs.org/comment/1768285/","msgid":"<1505355021.8308.4.camel@mhfsdcap03>","list_archive_url":null,"date":"2017-09-14T02:10:21","subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","submitter":{"id":67412,"url":"http://patchwork.ozlabs.org/api/people/67412/","name":"Chaotian Jing (井朝天)","email":"chaotian.jing@mediatek.com"},"content":"On Wed, 2017-09-13 at 09:10 -0500, Rob Herring wrote:\n> On Tue, Sep 12, 2017 at 05:07:41PM +0800, Chaotian Jing wrote:\n> > Change the comptiable for support of multi-platform\n> > Add description for reg\n> > Add description for source_cg\n> > Add description for mediatek,latch-ck\n> \n> This is at least the 3rd patch with exactly the same vague subject. \n> Please make the subject somewhat unique.\n> \nThx, will change the subject at next version\n> > \n> > Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>\n> > ---\n> >  Documentation/devicetree/bindings/mmc/mtk-sd.txt | 13 ++++++++++---\n> >  1 file changed, 10 insertions(+), 3 deletions(-)\n> > \n> > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> > index 4182ea3..405cd06 100644\n> > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> > @@ -7,10 +7,15 @@ This file documents differences between the core properties in mmc.txt\n> >  and the properties used by the msdc driver.\n> >  \n> >  Required properties:\n> > -- compatible: Should be \"mediatek,mt8173-mmc\",\"mediatek,mt8135-mmc\"\n> > +- compatible: value should be either of the following.\n> > +\t\"mediatek,mt8135-mmc\": for mmc host ip compatible with mt8135\n> > +\t\"mediatek,mt8173-mmc\": for mmc host ip compatible with mt8173\n> > +\t\"mediatek,mt2701-mmc\": for mmc host ip compatible with mt2701\n> > +\t\"mediatek,mt2712-mmc\": for mmc host ip compatible with mt2712\n> > +- reg: physical base address of the controller and length\n> >  - interrupts: Should contain MSDC interrupt number\n> > -- clocks: MSDC source clock, HCLK\n> > -- clock-names: \"source\", \"hclk\"\n> > +- clocks: MSDC source clock, HCLK, source_cg\n> > +- clock-names: \"source\", \"hclk\", \"source_cg\"\n> \n> All chips support source_cg? That's not backwards compatible for \n> existing compatible strings if the driver requires it.\nNot all chips support source_cg, for chips which do not support\nsource_cg, no need source_cg here, and the driver will parse it\nto know if current chip support it.\n> \n> >  - pinctrl-names: should be \"default\", \"state_uhs\"\n> >  - pinctrl-0: should contain default/high speed pin ctrl\n> >  - pinctrl-1: should contain uhs mode pin ctrl\n> > @@ -30,6 +35,8 @@ Optional properties:\n> >  - mediatek,hs400-cmd-resp-sel-rising:  HS400 command response sample selection\n> >  \t\t\t\t       If present,HS400 command responses are sampled on rising edges.\n> >  \t\t\t\t       If not present,HS400 command responses are sampled on falling edges.\n> > +- mediatek,latch-ck: Some projects do not support enhance_rx, need set correct latch-ck to avoid data crc\n> \n> What's a project?\neg, MT2701\n> \n> > +\t\t     error caused by stop clock(fifo full)\n> >  \n> >  Examples:\n> >  mmc0: mmc@11230000 {\n> > -- \n> > 1.8.1.1.dirty\n> > \n\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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Thu, 14 Sep 2017 10:10:18 +0800"],"X-UUID":"d8a1b34d82534fa1990df562c928cc56-20170914","Message-ID":"<1505355021.8308.4.camel@mhfsdcap03>","Subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","From":"Chaotian Jing <chaotian.jing@mediatek.com>","To":"Rob Herring <robh@kernel.org>","CC":"Ulf Hansson <ulf.hansson@linaro.org>, Mark Rutland <mark.rutland@arm.com>,\n\tMatthias Brugger <matthias.bgg@gmail.com>,\n\t\"Catalin Marinas\" <catalin.marinas@arm.com>,\n\tWill Deacon <will.deacon@arm.com>, \"yong mao\" <yong.mao@mediatek.com>,\n\tLinus Walleij <linus.walleij@linaro.org>,\n\tJavier Martinez Canillas <javier@osg.samsung.com>,\n\tHeiner Kallweit <hkallweit1@gmail.com>,\n\tPhong LE <ple@baylibre.com>, <linux-mmc@vger.kernel.org>,\n\t<devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, \n\t<linux-mediatek@lists.infradead.org>,\n\t<linux-kernel@vger.kernel.org>, <srv_heupstream@mediatek.com>","Date":"Thu, 14 Sep 2017 10:10:21 +0800","In-Reply-To":"<20170913141026.43oh4n4foipmahsk@rob-hp-laptop>","References":"<1505207272-16983-1-git-send-email-chaotian.jing@mediatek.com>\n\t<1505207272-16983-2-git-send-email-chaotian.jing@mediatek.com>\n\t<20170913141026.43oh4n4foipmahsk@rob-hp-laptop>","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.2.3-0ubuntu6 ","Content-Transfer-Encoding":"7bit","MIME-Version":"1.0","X-MTK":"N","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1772726,"web_url":"http://patchwork.ozlabs.org/comment/1772726/","msgid":"<CACRpkdbfCFL3w6bMzT2D2rukhVkzdHPpsfZO6vYQtv_SHSjgOQ@mail.gmail.com>","list_archive_url":null,"date":"2017-09-21T11:38:27","subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","submitter":{"id":7055,"url":"http://patchwork.ozlabs.org/api/people/7055/","name":"Linus Walleij","email":"linus.walleij@linaro.org"},"content":"On Thu, Sep 14, 2017 at 4:10 AM, Chaotian Jing\n<chaotian.jing@mediatek.com> wrote:\n> On Wed, 2017-09-13 at 09:10 -0500, Rob Herring wrote:\n>> On Tue, Sep 12, 2017 at 05:07:41PM +0800, Chaotian Jing wrote:\n\n>> > +- mediatek,latch-ck: Some projects do not support enhance_rx, need set correct latch-ck to avoid data crc\n>>\n>> What's a project?\n> eg, MT2701\n\nReplace the word \"project\" with the word \"system\" or \"SoC\" in\nyour patch.\n\nYours,\nLinus Walleij\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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Thu, 21\n\tSep 2017 04:38:28 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<1505355021.8308.4.camel@mhfsdcap03>","References":"<1505207272-16983-1-git-send-email-chaotian.jing@mediatek.com>\n\t<1505207272-16983-2-git-send-email-chaotian.jing@mediatek.com>\n\t<20170913141026.43oh4n4foipmahsk@rob-hp-laptop>\n\t<1505355021.8308.4.camel@mhfsdcap03>","From":"Linus Walleij <linus.walleij@linaro.org>","Date":"Thu, 21 Sep 2017 13:38:27 +0200","Message-ID":"<CACRpkdbfCFL3w6bMzT2D2rukhVkzdHPpsfZO6vYQtv_SHSjgOQ@mail.gmail.com>","Subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","To":"Chaotian Jing <chaotian.jing@mediatek.com>","Cc":"Rob Herring <robh@kernel.org>, Ulf Hansson <ulf.hansson@linaro.org>,\n\tMark Rutland <mark.rutland@arm.com>,\n\tMatthias Brugger <matthias.bgg@gmail.com>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tWill Deacon <will.deacon@arm.com>, yong mao <yong.mao@mediatek.com>, \n\tJavier Martinez Canillas <javier@osg.samsung.com>,\n\tHeiner Kallweit <hkallweit1@gmail.com>, Phong LE <ple@baylibre.com>, \n\t\"linux-mmc@vger.kernel.org\" <linux-mmc@vger.kernel.org>,\n\t\"devicetree@vger.kernel.org\" <devicetree@vger.kernel.org>,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t<linux-arm-kernel@lists.infradead.org>,\n\t\"moderated list:ARM/Mediatek SoC support\" \n\t<linux-mediatek@lists.infradead.org>,\n\t\"linux-kernel@vger.kernel.org\" <linux-kernel@vger.kernel.org>,\n\tsrv_heupstream@mediatek.com","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775927,"web_url":"http://patchwork.ozlabs.org/comment/1775927/","msgid":"<CAPDyKFrUe-0hEsxVRQSZvujcXY8WrR6m-0DMW=VwDDLvz7Lexw@mail.gmail.com>","list_archive_url":null,"date":"2017-09-26T22:33:59","subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","submitter":{"id":21036,"url":"http://patchwork.ozlabs.org/api/people/21036/","name":"Ulf Hansson","email":"ulf.hansson@linaro.org"},"content":"On 14 September 2017 at 04:10, Chaotian Jing <chaotian.jing@mediatek.com> wrote:\n> On Wed, 2017-09-13 at 09:10 -0500, Rob Herring wrote:\n>> On Tue, Sep 12, 2017 at 05:07:41PM +0800, Chaotian Jing wrote:\n>> > Change the comptiable for support of multi-platform\n>> > Add description for reg\n>> > Add description for source_cg\n>> > Add description for mediatek,latch-ck\n>>\n>> This is at least the 3rd patch with exactly the same vague subject.\n>> Please make the subject somewhat unique.\n>>\n> Thx, will change the subject at next version\n>> >\n>> > Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>\n>> > ---\n>> >  Documentation/devicetree/bindings/mmc/mtk-sd.txt | 13 ++++++++++---\n>> >  1 file changed, 10 insertions(+), 3 deletions(-)\n>> >\n>> > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n>> > index 4182ea3..405cd06 100644\n>> > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n>> > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n>> > @@ -7,10 +7,15 @@ This file documents differences between the core properties in mmc.txt\n>> >  and the properties used by the msdc driver.\n>> >\n>> >  Required properties:\n>> > -- compatible: Should be \"mediatek,mt8173-mmc\",\"mediatek,mt8135-mmc\"\n>> > +- compatible: value should be either of the following.\n>> > +   \"mediatek,mt8135-mmc\": for mmc host ip compatible with mt8135\n>> > +   \"mediatek,mt8173-mmc\": for mmc host ip compatible with mt8173\n>> > +   \"mediatek,mt2701-mmc\": for mmc host ip compatible with mt2701\n>> > +   \"mediatek,mt2712-mmc\": for mmc host ip compatible with mt2712\n>> > +- reg: physical base address of the controller and length\n>> >  - interrupts: Should contain MSDC interrupt number\n>> > -- clocks: MSDC source clock, HCLK\n>> > -- clock-names: \"source\", \"hclk\"\n>> > +- clocks: MSDC source clock, HCLK, source_cg\n>> > +- clock-names: \"source\", \"hclk\", \"source_cg\"\n>>\n>> All chips support source_cg? That's not backwards compatible for\n>> existing compatible strings if the driver requires it.\n> Not all chips support source_cg, for chips which do not support\n> source_cg, no need source_cg here, and the driver will parse it\n> to know if current chip support it.\n\nIn such case you must not add add a required binding for it. I think\nthat is what Rob is trying to point out for you.\n\n[...]\n\nKind regards\nUffe\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"VPU4Bc92\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1wjS2LJyz9t4Z\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tWed, 27 Sep 2017 08:34:04 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1031326AbdIZWeC (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tTue, 26 Sep 2017 18:34:02 -0400","from mail-it0-f46.google.com ([209.85.214.46]:48384 \"EHLO\n\tmail-it0-f46.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1031134AbdIZWeA (ORCPT\n\t<rfc822; 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charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775979,"web_url":"http://patchwork.ozlabs.org/comment/1775979/","msgid":"<1506475100.19851.9.camel@mhfsdcap03>","list_archive_url":null,"date":"2017-09-27T01:18:20","subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","submitter":{"id":67412,"url":"http://patchwork.ozlabs.org/api/people/67412/","name":"Chaotian Jing (井朝天)","email":"chaotian.jing@mediatek.com"},"content":"On Wed, 2017-09-27 at 00:33 +0200, Ulf Hansson wrote:\n> On 14 September 2017 at 04:10, Chaotian Jing <chaotian.jing@mediatek.com> wrote:\n> > On Wed, 2017-09-13 at 09:10 -0500, Rob Herring wrote:\n> >> On Tue, Sep 12, 2017 at 05:07:41PM +0800, Chaotian Jing wrote:\n> >> > Change the comptiable for support of multi-platform\n> >> > Add description for reg\n> >> > Add description for source_cg\n> >> > Add description for mediatek,latch-ck\n> >>\n> >> This is at least the 3rd patch with exactly the same vague subject.\n> >> Please make the subject somewhat unique.\n> >>\n> > Thx, will change the subject at next version\n> >> >\n> >> > Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>\n> >> > ---\n> >> >  Documentation/devicetree/bindings/mmc/mtk-sd.txt | 13 ++++++++++---\n> >> >  1 file changed, 10 insertions(+), 3 deletions(-)\n> >> >\n> >> > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> >> > index 4182ea3..405cd06 100644\n> >> > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> >> > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> >> > @@ -7,10 +7,15 @@ This file documents differences between the core properties in mmc.txt\n> >> >  and the properties used by the msdc driver.\n> >> >\n> >> >  Required properties:\n> >> > -- compatible: Should be \"mediatek,mt8173-mmc\",\"mediatek,mt8135-mmc\"\n> >> > +- compatible: value should be either of the following.\n> >> > +   \"mediatek,mt8135-mmc\": for mmc host ip compatible with mt8135\n> >> > +   \"mediatek,mt8173-mmc\": for mmc host ip compatible with mt8173\n> >> > +   \"mediatek,mt2701-mmc\": for mmc host ip compatible with mt2701\n> >> > +   \"mediatek,mt2712-mmc\": for mmc host ip compatible with mt2712\n> >> > +- reg: physical base address of the controller and length\n> >> >  - interrupts: Should contain MSDC interrupt number\n> >> > -- clocks: MSDC source clock, HCLK\n> >> > -- clock-names: \"source\", \"hclk\"\n> >> > +- clocks: MSDC source clock, HCLK, source_cg\n> >> > +- clock-names: \"source\", \"hclk\", \"source_cg\"\n> >>\n> >> All chips support source_cg? That's not backwards compatible for\n> >> existing compatible strings if the driver requires it.\n> > Not all chips support source_cg, for chips which do not support\n> > source_cg, no need source_cg here, and the driver will parse it\n> > to know if current chip support it.\n> \n> In such case you must not add add a required binding for it. I think\n> that is what Rob is trying to point out for you.\n> \n> [...]\n> \n> Kind regards\n> Uffe\nThe source_cg is required(MUST) at MT2712 and future SoCs, but not\nrequired(do not have it) at previous SoCs, so that put it at required\nproperties, let the driver to handle it.\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y20MN2Pkzz9t16\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tWed, 27 Sep 2017 11:18:40 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S967206AbdI0BSa (ORCPT <rfc822; incoming-dt@patchwork.ozlabs.org>);\n\tTue, 26 Sep 2017 21:18:30 -0400","from mailgw02.mediatek.com ([218.249.47.111]:42310 \"EHLO\n\tmailgw02.mediatek.com\" rhost-flags-OK-FAIL-OK-FAIL) by\n\tvger.kernel.org with ESMTP id S965519AbdI0BS3 (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Tue, 26 Sep 2017 21:18:29 -0400","from mtkcas32.mediatek.inc [(172.27.4.250)] by\n\tmailgw02.mediatek.com (envelope-from <chaotian.jing@mediatek.com>)\n\t(mailgw01.mediatek.com ESMTP with TLS)\n\twith ESMTP id 665854301; Wed, 27 Sep 2017 09:18:13 +0800","from MTKCAS32.mediatek.inc (172.27.4.184) by\n\tMTKMBS31DR.mediatek.inc\n\t(172.27.6.102) with Microsoft SMTP Server (TLS) id 15.0.1210.3;\n\tWed, 27 Sep 2017 09:18:09 +0800","from [10.17.3.153] (10.17.3.153) by MTKCAS32.mediatek.inc\n\t(172.27.4.170) with Microsoft SMTP Server id 15.0.1210.3 via Frontend\n\tTransport; Wed, 27 Sep 2017 09:18:06 +0800"],"X-UUID":"949f5973e4e0490e983828945052b7df-20170927","Message-ID":"<1506475100.19851.9.camel@mhfsdcap03>","Subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","From":"Chaotian Jing <chaotian.jing@mediatek.com>","To":"Ulf Hansson <ulf.hansson@linaro.org>","CC":"Rob Herring <robh@kernel.org>, Mark Rutland <mark.rutland@arm.com>,\n\tMatthias Brugger <matthias.bgg@gmail.com>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tWill Deacon <will.deacon@arm.com>, yong mao <yong.mao@mediatek.com>, \n\tLinus Walleij <linus.walleij@linaro.org>,\n\t\"Javier Martinez Canillas\" <javier@osg.samsung.com>,\n\tHeiner Kallweit <hkallweit1@gmail.com>, Phong LE <ple@baylibre.com>, \n\t\"linux-mmc@vger.kernel.org\" <linux-mmc@vger.kernel.org>,\n\t\"devicetree@vger.kernel.org\" <devicetree@vger.kernel.org>,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t<linux-arm-kernel@lists.infradead.org>,\n\t<linux-mediatek@lists.infradead.org>,\n\t\"linux-kernel@vger.kernel.org\" <linux-kernel@vger.kernel.org>,\n\tsrv_heupstream <srv_heupstream@mediatek.com>","Date":"Wed, 27 Sep 2017 09:18:20 +0800","In-Reply-To":"<CAPDyKFrUe-0hEsxVRQSZvujcXY8WrR6m-0DMW=VwDDLvz7Lexw@mail.gmail.com>","References":"<1505207272-16983-1-git-send-email-chaotian.jing@mediatek.com>\n\t<1505207272-16983-2-git-send-email-chaotian.jing@mediatek.com>\n\t<20170913141026.43oh4n4foipmahsk@rob-hp-laptop>\n\t<1505355021.8308.4.camel@mhfsdcap03>\n\t<CAPDyKFrUe-0hEsxVRQSZvujcXY8WrR6m-0DMW=VwDDLvz7Lexw@mail.gmail.com>","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.2.3-0ubuntu6 ","Content-Transfer-Encoding":"7bit","MIME-Version":"1.0","X-MTK":"N","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1777337,"web_url":"http://patchwork.ozlabs.org/comment/1777337/","msgid":"<1506650162.19851.12.camel@mhfsdcap03>","list_archive_url":null,"date":"2017-09-29T01:56:02","subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","submitter":{"id":67412,"url":"http://patchwork.ozlabs.org/api/people/67412/","name":"Chaotian Jing (井朝天)","email":"chaotian.jing@mediatek.com"},"content":"On Wed, 2017-09-27 at 09:18 +0800, Chaotian Jing wrote:\n> On Wed, 2017-09-27 at 00:33 +0200, Ulf Hansson wrote:\n> > On 14 September 2017 at 04:10, Chaotian Jing <chaotian.jing@mediatek.com> wrote:\n> > > On Wed, 2017-09-13 at 09:10 -0500, Rob Herring wrote:\n> > >> On Tue, Sep 12, 2017 at 05:07:41PM +0800, Chaotian Jing wrote:\n> > >> > Change the comptiable for support of multi-platform\n> > >> > Add description for reg\n> > >> > Add description for source_cg\n> > >> > Add description for mediatek,latch-ck\n> > >>\n> > >> This is at least the 3rd patch with exactly the same vague subject.\n> > >> Please make the subject somewhat unique.\n> > >>\n> > > Thx, will change the subject at next version\n> > >> >\n> > >> > Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>\n> > >> > ---\n> > >> >  Documentation/devicetree/bindings/mmc/mtk-sd.txt | 13 ++++++++++---\n> > >> >  1 file changed, 10 insertions(+), 3 deletions(-)\n> > >> >\n> > >> > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> > >> > index 4182ea3..405cd06 100644\n> > >> > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> > >> > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> > >> > @@ -7,10 +7,15 @@ This file documents differences between the core properties in mmc.txt\n> > >> >  and the properties used by the msdc driver.\n> > >> >\n> > >> >  Required properties:\n> > >> > -- compatible: Should be \"mediatek,mt8173-mmc\",\"mediatek,mt8135-mmc\"\n> > >> > +- compatible: value should be either of the following.\n> > >> > +   \"mediatek,mt8135-mmc\": for mmc host ip compatible with mt8135\n> > >> > +   \"mediatek,mt8173-mmc\": for mmc host ip compatible with mt8173\n> > >> > +   \"mediatek,mt2701-mmc\": for mmc host ip compatible with mt2701\n> > >> > +   \"mediatek,mt2712-mmc\": for mmc host ip compatible with mt2712\n> > >> > +- reg: physical base address of the controller and length\n> > >> >  - interrupts: Should contain MSDC interrupt number\n> > >> > -- clocks: MSDC source clock, HCLK\n> > >> > -- clock-names: \"source\", \"hclk\"\n> > >> > +- clocks: MSDC source clock, HCLK, source_cg\n> > >> > +- clock-names: \"source\", \"hclk\", \"source_cg\"\n> > >>\n> > >> All chips support source_cg? That's not backwards compatible for\n> > >> existing compatible strings if the driver requires it.\n> > > Not all chips support source_cg, for chips which do not support\n> > > source_cg, no need source_cg here, and the driver will parse it\n> > > to know if current chip support it.\n> > \n> > In such case you must not add add a required binding for it. I think\n> > that is what Rob is trying to point out for you.\n> > \n> > [...]\n> > \n> > Kind regards\n> > Uffe\n> The source_cg is required(MUST) at MT2712 and future SoCs, but not\n> required(do not have it) at previous SoCs, so that put it at required\n> properties, let the driver to handle it.\n\nAny other comments about it ? still must not add a required binding for\nit ? if add a optional binding for it, how to add it ? as cannot\nduplicate \"clocks\" & \"clock-names\" in one node.\n\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y3F5t4s4rz9t3k\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tFri, 29 Sep 2017 11:56:18 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751107AbdI2B4Q (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tThu, 28 Sep 2017 21:56:16 -0400","from mailgw02.mediatek.com ([218.249.47.111]:51449 \"EHLO\n\tmailgw02.mediatek.com\" rhost-flags-OK-FAIL-OK-FAIL) by\n\tvger.kernel.org with ESMTP id S1751088AbdI2B4P (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Thu, 28 Sep 2017 21:56:15 -0400","from mtkcas32.mediatek.inc [(172.27.4.250)] by\n\tmailgw02.mediatek.com (envelope-from <chaotian.jing@mediatek.com>)\n\t(mailgw01.mediatek.com ESMTP with TLS)\n\twith ESMTP id 1113160721; Fri, 29 Sep 2017 09:55:52 +0800","from MTKCAS36.mediatek.inc (172.27.4.186) by\n\tMTKMBS31N1.mediatek.inc\n\t(172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1210.3;\n\tFri, 29 Sep 2017 09:55:52 +0800","from [10.17.3.153] (10.17.3.153) by MTKCAS36.mediatek.inc\n\t(172.27.4.170) with Microsoft SMTP Server id 15.0.1210.3 via Frontend\n\tTransport; Fri, 29 Sep 2017 09:55:40 +0800"],"X-UUID":"d951af2aedf34e8fbe7650a83c074afd-20170929","Message-ID":"<1506650162.19851.12.camel@mhfsdcap03>","Subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","From":"Chaotian Jing <chaotian.jing@mediatek.com>","To":"Ulf Hansson <ulf.hansson@linaro.org>","CC":"Rob Herring <robh@kernel.org>, Mark Rutland <mark.rutland@arm.com>,\n\tMatthias Brugger <matthias.bgg@gmail.com>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tWill Deacon <will.deacon@arm.com>, yong mao <yong.mao@mediatek.com>, \n\tLinus Walleij <linus.walleij@linaro.org>,\n\t\"Javier Martinez Canillas\" <javier@osg.samsung.com>,\n\tHeiner Kallweit <hkallweit1@gmail.com>, Phong LE <ple@baylibre.com>, \n\t\"linux-mmc@vger.kernel.org\" <linux-mmc@vger.kernel.org>,\n\t\"devicetree@vger.kernel.org\" <devicetree@vger.kernel.org>,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t<linux-arm-kernel@lists.infradead.org>,\n\t<linux-mediatek@lists.infradead.org>,\n\t\"linux-kernel@vger.kernel.org\" <linux-kernel@vger.kernel.org>,\n\tsrv_heupstream <srv_heupstream@mediatek.com>","Date":"Fri, 29 Sep 2017 09:56:02 +0800","In-Reply-To":"<1506475100.19851.9.camel@mhfsdcap03>","References":"<1505207272-16983-1-git-send-email-chaotian.jing@mediatek.com>\n\t<1505207272-16983-2-git-send-email-chaotian.jing@mediatek.com>\n\t<20170913141026.43oh4n4foipmahsk@rob-hp-laptop>\n\t<1505355021.8308.4.camel@mhfsdcap03>\n\t<CAPDyKFrUe-0hEsxVRQSZvujcXY8WrR6m-0DMW=VwDDLvz7Lexw@mail.gmail.com>\n\t<1506475100.19851.9.camel@mhfsdcap03>","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.2.3-0ubuntu6 ","Content-Transfer-Encoding":"7bit","MIME-Version":"1.0","X-MTK":"N","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1778172,"web_url":"http://patchwork.ozlabs.org/comment/1778172/","msgid":"<CAPDyKFoiJJ=NM8EZ7mh+91Nj=EBYcAJmvZ3Z+xskeU3qB40HEw@mail.gmail.com>","list_archive_url":null,"date":"2017-10-02T06:53:37","subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","submitter":{"id":21036,"url":"http://patchwork.ozlabs.org/api/people/21036/","name":"Ulf Hansson","email":"ulf.hansson@linaro.org"},"content":"[...]\n\n>> > >> >  Required properties:\n>> > >> > -- compatible: Should be \"mediatek,mt8173-mmc\",\"mediatek,mt8135-mmc\"\n>> > >> > +- compatible: value should be either of the following.\n>> > >> > +   \"mediatek,mt8135-mmc\": for mmc host ip compatible with mt8135\n>> > >> > +   \"mediatek,mt8173-mmc\": for mmc host ip compatible with mt8173\n>> > >> > +   \"mediatek,mt2701-mmc\": for mmc host ip compatible with mt2701\n>> > >> > +   \"mediatek,mt2712-mmc\": for mmc host ip compatible with mt2712\n>> > >> > +- reg: physical base address of the controller and length\n>> > >> >  - interrupts: Should contain MSDC interrupt number\n>> > >> > -- clocks: MSDC source clock, HCLK\n>> > >> > -- clock-names: \"source\", \"hclk\"\n>> > >> > +- clocks: MSDC source clock, HCLK, source_cg\n>> > >> > +- clock-names: \"source\", \"hclk\", \"source_cg\"\n>> > >>\n>> > >> All chips support source_cg? That's not backwards compatible for\n>> > >> existing compatible strings if the driver requires it.\n>> > > Not all chips support source_cg, for chips which do not support\n>> > > source_cg, no need source_cg here, and the driver will parse it\n>> > > to know if current chip support it.\n>> >\n>> > In such case you must not add add a required binding for it. I think\n>> > that is what Rob is trying to point out for you.\n>> >\n>> > [...]\n>> >\n>> > Kind regards\n>> > Uffe\n>> The source_cg is required(MUST) at MT2712 and future SoCs, but not\n>> required(do not have it) at previous SoCs, so that put it at required\n>> properties, let the driver to handle it.\n\nThen you must explain that in the binding...\n\nOn 29 September 2017 at 03:56, Chaotian Jing <chaotian.jing@mediatek.com> wrote:\n> On Wed, 2017-09-27 at 09:18 +0800, Chaotian Jing wrote:\n>> On Wed, 2017-09-27 at 00:33 +0200, Ulf Hansson wrote:\n>> > On 14 September 2017 at 04:10, Chaotian Jing <chaotian.jing@mediatek.com> wrote:\n>> > > On Wed, 2017-09-13 at 09:10 -0500, Rob Herring wrote:\n>> > >> On Tue, Sep 12, 2017 at 05:07:41PM +0800, Chaotian Jing wrote:\n>> > >> > Change the comptiable for support of multi-platform\n>> > >> > Add description for reg\n>> > >> > Add description for source_cg\n>> > >> > Add description for mediatek,latch-ck\n>> > >>\n>> > >> This is at least the 3rd patch with exactly the same vague subject.\n>> > >> Please make the subject somewhat unique.\n>> > >>\n>> > > Thx, will change the subject at next version\n>> > >> >\n>> > >> > Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>\n>> > >> > ---\n>> > >> >  Documentation/devicetree/bindings/mmc/mtk-sd.txt | 13 ++++++++++---\n>> > >> >  1 file changed, 10 insertions(+), 3 deletions(-)\n>> > >> >\n>> > >> > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n>> > >> > index 4182ea3..405cd06 100644\n>> > >> > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n>> > >> > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n>> > >> > @@ -7,10 +7,15 @@ This file documents differences between the core properties in mmc.txt\n>> > >> >  and the properties used by the msdc driver.\n>> > >> >\n>\n> Any other comments about it ? still must not add a required binding for\n> it ? if add a optional binding for it, how to add it ? as cannot\n> duplicate \"clocks\" & \"clock-names\" in one node.\n>\n>\n\nI suggest you keep the description of the new clock name part of the\n\"Required properties:\" header. However, after each clock name,\nexplicit state when the clock is required/optional. Something along\nthe lines as sdhci-msm does it.\nDocumentation/devicetree/bindings/mmc/sdhci-msm.txt\n\nKind regards\nUffe\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"SDdZM4yS\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y5CYf61Rnz9t4Z\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tMon,  2 Oct 2017 17:53:42 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1750798AbdJBGxk (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tMon, 2 Oct 2017 02:53:40 -0400","from mail-it0-f43.google.com ([209.85.214.43]:57255 \"EHLO\n\tmail-it0-f43.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750878AbdJBGxi (ORCPT\n\t<rfc822; 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charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1778253,"web_url":"http://patchwork.ozlabs.org/comment/1778253/","msgid":"<1506941349.24270.1.camel@mtksdaap41>","list_archive_url":null,"date":"2017-10-02T10:49:09","subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","submitter":{"id":65023,"url":"http://patchwork.ozlabs.org/api/people/65023/","name":"Yingjoe Chen","email":"yingjoe.chen@mediatek.com"},"content":"On Fri, 2017-09-29 at 09:56 +0800, Chaotian Jing wrote:\n> On Wed, 2017-09-27 at 09:18 +0800, Chaotian Jing wrote:\n> > On Wed, 2017-09-27 at 00:33 +0200, Ulf Hansson wrote:\n> > > On 14 September 2017 at 04:10, Chaotian Jing <chaotian.jing@mediatek.com> wrote:\n> > > > On Wed, 2017-09-13 at 09:10 -0500, Rob Herring wrote:\n> > > >> On Tue, Sep 12, 2017 at 05:07:41PM +0800, Chaotian Jing wrote:\n> > > >> > Change the comptiable for support of multi-platform\n> > > >> > Add description for reg\n> > > >> > Add description for source_cg\n> > > >> > Add description for mediatek,latch-ck\n> > > >>\n> > > >> This is at least the 3rd patch with exactly the same vague subject.\n> > > >> Please make the subject somewhat unique.\n> > > >>\n> > > > Thx, will change the subject at next version\n> > > >> >\n> > > >> > Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>\n> > > >> > ---\n> > > >> >  Documentation/devicetree/bindings/mmc/mtk-sd.txt | 13 ++++++++++---\n> > > >> >  1 file changed, 10 insertions(+), 3 deletions(-)\n> > > >> >\n> > > >> > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> > > >> > index 4182ea3..405cd06 100644\n> > > >> > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> > > >> > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> > > >> > @@ -7,10 +7,15 @@ This file documents differences between the core properties in mmc.txt\n> > > >> >  and the properties used by the msdc driver.\n> > > >> >\n> > > >> >  Required properties:\n> > > >> > -- compatible: Should be \"mediatek,mt8173-mmc\",\"mediatek,mt8135-mmc\"\n> > > >> > +- compatible: value should be either of the following.\n> > > >> > +   \"mediatek,mt8135-mmc\": for mmc host ip compatible with mt8135\n> > > >> > +   \"mediatek,mt8173-mmc\": for mmc host ip compatible with mt8173\n> > > >> > +   \"mediatek,mt2701-mmc\": for mmc host ip compatible with mt2701\n> > > >> > +   \"mediatek,mt2712-mmc\": for mmc host ip compatible with mt2712\n> > > >> > +- reg: physical base address of the controller and length\n> > > >> >  - interrupts: Should contain MSDC interrupt number\n> > > >> > -- clocks: MSDC source clock, HCLK\n> > > >> > -- clock-names: \"source\", \"hclk\"\n> > > >> > +- clocks: MSDC source clock, HCLK, source_cg\n> > > >> > +- clock-names: \"source\", \"hclk\", \"source_cg\"\n> > > >>\n> > > >> All chips support source_cg? That's not backwards compatible for\n> > > >> existing compatible strings if the driver requires it.\n> > > > Not all chips support source_cg, for chips which do not support\n> > > > source_cg, no need source_cg here, and the driver will parse it\n> > > > to know if current chip support it.\n> > > \n> > > In such case you must not add add a required binding for it. I think\n> > > that is what Rob is trying to point out for you.\n> > > \n> > > [...]\n> > > \n> > > Kind regards\n> > > Uffe\n> > The source_cg is required(MUST) at MT2712 and future SoCs, but not\n> > required(do not have it) at previous SoCs, so that put it at required\n> > properties, let the driver to handle it.\n> \n> Any other comments about it ? still must not add a required binding for\n> it ? if add a optional binding for it, how to add it ? as cannot\n> duplicate \"clocks\" & \"clock-names\" in one node.\n\n\nChaotian,\n\nYou can follow examples of scpsys [1]:\n\n- clock, clock-names: clocks according to the common clock binding.\n                      These are clocks which hardware needs to be\n                      enabled before enabling certain power domains.\n\tRequired clocks for MT2701: \"mm\", \"mfg\", \"ethif\"\n\tRequired clocks for MT6797: \"mm\", \"mfg\", \"vdec\"\n\tRequired clocks for MT8173: \"mm\", \"mfg\", \"venc\", \"venc_lt\"\n\n[1]:\nhttps://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/tree/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt?h=v4.13.4\n\nJoe.C\n\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y5Jnr5KdFz9t4Z\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tMon,  2 Oct 2017 21:49:36 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751130AbdJBKtX (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tMon, 2 Oct 2017 06:49:23 -0400","from mailgw02.mediatek.com ([210.61.82.184]:16216 \"EHLO\n\tmailgw02.mediatek.com\" rhost-flags-OK-FAIL-OK-FAIL) by\n\tvger.kernel.org with ESMTP id S1751010AbdJBKtW (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Mon, 2 Oct 2017 06:49:22 -0400","from mtkcas08.mediatek.inc [(172.21.101.126)] by\n\tmailgw02.mediatek.com (envelope-from <yingjoe.chen@mediatek.com>)\n\t(mhqrelay.mediatek.com ESMTP with TLS)\n\twith ESMTP id 256712698; Mon, 02 Oct 2017 18:49:16 +0800","from MTKCAS06.mediatek.inc (172.21.101.30) by\n\tmtkmbs03n1.mediatek.inc (172.21.101.181) with Microsoft SMTP Server\n\t(TLS) id 15.0.1210.3; Mon, 2 Oct 2017 18:49:20 +0800","from [172.21.77.4] (172.21.77.4) by MTKCAS06.mediatek.inc\n\t(172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via\n\tFrontend Transport; Mon, 2 Oct 2017 18:48:40 +0800"],"X-UUID":"8cebef40152a4d56bdab8d85b38e9e2a-20171002","Message-ID":"<1506941349.24270.1.camel@mtksdaap41>","Subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","From":"Yingjoe Chen <yingjoe.chen@mediatek.com>","To":"Chaotian Jing <chaotian.jing@mediatek.com>","CC":"Ulf Hansson <ulf.hansson@linaro.org>, Mark Rutland <mark.rutland@arm.com>,\n\tRob Herring <robh@kernel.org>,\n\tsrv_heupstream <srv_heupstream@mediatek.com>,\n\t\"devicetree@vger.kernel.org\" <devicetree@vger.kernel.org>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tLinus Walleij <linus.walleij@linaro.org>,\n\tWill Deacon <will.deacon@arm.com>,\n\t\"linux-kernel@vger.kernel.org\" <linux-kernel@vger.kernel.org>,\n\tyong mao <yong.mao@mediatek.com>, Phong LE <ple@baylibre.com>,\n\tJavier Martinez Canillas <javier@osg.samsung.com>,\n\t<linux-mediatek@lists.infradead.org>,\n\tMatthias Brugger <matthias.bgg@gmail.com>,\n\t\"linux-mmc@vger.kernel.org\" <linux-mmc@vger.kernel.org>,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t<linux-arm-kernel@lists.infradead.org>,\n\tHeiner Kallweit <hkallweit1@gmail.com>","Date":"Mon, 2 Oct 2017 18:49:09 +0800","In-Reply-To":"<1506650162.19851.12.camel@mhfsdcap03>","References":"<1505207272-16983-1-git-send-email-chaotian.jing@mediatek.com>\n\t<1505207272-16983-2-git-send-email-chaotian.jing@mediatek.com>\n\t<20170913141026.43oh4n4foipmahsk@rob-hp-laptop>\n\t<1505355021.8308.4.camel@mhfsdcap03>\n\t<CAPDyKFrUe-0hEsxVRQSZvujcXY8WrR6m-0DMW=VwDDLvz7Lexw@mail.gmail.com>\n\t<1506475100.19851.9.camel@mhfsdcap03>\n\t<1506650162.19851.12.camel@mhfsdcap03>","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.2.3-0ubuntu6 ","Content-Transfer-Encoding":"7bit","MIME-Version":"1.0","X-MTK":"N","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1782385,"web_url":"http://patchwork.ozlabs.org/comment/1782385/","msgid":"<1507515389.19789.0.camel@mhfsdcap03>","list_archive_url":null,"date":"2017-10-09T02:16:29","subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","submitter":{"id":67412,"url":"http://patchwork.ozlabs.org/api/people/67412/","name":"Chaotian Jing (井朝天)","email":"chaotian.jing@mediatek.com"},"content":"On Mon, 2017-10-02 at 08:53 +0200, Ulf Hansson wrote:\n> [...]\n> \n> >> > >> >  Required properties:\n> >> > >> > -- compatible: Should be \"mediatek,mt8173-mmc\",\"mediatek,mt8135-mmc\"\n> >> > >> > +- compatible: value should be either of the following.\n> >> > >> > +   \"mediatek,mt8135-mmc\": for mmc host ip compatible with mt8135\n> >> > >> > +   \"mediatek,mt8173-mmc\": for mmc host ip compatible with mt8173\n> >> > >> > +   \"mediatek,mt2701-mmc\": for mmc host ip compatible with mt2701\n> >> > >> > +   \"mediatek,mt2712-mmc\": for mmc host ip compatible with mt2712\n> >> > >> > +- reg: physical base address of the controller and length\n> >> > >> >  - interrupts: Should contain MSDC interrupt number\n> >> > >> > -- clocks: MSDC source clock, HCLK\n> >> > >> > -- clock-names: \"source\", \"hclk\"\n> >> > >> > +- clocks: MSDC source clock, HCLK, source_cg\n> >> > >> > +- clock-names: \"source\", \"hclk\", \"source_cg\"\n> >> > >>\n> >> > >> All chips support source_cg? That's not backwards compatible for\n> >> > >> existing compatible strings if the driver requires it.\n> >> > > Not all chips support source_cg, for chips which do not support\n> >> > > source_cg, no need source_cg here, and the driver will parse it\n> >> > > to know if current chip support it.\n> >> >\n> >> > In such case you must not add add a required binding for it. I think\n> >> > that is what Rob is trying to point out for you.\n> >> >\n> >> > [...]\n> >> >\n> >> > Kind regards\n> >> > Uffe\n> >> The source_cg is required(MUST) at MT2712 and future SoCs, but not\n> >> required(do not have it) at previous SoCs, so that put it at required\n> >> properties, let the driver to handle it.\n> \n> Then you must explain that in the binding...\n> \n> On 29 September 2017 at 03:56, Chaotian Jing <chaotian.jing@mediatek.com> wrote:\n> > On Wed, 2017-09-27 at 09:18 +0800, Chaotian Jing wrote:\n> >> On Wed, 2017-09-27 at 00:33 +0200, Ulf Hansson wrote:\n> >> > On 14 September 2017 at 04:10, Chaotian Jing <chaotian.jing@mediatek.com> wrote:\n> >> > > On Wed, 2017-09-13 at 09:10 -0500, Rob Herring wrote:\n> >> > >> On Tue, Sep 12, 2017 at 05:07:41PM +0800, Chaotian Jing wrote:\n> >> > >> > Change the comptiable for support of multi-platform\n> >> > >> > Add description for reg\n> >> > >> > Add description for source_cg\n> >> > >> > Add description for mediatek,latch-ck\n> >> > >>\n> >> > >> This is at least the 3rd patch with exactly the same vague subject.\n> >> > >> Please make the subject somewhat unique.\n> >> > >>\n> >> > > Thx, will change the subject at next version\n> >> > >> >\n> >> > >> > Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>\n> >> > >> > ---\n> >> > >> >  Documentation/devicetree/bindings/mmc/mtk-sd.txt | 13 ++++++++++---\n> >> > >> >  1 file changed, 10 insertions(+), 3 deletions(-)\n> >> > >> >\n> >> > >> > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> >> > >> > index 4182ea3..405cd06 100644\n> >> > >> > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> >> > >> > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt\n> >> > >> > @@ -7,10 +7,15 @@ This file documents differences between the core properties in mmc.txt\n> >> > >> >  and the properties used by the msdc driver.\n> >> > >> >\n> >\n> > Any other comments about it ? still must not add a required binding for\n> > it ? if add a optional binding for it, how to add it ? as cannot\n> > duplicate \"clocks\" & \"clock-names\" in one node.\n> >\n> >\n> \n> I suggest you keep the description of the new clock name part of the\n> \"Required properties:\" header. However, after each clock name,\n> explicit state when the clock is required/optional. Something along\n> the lines as sdhci-msm does it.\n> Documentation/devicetree/bindings/mmc/sdhci-msm.txt\n> \n> Kind regards\n> Uffe\n\nThx, I will send a new series of patch v2 to review.\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y9P4n4Bf1z9t3B\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tMon,  9 Oct 2017 13:16:41 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753828AbdJICQk (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tSun, 8 Oct 2017 22:16:40 -0400","from mailgw02.mediatek.com ([218.249.47.111]:38477 \"EHLO\n\tmailgw02.mediatek.com\" rhost-flags-OK-FAIL-OK-FAIL) by\n\tvger.kernel.org with ESMTP id S1753812AbdJICQj (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Sun, 8 Oct 2017 22:16:39 -0400","from mtkcas32.mediatek.inc [(172.27.4.250)] by\n\tmailgw02.mediatek.com (envelope-from <chaotian.jing@mediatek.com>)\n\t(mailgw01.mediatek.com ESMTP with TLS)\n\twith ESMTP id 1562851211; Mon, 09 Oct 2017 10:16:04 +0800","from MTKCAS36.mediatek.inc (172.27.4.186) by\n\tMTKMBS31N1.mediatek.inc\n\t(172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1210.3;\n\tMon, 9 Oct 2017 10:16:12 +0800","from [10.17.3.153] (10.17.3.153) by MTKCAS36.mediatek.inc\n\t(172.27.4.170) with Microsoft SMTP Server id 15.0.1210.3 via Frontend\n\tTransport; Mon, 9 Oct 2017 10:16:16 +0800"],"X-UUID":"866ebcfeb5c24d47a15aa6cde7c19f6b-20171009","Message-ID":"<1507515389.19789.0.camel@mhfsdcap03>","Subject":"Re: [PATCH 01/12] mmc: dt-bindings: update Mediatek MMC bindings","From":"Chaotian Jing <chaotian.jing@mediatek.com>","To":"Ulf Hansson <ulf.hansson@linaro.org>","CC":"Rob Herring <robh@kernel.org>, Mark Rutland <mark.rutland@arm.com>,\n\tMatthias Brugger <matthias.bgg@gmail.com>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tWill Deacon <will.deacon@arm.com>, yong mao <yong.mao@mediatek.com>, \n\tLinus Walleij <linus.walleij@linaro.org>,\n\t\"Javier Martinez Canillas\" <javier@osg.samsung.com>,\n\tHeiner Kallweit <hkallweit1@gmail.com>, Phong LE <ple@baylibre.com>, \n\t\"linux-mmc@vger.kernel.org\" <linux-mmc@vger.kernel.org>,\n\t\"devicetree@vger.kernel.org\" <devicetree@vger.kernel.org>,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t<linux-arm-kernel@lists.infradead.org>,\n\t<linux-mediatek@lists.infradead.org>,\n\t\"linux-kernel@vger.kernel.org\" <linux-kernel@vger.kernel.org>,\n\tsrv_heupstream <srv_heupstream@mediatek.com>","Date":"Mon, 9 Oct 2017 10:16:29 +0800","In-Reply-To":"<CAPDyKFoiJJ=NM8EZ7mh+91Nj=EBYcAJmvZ3Z+xskeU3qB40HEw@mail.gmail.com>","References":"<1505207272-16983-1-git-send-email-chaotian.jing@mediatek.com>\n\t<1505207272-16983-2-git-send-email-chaotian.jing@mediatek.com>\n\t<20170913141026.43oh4n4foipmahsk@rob-hp-laptop>\n\t<1505355021.8308.4.camel@mhfsdcap03>\n\t<CAPDyKFrUe-0hEsxVRQSZvujcXY8WrR6m-0DMW=VwDDLvz7Lexw@mail.gmail.com>\n\t<1506475100.19851.9.camel@mhfsdcap03>\n\t<1506650162.19851.12.camel@mhfsdcap03>\n\t<CAPDyKFoiJJ=NM8EZ7mh+91Nj=EBYcAJmvZ3Z+xskeU3qB40HEw@mail.gmail.com>","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.2.3-0ubuntu6 ","Content-Transfer-Encoding":"7bit","MIME-Version":"1.0","X-MTK":"N","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}}]