[{"id":1770860,"web_url":"http://patchwork.ozlabs.org/comment/1770860/","msgid":"<20170919075300.GQ27153@umbus>","list_archive_url":null,"date":"2017-09-19T07:53:00","subject":"Re: [Qemu-devel] [RFC PATCH v2 13/21] ppc/xive: handle interrupt\n\tacknowledgment by the O/S","submitter":{"id":47,"url":"http://patchwork.ozlabs.org/api/people/47/","name":"David Gibson","email":"david@gibson.dropbear.id.au"},"content":"On Mon, Sep 11, 2017 at 07:12:27PM +0200, Cédric Le Goater wrote:\n> When an O/S Exception is raised, the O/S acknowledges the interrupt\n> with a special read in the TIMA. If the EO bit of the Notification\n> Source Register (NSR) is set (and it should), the Current Processor\n> Priority Register (CPPR) takes the value of the Pending Interrupt\n> Priority Register (PIPR), which contains the priority of the most\n> favored pending notification. The bit number corresponding to the\n> priority of the pending interrupt is reseted in the Interrupt Pending\n> Buffer (IPB) and so is the EO bit of the NSR.\n> \n> Signed-off-by: Cédric Le Goater \n> ---\n> hw/intc/spapr_xive.c | 19 ++++++++++++++++++-\n> 1 file changed, 18 insertions(+), 1 deletion(-)\n> \n> diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c\n> index e5d4b723b7e0..ad3ff91b13ea 100644\n> --- a/hw/intc/spapr_xive.c\n> +++ b/hw/intc/spapr_xive.c\n> @@ -50,7 +50,24 @@ static uint8_t ipb_to_pipr(uint8_t ibp)\n> \n> static uint64_t spapr_xive_icp_accept(ICPState *icp)\n> {\n> - return 0;\n> + uint8_t nsr = icp->tima_os[TM_NSR];\n> +\n> + qemu_irq_lower(icp->output);\n\nAh, here's the lower. This should not be in a different patch from\nthe matching raise. Plus, this doesn't seem right. Shouldn't this\nrecheck the CPPR against the PIPR, in case a higher priority irq has\nbeen delivered since the one the cpu is acking.\n\n> + if (icp->tima_os[TM_NSR] & TM_QW1_NSR_EO) {\n> + uint8_t cppr = icp->tima_os[TM_PIPR];\n> +\n> + icp->tima_os[TM_CPPR] = cppr;\n> +\n> + /* Reset the pending buffer bit */\n> + icp->tima_os[TM_IPB] &= ~priority_to_ipb(cppr);\n> + icp->tima_os[TM_PIPR] = ipb_to_pipr(icp->tima_os[TM_IPB]);\n> +\n> + /* Drop Exception bit for OS */\n> + icp->tima_os[TM_NSR] &= ~TM_QW1_NSR_EO;\n> + }\n> +\n> + return (nsr << 8) | icp->tima_os[TM_CPPR];\n> }\n> \n> static void spapr_xive_icp_notify(ICPState *icp)","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=gibson.dropbear.id.au\n\theader.i=@gibson.dropbear.id.au header.b=\"CRyzoV3Q\"; \n\tdkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxKWg1t5tz9s7m\n\tfor ;\n\tTue, 19 Sep 2017 20:54:39 +1000 (AEST)","from localhost ([::1]:41447 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1duGAn-0007F3-BV\n\tfor incoming@patchwork.ozlabs.org; Tue, 19 Sep 2017 06:54:37 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:51292)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1duFtZ-0001HF-Hp\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 06:36:52 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1duFtT-0002rm-9i\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 06:36:49 -0400","from ozlabs.org ([103.22.144.67]:37119)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1duFtS-0002oM-Se; Tue, 19 Sep 2017 06:36:43 -0400","by ozlabs.org (Postfix, from userid 1007)\n\tid 3xxK6q2NFmz9t3x; Tue, 19 Sep 2017 20:36:34 +1000 (AEST)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n\td=gibson.dropbear.id.au; s=201602; t=1505817395;\n\tbh=CgSqGqQYZ4ivcaQhhzKHszkH/nAeuyvEZEkdmSXhWYQ=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=CRyzoV3Q6cCnQaZy51F4p9+roWnwYEgtQEmq+rVs6xMvKv9qGXLUIMViAzl6zObgS\n\tht1tzK/Fp7Ek0mQ1Rn1Mk/5/+wWSJB/vZT/h4igsflZwupNJ4Kos8dtfsPTlEhrZH7\n\tiURUjgWcjVGwvjXmoucLNyPoK52/WvVwryILdFoA=","Date":"Tue, 19 Sep 2017 17:53:00 +1000","From":"David Gibson ","To":"=?iso-8859-1?q?C=E9dric?= Le Goater ","Message-ID":"<20170919075300.GQ27153@umbus>","References":"<20170911171235.29331-1-clg@kaod.org>\n\t<20170911171235.29331-14-clg@kaod.org>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\"; boundary=\"8RsyD0KswhpoK73Z\"","Content-Disposition":"inline","In-Reply-To":"<20170911171235.29331-14-clg@kaod.org>","User-Agent":"Mutt/1.8.3 (2017-05-23)","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"103.22.144.67","Subject":"Re: [Qemu-devel] [RFC PATCH v2 13/21] ppc/xive: handle interrupt\n\tacknowledgment by the O/S","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexey Kardashevskiy , qemu-ppc@nongnu.org,\n\tqemu-devel@nongnu.org, Alexander Graf ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1771850,"web_url":"http://patchwork.ozlabs.org/comment/1771850/","msgid":"","list_archive_url":null,"date":"2017-09-20T09:40:34","subject":"Re: [Qemu-devel] [RFC PATCH v2 13/21] ppc/xive: handle interrupt\n\tacknowledgment by the O/S","submitter":{"id":68548,"url":"http://patchwork.ozlabs.org/api/people/68548/","name":"Cédric Le Goater","email":"clg@kaod.org"},"content":"On 09/19/2017 09:53 AM, David Gibson wrote:\n> On Mon, Sep 11, 2017 at 07:12:27PM +0200, Cédric Le Goater wrote:\n>> When an O/S Exception is raised, the O/S acknowledges the interrupt\n>> with a special read in the TIMA. If the EO bit of the Notification\n>> Source Register (NSR) is set (and it should), the Current Processor\n>> Priority Register (CPPR) takes the value of the Pending Interrupt\n>> Priority Register (PIPR), which contains the priority of the most\n>> favored pending notification. The bit number corresponding to the\n>> priority of the pending interrupt is reseted in the Interrupt Pending\n>> Buffer (IPB) and so is the EO bit of the NSR.\n>>\n>> Signed-off-by: Cédric Le Goater \n>> ---\n>> hw/intc/spapr_xive.c | 19 ++++++++++++++++++-\n>> 1 file changed, 18 insertions(+), 1 deletion(-)\n>>\n>> diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c\n>> index e5d4b723b7e0..ad3ff91b13ea 100644\n>> --- a/hw/intc/spapr_xive.c\n>> +++ b/hw/intc/spapr_xive.c\n>> @@ -50,7 +50,24 @@ static uint8_t ipb_to_pipr(uint8_t ibp)\n>> \n>> static uint64_t spapr_xive_icp_accept(ICPState *icp)\n>> {\n>> - return 0;\n>> + uint8_t nsr = icp->tima_os[TM_NSR];\n>> +\n>> + qemu_irq_lower(icp->output);\n> \n> Ah, here's the lower. This should not be in a different patch from\n> the matching raise. \n\nok I can merge these.\n\n> Plus, this doesn't seem right. Shouldn't this\n> recheck the CPPR against the PIPR, in case a higher priority irq has\n> been delivered since the one the cpu is acking.\n\nIf a higher priority is delivered, it means that the CPPR was more \nprivileged and that we have now two bits set in the IPB by the time \nthe interrupt is acked. The high priority PIPR will become the new \nCPPR and the IBP will be modified keeping only the lower priority. \n\nif the CPPR is modified to the lower priority level, then the \nfirst interrupt will be delivered again. \n\nI think this is fine.\n\nC.\n\n\n> \n>> + if (icp->tima_os[TM_NSR] & TM_QW1_NSR_EO) {\n>> + uint8_t cppr = icp->tima_os[TM_PIPR];\n>> +\n>> + icp->tima_os[TM_CPPR] = cppr;\n>> +\n>> + /* Reset the pending buffer bit */\n>> + icp->tima_os[TM_IPB] &= ~priority_to_ipb(cppr);\n>> + icp->tima_os[TM_PIPR] = ipb_to_pipr(icp->tima_os[TM_IPB]);\n>> +\n>> + /* Drop Exception bit for OS */\n>> + icp->tima_os[TM_NSR] &= ~TM_QW1_NSR_EO;\n>> + }\n>> +\n>> + return (nsr << 8) | icp->tima_os[TM_CPPR];\n>> }\n>> \n>> static void spapr_xive_icp_notify(ICPState *icp)\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xy11D2RLjz9s7c\n\tfor ;\n\tWed, 20 Sep 2017 23:34:08 +1000 (AEST)","from localhost ([::1]:48114 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1duf8g-0008Nh-CU\n\tfor incoming@patchwork.ozlabs.org; Wed, 20 Sep 2017 09:34:06 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:44658)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1duerC-0002ZI-NC\n\tfor qemu-devel@nongnu.org; Wed, 20 Sep 2017 09:16:03 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1duer7-0000qE-SN\n\tfor qemu-devel@nongnu.org; Wed, 20 Sep 2017 09:16:02 -0400","from 2.mo2.mail-out.ovh.net ([188.165.53.149]:32803)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from ) id 1duer7-0000po-LV\n\tfor qemu-devel@nongnu.org; Wed, 20 Sep 2017 09:15:57 -0400","from player157.ha.ovh.net (b9.ovh.net [213.186.33.59])\n\tby mo2.mail-out.ovh.net (Postfix) with ESMTP id 2B625AC91A\n\tfor ; Wed, 20 Sep 2017 11:40:43 +0200 (CEST)","from zorba.kaod.org (LFbn-1-2231-173.w90-76.abo.wanadoo.fr\n\t[90.76.52.173]) (Authenticated sender: postmaster@kaod.org)\n\tby player157.ha.ovh.net (Postfix) with ESMTPSA id C18D55000AD;\n\tWed, 20 Sep 2017 11:40:34 +0200 (CEST)"],"To":"David Gibson ","References":"<20170911171235.29331-1-clg@kaod.org>\n\t<20170911171235.29331-14-clg@kaod.org> <20170919075300.GQ27153@umbus>","From":"=?utf-8?q?C=C3=A9dric_Le_Goater?= ","Message-ID":"","Date":"Wed, 20 Sep 2017 11:40:34 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20170919075300.GQ27153@umbus>","Content-Type":"text/plain; charset=windows-1252","Content-Language":"en-US","X-Ovh-Tracer-Id":"4006796294705417080","X-VR-SPAMSTATE":"OK","X-VR-SPAMSCORE":"-100","X-VR-SPAMCAUSE":"gggruggvucftvghtrhhoucdtuddrfeelledrheelgddvtdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"188.165.53.149","Subject":"Re: [Qemu-devel] [RFC PATCH v2 13/21] ppc/xive: handle interrupt\n\tacknowledgment by the O/S","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexey Kardashevskiy , qemu-ppc@nongnu.org,\n\tqemu-devel@nongnu.org, Alexander Graf ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1776852,"web_url":"http://patchwork.ozlabs.org/comment/1776852/","msgid":"<1506586475.25626.12.camel@kernel.crashing.org>","list_archive_url":null,"date":"2017-09-28T08:14:35","subject":"Re: [Qemu-devel] [RFC PATCH v2 13/21] ppc/xive: handle interrupt\n\tacknowledgment by the O/S","submitter":{"id":38,"url":"http://patchwork.ozlabs.org/api/people/38/","name":"Benjamin Herrenschmidt","email":"benh@kernel.crashing.org"},"content":"On Wed, 2017-09-20 at 11:40 +0200, Cédric Le Goater wrote:\n> > Plus, this doesn't seem right. Shouldn't this\n> > recheck the CPPR against the PIPR, in case a higher priority irq has\n> > been delivered since the one the cpu is acking.\n> \n> If a higher priority is delivered, it means that the CPPR was more \n> privileged and that we have now two bits set in the IPB by the time \n> the interrupt is acked. The high priority PIPR will become the new \n> CPPR and the IBP will be modified keeping only the lower priority. \n> \n> if the CPPR is modified to the lower priority level, then the \n> first interrupt will be delivered again. \n> \n> I think this is fine.\n\nAlso remember the HW PIPR behaviour, its a bit odd, it will be clamped\nby the CPPR. So if CPPR is 0 PIPR will be 0.\n\nIf CPPR is 7, PIPR will be <= 7, etc...\n\nCheers,\nBen.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y2nYr0HgVz9s3w\n\tfor ;\n\tThu, 28 Sep 2017 18:15:28 +1000 (AEST)","from localhost ([::1]:57907 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dxTyg-0005D8-5P\n\tfor incoming@patchwork.ozlabs.org; Thu, 28 Sep 2017 04:15:26 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:43986)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1dxTyJ-0005Cy-Ly\n\tfor qemu-devel@nongnu.org; Thu, 28 Sep 2017 04:15:04 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1dxTyF-0006AU-Mo\n\tfor qemu-devel@nongnu.org; Thu, 28 Sep 2017 04:15:03 -0400","from gate.crashing.org ([63.228.1.57]:54163)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1dxTyF-00067z-Bc; Thu, 28 Sep 2017 04:14:59 -0400","from localhost (localhost.localdomain [127.0.0.1])\n\tby gate.crashing.org (8.14.1/8.13.8) with ESMTP id v8S8EZ3H028248;\n\tThu, 28 Sep 2017 03:14:37 -0500"],"Message-ID":"<1506586475.25626.12.camel@kernel.crashing.org>","From":"Benjamin Herrenschmidt ","To":"=?iso-8859-1?q?C=E9dric?= Le Goater , David Gibson\n\t","Date":"Thu, 28 Sep 2017 10:14:35 +0200","In-Reply-To":"","References":"<20170911171235.29331-1-clg@kaod.org>\n\t<20170911171235.29331-14-clg@kaod.org> <20170919075300.GQ27153@umbus>\n\t","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.24.5 (3.24.5-1.fc26) ","Mime-Version":"1.0","Content-Transfer-Encoding":"quoted-printable","X-MIME-Autoconverted":"from 8bit to quoted-printable by gate.crashing.org id\n\tv8S8EZ3H028248","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy]","X-Received-From":"63.228.1.57","Subject":"Re: [Qemu-devel] [RFC PATCH v2 13/21] ppc/xive: handle interrupt\n\tacknowledgment by the O/S","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexey Kardashevskiy , qemu-ppc@nongnu.org,\n\tqemu-devel@nongnu.org, Alexander Graf ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}}]