[{"id":1770841,"web_url":"http://patchwork.ozlabs.org/comment/1770841/","msgid":"<20170919075506.GR27153@umbus>","list_archive_url":null,"date":"2017-09-19T07:55:06","subject":"Re: [Qemu-devel] [RFC PATCH v2 14/21] ppc/xive: add support for the\n\tSET_OS_PENDING command","submitter":{"id":47,"url":"http://patchwork.ozlabs.org/api/people/47/","name":"David Gibson","email":"david@gibson.dropbear.id.au"},"content":"On Mon, Sep 11, 2017 at 07:12:28PM +0200, Cédric Le Goater wrote:\n> Adjusting the Interrupt Pending Buffer for the O/S would allow a CPU\n> to process event queues of other priorities during one physical\n> interrupt cycle. This is not currently used by the XIVE support for\n> sPAPR in Linux but it is by the hypervisor.\n> \n> Signed-off-by: Cédric Le Goater \n> ---\n> hw/intc/spapr_xive.c | 9 ++++++++-\n> 1 file changed, 8 insertions(+), 1 deletion(-)\n> \n> diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c\n> index ad3ff91b13ea..ad3f03e37401 100644\n> --- a/hw/intc/spapr_xive.c\n> +++ b/hw/intc/spapr_xive.c\n> @@ -162,7 +162,14 @@ static bool spapr_xive_tm_is_readonly(uint8_t index)\n> static void spapr_xive_tm_write_special(ICPState *icp, hwaddr offset,\n> uint64_t value, unsigned size)\n> {\n> - /* TODO: support TM_SPC_SET_OS_PENDING */\n> + if (offset == TM_SPC_SET_OS_PENDING && size == 1) {\n> + icp->tima_os[TM_IPB] |= priority_to_ipb(value & 0xff);\n> + icp->tima_os[TM_PIPR] = ipb_to_pipr(icp->tima_os[TM_IPB]);\n\nThis only lets the cpu raise bits in the IPB, never clear them. Is\nthat right? I don't see how you'd implement the handling of multiple\npriorities without being able to clear bits here.\n\n> + spapr_xive_icp_notify(icp);\n> + } else {\n> + qemu_log_mask(LOG_GUEST_ERROR, \"XIVE: invalid TIMA write @%\"\n> + HWADDR_PRIx\" size %d\\n\", offset, size);\n> + }\n> \n> /* TODO: support TM_SPC_ACK_OS_EL */\n> }","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=gibson.dropbear.id.au\n\theader.i=@gibson.dropbear.id.au header.b=\"MKcif44N\"; \n\tdkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxKGM2Z80z9sBZ\n\tfor ;\n\tTue, 19 Sep 2017 20:43:07 +1000 (AEST)","from localhost ([::1]:41382 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1duFzd-00067x-Be\n\tfor incoming@patchwork.ozlabs.org; Tue, 19 Sep 2017 06:43:05 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:51113)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1duFtU-0001Du-Hl\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 06:36:46 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1duFtS-0002qX-PH\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 06:36:44 -0400","from ozlabs.org ([103.22.144.67]:35511)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1duFtS-0002nN-D3; Tue, 19 Sep 2017 06:36:42 -0400","by ozlabs.org (Postfix, from userid 1007)\n\tid 3xxK6p5Nkbz9t38; Tue, 19 Sep 2017 20:36:34 +1000 (AEST)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n\td=gibson.dropbear.id.au; s=201602; t=1505817394;\n\tbh=0tmNVOwcA0SY1+yuAYAh7GDyR4c7Oqcz6cFzA7QM7+c=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=MKcif44NsgAB7rXQbd402IUy28da6p0gCzJH7pBIa8hLuAq2IsqGr3/OhRnYehAb8\n\t1RZBZZgPCurvrwu1Fl81Fw84wAZ7RuIpvDldgygCuiBSdII+gsiLrUmOA2kcavUQEU\n\ttBEAB6VmDyAu1tkxOPOSJ50nMgAUT11opKMdAFMA=","Date":"Tue, 19 Sep 2017 17:55:06 +1000","From":"David Gibson ","To":"=?iso-8859-1?q?C=E9dric?= Le Goater ","Message-ID":"<20170919075506.GR27153@umbus>","References":"<20170911171235.29331-1-clg@kaod.org>\n\t<20170911171235.29331-15-clg@kaod.org>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\"; boundary=\"6eUvXotnMb6+obQB\"","Content-Disposition":"inline","In-Reply-To":"<20170911171235.29331-15-clg@kaod.org>","User-Agent":"Mutt/1.8.3 (2017-05-23)","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"103.22.144.67","Subject":"Re: [Qemu-devel] [RFC PATCH v2 14/21] ppc/xive: add support for the\n\tSET_OS_PENDING command","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexey Kardashevskiy , qemu-ppc@nongnu.org,\n\tqemu-devel@nongnu.org, Alexander Graf ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1771897,"web_url":"http://patchwork.ozlabs.org/comment/1771897/","msgid":"<13fdab3c-6af7-780a-ad1e-9ea64a5d660c@kaod.org>","list_archive_url":null,"date":"2017-09-20T09:47:19","subject":"Re: [Qemu-devel] [RFC PATCH v2 14/21] ppc/xive: add support for the\n\tSET_OS_PENDING command","submitter":{"id":68548,"url":"http://patchwork.ozlabs.org/api/people/68548/","name":"Cédric Le Goater","email":"clg@kaod.org"},"content":"On 09/19/2017 09:55 AM, David Gibson wrote:\n> On Mon, Sep 11, 2017 at 07:12:28PM +0200, Cédric Le Goater wrote:\n>> Adjusting the Interrupt Pending Buffer for the O/S would allow a CPU\n>> to process event queues of other priorities during one physical\n>> interrupt cycle. This is not currently used by the XIVE support for\n>> sPAPR in Linux but it is by the hypervisor.\n>>\n>> Signed-off-by: Cédric Le Goater \n>> ---\n>> hw/intc/spapr_xive.c | 9 ++++++++-\n>> 1 file changed, 8 insertions(+), 1 deletion(-)\n>>\n>> diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c\n>> index ad3ff91b13ea..ad3f03e37401 100644\n>> --- a/hw/intc/spapr_xive.c\n>> +++ b/hw/intc/spapr_xive.c\n>> @@ -162,7 +162,14 @@ static bool spapr_xive_tm_is_readonly(uint8_t index)\n>> static void spapr_xive_tm_write_special(ICPState *icp, hwaddr offset,\n>> uint64_t value, unsigned size)\n>> {\n>> - /* TODO: support TM_SPC_SET_OS_PENDING */\n>> + if (offset == TM_SPC_SET_OS_PENDING && size == 1) {\n>> + icp->tima_os[TM_IPB] |= priority_to_ipb(value & 0xff);\n>> + icp->tima_os[TM_PIPR] = ipb_to_pipr(icp->tima_os[TM_IPB]);\n> \n> This only lets the cpu raise bits in the IPB, never clear them.> Is that right? \n\nThe clear is done when the OS acks the interrupt.\n\n> I don't see how you'd implement the handling of multiple\n> priorities without being able to clear bits here.\n\nI am not sure how this command should be used from the OS. \nCurrently, I only see KVM handling it in the XICS/XIVE glue.\nI need to take a closer look.\n\nC.\n \n\n\n>> + spapr_xive_icp_notify(icp);\n>> + } else {\n>> + qemu_log_mask(LOG_GUEST_ERROR, \"XIVE: invalid TIMA write @%\"\n>> + HWADDR_PRIx\" size %d\\n\", offset, size);\n>> + }\n>> \n>> /* TODO: support TM_SPC_ACK_OS_EL */\n>> }\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xy1nF6JyKz9s82\n\tfor ;\n\tThu, 21 Sep 2017 00:08:49 +1000 (AEST)","from localhost ([::1]:48311 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dufgF-0005VA-RF\n\tfor incoming@patchwork.ozlabs.org; Wed, 20 Sep 2017 10:08:47 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:36144)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1duf1X-0002g9-Tp\n\tfor qemu-devel@nongnu.org; Wed, 20 Sep 2017 09:27:11 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1duf10-0003qm-2v\n\tfor qemu-devel@nongnu.org; Wed, 20 Sep 2017 09:26:43 -0400","from 6.mo2.mail-out.ovh.net ([87.98.165.38]:49074)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from ) id 1duf0z-0003qM-Tr\n\tfor qemu-devel@nongnu.org; Wed, 20 Sep 2017 09:26:10 -0400","from player157.ha.ovh.net (b9.ovh.net [213.186.33.59])\n\tby mo2.mail-out.ovh.net (Postfix) with ESMTP id 83FDEAC831\n\tfor ; Wed, 20 Sep 2017 11:47:25 +0200 (CEST)","from zorba.kaod.org (LFbn-1-2231-173.w90-76.abo.wanadoo.fr\n\t[90.76.52.173]) (Authenticated sender: postmaster@kaod.org)\n\tby player157.ha.ovh.net (Postfix) with ESMTPSA id 8BEE5500081;\n\tWed, 20 Sep 2017 11:47:19 +0200 (CEST)"],"To":"David Gibson ","References":"<20170911171235.29331-1-clg@kaod.org>\n\t<20170911171235.29331-15-clg@kaod.org> <20170919075506.GR27153@umbus>","From":"=?utf-8?q?C=C3=A9dric_Le_Goater?= ","Message-ID":"<13fdab3c-6af7-780a-ad1e-9ea64a5d660c@kaod.org>","Date":"Wed, 20 Sep 2017 11:47:19 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20170919075506.GR27153@umbus>","Content-Type":"text/plain; charset=windows-1252","Content-Language":"en-US","X-Ovh-Tracer-Id":"4119949235878988664","X-VR-SPAMSTATE":"OK","X-VR-SPAMSCORE":"-100","X-VR-SPAMCAUSE":"gggruggvucftvghtrhhoucdtuddrfeelledrheelgddvudcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"87.98.165.38","Subject":"Re: [Qemu-devel] [RFC PATCH v2 14/21] ppc/xive: add support for the\n\tSET_OS_PENDING command","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexey Kardashevskiy , qemu-ppc@nongnu.org,\n\tqemu-devel@nongnu.org, Alexander Graf ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1776853,"web_url":"http://patchwork.ozlabs.org/comment/1776853/","msgid":"<1506586686.25626.16.camel@kernel.crashing.org>","list_archive_url":null,"date":"2017-09-28T08:18:06","subject":"Re: [Qemu-devel] [RFC PATCH v2 14/21] ppc/xive: add support for the\n\tSET_OS_PENDING command","submitter":{"id":38,"url":"http://patchwork.ozlabs.org/api/people/38/","name":"Benjamin Herrenschmidt","email":"benh@kernel.crashing.org"},"content":"On Wed, 2017-09-20 at 11:47 +0200, Cédric Le Goater wrote:\n> > > @@ -162,7 +162,14 @@ static bool spapr_xive_tm_is_readonly(uint8_t index)\n> > > static void spapr_xive_tm_write_special(ICPState *icp, hwaddr offset,\n> > > uint64_t value, unsigned size)\n> > > {\n> > > - /* TODO: support TM_SPC_SET_OS_PENDING */\n> > > + if (offset == TM_SPC_SET_OS_PENDING && size == 1) {\n> > > + icp->tima_os[TM_IPB] |= priority_to_ipb(value & 0xff);\n> > > + icp->tima_os[TM_PIPR] = ipb_to_pipr(icp->tima_os[TM_IPB]);\n> > \n> > This only lets the cpu raise bits in the IPB, never clear them.> Is that right? \n> \n> The clear is done when the OS acks the interrupt.\n> \n> > I don't see how you'd implement the handling of multiple\n> > priorities without being able to clear bits here.\n> \n> I am not sure how this command should be used from the OS. \n> Currently, I only see KVM handling it in the XICS/XIVE glue.\n> I need to take a closer look.\n\nIt's a way to avoid the SW replay on EOI.\n\nIE, assume you have 2 interrupts in the queue. You take the exception,\nack the first one, process it etc...\n\nThen you EOI, the HW won't send a second notification. You need to look\nat the queue and continue consuming until it's empty.\n\nToday Linux checks the queue on EOI and use a SW mechanism to\nsynthetize a new pseudo-external interrupt.\n\nThis MMIO command would allow the OS to instead set back the\ncorresponding priority bit to 1 in the IPB and cause the HW to re-emit\nthe interrupt instead of SW.\n\nLinux doesn't use this today because DD1 didn't support it for the HV\nlevel, but other OSes might and we also might use it when we do groups,\nthus allowing redistribution.\n\nCheers,\nBen.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y2nf74LgZz9s3w\n\tfor ;\n\tThu, 28 Sep 2017 18:19:11 +1000 (AEST)","from localhost ([::1]:57914 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dxU2H-00068Z-NM\n\tfor incoming@patchwork.ozlabs.org; Thu, 28 Sep 2017 04:19:09 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:44601)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1dxU1k-00068E-0t\n\tfor qemu-devel@nongnu.org; Thu, 28 Sep 2017 04:18:40 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1dxU1g-0007un-0s\n\tfor qemu-devel@nongnu.org; Thu, 28 Sep 2017 04:18:36 -0400","from gate.crashing.org ([63.228.1.57]:51596)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1dxU1f-0007uI-MG; Thu, 28 Sep 2017 04:18:31 -0400","from localhost (localhost.localdomain [127.0.0.1])\n\tby gate.crashing.org (8.14.1/8.13.8) with ESMTP id v8S8I6WI028460;\n\tThu, 28 Sep 2017 03:18:08 -0500"],"Message-ID":"<1506586686.25626.16.camel@kernel.crashing.org>","From":"Benjamin Herrenschmidt ","To":"=?iso-8859-1?q?C=E9dric?= Le Goater , David Gibson\n\t","Date":"Thu, 28 Sep 2017 10:18:06 +0200","In-Reply-To":"<13fdab3c-6af7-780a-ad1e-9ea64a5d660c@kaod.org>","References":"<20170911171235.29331-1-clg@kaod.org>\n\t<20170911171235.29331-15-clg@kaod.org> <20170919075506.GR27153@umbus>\n\t<13fdab3c-6af7-780a-ad1e-9ea64a5d660c@kaod.org>","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.24.5 (3.24.5-1.fc26) ","Mime-Version":"1.0","Content-Transfer-Encoding":"quoted-printable","X-MIME-Autoconverted":"from 8bit to quoted-printable by gate.crashing.org id\n\tv8S8I6WI028460","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy]","X-Received-From":"63.228.1.57","Subject":"Re: [Qemu-devel] [RFC PATCH v2 14/21] ppc/xive: add support for the\n\tSET_OS_PENDING command","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexey Kardashevskiy , qemu-ppc@nongnu.org,\n\tqemu-devel@nongnu.org, Alexander Graf ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}}]