[{"id":1770835,"web_url":"http://patchwork.ozlabs.org/comment/1770835/","msgid":"<20170919024544.GK27153@umbus>","list_archive_url":null,"date":"2017-09-19T02:45:44","subject":"Re: [Qemu-devel] [RFC PATCH v2 05/21] ppc/xive: allocate IRQ\n\tnumbers for the IPIs","submitter":{"id":47,"url":"http://patchwork.ozlabs.org/api/people/47/","name":"David Gibson","email":"david@gibson.dropbear.id.au"},"content":"On Mon, Sep 11, 2017 at 07:12:19PM +0200, Cédric Le Goater wrote:\n> The number of IPIs is deduced from the max number of CPUs the guest\n> supports and the IRQ numbers for the IPIs are allocated from the top\n> of the IRQ number space to reduce conflict with other IRQ numbers\n> allocated by the devices.\n> \n> Signed-off-by: Cédric Le Goater \n\nThis is more ick associated with implementing XIVE in terms of XICS.\nWe shouldn't need to \"allocate\" IRQs for the IPIs - they should just\nbe a fixed set. And we certainly shouldn't need to set the XICS irq\ntype for XIVE irqs.\n\n> ---\n> hw/intc/spapr_xive.c | 6 ++++++\n> 1 file changed, 6 insertions(+)\n> \n> diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c\n> index 1681affb0848..52c32f588d6d 100644\n> --- a/hw/intc/spapr_xive.c\n> +++ b/hw/intc/spapr_xive.c\n> @@ -58,6 +58,7 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp)\n> sPAPRXive *xive = SPAPR_XIVE(dev);\n> Object *obj;\n> Error *err = NULL;\n> + int i;\n> \n> if (!xive->nr_targets) {\n> error_setg(errp, \"Number of interrupt targets needs to be greater 0\");\n> @@ -80,6 +81,11 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp)\n> \n> xive->ics = ICS_BASE(obj);\n> \n> + /* Allocate the last IRQ numbers for the IPIs */\n> + for (i = xive->nr_irqs - xive->nr_targets; i < xive->nr_irqs; i++) {\n> + ics_set_irq_type(xive->ics, i, false);\n> + }\n> +\n> /* Allocate SBEs (State Bit Entry). 2 bits, so 4 entries per byte */\n> xive->sbe_size = DIV_ROUND_UP(xive->nr_irqs, 4);\n> xive->sbe = g_malloc0(xive->sbe_size);","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=gibson.dropbear.id.au\n\theader.i=@gibson.dropbear.id.au header.b=\"O5kBiGeF\"; \n\tdkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxK840Lnwz9s82\n\tfor ;\n\tTue, 19 Sep 2017 20:37:40 +1000 (AEST)","from localhost ([::1]:41361 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1duFuM-0001Jy-49\n\tfor incoming@patchwork.ozlabs.org; Tue, 19 Sep 2017 06:37:38 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:51132)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1duFtV-0001EM-2n\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 06:36:49 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1duFtS-0002rG-Vw\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 06:36:45 -0400","from ozlabs.org ([2401:3900:2:1::2]:53131)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1duFtS-0002nk-KQ; Tue, 19 Sep 2017 06:36:42 -0400","by ozlabs.org (Postfix, from userid 1007)\n\tid 3xxK6q0Drcz9t44; Tue, 19 Sep 2017 20:36:34 +1000 (AEST)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n\td=gibson.dropbear.id.au; s=201602; t=1505817395;\n\tbh=ZZMwVlNN8PKcp+OxLfzkLw1nPZe2Dl3FhEnf3Jr2oYw=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=O5kBiGeFfnCly6HPjQ++OwXnTYuXGZU25PgYn2PSvGLm2r9QLF+NrK+qzp8HJlx0y\n\tlIjsxdZlDAbjpxsFhOKR9JW9+fmrw5x+KngQCagu6JByF/k3yIClKD3U58ST/eF3uA\n\tVo5mVTUfjgMDoiom2YcyLQ8PU7MvBEB51HauHJ3U=","Date":"Tue, 19 Sep 2017 12:45:44 +1000","From":"David Gibson ","To":"=?iso-8859-1?q?C=E9dric?= Le Goater ","Message-ID":"<20170919024544.GK27153@umbus>","References":"<20170911171235.29331-1-clg@kaod.org>\n\t<20170911171235.29331-6-clg@kaod.org>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\"; boundary=\"n83H03bbH672hrlY\"","Content-Disposition":"inline","In-Reply-To":"<20170911171235.29331-6-clg@kaod.org>","User-Agent":"Mutt/1.8.3 (2017-05-23)","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2401:3900:2:1::2","Subject":"Re: [Qemu-devel] [RFC PATCH v2 05/21] ppc/xive: allocate IRQ\n\tnumbers for the IPIs","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexey Kardashevskiy , qemu-ppc@nongnu.org,\n\tqemu-devel@nongnu.org, Alexander Graf ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1771116,"web_url":"http://patchwork.ozlabs.org/comment/1771116/","msgid":"","list_archive_url":null,"date":"2017-09-19T14:52:10","subject":"Re: [Qemu-devel] [RFC PATCH v2 05/21] ppc/xive: allocate IRQ\n\tnumbers for the IPIs","submitter":{"id":68548,"url":"http://patchwork.ozlabs.org/api/people/68548/","name":"Cédric Le Goater","email":"clg@kaod.org"},"content":"On 09/19/2017 04:45 AM, David Gibson wrote:\n> On Mon, Sep 11, 2017 at 07:12:19PM +0200, Cédric Le Goater wrote:\n>> The number of IPIs is deduced from the max number of CPUs the guest\n>> supports and the IRQ numbers for the IPIs are allocated from the top\n>> of the IRQ number space to reduce conflict with other IRQ numbers\n>> allocated by the devices.\n>>\n>> Signed-off-by: Cédric Le Goater \n> \n> This is more ick associated with implementing XIVE in terms of XICS.\n> We shouldn't need to \"allocate\" IRQs for the IPIs - they should just\n> be a fixed set. \n\nThey are allocated at the right beginning so we can consider them\nfixed I suppose. \n\n> And we certainly shouldn't need to set the XICS irq type for XIVE irqs.\n\nThis is because, in this patchset, XIVE and XICS use the same IRQ \nallocator which happens to be the ICSIRQState array of XICS. yes, \nthis is ugly but we are identifying the different constraints. \n\nWe should be doing the same with a common interrupt source, that is\nto allocate some IRQ numbers for the IPIs. \n\nC.\n\n\n>> ---\n>> hw/intc/spapr_xive.c | 6 ++++++\n>> 1 file changed, 6 insertions(+)\n>>\n>> diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c\n>> index 1681affb0848..52c32f588d6d 100644\n>> --- a/hw/intc/spapr_xive.c\n>> +++ b/hw/intc/spapr_xive.c\n>> @@ -58,6 +58,7 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp)\n>> sPAPRXive *xive = SPAPR_XIVE(dev);\n>> Object *obj;\n>> Error *err = NULL;\n>> + int i;\n>> \n>> if (!xive->nr_targets) {\n>> error_setg(errp, \"Number of interrupt targets needs to be greater 0\");\n>> @@ -80,6 +81,11 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp)\n>> \n>> xive->ics = ICS_BASE(obj);\n>> \n>> + /* Allocate the last IRQ numbers for the IPIs */\n>> + for (i = xive->nr_irqs - xive->nr_targets; i < xive->nr_irqs; i++) {\n>> + ics_set_irq_type(xive->ics, i, false);\n>> + }\n>> +\n>> /* Allocate SBEs (State Bit Entry). 2 bits, so 4 entries per byte */\n>> xive->sbe_size = DIV_ROUND_UP(xive->nr_irqs, 4);\n>> xive->sbe = g_malloc0(xive->sbe_size);\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxQr51XM0z9sBZ\n\tfor ;\n\tWed, 20 Sep 2017 00:54:13 +1000 (AEST)","from localhost ([::1]:43365 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1duJud-0007YR-9Y\n\tfor incoming@patchwork.ozlabs.org; Tue, 19 Sep 2017 10:54:11 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:41307)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1duJsu-0006cv-JJ\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 10:52:25 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1duJsr-0004dq-7V\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 10:52:24 -0400","from 14.mo3.mail-out.ovh.net ([188.165.43.98]:34007)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from ) id 1duJsr-0004d6-1A\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 10:52:21 -0400","from player797.ha.ovh.net (b9.ovh.net [213.186.33.59])\n\tby mo3.mail-out.ovh.net (Postfix) with ESMTP id 686A7159359\n\tfor ; Tue, 19 Sep 2017 16:52:19 +0200 (CEST)","from zorba.kaod.org (deibp9eh1--blueice1n4.emea.ibm.com\n\t[195.212.29.166]) (Authenticated sender: postmaster@kaod.org)\n\tby player797.ha.ovh.net (Postfix) with ESMTPSA id 5CDFA2E0084;\n\tTue, 19 Sep 2017 16:52:11 +0200 (CEST)"],"To":"David Gibson ","References":"<20170911171235.29331-1-clg@kaod.org>\n\t<20170911171235.29331-6-clg@kaod.org> <20170919024544.GK27153@umbus>","From":"=?utf-8?q?C=C3=A9dric_Le_Goater?= ","Message-ID":"","Date":"Tue, 19 Sep 2017 16:52:10 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20170919024544.GK27153@umbus>","Content-Type":"text/plain; charset=windows-1252","Content-Language":"en-US","X-Ovh-Tracer-Id":"3396558546323606392","X-VR-SPAMSTATE":"OK","X-VR-SPAMSCORE":"-100","X-VR-SPAMCAUSE":"gggruggvucftvghtrhhoucdtuddrfeelledrheejgdekfecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd","Content-Transfer-Encoding":"quoted-printable","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"188.165.43.98","Subject":"Re: [Qemu-devel] [RFC PATCH v2 05/21] ppc/xive: allocate IRQ\n\tnumbers for the IPIs","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexey Kardashevskiy , qemu-ppc@nongnu.org,\n\tqemu-devel@nongnu.org, Alexander Graf ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1771557,"web_url":"http://patchwork.ozlabs.org/comment/1771557/","msgid":"<20170920043533.GF5520@umbus.fritz.box>","list_archive_url":null,"date":"2017-09-20T04:35:33","subject":"Re: [Qemu-devel] [RFC PATCH v2 05/21] ppc/xive: allocate IRQ\n\tnumbers for the IPIs","submitter":{"id":47,"url":"http://patchwork.ozlabs.org/api/people/47/","name":"David Gibson","email":"david@gibson.dropbear.id.au"},"content":"On Tue, Sep 19, 2017 at 04:52:10PM +0200, Cédric Le Goater wrote:\n> On 09/19/2017 04:45 AM, David Gibson wrote:\n> > On Mon, Sep 11, 2017 at 07:12:19PM +0200, Cédric Le Goater wrote:\n> >> The number of IPIs is deduced from the max number of CPUs the guest\n> >> supports and the IRQ numbers for the IPIs are allocated from the top\n> >> of the IRQ number space to reduce conflict with other IRQ numbers\n> >> allocated by the devices.\n> >>\n> >> Signed-off-by: Cédric Le Goater \n> > \n> > This is more ick associated with implementing XIVE in terms of XICS.\n> > We shouldn't need to \"allocate\" IRQs for the IPIs - they should just\n> > be a fixed set. \n> \n> They are allocated at the right beginning so we can consider them\n> fixed I suppose. \n> \n> > And we certainly shouldn't need to set the XICS irq type for XIVE irqs.\n> \n> This is because, in this patchset, XIVE and XICS use the same IRQ \n> allocator which happens to be the ICSIRQState array of XICS. yes, \n> this is ugly but we are identifying the different constraints. \n\nYeah, as I said in the other mail, I think trying to support both\nimmediately is making a mess of the XIVE design. Let's get it working\nas a machine option first, then worry about CAS and migration.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=gibson.dropbear.id.au\n\theader.i=@gibson.dropbear.id.au header.b=\"oCGhl5pb\"; \n\tdkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxnTq5Cp2z9sNw\n\tfor ;\n\tWed, 20 Sep 2017 14:54:39 +1000 (AEST)","from localhost ([::1]:46672 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1duX1x-0007wz-M7\n\tfor incoming@patchwork.ozlabs.org; Wed, 20 Sep 2017 00:54:37 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:36187)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1duX1E-0007wJ-Hg\n\tfor qemu-devel@nongnu.org; Wed, 20 Sep 2017 00:53:54 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1duX1B-0001J7-7n\n\tfor qemu-devel@nongnu.org; Wed, 20 Sep 2017 00:53:52 -0400","from ozlabs.org ([103.22.144.67]:60797)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1duX1A-00013s-FO; Wed, 20 Sep 2017 00:53:49 -0400","by ozlabs.org (Postfix, from userid 1007)\n\tid 3xxnSm6JxVz9sP1; Wed, 20 Sep 2017 14:53:44 +1000 (AEST)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n\td=gibson.dropbear.id.au; s=201602; t=1505883224;\n\tbh=tOaTkvbYw7NhINmClKJLvxAdE1nvxNfTIxVj9XyZ3lU=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=oCGhl5pbvyTQleVUdjTzQ+idM63pxwOwl0zAByTQFzAqj+9+Q91bKB77WDDHyHoAj\n\tjCsUAO9NUA4aUkHL4DjiIHdBWwKWFa2DmBOa9mTKHK2DnxQB+SZqbCkHoKVqCQ64fV\n\tWkf22YdOtfqciws6v+p02rqEOMgCy0I59/D3ur40=","Date":"Wed, 20 Sep 2017 14:35:33 +1000","From":"David Gibson ","To":"=?iso-8859-1?q?C=E9dric?= Le Goater ","Message-ID":"<20170920043533.GF5520@umbus.fritz.box>","References":"<20170911171235.29331-1-clg@kaod.org>\n\t<20170911171235.29331-6-clg@kaod.org>\n\t<20170919024544.GK27153@umbus>\n\t","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\"; boundary=\"Wb5NtZlyOqqy58h0\"","Content-Disposition":"inline","In-Reply-To":"","User-Agent":"Mutt/1.8.3 (2017-05-23)","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"103.22.144.67","Subject":"Re: [Qemu-devel] [RFC PATCH v2 05/21] ppc/xive: allocate IRQ\n\tnumbers for the IPIs","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alexey Kardashevskiy , qemu-ppc@nongnu.org,\n\tqemu-devel@nongnu.org, Alexander Graf ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}}]