[{"id":1766469,"web_url":"http://patchwork.ozlabs.org/comment/1766469/","msgid":"","list_archive_url":null,"date":"2017-09-11T19:24:21","subject":"Re: [PATCH v5 2/3] dt-bindings: PCI: Add definition of pcie wake irq","submitter":{"id":67416,"url":"http://patchwork.ozlabs.org/api/people/67416/","name":"Rob Herring","email":"robh+dt@kernel.org"},"content":"On Mon, Sep 11, 2017 at 10:10 AM, Jeffy Chen wrote:\n> Add an optional interrupt for PCIE_WAKE pin.\n>\n> Signed-off-by: Jeffy Chen \n> ---\n>\n> Changes in v5:\n> Move to pci.txt\n>\n> Changes in v3: None\n> Changes in v2: None\n>\n> Documentation/devicetree/bindings/pci/pci.txt | 2 ++\n> 1 file changed, 2 insertions(+)\n\nAcked-by: Rob Herring \n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","mail.kernel.org;\n\tdmarc=none (p=none dis=none) header.from=kernel.org","mail.kernel.org;\n\tspf=none smtp.mailfrom=robh+dt@kernel.org"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xrdCy4L8Rz9s7C\n\tfor ;\n\tTue, 12 Sep 2017 05:24:46 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1750945AbdIKTYo (ORCPT\n\t);\n\tMon, 11 Sep 2017 15:24:44 -0400","from mail.kernel.org ([198.145.29.99]:35632 \"EHLO mail.kernel.org\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1750853AbdIKTYo (ORCPT );\n\tMon, 11 Sep 2017 15:24:44 -0400","from mail-qt0-f172.google.com (mail-qt0-f172.google.com\n\t[209.85.216.172])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby mail.kernel.org (Postfix) with ESMTPSA id A99D021E91;\n\tMon, 11 Sep 2017 19:24:43 +0000 (UTC)","by mail-qt0-f172.google.com with SMTP id s18so19427252qta.3;\n\tMon, 11 Sep 2017 12:24:43 -0700 (PDT)","by 10.12.209.75 with HTTP; Mon, 11 Sep 2017 12:24:21 -0700 (PDT)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mail.kernel.org A99D021E91","X-Gm-Message-State":"AHPjjUg96Miw+0kh+htdDW8zSWXbJDuBlVGm5nq4a0WCbo4s+FMMBqfM\n\tPJ+qJgeWozPjDL2qf38aju8g89ZKJA==","X-Google-Smtp-Source":"AOwi7QByy51wKuHAmpwB6y9FVELJfiAbRNI9mHNL70R626kiUrQHguiGiyQKdtIMRThLFxNepSpC0RCxnRobs7lsA2E=","X-Received":"by 10.200.56.252 with SMTP id g57mr17013370qtc.322.1505157882529;\n\tMon, 11 Sep 2017 12:24:42 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170911151029.25185-3-jeffy.chen@rock-chips.com>","References":"<20170911151029.25185-1-jeffy.chen@rock-chips.com>\n\t<20170911151029.25185-3-jeffy.chen@rock-chips.com>","From":"Rob Herring ","Date":"Mon, 11 Sep 2017 14:24:21 -0500","X-Gmail-Original-Message-ID":"","Message-ID":"","Subject":"Re: [PATCH v5 2/3] dt-bindings: PCI: Add definition of pcie wake irq","To":"Jeffy Chen ","Cc":"\"linux-kernel@vger.kernel.org\" ,\n\t\"bhelgaas@google.com\" ,\n\tShawn Lin ,\n\tBrian Norris ,\n\tDoug Anderson ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-pci@vger.kernel.org\" ,\n\tMark Rutland ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]