[{"id":1765965,"web_url":"http://patchwork.ozlabs.org/comment/1765965/","msgid":"<20170910171613.59df4c36@archlinux>","list_archive_url":null,"date":"2017-09-10T16:16:13","subject":"Re: [PATCH v2 4/6] dt-bindings: iio: adc: mcp320x: Update for\n\tmcp3550/1/3","submitter":{"id":10151,"url":"http://patchwork.ozlabs.org/api/people/10151/","name":"Jonathan Cameron","email":"jic23@kernel.org"},"content":"On Sat, 9 Sep 2017 20:32:41 +0200\nLukas Wunner wrote:\n\n> All chips supported by this driver clock data out on the falling edge\n> and latch data in on the rising edge, hence SPI mode (0,0) or (1,1)\n> must be used.\n> \n> Furthermore, none of the chips has an internal reference voltage\n> regulator, so an external supply is always required and needs to be\n> specified in the device tree lest the IIO \"scale\" in sysfs cannot be\n> calculated.\n> \n> Document these requirements in the device tree binding, add compatible\n> strings for the newly supported mcp3550/1/3 and explain that SPI mode\n> (0,0) should be preferred for these chips.\n> \n> Cc: Mathias Duckeck \n> Signed-off-by: Lukas Wunner \n\nI'm happy with this, but just want to give Rob / Mark more time to take\na look at it.\n\nGive me a poke if I seem to have forgotten it in a week or so.\n\nThanks,\n\nJonathan\n> ---\n> Changes since v1:\n> - Move support for continuous conversion mode to separate patch\n> which is marked informational / not for merging. (Rob, Jonathan)\n> \n> Documentation/devicetree/bindings/iio/adc/mcp320x.txt | 14 ++++++++++++++\n> 1 file changed, 14 insertions(+)\n> \n> diff --git a/Documentation/devicetree/bindings/iio/adc/mcp320x.txt b/Documentation/devicetree/bindings/iio/adc/mcp320x.txt\n> index bcd3ac8e6e0c..7d64753df949 100644\n> --- a/Documentation/devicetree/bindings/iio/adc/mcp320x.txt\n> +++ b/Documentation/devicetree/bindings/iio/adc/mcp320x.txt\n> @@ -29,15 +29,29 @@ Required properties:\n> \t\t\t\t\"microchip,mcp3204\"\n> \t\t\t\t\"microchip,mcp3208\"\n> \t\t\t\t\"microchip,mcp3301\"\n> +\t\t\t\t\"microchip,mcp3550-50\"\n> +\t\t\t\t\"microchip,mcp3550-60\"\n> +\t\t\t\t\"microchip,mcp3551\"\n> +\t\t\t\t\"microchip,mcp3553\"\n> \n> \t\t\tNOTE: The use of the compatibles with no vendor prefix\n> \t\t\tis deprecated and only listed because old DT use them.\n> \n> +\t- spi-cpha, spi-cpol (boolean):\n> +\t\t\tEither SPI mode (0,0) or (1,1) must be used, so specify\n> +\t\t\tnone or both of spi-cpha, spi-cpol. The MCP3550/1/3\n> +\t\t\tis more efficient in mode (1,1) as only 3 instead of\n> +\t\t\t4 bytes need to be read from the ADC, but not all SPI\n> +\t\t\tmasters support it.\n> +\n> +\t- vref-supply:\tPhandle to the external reference voltage supply.\n> +\n> Examples:\n> spi_controller {\n> \tmcp3x0x@0 {\n> \t\tcompatible = \"mcp3002\";\n> \t\treg = <0>;\n> \t\tspi-max-frequency = <1000000>;\n> +\t\tvref-supply = <&vref_reg>;\n> \t};\n> };\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","mail.kernel.org;\n\tdmarc=none (p=none dis=none) header.from=kernel.org","mail.kernel.org;\n\tspf=none smtp.mailfrom=jic23@kernel.org"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xqx515xCzz9rxm\n\tfor ;\n\tMon, 11 Sep 2017 02:16:21 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1750763AbdIJQQU (ORCPT\n\t);\n\tSun, 10 Sep 2017 12:16:20 -0400","from mail.kernel.org ([198.145.29.99]:58804 \"EHLO mail.kernel.org\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1750709AbdIJQQT (ORCPT );\n\tSun, 10 Sep 2017 12:16:19 -0400","from archlinux (cpc91196-cmbg18-2-0-cust659.5-4.cable.virginm.net\n\t[81.96.234.148])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby mail.kernel.org (Postfix) with ESMTPSA id 816B92190D;\n\tSun, 10 Sep 2017 16:16:16 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mail.kernel.org 816B92190D","Date":"Sun, 10 Sep 2017 17:16:13 +0100","From":"Jonathan Cameron ","To":"Lukas Wunner ","Cc":"Hartmut Knaack , Lars-Peter Clausen , \n\tPeter Meerwald-Stadler ,\n\tMathias Duckeck ,\n\tPhil Elwell , \n\tOskar Andero ,\n\tAndrea Galbusera , \n\tAkinobu Mita ,\n\tManfred Schlaegl ,\n\tMichael Welling ,\n\tSoeren Andersen ,\n\tlinux-iio@vger.kernel.org, devicetree@vger.kernel.org,\n\tRob Herring , Mark Rutland ","Subject":"Re: [PATCH v2 4/6] dt-bindings: iio: adc: mcp320x: Update for\n\tmcp3550/1/3","Message-ID":"<20170910171613.59df4c36@archlinux>","In-Reply-To":"","References":"\n\t","X-Mailer":"Claws Mail 3.15.1-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu)","MIME-Version":"1.0","Content-Type":"text/plain; charset=US-ASCII","Content-Transfer-Encoding":"7bit","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1770471,"web_url":"http://patchwork.ozlabs.org/comment/1770471/","msgid":"<20170918202705.xunpkrn7wllvzbp3@rob-hp-laptop>","list_archive_url":null,"date":"2017-09-18T20:27:05","subject":"Re: [PATCH v2 4/6] dt-bindings: iio: adc: mcp320x: Update for\n\tmcp3550/1/3","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Sat, Sep 09, 2017 at 08:32:41PM +0200, Lukas Wunner wrote:\n> All chips supported by this driver clock data out on the falling edge\n> and latch data in on the rising edge, hence SPI mode (0,0) or (1,1)\n> must be used.\n> \n> Furthermore, none of the chips has an internal reference voltage\n> regulator, so an external supply is always required and needs to be\n> specified in the device tree lest the IIO \"scale\" in sysfs cannot be\n> calculated.\n> \n> Document these requirements in the device tree binding, add compatible\n> strings for the newly supported mcp3550/1/3 and explain that SPI mode\n> (0,0) should be preferred for these chips.\n> \n> Cc: Mathias Duckeck \n> Signed-off-by: Lukas Wunner \n> ---\n> Changes since v1:\n> - Move support for continuous conversion mode to separate patch\n> which is marked informational / not for merging. (Rob, Jonathan)\n> \n> Documentation/devicetree/bindings/iio/adc/mcp320x.txt | 14 ++++++++++++++\n> 1 file changed, 14 insertions(+)\n\nAcked-by: Rob Herring \n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xwyGj4ZfLz9s7p\n\tfor ;\n\tTue, 19 Sep 2017 06:27:09 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1750768AbdIRU1I (ORCPT\n\t);\n\tMon, 18 Sep 2017 16:27:08 -0400","from mail-io0-f196.google.com ([209.85.223.196]:38724 \"EHLO\n\tmail-io0-f196.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750714AbdIRU1H (ORCPT\n\t); Mon, 18 Sep 2017 16:27:07 -0400","by mail-io0-f196.google.com with SMTP id e9so614099iod.5;\n\tMon, 18 Sep 2017 13:27:06 -0700 (PDT)","from localhost (216-188-254-6.dyn.grandenetworks.net.\n\t[216.188.254.6]) by smtp.gmail.com with ESMTPSA id\n\te8sm2641312oic.7.2017.09.18.13.27.05\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tMon, 18 Sep 2017 13:27:05 -0700 (PDT)"],"X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=R2lWkQnbe24LWuVoLrGzTkEuODgtNtAmgX26krzJoVE=;\n\tb=cRbCmWLBMcGULYYvIgAtNycKxFKIZ/6p8xa/+HK585FuzFOTaPDHpTkleCANM8XYSx\n\tygTriz9zomJs2i9/XzNDzBUe5HH4C0yVy7Rhrh0LEplmcS70NZezd+cINxrK2EI1R4U7\n\tJeStejV0tRUYrRSvsNtBpohAMSDSYaMQUGuf6EEMhyqLl+YLS7/c+TH4uU9gqoP0/Y6F\n\tiw5+7jO5bBNcYo/Lr54taSxd0BvokzK+S95gXKLuLsfrFEVvPMn87zTH2q2qRSovVvTu\n\tX8tdoYr0PZxViy9rIyNkeYjkcPYtN+3rVXJMF6/0Pw66Or58f9LX+Qel51zgvcdVIZnn\n\tUkjw==","X-Gm-Message-State":"AHPjjUha0/ky3j3TDGd3caESl7lZsmkuV3Lo3vd5c3H5KYMb94A8Xiw5\n\tm6na7nGpc486jQ==","X-Google-Smtp-Source":"AOwi7QAKlOeUXL904Svc+bKUzeDgk1Lg2Agv3SCMcmsJ4XjI5HT4N0fOcnQ6J+jH7C2PwLgnL+fqiA==","X-Received":"by 10.202.49.69 with SMTP id x66mr12303889oix.115.1505766426371; \n\tMon, 18 Sep 2017 13:27:06 -0700 (PDT)","Date":"Mon, 18 Sep 2017 15:27:05 -0500","From":"Rob Herring ","To":"Lukas Wunner ","Cc":"Jonathan Cameron , Hartmut Knaack ,\n\tLars-Peter Clausen ,\n\tPeter Meerwald-Stadler ,\n\tMathias Duckeck ,\n\tPhil Elwell , \n\tOskar Andero ,\n\tAndrea Galbusera , \n\tAkinobu Mita ,\n\tManfred Schlaegl ,\n\tMichael Welling ,\n\tSoeren Andersen ,\n\tlinux-iio@vger.kernel.org, devicetree@vger.kernel.org,\n\tMark Rutland ","Subject":"Re: [PATCH v2 4/6] dt-bindings: iio: adc: mcp320x: Update for\n\tmcp3550/1/3","Message-ID":"<20170918202705.xunpkrn7wllvzbp3@rob-hp-laptop>","References":"\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"","User-Agent":"NeoMutt/20170113 (1.7.2)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]