[{"id":1789115,"web_url":"http://patchwork.ozlabs.org/comment/1789115/","msgid":"<20171018152733.7f2702af@firefly.ozlabs.ibm.com>","date":"2017-10-18T04:27:33","subject":"Re: [PATCH 12/25] powerpc: ability to associate pkey to a vma","submitter":{"id":9347,"url":"http://patchwork.ozlabs.org/api/people/9347/","name":"Balbir Singh","email":"bsingharora@gmail.com"},"content":"On Fri, 8 Sep 2017 15:45:00 -0700\nRam Pai wrote:\n\n> arch-independent code expects the arch to map\n> a pkey into the vma's protection bit setting.\n> The patch provides that ability.\n> \n> Signed-off-by: Ram Pai \n> ---\n> arch/powerpc/include/asm/mman.h | 8 +++++++-\n> arch/powerpc/include/asm/pkeys.h | 18 ++++++++++++++++++\n> 2 files changed, 25 insertions(+), 1 deletions(-)\n> \n> diff --git a/arch/powerpc/include/asm/mman.h b/arch/powerpc/include/asm/mman.h\n> index 30922f6..067eec2 100644\n> --- a/arch/powerpc/include/asm/mman.h\n> +++ b/arch/powerpc/include/asm/mman.h\n> @@ -13,6 +13,7 @@\n> \n> #include \n> #include \n> +#include \n> #include \n> \n> /*\n> @@ -22,7 +23,12 @@\n> static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot,\n> \t\tunsigned long pkey)\n> {\n> -\treturn (prot & PROT_SAO) ? VM_SAO : 0;\n> +#ifdef CONFIG_PPC64_MEMORY_PROTECTION_KEYS\n> +\treturn (((prot & PROT_SAO) ? VM_SAO : 0) |\n> +\t\t\tpkey_to_vmflag_bits(pkey));\n> +#else\n> +\treturn ((prot & PROT_SAO) ? VM_SAO : 0);\n> +#endif\n> }\n> #define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey)\n> \n> diff --git a/arch/powerpc/include/asm/pkeys.h b/arch/powerpc/include/asm/pkeys.h\n> index 0cf115f..f13e913 100644\n> --- a/arch/powerpc/include/asm/pkeys.h\n> +++ b/arch/powerpc/include/asm/pkeys.h\n> @@ -23,6 +23,24 @@\n> #define VM_PKEY_BIT4\tVM_HIGH_ARCH_4\n> #endif\n> \n> +/* override any generic PKEY Permission defines */\n> +#define PKEY_DISABLE_EXECUTE 0x4\n> +#define PKEY_ACCESS_MASK (PKEY_DISABLE_ACCESS |\\\n> +\t\t\t\tPKEY_DISABLE_WRITE |\\\n> +\t\t\t\tPKEY_DISABLE_EXECUTE)\n> +\n> +static inline u64 pkey_to_vmflag_bits(u16 pkey)\n> +{\n> +\tif (!pkey_inited)\n> +\t\treturn 0x0UL;\n> +\n> +\treturn (((pkey & 0x1UL) ? VM_PKEY_BIT0 : 0x0UL) |\n> +\t\t((pkey & 0x2UL) ? VM_PKEY_BIT1 : 0x0UL) |\n> +\t\t((pkey & 0x4UL) ? VM_PKEY_BIT2 : 0x0UL) |\n> +\t\t((pkey & 0x8UL) ? VM_PKEY_BIT3 : 0x0UL) |\n> +\t\t((pkey & 0x10UL) ? VM_PKEY_BIT4 : 0x0UL));\n> +}\n\nAssuming that there is a linear order between VM_PKEY_BIT4 to\nVM_PKEY_BIT0, the conditional checks can be removed\n\n(pkey & 0x1fUL) << VM_PKEY_BIT0?\n\n\nBalbir Singh","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yGzbR3jy5z9t39\n\tfor ;\n\tWed, 18 Oct 2017 15:29:07 +1100 (AEDT)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3yGzbR2YCtzDrMt\n\tfor ;\n\tWed, 18 Oct 2017 15:29:07 +1100 (AEDT)","from mail-pf0-x241.google.com (mail-pf0-x241.google.com\n\t[IPv6:2607:f8b0:400e:c00::241])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3yGzYt0Bn8zDrD6\n\tfor ;\n\tWed, 18 Oct 2017 15:27:45 +1100 (AEDT)","by mail-pf0-x241.google.com with SMTP id e64so2988880pfk.9\n\tfor ;\n\tTue, 17 Oct 2017 21:27:45 -0700 (PDT)","from firefly.ozlabs.ibm.com ([122.99.82.10])\n\tby smtp.gmail.com with ESMTPSA id\n\tk7sm19863242pgc.4.2017.10.17.21.27.39\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tTue, 17 Oct 2017 21:27:43 -0700 (PDT)"],"Authentication-Results":["ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"oJB4BDc+\"; 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x86_64-redhat-linux-gnu)","MIME-Version":"1.0","Content-Type":"text/plain; charset=US-ASCII","Content-Transfer-Encoding":"7bit","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"ebiederm@xmission.com, mhocko@kernel.org, paulus@samba.org,\n\taneesh.kumar@linux.vnet.ibm.com, bauerman@linux.vnet.ibm.com,\n\tlinuxppc-dev@lists.ozlabs.org, khandual@linux.vnet.ibm.com","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1789968,"web_url":"http://patchwork.ozlabs.org/comment/1789968/","msgid":"<20171018210104.GH5617@ram.oc3035372033.ibm.com>","date":"2017-10-18T21:01:04","subject":"Re: [PATCH 12/25] powerpc: ability to associate pkey to a vma","submitter":{"id":2667,"url":"http://patchwork.ozlabs.org/api/people/2667/","name":"Ram Pai","email":"linuxram@us.ibm.com"},"content":"On Wed, Oct 18, 2017 at 03:27:33PM +1100, Balbir Singh wrote:\n> On Fri, 8 Sep 2017 15:45:00 -0700\n> Ram Pai wrote:\n> \n> > arch-independent code expects the arch to map\n> > a pkey into the vma's protection bit setting.\n> > The patch provides that ability.\n> > \n> > Signed-off-by: Ram Pai \n> > ---\n> > arch/powerpc/include/asm/mman.h | 8 +++++++-\n> > arch/powerpc/include/asm/pkeys.h | 18 ++++++++++++++++++\n> > 2 files changed, 25 insertions(+), 1 deletions(-)\n> > \n> > diff --git a/arch/powerpc/include/asm/mman.h b/arch/powerpc/include/asm/mman.h\n> > index 30922f6..067eec2 100644\n> > --- a/arch/powerpc/include/asm/mman.h\n> > +++ b/arch/powerpc/include/asm/mman.h\n> > @@ -13,6 +13,7 @@\n> > \n> > #include \n> > #include \n> > +#include \n> > #include \n> > \n> > /*\n> > @@ -22,7 +23,12 @@\n> > static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot,\n> > \t\tunsigned long pkey)\n> > {\n> > -\treturn (prot & PROT_SAO) ? VM_SAO : 0;\n> > +#ifdef CONFIG_PPC64_MEMORY_PROTECTION_KEYS\n> > +\treturn (((prot & PROT_SAO) ? VM_SAO : 0) |\n> > +\t\t\tpkey_to_vmflag_bits(pkey));\n> > +#else\n> > +\treturn ((prot & PROT_SAO) ? VM_SAO : 0);\n> > +#endif\n> > }\n> > #define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey)\n> > \n> > diff --git a/arch/powerpc/include/asm/pkeys.h b/arch/powerpc/include/asm/pkeys.h\n> > index 0cf115f..f13e913 100644\n> > --- a/arch/powerpc/include/asm/pkeys.h\n> > +++ b/arch/powerpc/include/asm/pkeys.h\n> > @@ -23,6 +23,24 @@\n> > #define VM_PKEY_BIT4\tVM_HIGH_ARCH_4\n> > #endif\n> > \n> > +/* override any generic PKEY Permission defines */\n> > +#define PKEY_DISABLE_EXECUTE 0x4\n> > +#define PKEY_ACCESS_MASK (PKEY_DISABLE_ACCESS |\\\n> > +\t\t\t\tPKEY_DISABLE_WRITE |\\\n> > +\t\t\t\tPKEY_DISABLE_EXECUTE)\n> > +\n> > +static inline u64 pkey_to_vmflag_bits(u16 pkey)\n> > +{\n> > +\tif (!pkey_inited)\n> > +\t\treturn 0x0UL;\n> > +\n> > +\treturn (((pkey & 0x1UL) ? VM_PKEY_BIT0 : 0x0UL) |\n> > +\t\t((pkey & 0x2UL) ? VM_PKEY_BIT1 : 0x0UL) |\n> > +\t\t((pkey & 0x4UL) ? VM_PKEY_BIT2 : 0x0UL) |\n> > +\t\t((pkey & 0x8UL) ? VM_PKEY_BIT3 : 0x0UL) |\n> > +\t\t((pkey & 0x10UL) ? VM_PKEY_BIT4 : 0x0UL));\n> > +}\n> \n> Assuming that there is a linear order between VM_PKEY_BIT4 to\n> VM_PKEY_BIT0, the conditional checks can be removed\n> \n> (pkey & 0x1fUL) << VM_PKEY_BIT0?\n\nyes. currently the are linear. But I am afraid it will break without\nnotice someday when someone decides to change the values of VM_PKEY_BITx to\nbe non-contiguous. I can put a BUILD_ASSERTION I suppose. But thought\nthis will be safe.\n\nRP\n\n> \n> \n> Balbir Singh","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yHPdq25brz9t75\n\tfor ;\n\tThu, 19 Oct 2017 08:02:39 +1100 (AEDT)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3yHPdq1GkhzDqgT\n\tfor ;\n\tThu, 19 Oct 2017 08:02:39 +1100 (AEDT)","from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com\n\t[148.163.156.1])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3yHPcD1F5vzDqF4\n\tfor ;\n\tThu, 19 Oct 2017 08:01:15 +1100 (AEDT)","from pps.filterd (m0098396.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv9IKwxm7021577\n\tfor ; Wed, 18 Oct 2017 17:01:14 -0400","from e17.ny.us.ibm.com (e17.ny.us.ibm.com [129.33.205.207])\n\tby mx0a-001b2d01.pphosted.com with ESMTP id 2dpayjued5-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor ; Wed, 18 Oct 2017 17:01:13 -0400","from localhost\n\tby e17.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! 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Violators will be prosecuted; \n\tWed, 18 Oct 2017 17:01:08 -0400","from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com\n\t[9.57.199.111])\n\tby b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP\n\tid v9IL0r5R49021098; Wed, 18 Oct 2017 21:01:08 GMT","from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 197ECAC04A;\n\tWed, 18 Oct 2017 17:01:50 -0400 (EDT)","from ram.oc3035372033.ibm.com (unknown [9.85.176.245])\n\tby b01ledav006.gho.pok.ibm.com (Postfix) with ESMTPS id E532BAC041;\n\tWed, 18 Oct 2017 17:01:48 -0400 (EDT)"],"Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=us.ibm.com\n\t(client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=linuxram@us.ibm.com; receiver=)","Date":"Wed, 18 Oct 2017 14:01:04 -0700","From":"Ram Pai ","To":"Balbir Singh ","Subject":"Re: [PATCH 12/25] powerpc: ability to associate pkey to a vma","References":"<1504910713-7094-1-git-send-email-linuxram@us.ibm.com>\n\t<1504910713-7094-21-git-send-email-linuxram@us.ibm.com>\n\t<20171018152733.7f2702af@firefly.ozlabs.ibm.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20171018152733.7f2702af@firefly.ozlabs.ibm.com>","User-Agent":"Mutt/1.5.20 (2009-12-10)","X-TM-AS-GCONF":"00","x-cbid":"17101821-0040-0000-0000-000003B4B195","X-IBM-SpamModules-Scores":"","X-IBM-SpamModules-Versions":"BY=3.00007916; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000237; SDB=6.00933062; UDB=6.00469933;\n\tIPR=6.00713353; \n\tBA=6.00005648; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017596;\n\tXFM=3.00000015; UTC=2017-10-18 21:01:10","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17101821-0041-0000-0000-000007A9B901","Message-Id":"<20171018210104.GH5617@ram.oc3035372033.ibm.com>","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-10-18_08:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1710180291","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Reply-To":"Ram Pai ","Cc":"ebiederm@xmission.com, mhocko@kernel.org, paulus@samba.org,\n\taneesh.kumar@linux.vnet.ibm.com, bauerman@linux.vnet.ibm.com,\n\tlinuxppc-dev@lists.ozlabs.org, khandual@linux.vnet.ibm.com","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}}]