[{"id":1789111,"web_url":"http://patchwork.ozlabs.org/comment/1789111/","msgid":"<20171018151522.4123fe34@firefly.ozlabs.ibm.com>","date":"2017-10-18T04:15:22","subject":"Re: [PATCH 11/25] powerpc: introduce execute-only pkey","submitter":{"id":9347,"url":"http://patchwork.ozlabs.org/api/people/9347/","name":"Balbir Singh","email":"bsingharora@gmail.com"},"content":"On Fri, 8 Sep 2017 15:44:59 -0700\nRam Pai wrote:\n\n> This patch provides the implementation of execute-only pkey.\n> The architecture-independent layer expects the arch-dependent\n> layer, to support the ability to create and enable a special\n> key which has execute-only permission.\n> \n> Signed-off-by: Ram Pai \n> ---\n> arch/powerpc/include/asm/book3s/64/mmu.h | 1 +\n> arch/powerpc/include/asm/pkeys.h | 9 ++++-\n> arch/powerpc/mm/pkeys.c | 57 ++++++++++++++++++++++++++++++\n> 3 files changed, 66 insertions(+), 1 deletions(-)\n> \n> diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h\n> index 55950f4..ee18ba0 100644\n> --- a/arch/powerpc/include/asm/book3s/64/mmu.h\n> +++ b/arch/powerpc/include/asm/book3s/64/mmu.h\n> @@ -115,6 +115,7 @@ struct patb_entry {\n> \t * bit unset -> key available for allocation\n> \t */\n> \tu32 pkey_allocation_map;\n> +\ts16 execute_only_pkey; /* key holding execute-only protection */\n> #endif\n> } mm_context_t;\n> \n> diff --git a/arch/powerpc/include/asm/pkeys.h b/arch/powerpc/include/asm/pkeys.h\n> index 78c5362..0cf115f 100644\n> --- a/arch/powerpc/include/asm/pkeys.h\n> +++ b/arch/powerpc/include/asm/pkeys.h\n> @@ -115,11 +115,16 @@ static inline int mm_pkey_free(struct mm_struct *mm, int pkey)\n> * Try to dedicate one of the protection keys to be used as an\n> * execute-only protection key.\n> */\n> +extern int __execute_only_pkey(struct mm_struct *mm);\n> static inline int execute_only_pkey(struct mm_struct *mm)\n> {\n> -\treturn 0;\n> +\tif (!pkey_inited || !pkey_execute_disable_support)\n> +\t\treturn -1;\n> +\n> +\treturn __execute_only_pkey(mm);\n> }\n> \n> +\n> static inline int arch_override_mprotect_pkey(struct vm_area_struct *vma,\n> \t\tint prot, int pkey)\n> {\n> @@ -141,6 +146,8 @@ static inline void pkey_mm_init(struct mm_struct *mm)\n> \tif (!pkey_inited)\n> \t\treturn;\n> \tmm_pkey_allocation_map(mm) = initial_allocation_mask;\n> +\t/* -1 means unallocated or invalid */\n> +\tmm->context.execute_only_pkey = -1;\n> }\n> \n> extern void thread_pkey_regs_save(struct thread_struct *thread);\n> diff --git a/arch/powerpc/mm/pkeys.c b/arch/powerpc/mm/pkeys.c\n> index 7cd1be4..8a24983 100644\n> --- a/arch/powerpc/mm/pkeys.c\n> +++ b/arch/powerpc/mm/pkeys.c\n> @@ -188,3 +188,60 @@ void thread_pkey_regs_init(struct thread_struct *thread)\n> \twrite_iamr(0x0ul);\n> \twrite_uamor(0x0ul);\n> }\n> +\n> +static inline bool pkey_allows_readwrite(int pkey)\n> +{\n> +\tint pkey_shift = pkeyshift(pkey);\n> +\n> +\tif (!(read_uamor() & (0x3UL << pkey_shift)))\n> +\t\treturn true;\n\nIf uamor for key 0 is 0x10 for example or 0x01 it's a bug.\nThe above check might miss it.\n\n> +\n> +\treturn !(read_amr() & ((AMR_RD_BIT|AMR_WR_BIT) << pkey_shift));\n> +}\n> +\n> +int __execute_only_pkey(struct mm_struct *mm)\n> +{\n> +\tbool need_to_set_mm_pkey = false;\n> +\tint execute_only_pkey = mm->context.execute_only_pkey;\n> +\tint ret;\n> +\n> +\t/* Do we need to assign a pkey for mm's execute-only maps? */\n> +\tif (execute_only_pkey == -1) {\n> +\t\t/* Go allocate one to use, which might fail */\n> +\t\texecute_only_pkey = mm_pkey_alloc(mm);\n> +\t\tif (execute_only_pkey < 0)\n> +\t\t\treturn -1;\n> +\t\tneed_to_set_mm_pkey = true;\n> +\t}\n> +\n> +\t/*\n> +\t * We do not want to go through the relatively costly\n> +\t * dance to set AMR if we do not need to. Check it\n> +\t * first and assume that if the execute-only pkey is\n> +\t * readwrite-disabled than we do not have to set it\n> +\t * ourselves.\n> +\t */\n> +\tif (!need_to_set_mm_pkey &&\n> +\t !pkey_allows_readwrite(execute_only_pkey))\n> +\t\treturn execute_only_pkey;\n> +\n> +\t/*\n> +\t * Set up AMR so that it denies access for everything\n> +\t * other than execution.\n> +\t */\n> +\tret = __arch_set_user_pkey_access(current, execute_only_pkey,\n> +\t\t\t(PKEY_DISABLE_ACCESS | PKEY_DISABLE_WRITE));\n> +\t/*\n> +\t * If the AMR-set operation failed somehow, just return\n> +\t * 0 and effectively disable execute-only support.\n> +\t */\n> +\tif (ret) {\n> +\t\tmm_set_pkey_free(mm, execute_only_pkey);\n> +\t\treturn -1;\n> +\t}\n> +\n> +\t/* We got one, store it and use it from here on out */\n> +\tif (need_to_set_mm_pkey)\n> +\t\tmm->context.execute_only_pkey = execute_only_pkey;\n> +\treturn execute_only_pkey;\n> +}\n\nLooks good otherwise\n\nAcked-by: Balbir Singh ","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yGzKS3VBXz9t1G\n\tfor ;\n\tWed, 18 Oct 2017 15:17:00 +1100 (AEDT)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3yGzKS2Dx6zDrMx\n\tfor ;\n\tWed, 18 Oct 2017 15:17:00 +1100 (AEDT)","from mail-pg0-x241.google.com (mail-pg0-x241.google.com\n\t[IPv6:2607:f8b0:400e:c05::241])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3yGzHq05DpzDrD6\n\tfor ;\n\tWed, 18 Oct 2017 15:15:34 +1100 (AEDT)","by mail-pg0-x241.google.com with SMTP id v78so3205174pgb.5\n\tfor ;\n\tTue, 17 Oct 2017 21:15:34 -0700 (PDT)","from firefly.ozlabs.ibm.com ([122.99.82.10])\n\tby smtp.gmail.com with ESMTPSA id\n\t204sm4572058pfu.8.2017.10.17.21.15.28\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tTue, 17 Oct 2017 21:15:32 -0700 (PDT)"],"Authentication-Results":["ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"aa3dEF/4\"; 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x86_64-redhat-linux-gnu)","MIME-Version":"1.0","Content-Type":"text/plain; charset=US-ASCII","Content-Transfer-Encoding":"7bit","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"ebiederm@xmission.com, mhocko@kernel.org, paulus@samba.org,\n\taneesh.kumar@linux.vnet.ibm.com, bauerman@linux.vnet.ibm.com,\n\tlinuxppc-dev@lists.ozlabs.org, khandual@linux.vnet.ibm.com","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1789965,"web_url":"http://patchwork.ozlabs.org/comment/1789965/","msgid":"<20171018205739.GG5617@ram.oc3035372033.ibm.com>","date":"2017-10-18T20:57:39","subject":"Re: [PATCH 11/25] powerpc: introduce execute-only pkey","submitter":{"id":2667,"url":"http://patchwork.ozlabs.org/api/people/2667/","name":"Ram Pai","email":"linuxram@us.ibm.com"},"content":"On Wed, Oct 18, 2017 at 03:15:22PM +1100, Balbir Singh wrote:\n> On Fri, 8 Sep 2017 15:44:59 -0700\n> Ram Pai wrote:\n> \n> > This patch provides the implementation of execute-only pkey.\n> > The architecture-independent layer expects the arch-dependent\n> > layer, to support the ability to create and enable a special\n> > key which has execute-only permission.\n> > \n> > Signed-off-by: Ram Pai \n> > ---\n> > arch/powerpc/include/asm/book3s/64/mmu.h | 1 +\n> > arch/powerpc/include/asm/pkeys.h | 9 ++++-\n> > arch/powerpc/mm/pkeys.c | 57 ++++++++++++++++++++++++++++++\n> > 3 files changed, 66 insertions(+), 1 deletions(-)\n> > \n> > diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h\n> > index 55950f4..ee18ba0 100644\n> > --- a/arch/powerpc/include/asm/book3s/64/mmu.h\n> > +++ b/arch/powerpc/include/asm/book3s/64/mmu.h\n> > @@ -115,6 +115,7 @@ struct patb_entry {\n> > \t * bit unset -> key available for allocation\n> > \t */\n> > \tu32 pkey_allocation_map;\n> > +\ts16 execute_only_pkey; /* key holding execute-only protection */\n> > #endif\n> > } mm_context_t;\n> > \n> > diff --git a/arch/powerpc/include/asm/pkeys.h b/arch/powerpc/include/asm/pkeys.h\n> > index 78c5362..0cf115f 100644\n> > --- a/arch/powerpc/include/asm/pkeys.h\n> > +++ b/arch/powerpc/include/asm/pkeys.h\n> > @@ -115,11 +115,16 @@ static inline int mm_pkey_free(struct mm_struct *mm, int pkey)\n> > * Try to dedicate one of the protection keys to be used as an\n> > * execute-only protection key.\n> > */\n> > +extern int __execute_only_pkey(struct mm_struct *mm);\n> > static inline int execute_only_pkey(struct mm_struct *mm)\n> > {\n> > -\treturn 0;\n> > +\tif (!pkey_inited || !pkey_execute_disable_support)\n> > +\t\treturn -1;\n> > +\n> > +\treturn __execute_only_pkey(mm);\n> > }\n> > \n> > +\n> > static inline int arch_override_mprotect_pkey(struct vm_area_struct *vma,\n> > \t\tint prot, int pkey)\n> > {\n> > @@ -141,6 +146,8 @@ static inline void pkey_mm_init(struct mm_struct *mm)\n> > \tif (!pkey_inited)\n> > \t\treturn;\n> > \tmm_pkey_allocation_map(mm) = initial_allocation_mask;\n> > +\t/* -1 means unallocated or invalid */\n> > +\tmm->context.execute_only_pkey = -1;\n> > }\n> > \n> > extern void thread_pkey_regs_save(struct thread_struct *thread);\n> > diff --git a/arch/powerpc/mm/pkeys.c b/arch/powerpc/mm/pkeys.c\n> > index 7cd1be4..8a24983 100644\n> > --- a/arch/powerpc/mm/pkeys.c\n> > +++ b/arch/powerpc/mm/pkeys.c\n> > @@ -188,3 +188,60 @@ void thread_pkey_regs_init(struct thread_struct *thread)\n> > \twrite_iamr(0x0ul);\n> > \twrite_uamor(0x0ul);\n> > }\n> > +\n> > +static inline bool pkey_allows_readwrite(int pkey)\n> > +{\n> > +\tint pkey_shift = pkeyshift(pkey);\n> > +\n> > +\tif (!(read_uamor() & (0x3UL << pkey_shift)))\n> > +\t\treturn true;\n> \n> If uamor for key 0 is 0x10 for example or 0x01 it's a bug.\n> The above check might miss it.\n\n\nThe specs says both the bits corresponding to a key are set or\nreset, cannot be anything else.\n\ncut-n-paste from the ISA...\n----------------------------------------------------\nSoftware must ensure that both bits of each even/odd\nbit pair of the AMOR contain the same value. -- i.e.,\nthe contents of register RS for mtspr specifying the\nAMOR must be such that (RS)2n = (RS)2n+1 for every\nn in the range 0:31 - and like for the UAMOR.\n---------------------------------------------------------\n\n> \n> > +\n> > +\treturn !(read_amr() & ((AMR_RD_BIT|AMR_WR_BIT) << pkey_shift));\n> > +}\n> > +\n> > +int __execute_only_pkey(struct mm_struct *mm)\n> > +{\n> > +\tbool need_to_set_mm_pkey = false;\n> > +\tint execute_only_pkey = mm->context.execute_only_pkey;\n> > +\tint ret;\n> > +\n> > +\t/* Do we need to assign a pkey for mm's execute-only maps? */\n> > +\tif (execute_only_pkey == -1) {\n> > +\t\t/* Go allocate one to use, which might fail */\n> > +\t\texecute_only_pkey = mm_pkey_alloc(mm);\n> > +\t\tif (execute_only_pkey < 0)\n> > +\t\t\treturn -1;\n> > +\t\tneed_to_set_mm_pkey = true;\n> > +\t}\n> > +\n> > +\t/*\n> > +\t * We do not want to go through the relatively costly\n> > +\t * dance to set AMR if we do not need to. Check it\n> > +\t * first and assume that if the execute-only pkey is\n> > +\t * readwrite-disabled than we do not have to set it\n> > +\t * ourselves.\n> > +\t */\n> > +\tif (!need_to_set_mm_pkey &&\n> > +\t !pkey_allows_readwrite(execute_only_pkey))\n> > +\t\treturn execute_only_pkey;\n> > +\n> > +\t/*\n> > +\t * Set up AMR so that it denies access for everything\n> > +\t * other than execution.\n> > +\t */\n> > +\tret = __arch_set_user_pkey_access(current, execute_only_pkey,\n> > +\t\t\t(PKEY_DISABLE_ACCESS | PKEY_DISABLE_WRITE));\n> > +\t/*\n> > +\t * If the AMR-set operation failed somehow, just return\n> > +\t * 0 and effectively disable execute-only support.\n> > +\t */\n> > +\tif (ret) {\n> > +\t\tmm_set_pkey_free(mm, execute_only_pkey);\n> > +\t\treturn -1;\n> > +\t}\n> > +\n> > +\t/* We got one, store it and use it from here on out */\n> > +\tif (need_to_set_mm_pkey)\n> > +\t\tmm->context.execute_only_pkey = execute_only_pkey;\n> > +\treturn execute_only_pkey;\n> > +}\n> \n> Looks good otherwise\n> \n> Acked-by: Balbir Singh \n\nthanks.","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yHPYh66Kzz9t6m\n\tfor ;\n\tThu, 19 Oct 2017 07:59:04 +1100 (AEDT)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3yHPYh52kBzDqkr\n\tfor ;\n\tThu, 19 Oct 2017 07:59:04 +1100 (AEDT)","from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com\n\t[148.163.156.1])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3yHPXF4hLszDqF4\n\tfor ;\n\tThu, 19 Oct 2017 07:57:49 +1100 (AEDT)","from pps.filterd (m0098393.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv9IKtN5Y073383\n\tfor ; Wed, 18 Oct 2017 16:57:47 -0400","from e33.co.us.ibm.com (e33.co.us.ibm.com [32.97.110.151])\n\tby mx0a-001b2d01.pphosted.com with ESMTP id 2dpcwd4y1v-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor ; Wed, 18 Oct 2017 16:57:47 -0400","from localhost\n\tby e33.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! 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Violators will be prosecuted; \n\tWed, 18 Oct 2017 14:57:44 -0600","from b03ledav005.gho.boulder.ibm.com\n\t(b03ledav005.gho.boulder.ibm.com [9.17.130.236])\n\tby b03cxnp07029.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with\n\tESMTP id v9IKvhFi8454500; Wed, 18 Oct 2017 13:57:43 -0700","from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 7B819BE03E;\n\tWed, 18 Oct 2017 14:57:43 -0600 (MDT)","from ram.oc3035372033.ibm.com (unknown [9.85.176.245])\n\tby b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTPS id\n\tA2F09BE03A; Wed, 18 Oct 2017 14:57:41 -0600 (MDT)"],"Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=us.ibm.com\n\t(client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=linuxram@us.ibm.com; receiver=)","Date":"Wed, 18 Oct 2017 13:57:39 -0700","From":"Ram Pai ","To":"Balbir Singh ","Subject":"Re: [PATCH 11/25] powerpc: introduce execute-only pkey","References":"<1504910713-7094-1-git-send-email-linuxram@us.ibm.com>\n\t<1504910713-7094-20-git-send-email-linuxram@us.ibm.com>\n\t<20171018151522.4123fe34@firefly.ozlabs.ibm.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20171018151522.4123fe34@firefly.ozlabs.ibm.com>","User-Agent":"Mutt/1.5.20 (2009-12-10)","X-TM-AS-GCONF":"00","x-cbid":"17101820-0008-0000-0000-000008BB4FD5","X-IBM-SpamModules-Scores":"","X-IBM-SpamModules-Versions":"BY=3.00007915; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000237; SDB=6.00933061; UDB=6.00469932;\n\tIPR=6.00713352; \n\tBA=6.00005648; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017596;\n\tXFM=3.00000015; UTC=2017-10-18 20:57:45","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17101820-0009-0000-0000-0000446ABC92","Message-Id":"<20171018205739.GG5617@ram.oc3035372033.ibm.com>","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-10-18_08:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=2\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1710180290","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Reply-To":"Ram Pai ","Cc":"ebiederm@xmission.com, mhocko@kernel.org, paulus@samba.org,\n\taneesh.kumar@linux.vnet.ibm.com, bauerman@linux.vnet.ibm.com,\n\tlinuxppc-dev@lists.ozlabs.org, khandual@linux.vnet.ibm.com","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1790031,"web_url":"http://patchwork.ozlabs.org/comment/1790031/","msgid":"<20171019100213.421a76fe@MiWiFi-R3-srv>","date":"2017-10-18T23:02:13","subject":"Re: [PATCH 11/25] powerpc: introduce execute-only pkey","submitter":{"id":9347,"url":"http://patchwork.ozlabs.org/api/people/9347/","name":"Balbir Singh","email":"bsingharora@gmail.com"},"content":"On Wed, 18 Oct 2017 13:57:39 -0700\nRam Pai wrote:\n\n> On Wed, Oct 18, 2017 at 03:15:22PM +1100, Balbir Singh wrote:\n> > On Fri, 8 Sep 2017 15:44:59 -0700\n> > Ram Pai wrote:\n> > \n> > > This patch provides the implementation of execute-only pkey.\n> > > The architecture-independent layer expects the arch-dependent\n> > > layer, to support the ability to create and enable a special\n> > > key which has execute-only permission.\n> > > \n> > > Signed-off-by: Ram Pai \n> > > ---\n> > > arch/powerpc/include/asm/book3s/64/mmu.h | 1 +\n> > > arch/powerpc/include/asm/pkeys.h | 9 ++++-\n> > > arch/powerpc/mm/pkeys.c | 57 ++++++++++++++++++++++++++++++\n> > > 3 files changed, 66 insertions(+), 1 deletions(-)\n> > > \n> > > diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h\n> > > index 55950f4..ee18ba0 100644\n> > > --- a/arch/powerpc/include/asm/book3s/64/mmu.h\n> > > +++ b/arch/powerpc/include/asm/book3s/64/mmu.h\n> > > @@ -115,6 +115,7 @@ struct patb_entry {\n> > > \t * bit unset -> key available for allocation\n> > > \t */\n> > > \tu32 pkey_allocation_map;\n> > > +\ts16 execute_only_pkey; /* key holding execute-only protection */\n> > > #endif\n> > > } mm_context_t;\n> > > \n> > > diff --git a/arch/powerpc/include/asm/pkeys.h b/arch/powerpc/include/asm/pkeys.h\n> > > index 78c5362..0cf115f 100644\n> > > --- a/arch/powerpc/include/asm/pkeys.h\n> > > +++ b/arch/powerpc/include/asm/pkeys.h\n> > > @@ -115,11 +115,16 @@ static inline int mm_pkey_free(struct mm_struct *mm, int pkey)\n> > > * Try to dedicate one of the protection keys to be used as an\n> > > * execute-only protection key.\n> > > */\n> > > +extern int __execute_only_pkey(struct mm_struct *mm);\n> > > static inline int execute_only_pkey(struct mm_struct *mm)\n> > > {\n> > > -\treturn 0;\n> > > +\tif (!pkey_inited || !pkey_execute_disable_support)\n> > > +\t\treturn -1;\n> > > +\n> > > +\treturn __execute_only_pkey(mm);\n> > > }\n> > > \n> > > +\n> > > static inline int arch_override_mprotect_pkey(struct vm_area_struct *vma,\n> > > \t\tint prot, int pkey)\n> > > {\n> > > @@ -141,6 +146,8 @@ static inline void pkey_mm_init(struct mm_struct *mm)\n> > > \tif (!pkey_inited)\n> > > \t\treturn;\n> > > \tmm_pkey_allocation_map(mm) = initial_allocation_mask;\n> > > +\t/* -1 means unallocated or invalid */\n> > > +\tmm->context.execute_only_pkey = -1;\n> > > }\n> > > \n> > > extern void thread_pkey_regs_save(struct thread_struct *thread);\n> > > diff --git a/arch/powerpc/mm/pkeys.c b/arch/powerpc/mm/pkeys.c\n> > > index 7cd1be4..8a24983 100644\n> > > --- a/arch/powerpc/mm/pkeys.c\n> > > +++ b/arch/powerpc/mm/pkeys.c\n> > > @@ -188,3 +188,60 @@ void thread_pkey_regs_init(struct thread_struct *thread)\n> > > \twrite_iamr(0x0ul);\n> > > \twrite_uamor(0x0ul);\n> > > }\n> > > +\n> > > +static inline bool pkey_allows_readwrite(int pkey)\n> > > +{\n> > > +\tint pkey_shift = pkeyshift(pkey);\n> > > +\n> > > +\tif (!(read_uamor() & (0x3UL << pkey_shift)))\n> > > +\t\treturn true; \n> > \n> > If uamor for key 0 is 0x10 for example or 0x01 it's a bug.\n> > The above check might miss it. \n> \n> \n> The specs says both the bits corresponding to a key are set or\n> reset, cannot be anything else.\n>\n\nI agree, thats why I said it's a bug if the values are such.\nDo we care to validate that both bits are the same?\n\nBalbir Singh.","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yHSMC0rdCz9t4P\n\tfor ;\n\tThu, 19 Oct 2017 10:05:11 +1100 (AEDT)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3yHSMB6llbzDqBc\n\tfor ;\n\tThu, 19 Oct 2017 10:05:10 +1100 (AEDT)","from mail-pg0-x242.google.com (mail-pg0-x242.google.com\n\t[IPv6:2607:f8b0:400e:c05::242])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3yHSJ05yZczDqFv\n\tfor ;\n\tThu, 19 Oct 2017 10:02:24 +1100 (AEDT)","by mail-pg0-x242.google.com with SMTP id g6so5486704pgn.6\n\tfor ;\n\tWed, 18 Oct 2017 16:02:24 -0700 (PDT)","from MiWiFi-R3-srv ([122.99.82.10])\n\tby smtp.gmail.com with ESMTPSA id\n\tj1sm25502534pfj.108.2017.10.18.16.02.18\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tWed, 18 Oct 2017 16:02:22 -0700 (PDT)"],"Authentication-Results":["ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"KpHJnVns\"; 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x86_64-redhat-linux-gnu)","MIME-Version":"1.0","Content-Type":"text/plain; charset=US-ASCII","Content-Transfer-Encoding":"7bit","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"ebiederm@xmission.com, mhocko@kernel.org, paulus@samba.org,\n\taneesh.kumar@linux.vnet.ibm.com, bauerman@linux.vnet.ibm.com,\n\tlinuxppc-dev@lists.ozlabs.org, khandual@linux.vnet.ibm.com","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1790720,"web_url":"http://patchwork.ozlabs.org/comment/1790720/","msgid":"<20171019155255.GR5617@ram.oc3035372033.ibm.com>","date":"2017-10-19T15:52:55","subject":"Re: [PATCH 11/25] powerpc: introduce execute-only pkey","submitter":{"id":2667,"url":"http://patchwork.ozlabs.org/api/people/2667/","name":"Ram Pai","email":"linuxram@us.ibm.com"},"content":"On Thu, Oct 19, 2017 at 10:02:13AM +1100, Balbir Singh wrote:\n> On Wed, 18 Oct 2017 13:57:39 -0700\n> Ram Pai wrote:\n> \n> > On Wed, Oct 18, 2017 at 03:15:22PM +1100, Balbir Singh wrote:\n> > > On Fri, 8 Sep 2017 15:44:59 -0700\n> > > Ram Pai wrote:\n> > > \n> > > > This patch provides the implementation of execute-only pkey.\n> > > > The architecture-independent layer expects the arch-dependent\n> > > > layer, to support the ability to create and enable a special\n> > > > key which has execute-only permission.\n> > > > \n> > > > Signed-off-by: Ram Pai \n> > > > ---\n> > > > arch/powerpc/include/asm/book3s/64/mmu.h | 1 +\n> > > > arch/powerpc/include/asm/pkeys.h | 9 ++++-\n> > > > arch/powerpc/mm/pkeys.c | 57 ++++++++++++++++++++++++++++++\n> > > > 3 files changed, 66 insertions(+), 1 deletions(-)\n> > > > \n> > > > diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h\n> > > > index 55950f4..ee18ba0 100644\n> > > > --- a/arch/powerpc/include/asm/book3s/64/mmu.h\n> > > > +++ b/arch/powerpc/include/asm/book3s/64/mmu.h\n> > > > @@ -115,6 +115,7 @@ struct patb_entry {\n> > > > \t * bit unset -> key available for allocation\n> > > > \t */\n> > > > \tu32 pkey_allocation_map;\n> > > > +\ts16 execute_only_pkey; /* key holding execute-only protection */\n> > > > #endif\n> > > > } mm_context_t;\n> > > > \n> > > > diff --git a/arch/powerpc/include/asm/pkeys.h b/arch/powerpc/include/asm/pkeys.h\n> > > > index 78c5362..0cf115f 100644\n> > > > --- a/arch/powerpc/include/asm/pkeys.h\n> > > > +++ b/arch/powerpc/include/asm/pkeys.h\n> > > > @@ -115,11 +115,16 @@ static inline int mm_pkey_free(struct mm_struct *mm, int pkey)\n> > > > * Try to dedicate one of the protection keys to be used as an\n> > > > * execute-only protection key.\n> > > > */\n> > > > +extern int __execute_only_pkey(struct mm_struct *mm);\n> > > > static inline int execute_only_pkey(struct mm_struct *mm)\n> > > > {\n> > > > -\treturn 0;\n> > > > +\tif (!pkey_inited || !pkey_execute_disable_support)\n> > > > +\t\treturn -1;\n> > > > +\n> > > > +\treturn __execute_only_pkey(mm);\n> > > > }\n> > > > \n> > > > +\n> > > > static inline int arch_override_mprotect_pkey(struct vm_area_struct *vma,\n> > > > \t\tint prot, int pkey)\n> > > > {\n> > > > @@ -141,6 +146,8 @@ static inline void pkey_mm_init(struct mm_struct *mm)\n> > > > \tif (!pkey_inited)\n> > > > \t\treturn;\n> > > > \tmm_pkey_allocation_map(mm) = initial_allocation_mask;\n> > > > +\t/* -1 means unallocated or invalid */\n> > > > +\tmm->context.execute_only_pkey = -1;\n> > > > }\n> > > > \n> > > > extern void thread_pkey_regs_save(struct thread_struct *thread);\n> > > > diff --git a/arch/powerpc/mm/pkeys.c b/arch/powerpc/mm/pkeys.c\n> > > > index 7cd1be4..8a24983 100644\n> > > > --- a/arch/powerpc/mm/pkeys.c\n> > > > +++ b/arch/powerpc/mm/pkeys.c\n> > > > @@ -188,3 +188,60 @@ void thread_pkey_regs_init(struct thread_struct *thread)\n> > > > \twrite_iamr(0x0ul);\n> > > > \twrite_uamor(0x0ul);\n> > > > }\n> > > > +\n> > > > +static inline bool pkey_allows_readwrite(int pkey)\n> > > > +{\n> > > > +\tint pkey_shift = pkeyshift(pkey);\n> > > > +\n> > > > +\tif (!(read_uamor() & (0x3UL << pkey_shift)))\n> > > > +\t\treturn true; \n> > > \n> > > If uamor for key 0 is 0x10 for example or 0x01 it's a bug.\n> > > The above check might miss it. \n> > \n> > \n> > The specs says both the bits corresponding to a key are set or\n> > reset, cannot be anything else.\n> >\n> \n> I agree, thats why I said it's a bug if the values are such.\n> Do we care to validate that both bits are the same?\n\nI will put in a assert. Will that work?\n\nRP\n\n> \n> Balbir Singh.","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yHtld2RNcz9t48\n\tfor ;\n\tFri, 20 Oct 2017 02:54:21 +1100 (AEDT)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3yHtld1ZL8zDqYb\n\tfor ;\n\tFri, 20 Oct 2017 02:54:21 +1100 (AEDT)","from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com\n\t[148.163.156.1])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3yHtkD4WjWzDq5W\n\tfor ;\n\tFri, 20 Oct 2017 02:53:08 +1100 (AEDT)","from pps.filterd (m0098396.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv9JFnG5p011308\n\tfor ; Thu, 19 Oct 2017 11:53:05 -0400","from e14.ny.us.ibm.com (e14.ny.us.ibm.com [129.33.205.204])\n\tby mx0a-001b2d01.pphosted.com with ESMTP id 2dpx2mc28f-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor ; Thu, 19 Oct 2017 11:53:05 -0400","from localhost\n\tby e14.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! 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Violators will be prosecuted; \n\tThu, 19 Oct 2017 11:53:00 -0400","from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com\n\t[9.57.199.109])\n\tby b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP\n\tid v9JFqepT46399536; Thu, 19 Oct 2017 15:52:59 GMT","from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 35EC511204B;\n\tThu, 19 Oct 2017 11:52:32 -0400 (EDT)","from ram.oc3035372033.ibm.com (unknown [9.85.176.245])\n\tby b01ledav004.gho.pok.ibm.com (Postfix) with ESMTPS id 0C876112065; \n\tThu, 19 Oct 2017 11:52:30 -0400 (EDT)"],"Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=us.ibm.com\n\t(client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=linuxram@us.ibm.com; receiver=)","Date":"Thu, 19 Oct 2017 08:52:55 -0700","From":"Ram Pai ","To":"Balbir Singh ","Subject":"Re: [PATCH 11/25] powerpc: introduce execute-only pkey","References":"<1504910713-7094-1-git-send-email-linuxram@us.ibm.com>\n\t<1504910713-7094-20-git-send-email-linuxram@us.ibm.com>\n\t<20171018151522.4123fe34@firefly.ozlabs.ibm.com>\n\t<20171018205739.GG5617@ram.oc3035372033.ibm.com>\n\t<20171019100213.421a76fe@MiWiFi-R3-srv>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20171019100213.421a76fe@MiWiFi-R3-srv>","User-Agent":"Mutt/1.5.20 (2009-12-10)","X-TM-AS-GCONF":"00","x-cbid":"17101915-0052-0000-0000-0000027453E9","X-IBM-SpamModules-Scores":"","X-IBM-SpamModules-Versions":"BY=3.00007919; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000238; SDB=6.00933437; UDB=6.00470158;\n\tIPR=6.00713725; \n\tBA=6.00005651; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017608;\n\tXFM=3.00000015; UTC=2017-10-19 15:53:02","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17101915-0053-0000-0000-0000525EF5EC","Message-Id":"<20171019155255.GR5617@ram.oc3035372033.ibm.com>","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-10-19_05:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=2\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1710190219","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Reply-To":"Ram Pai ","Cc":"ebiederm@xmission.com, mhocko@kernel.org, paulus@samba.org,\n\taneesh.kumar@linux.vnet.ibm.com, bauerman@linux.vnet.ibm.com,\n\tlinuxppc-dev@lists.ozlabs.org, khandual@linux.vnet.ibm.com","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}}]