[{"id":1767833,"web_url":"http://patchwork.ozlabs.org/comment/1767833/","msgid":"<14fb5261-bb03-a6bd-6653-2a2c655b04ee@microchip.com>","list_archive_url":null,"date":"2017-09-13T12:15:30","subject":"Re: [PATCH v1 01/10] clk: at91: pmc: Wait for clocks when resuming","submitter":{"id":71036,"url":"http://patchwork.ozlabs.org/api/people/71036/","name":"Nicolas Ferre","email":"nicolas.ferre@microchip.com"},"content":"On 08/09/2017 at 17:35, Romain Izard wrote:\n> Wait for the syncronization of all clocks when resuming, not only the\n> UPLL clock. Do not use regmap_read_poll_timeout, as it will call BUG()\n> when interrupts are masked, which is the case in here.\n> \n> Signed-off-by: Romain Izard \n> ---\n> drivers/clk/at91/pmc.c | 24 ++++++++++++++++--------\n> 1 file changed, 16 insertions(+), 8 deletions(-)\n> \n> diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c\n> index 775af473fe11..5c2b26de303e 100644\n> --- a/drivers/clk/at91/pmc.c\n> +++ b/drivers/clk/at91/pmc.c\n> @@ -107,10 +107,20 @@ static int pmc_suspend(void)\n> \treturn 0;\n> }\n> \n> +static bool pmc_ready(unsigned int mask)\n> +{\n> +\tunsigned int status;\n> +\n> +\tregmap_read(pmcreg, AT91_PMC_SR, &status);\n> +\n> +\treturn ((status & mask) == mask) ? 1 : 0;\n> +}\n> +\n> static void pmc_resume(void)\n> {\n> -\tint i, ret = 0;\n> +\tint i;\n> \tu32 tmp;\n> +\tu32 mask = AT91_PMC_MCKRDY | AT91_PMC_LOCKA;\n> \n> \tregmap_read(pmcreg, AT91_PMC_MCKR, &tmp);\n> \tif (pmc_cache.mckr != tmp)\n> @@ -134,13 +144,11 @@ static void pmc_resume(void)\n> \t\t\t AT91_PMC_PCR_CMD);\n> \t}\n> \n> -\tif (pmc_cache.uckr & AT91_PMC_UPLLEN) {\n> -\t\tret = regmap_read_poll_timeout(pmcreg, AT91_PMC_SR, tmp,\n> -\t\t\t\t\t !(tmp & AT91_PMC_LOCKU),\n> -\t\t\t\t\t 10, 5000);\n> -\t\tif (ret)\n> -\t\t\tpr_crit(\"USB PLL didn't lock when resuming\\n\");\n> -\t}\n> +\tif (pmc_cache.uckr & AT91_PMC_UPLLEN)\n> +\t\tmask |= AT91_PMC_LOCKU;\n> +\n> +\twhile (!pmc_ready(mask))\n> +\t\tcpu_relax();\n\nOkay, but I would prefer to keep the timeout property in it. So we may\nneed to re-implement a timeout way-out here.\n\nRegards,\n\n> }\n> \n> static struct syscore_ops pmc_syscore_ops = {\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pwm-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xsgbM0Pcbz9sNV\n\tfor ;\n\tWed, 13 Sep 2017 22:15:11 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751541AbdIMMPJ (ORCPT );\n\tWed, 13 Sep 2017 08:15:09 -0400","from esa1.microchip.iphmx.com ([68.232.147.91]:41990 \"EHLO\n\tesa1.microchip.iphmx.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751795AbdIMMPI (ORCPT\n\t); Wed, 13 Sep 2017 08:15:08 -0400","from exsmtp03.microchip.com (HELO email.microchip.com)\n\t([198.175.253.49])\n\tby esa1.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA;\n\t13 Sep 2017 05:14:23 -0700","from [10.159.245.112] (10.10.76.4) by chn-sv-exch03.mchp-main.com\n\t(10.10.76.49) with Microsoft SMTP Server id 14.3.352.0;\n\tWed, 13 Sep 2017 05:14:23 -0700"],"X-IronPort-AV":"E=Sophos;i=\"5.42,387,1500966000\"; d=\"scan'208\";a=\"7360655\"","Subject":"Re: [PATCH v1 01/10] clk: at91: pmc: Wait for clocks when resuming","To":"Romain Izard ,\n\tBoris Brezillon ,\n\tMichael Turquette ,\n\tStephen Boyd ,\n\tLudovic Desroches ,\n\tJonathan Cameron , Wenyou Yang ,\n\tJosh Wu ,\n\tDavid Woodhouse ,\n\tBrian Norris ,\n\tMarek Vasut ,\n\tCyrille Pitchen ,\n\tThierry Reding ,\n\tRichard Genoud ,\n\tGreg Kroah-Hartman ,\n\tAlan Stern ","CC":", ,\n\t, ,\n\t, ,\n\t, ","References":"<20170908153604.28383-1-romain.izard.pro@gmail.com>\n\t<20170908153604.28383-2-romain.izard.pro@gmail.com>","From":"Nicolas Ferre ","Organization":"microchip","Message-ID":"<14fb5261-bb03-a6bd-6653-2a2c655b04ee@microchip.com>","Date":"Wed, 13 Sep 2017 14:15:30 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<20170908153604.28383-2-romain.izard.pro@gmail.com>","Content-Type":"text/plain; charset=\"utf-8\"","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","Sender":"linux-pwm-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pwm@vger.kernel.org"}},{"id":1768712,"web_url":"http://patchwork.ozlabs.org/comment/1768712/","msgid":"","list_archive_url":null,"date":"2017-09-14T16:15:56","subject":"Re: [PATCH v1 01/10] clk: at91: pmc: Wait for clocks when resuming","submitter":{"id":8236,"url":"http://patchwork.ozlabs.org/api/people/8236/","name":"Romain Izard","email":"romain.izard.pro@gmail.com"},"content":"2017-09-13 14:15 GMT+02:00 Nicolas Ferre :\n> On 08/09/2017 at 17:35, Romain Izard wrote:\n>> Wait for the syncronization of all clocks when resuming, not only the\n>> UPLL clock. Do not use regmap_read_poll_timeout, as it will call BUG()\n>> when interrupts are masked, which is the case in here.\n>>\n>> Signed-off-by: Romain Izard \n>> ---\n>> drivers/clk/at91/pmc.c | 24 ++++++++++++++++--------\n>> 1 file changed, 16 insertions(+), 8 deletions(-)\n>>\n>> diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c\n>> index 775af473fe11..5c2b26de303e 100644\n>> --- a/drivers/clk/at91/pmc.c\n>> +++ b/drivers/clk/at91/pmc.c\n>> @@ -107,10 +107,20 @@ static int pmc_suspend(void)\n>> return 0;\n>> }\n>>\n>> +static bool pmc_ready(unsigned int mask)\n>> +{\n>> + unsigned int status;\n>> +\n>> + regmap_read(pmcreg, AT91_PMC_SR, &status);\n>> +\n>> + return ((status & mask) == mask) ? 1 : 0;\n>> +}\n>> +\n>> static void pmc_resume(void)\n>> {\n>> - int i, ret = 0;\n>> + int i;\n>> u32 tmp;\n>> + u32 mask = AT91_PMC_MCKRDY | AT91_PMC_LOCKA;\n>>\n>> regmap_read(pmcreg, AT91_PMC_MCKR, &tmp);\n>> if (pmc_cache.mckr != tmp)\n>> @@ -134,13 +144,11 @@ static void pmc_resume(void)\n>> AT91_PMC_PCR_CMD);\n>> }\n>>\n>> - if (pmc_cache.uckr & AT91_PMC_UPLLEN) {\n>> - ret = regmap_read_poll_timeout(pmcreg, AT91_PMC_SR, tmp,\n>> - !(tmp & AT91_PMC_LOCKU),\n>> - 10, 5000);\n>> - if (ret)\n>> - pr_crit(\"USB PLL didn't lock when resuming\\n\");\n>> - }\n>> + if (pmc_cache.uckr & AT91_PMC_UPLLEN)\n>> + mask |= AT91_PMC_LOCKU;\n>> +\n>> + while (!pmc_ready(mask))\n>> + cpu_relax();\n>\n> Okay, but I would prefer to keep the timeout property in it. So we may\n> need to re-implement a timeout way-out here.\n>\n\nWe need to have a reference clock to measure the timeout delay. If we use\nthe kernel's timekeeping, it relies on the clocks that we are configuring in\nthis code. Moreover, my experience with the mainline code is that when\nsomething goes wrong, nothing will work. No oops or panic will be reported,\nthe device will just stop working.\n\nIn my case, I had obvious failures (it just stopped working unless I removed\nUSB wakeup or activated the console during suspend) but also very rare\nfailures, that occurred in the bootloader. Those issues were detected when\ntesting repeated suspend cycles for a night: the memory controller would\nnever enter the self-refresh mode during the resume sequence.\n\nThis led me to question the bootloader's code first, and I set up 4 boards\nwith the backup prototype code on v4.9 to verify that it was stable on\nsuspend. I've reached 1.5 million sleep cycles over 3 weeks without\nfailure, so this hinted towards the difference between the prototype and the\nbackup code provided for v4.12 (which contained the patch that got in\nv4.13). Once I integrated this patch, I've run the v4.12 code for 2 weeks\nwithout issue as well.\n\nIn the end, I don't want to touch this code if I do not have to, as checking\nthat it does not regress is really cumbersome.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pwm-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tsecure) header.d=mobile-devices.fr header.i=@mobile-devices.fr\n\theader.b=\"Nraoqsbb\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"U6xGwuE2\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtNw209llz9sP1\n\tfor ;\n\tFri, 15 Sep 2017 02:17:05 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751316AbdINQQs (ORCPT );\n\tThu, 14 Sep 2017 12:16:48 -0400","from mail-qk0-f179.google.com ([209.85.220.179]:54780 \"EHLO\n\tmail-qk0-f179.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751392AbdINQQR (ORCPT\n\t); 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charset=\"UTF-8\"","Sender":"linux-pwm-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pwm@vger.kernel.org"}},{"id":1773534,"web_url":"http://patchwork.ozlabs.org/comment/1773534/","msgid":"<5ffaec74-db4a-d285-1241-ba47e74fb0b8@microchip.com>","list_archive_url":null,"date":"2017-09-22T12:12:13","subject":"Re: [PATCH v1 01/10] clk: at91: pmc: Wait for clocks when resuming","submitter":{"id":71036,"url":"http://patchwork.ozlabs.org/api/people/71036/","name":"Nicolas Ferre","email":"nicolas.ferre@microchip.com"},"content":"On 14/09/2017 at 18:15, Romain Izard wrote:\n> 2017-09-13 14:15 GMT+02:00 Nicolas Ferre :\n>> On 08/09/2017 at 17:35, Romain Izard wrote:\n>>> Wait for the syncronization of all clocks when resuming, not only the\n>>> UPLL clock. Do not use regmap_read_poll_timeout, as it will call BUG()\n>>> when interrupts are masked, which is the case in here.\n>>>\n>>> Signed-off-by: Romain Izard \n>>> ---\n>>> drivers/clk/at91/pmc.c | 24 ++++++++++++++++--------\n>>> 1 file changed, 16 insertions(+), 8 deletions(-)\n>>>\n>>> diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c\n>>> index 775af473fe11..5c2b26de303e 100644\n>>> --- a/drivers/clk/at91/pmc.c\n>>> +++ b/drivers/clk/at91/pmc.c\n>>> @@ -107,10 +107,20 @@ static int pmc_suspend(void)\n>>> return 0;\n>>> }\n>>>\n>>> +static bool pmc_ready(unsigned int mask)\n>>> +{\n>>> + unsigned int status;\n>>> +\n>>> + regmap_read(pmcreg, AT91_PMC_SR, &status);\n>>> +\n>>> + return ((status & mask) == mask) ? 1 : 0;\n>>> +}\n>>> +\n>>> static void pmc_resume(void)\n>>> {\n>>> - int i, ret = 0;\n>>> + int i;\n>>> u32 tmp;\n>>> + u32 mask = AT91_PMC_MCKRDY | AT91_PMC_LOCKA;\n>>>\n>>> regmap_read(pmcreg, AT91_PMC_MCKR, &tmp);\n>>> if (pmc_cache.mckr != tmp)\n>>> @@ -134,13 +144,11 @@ static void pmc_resume(void)\n>>> AT91_PMC_PCR_CMD);\n>>> }\n>>>\n>>> - if (pmc_cache.uckr & AT91_PMC_UPLLEN) {\n>>> - ret = regmap_read_poll_timeout(pmcreg, AT91_PMC_SR, tmp,\n>>> - !(tmp & AT91_PMC_LOCKU),\n>>> - 10, 5000);\n>>> - if (ret)\n>>> - pr_crit(\"USB PLL didn't lock when resuming\\n\");\n>>> - }\n>>> + if (pmc_cache.uckr & AT91_PMC_UPLLEN)\n>>> + mask |= AT91_PMC_LOCKU;\n>>> +\n>>> + while (!pmc_ready(mask))\n>>> + cpu_relax();\n>>\n>> Okay, but I would prefer to keep the timeout property in it. So we may\n>> need to re-implement a timeout way-out here.\n>>\n> \n> We need to have a reference clock to measure the timeout delay. If we use\n> the kernel's timekeeping, it relies on the clocks that we are configuring in\n> this code. Moreover, my experience with the mainline code is that when\n> something goes wrong, nothing will work. No oops or panic will be reported,\n> the device will just stop working.\n> \n> In my case, I had obvious failures (it just stopped working unless I removed\n> USB wakeup or activated the console during suspend) but also very rare\n> failures, that occurred in the bootloader. Those issues were detected when\n> testing repeated suspend cycles for a night: the memory controller would\n> never enter the self-refresh mode during the resume sequence.\n> \n> This led me to question the bootloader's code first, and I set up 4 boards\n> with the backup prototype code on v4.9 to verify that it was stable on\n> suspend. I've reached 1.5 million sleep cycles over 3 weeks without\n> failure, so this hinted towards the difference between the prototype and the\n> backup code provided for v4.12 (which contained the patch that got in\n> v4.13). Once I integrated this patch, I've run the v4.12 code for 2 weeks\n> without issue as well.\n> \n> In the end, I don't want to touch this code if I do not have to, as checking\n> that it does not regress is really cumbersome.\n\nThe timeout was more for PLL like the one use for USB. I didn't want to\nblock only for USB PLL failure (which is kind of hypothetical, I admit).\nAnyway, I understand your arguments and taking into account the\nextensive tests that you've run, I agree with your approach. I'm adding\nmy Ack to the v2.\n\nThanks for having take the time to describe your debugging session: it's\nvaluable information for everybody.\n\nBest regards,","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pwm-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xzC4Z75Bhz9sPm\n\tfor ;\n\tFri, 22 Sep 2017 22:11:10 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752197AbdIVMLJ (ORCPT );\n\tFri, 22 Sep 2017 08:11:09 -0400","from esa6.microchip.iphmx.com ([216.71.154.253]:21951 \"EHLO\n\tesa6.microchip.iphmx.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752148AbdIVMLI (ORCPT\n\t); Fri, 22 Sep 2017 08:11:08 -0400","from smtpout.microchip.com (HELO email.microchip.com)\n\t([198.175.253.82])\n\tby esa6.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA;\n\t22 Sep 2017 05:11:07 -0700","from [10.159.245.112] (10.10.76.4) by chn-sv-exch04.mchp-main.com\n\t(10.10.76.105) with Microsoft SMTP Server id 14.3.352.0;\n\tFri, 22 Sep 2017 05:11:06 -0700"],"X-IronPort-AV":"E=Sophos;i=\"5.42,427,1500966000\"; d=\"scan'208\";a=\"4673051\"","Subject":"Re: [PATCH v1 01/10] clk: at91: pmc: Wait for clocks when resuming","To":"Romain Izard ","CC":"Boris Brezillon ,\n\tMichael Turquette ,\n\tStephen Boyd ,\n\tLudovic Desroches ,\n\tJonathan Cameron , Wenyou Yang ,\n\tJosh Wu ,\n\tDavid Woodhouse ,\n\tBrian Norris ,\n\tMarek Vasut ,\n\tCyrille Pitchen ,\n\tThierry Reding ,\n\tRichard Genoud ,\n\tGreg Kroah-Hartman ,\n\tAlan Stern ,\n\t, LKML ,\n\t, linux-mtd ,\n\t, ,\n\t,\n\tlinux-arm-kernel ","References":"<20170908153604.28383-1-romain.izard.pro@gmail.com>\n\t<20170908153604.28383-2-romain.izard.pro@gmail.com>\n\t<14fb5261-bb03-a6bd-6653-2a2c655b04ee@microchip.com>\n\t","From":"Nicolas Ferre ","Organization":"microchip","Message-ID":"<5ffaec74-db4a-d285-1241-ba47e74fb0b8@microchip.com>","Date":"Fri, 22 Sep 2017 14:12:13 +0200","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"","Content-Type":"text/plain; charset=\"utf-8\"","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","Sender":"linux-pwm-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pwm@vger.kernel.org"}}]