[{"id":1765124,"web_url":"http://patchwork.ozlabs.org/comment/1765124/","msgid":"<20170908072538.rqsp6dobwsqmzrsr@flea.lan>","list_archive_url":null,"date":"2017-09-08T07:25:38","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote:\n> This patch add documentation about the MDIO switch used on sun8i-h3-emac\n> for integrated PHY.\n> \n> Signed-off-by: Corentin Labbe \n> ---\n> .../devicetree/bindings/net/dwmac-sun8i.txt | 127 +++++++++++++++++++--\n> 1 file changed, 120 insertions(+), 7 deletions(-)\n> \n> diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> index 725f3b187886..3fa0e54825ea 100644\n> --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> @@ -39,7 +39,7 @@ Optional properties for the following compatibles:\n> - allwinner,leds-active-low: EPHY LEDs are active low\n> \n> Required child node of emac:\n> -- mdio bus node: should be named mdio\n> +- mdio bus node: should be labelled mdio\n\nlabels do not end up in the final DT (while the names do) so why are\nyou making this change?\n\n> \n> Required properties of the mdio node:\n> - #address-cells: shall be 1\n> @@ -48,14 +48,28 @@ Required properties of the mdio node:\n> The device node referenced by \"phy\" or \"phy-handle\" should be a child node\n> of the mdio node. See phy.txt for the generic PHY bindings.\n> \n> -Required properties of the phy node with the following compatibles:\n> +The following compatibles require an mdio-mux node called \"mdio-mux\":\n> + - \"allwinner,sun8i-h3-emac\"\n> + - \"allwinner,sun8i-v3s-emac\":\n> +Required properties for the mdio-mux node:\n> + - compatible = \"mdio-mux\"\n> + - one child mdio for the integrated mdio\n> + - one child mdio for the external mdio if present (V3s have none)\n> +Required properties for the mdio-mux children node:\n> + - reg: 0 for internal MDIO bus, 1 for external MDIO bus\n> +\n> +The following compatibles require a PHY node representing the integrated\n> +PHY, under the integrated MDIO bus node if an mdio-mux node is used:\n> - \"allwinner,sun8i-h3-emac\",\n> - \"allwinner,sun8i-v3s-emac\":\n> +\n> +Required properties of the integrated phy node:\n> - clocks: a phandle to the reference clock for the EPHY\n> - resets: a phandle to the reset control for the EPHY\n> +- phy-is-integrated\n> +- Should be a child of the integrated mdio\n\nI'm not sure what you mean by that, you ask that it should (so not\nrequired?) be a child of the integrated mdio...\n\n> \n> -Example:\n> -\n> +Example with integrated PHY:\n> emac: ethernet@1c0b000 {\n> \tcompatible = \"allwinner,sun8i-h3-emac\";\n> \tsyscon = <&syscon>;\n> @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 {\n> \tphy-handle = <&int_mii_phy>;\n> \tphy-mode = \"mii\";\n> \tallwinner,leds-active-low;\n> +\n> +\tmdio0: mdio {\n\n(You don't label it mdio here, unlike what was asked before)\n\n> +\t\t#address-cells = <1>;\n> +\t\t#size-cells = <0>;\n> +\t\tcompatible = \"snps,dwmac-mdio\";\n> +\t};\n\nI think Rob wanted that node gone?\n\n> +\tmdio-mux {\n> +\t\tcompatible = \"mdio-mux\";\n> +\t\t#address-cells = <1>;\n> +\t\t#size-cells = <0>;\n> +\n> +\t\tint_mdio: mdio@1 {\n> +\t\t\treg = <0>;\n> +\t\t\t#address-cells = <1>;\n> +\t\t\t#size-cells = <0>;\n> +\t\t\tint_mii_phy: ethernet-phy@1 {\n> +\t\t\t\treg = <1>;\n> +\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> +\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> +\t\t\t\tphy-is-integrated\n> +\t\t\t};\n> +\t\t};\n\n... And in your example it's a child of the mdio mux?\n\n> +\t\text_mdio: mdio@0 {\n> +\t\t\treg = <1>;\n> +\t\t\t#address-cells = <1>;\n> +\t\t\t#size-cells = <0>;\n> +\t\t};\n> +\t};\n> +};\n> +\n> +Example with external PHY:\n> +emac: ethernet@1c0b000 {\n> +\tcompatible = \"allwinner,sun8i-h3-emac\";\n> +\tsyscon = <&syscon>;\n> +\treg = <0x01c0b000 0x104>;\n> +\tinterrupts = ;\n> +\tinterrupt-names = \"macirq\";\n> +\tresets = <&ccu RST_BUS_EMAC>;\n> +\treset-names = \"stmmaceth\";\n> +\tclocks = <&ccu CLK_BUS_EMAC>;\n> +\tclock-names = \"stmmaceth\";\n> +\t#address-cells = <1>;\n> +\t#size-cells = <0>;\n> +\n> +\tphy-handle = <&ext_rgmii_phy>;\n> +\tphy-mode = \"rgmii\";\n> +\tallwinner,leds-active-low;\n> +\n> +\tmdio0: mdio {\n> +\t\t#address-cells = <1>;\n> +\t\t#size-cells = <0>;\n> +\t\tcompatible = \"snps,dwmac-mdio\";\n> +\t};\n> +\n> +\tmdio-mux {\n> +\t\tcompatible = \"mdio-mux\";\n> +\t\t#address-cells = <1>;\n> +\t\t#size-cells = <0>;\n> +\n> +\t\tint_mdio: mdio@1 {\n> +\t\t\treg = <0>;\n> +\t\t\t#address-cells = <1>;\n> +\t\t\t#size-cells = <0>;\n> +\t\t\tint_mii_phy: ethernet-phy@1 {\n> +\t\t\t\treg = <1>;\n> +\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> +\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> +\t\t\t\tphy-is-integrated\n> +\t\t\t};\n> +\t\t};\n> +\t\text_mdio: mdio@0 {\n> +\t\t\treg = <1>;\n> +\t\t\t#address-cells = <1>;\n> +\t\t\t#size-cells = <0>;\n> +\t\t\text_rgmii_phy: ethernet-phy@1 {\n> +\t\t\t\treg = <1>;\n> +\t\t\t};\n> +\t\t};\n> +\t};\n> +};\n> +\n> +Example with SoC without integrated PHY\n> +\n> +emac: ethernet@1c0b000 {\n> +\tcompatible = \"allwinner,sun8i-a83t-emac\";\n> +\tsyscon = <&syscon>;\n> +\treg = <0x01c0b000 0x104>;\n> +\tinterrupts = ;\n> +\tinterrupt-names = \"macirq\";\n> +\tresets = <&ccu RST_BUS_EMAC>;\n> +\treset-names = \"stmmaceth\";\n> +\tclocks = <&ccu CLK_BUS_EMAC>;\n> +\tclock-names = \"stmmaceth\";\n> +\t#address-cells = <1>;\n> +\t#size-cells = <0>;\n> +\n> +\tphy-handle = <&ext_rgmii_phy>;\n> +\tphy-mode = \"rgmii\";\n> +\n> \tmdio: mdio {\n> +\t\tcompatible = \"snps,dwmac-mdio\";\n> \t\t#address-cells = <1>;\n> \t\t#size-cells = <0>;\n> -\t\tint_mii_phy: ethernet-phy@1 {\n> +\t\text_rgmii_phy: ethernet-phy@1 {\n> \t\t\treg = <1>;\n> -\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> -\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> \t\t};\n> \t};\n> };\n> -- \n> 2.13.5\n>","headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xpTPt6lCwz9s83\n\tfor ;\n\tFri, 8 Sep 2017 17:25:54 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1755096AbdIHHZm (ORCPT );\n\tFri, 8 Sep 2017 03:25:42 -0400","from mail.free-electrons.com ([62.4.15.54]:36870 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1754878AbdIHHZl (ORCPT\n\t); Fri, 8 Sep 2017 03:25:41 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 04E232096B; Fri, 8 Sep 2017 09:25:38 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id CCC4E20963;\n\tFri, 8 Sep 2017 09:25:37 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT\n\tshortcircuit=ham autolearn=disabled version=3.4.0","Date":"Fri, 8 Sep 2017 09:25:38 +0200","From":"Maxime Ripard ","To":"Corentin Labbe ","Cc":"robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org,\n\tlinux@armlinux.org.uk, catalin.marinas@arm.com,\n\twill.deacon@arm.com, peppe.cavallaro@st.com,\n\talexandre.torgue@st.com, andrew@lunn.ch, f.fainelli@gmail.com,\n\tnetdev@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","Message-ID":"<20170908072538.rqsp6dobwsqmzrsr@flea.lan>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-6-clabbe.montjoie@gmail.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha1;\n\tprotocol=\"application/pgp-signature\"; boundary=\"2liiw4h4lfwu7u37\"","Content-Disposition":"inline","In-Reply-To":"<20170908071156.5115-6-clabbe.montjoie@gmail.com>","User-Agent":"NeoMutt/20170714 (1.8.3)","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"}},{"id":1765137,"web_url":"http://patchwork.ozlabs.org/comment/1765137/","msgid":"<20170908074325.GB29999@Red>","list_archive_url":null,"date":"2017-09-08T07:43:25","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Fri, Sep 08, 2017 at 09:25:38AM +0200, Maxime Ripard wrote:\n> On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote:\n> > This patch add documentation about the MDIO switch used on sun8i-h3-emac\n> > for integrated PHY.\n> > \n> > Signed-off-by: Corentin Labbe \n> > ---\n> > .../devicetree/bindings/net/dwmac-sun8i.txt | 127 +++++++++++++++++++--\n> > 1 file changed, 120 insertions(+), 7 deletions(-)\n> > \n> > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > index 725f3b187886..3fa0e54825ea 100644\n> > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > @@ -39,7 +39,7 @@ Optional properties for the following compatibles:\n> > - allwinner,leds-active-low: EPHY LEDs are active low\n> > \n> > Required child node of emac:\n> > -- mdio bus node: should be named mdio\n> > +- mdio bus node: should be labelled mdio\n> \n> labels do not end up in the final DT (while the names do) so why are\n> you making this change?\n> \n\nI misunderstood label/name.\nAnyway, this contrainst should leave due to \"snps,dwmac-mdio MDIOs are automatically registered\"\n\n> > \n> > Required properties of the mdio node:\n> > - #address-cells: shall be 1\n> > @@ -48,14 +48,28 @@ Required properties of the mdio node:\n> > The device node referenced by \"phy\" or \"phy-handle\" should be a child node\n> > of the mdio node. See phy.txt for the generic PHY bindings.\n> > \n> > -Required properties of the phy node with the following compatibles:\n> > +The following compatibles require an mdio-mux node called \"mdio-mux\":\n> > + - \"allwinner,sun8i-h3-emac\"\n> > + - \"allwinner,sun8i-v3s-emac\":\n> > +Required properties for the mdio-mux node:\n> > + - compatible = \"mdio-mux\"\n> > + - one child mdio for the integrated mdio\n> > + - one child mdio for the external mdio if present (V3s have none)\n> > +Required properties for the mdio-mux children node:\n> > + - reg: 0 for internal MDIO bus, 1 for external MDIO bus\n> > +\n> > +The following compatibles require a PHY node representing the integrated\n> > +PHY, under the integrated MDIO bus node if an mdio-mux node is used:\n> > - \"allwinner,sun8i-h3-emac\",\n> > - \"allwinner,sun8i-v3s-emac\":\n> > +\n> > +Required properties of the integrated phy node:\n> > - clocks: a phandle to the reference clock for the EPHY\n> > - resets: a phandle to the reset control for the EPHY\n> > +- phy-is-integrated\n> > +- Should be a child of the integrated mdio\n> \n> I'm not sure what you mean by that, you ask that it should (so not\n> required?) be a child of the integrated mdio...\n> \n\nI will change words to \"must\"\n\n> > \n> > -Example:\n> > -\n> > +Example with integrated PHY:\n> > emac: ethernet@1c0b000 {\n> > \tcompatible = \"allwinner,sun8i-h3-emac\";\n> > \tsyscon = <&syscon>;\n> > @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 {\n> > \tphy-handle = <&int_mii_phy>;\n> > \tphy-mode = \"mii\";\n> > \tallwinner,leds-active-low;\n> > +\n> > +\tmdio0: mdio {\n> \n> (You don't label it mdio here, unlike what was asked before)\n> \n> > +\t\t#address-cells = <1>;\n> > +\t\t#size-cells = <0>;\n> > +\t\tcompatible = \"snps,dwmac-mdio\";\n> > +\t};\n> \n> I think Rob wanted that node gone?\n> \n\nMDIO mux does not work without a parent MDIO, either gived by \"parent-bus\" or directly via mdio_mux_init() (like it is the case in dwmac-sun8i)\n\n> > +\tmdio-mux {\n> > +\t\tcompatible = \"mdio-mux\";\n> > +\t\t#address-cells = <1>;\n> > +\t\t#size-cells = <0>;\n> > +\n> > +\t\tint_mdio: mdio@1 {\n> > +\t\t\treg = <0>;\n> > +\t\t\t#address-cells = <1>;\n> > +\t\t\t#size-cells = <0>;\n> > +\t\t\tint_mii_phy: ethernet-phy@1 {\n> > +\t\t\t\treg = <1>;\n> > +\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> > +\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> > +\t\t\t\tphy-is-integrated\n> > +\t\t\t};\n> > +\t\t};\n> \n> ... And in your example it's a child of the mdio mux?\n> \n\nSo I confirm, integrated PHY must be a child of integrated MDIO (that must be a child of mdio-mux).\nThe example is good.\n\n> > +\t\text_mdio: mdio@0 {\n> > +\t\t\treg = <1>;\n> > +\t\t\t#address-cells = <1>;\n> > +\t\t\t#size-cells = <0>;\n> > +\t\t};\n> > +\t};\n> > +};\n> > +\n> > +Example with external PHY:\n> > +emac: ethernet@1c0b000 {\n> > +\tcompatible = \"allwinner,sun8i-h3-emac\";\n> > +\tsyscon = <&syscon>;\n> > +\treg = <0x01c0b000 0x104>;\n> > +\tinterrupts = ;\n> > +\tinterrupt-names = \"macirq\";\n> > +\tresets = <&ccu RST_BUS_EMAC>;\n> > +\treset-names = \"stmmaceth\";\n> > +\tclocks = <&ccu CLK_BUS_EMAC>;\n> > +\tclock-names = \"stmmaceth\";\n> > +\t#address-cells = <1>;\n> > +\t#size-cells = <0>;\n> > +\n> > +\tphy-handle = <&ext_rgmii_phy>;\n> > +\tphy-mode = \"rgmii\";\n> > +\tallwinner,leds-active-low;\n> > +\n> > +\tmdio0: mdio {\n> > +\t\t#address-cells = <1>;\n> > +\t\t#size-cells = <0>;\n> > +\t\tcompatible = \"snps,dwmac-mdio\";\n> > +\t};\n> > +\n> > +\tmdio-mux {\n> > +\t\tcompatible = \"mdio-mux\";\n> > +\t\t#address-cells = <1>;\n> > +\t\t#size-cells = <0>;\n> > +\n> > +\t\tint_mdio: mdio@1 {\n> > +\t\t\treg = <0>;\n> > +\t\t\t#address-cells = <1>;\n> > +\t\t\t#size-cells = <0>;\n> > +\t\t\tint_mii_phy: ethernet-phy@1 {\n> > +\t\t\t\treg = <1>;\n> > +\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> > +\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> > +\t\t\t\tphy-is-integrated\n> > +\t\t\t};\n> > +\t\t};\n> > +\t\text_mdio: mdio@0 {\n> > +\t\t\treg = <1>;\n> > +\t\t\t#address-cells = <1>;\n> > +\t\t\t#size-cells = <0>;\n> > +\t\t\text_rgmii_phy: ethernet-phy@1 {\n> > +\t\t\t\treg = <1>;\n> > +\t\t\t};\n> > +\t\t};\n> > +\t};\n> > +};\n> > +\n> > +Example with SoC without integrated PHY\n> > +\n> > +emac: ethernet@1c0b000 {\n> > +\tcompatible = \"allwinner,sun8i-a83t-emac\";\n> > +\tsyscon = <&syscon>;\n> > +\treg = <0x01c0b000 0x104>;\n> > +\tinterrupts = ;\n> > +\tinterrupt-names = \"macirq\";\n> > +\tresets = <&ccu RST_BUS_EMAC>;\n> > +\treset-names = \"stmmaceth\";\n> > +\tclocks = <&ccu CLK_BUS_EMAC>;\n> > +\tclock-names = \"stmmaceth\";\n> > +\t#address-cells = <1>;\n> > +\t#size-cells = <0>;\n> > +\n> > +\tphy-handle = <&ext_rgmii_phy>;\n> > +\tphy-mode = \"rgmii\";\n> > +\n> > \tmdio: mdio {\n> > +\t\tcompatible = \"snps,dwmac-mdio\";\n> > \t\t#address-cells = <1>;\n> > \t\t#size-cells = <0>;\n> > -\t\tint_mii_phy: ethernet-phy@1 {\n> > +\t\text_rgmii_phy: ethernet-phy@1 {\n> > \t\t\treg = <1>;\n> > -\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> > -\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> > \t\t};\n> > \t};\n> > };\n> > -- \n> > 2.13.5\n> > \n> \n> -- \n> Maxime Ripard, Free Electrons\n> Embedded Linux and Kernel engineering\n> http://free-electrons.com\n\nThanks for the review, I will fix all reported problem in next version.\n\nRegards\nCorentin Labbe","headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tFri, 08 Sep 2017 00:43:32 -0700 (PDT)","Date":"Fri, 8 Sep 2017 09:43:25 +0200","From":"Corentin Labbe ","To":"Maxime Ripard ","Cc":"robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org,\n\tlinux@armlinux.org.uk, catalin.marinas@arm.com,\n\twill.deacon@arm.com, peppe.cavallaro@st.com,\n\talexandre.torgue@st.com, andrew@lunn.ch, f.fainelli@gmail.com,\n\tnetdev@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org","Subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","Message-ID":"<20170908074325.GB29999@Red>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-6-clabbe.montjoie@gmail.com>\n\t<20170908072538.rqsp6dobwsqmzrsr@flea.lan>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170908072538.rqsp6dobwsqmzrsr@flea.lan>","User-Agent":"Mutt/1.7.2 (2016-11-26)","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"}},{"id":1768077,"web_url":"http://patchwork.ozlabs.org/comment/1768077/","msgid":"<20170913182004.uniyo5opeilcfk7r@rob-hp-laptop>","list_archive_url":null,"date":"2017-09-13T18:20:04","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Fri, Sep 08, 2017 at 09:43:25AM +0200, Corentin Labbe wrote:\n> On Fri, Sep 08, 2017 at 09:25:38AM +0200, Maxime Ripard wrote:\n> > On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote:\n> > > This patch add documentation about the MDIO switch used on sun8i-h3-emac\n> > > for integrated PHY.\n> > > \n> > > Signed-off-by: Corentin Labbe \n> > > ---\n> > > .../devicetree/bindings/net/dwmac-sun8i.txt | 127 +++++++++++++++++++--\n> > > 1 file changed, 120 insertions(+), 7 deletions(-)\n> > > \n> > > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > > index 725f3b187886..3fa0e54825ea 100644\n> > > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > > @@ -39,7 +39,7 @@ Optional properties for the following compatibles:\n> > > - allwinner,leds-active-low: EPHY LEDs are active low\n> > > \n> > > Required child node of emac:\n> > > -- mdio bus node: should be named mdio\n> > > +- mdio bus node: should be labelled mdio\n> > \n> > labels do not end up in the final DT (while the names do) so why are\n> > you making this change?\n> > \n> \n> I misunderstood label/name.\n> Anyway, this contrainst should leave due to \"snps,dwmac-mdio MDIOs are automatically registered\"\n> \n> > > \n> > > Required properties of the mdio node:\n> > > - #address-cells: shall be 1\n> > > @@ -48,14 +48,28 @@ Required properties of the mdio node:\n> > > The device node referenced by \"phy\" or \"phy-handle\" should be a child node\n> > > of the mdio node. See phy.txt for the generic PHY bindings.\n> > > \n> > > -Required properties of the phy node with the following compatibles:\n> > > +The following compatibles require an mdio-mux node called \"mdio-mux\":\n> > > + - \"allwinner,sun8i-h3-emac\"\n> > > + - \"allwinner,sun8i-v3s-emac\":\n> > > +Required properties for the mdio-mux node:\n> > > + - compatible = \"mdio-mux\"\n> > > + - one child mdio for the integrated mdio\n> > > + - one child mdio for the external mdio if present (V3s have none)\n> > > +Required properties for the mdio-mux children node:\n> > > + - reg: 0 for internal MDIO bus, 1 for external MDIO bus\n> > > +\n> > > +The following compatibles require a PHY node representing the integrated\n> > > +PHY, under the integrated MDIO bus node if an mdio-mux node is used:\n> > > - \"allwinner,sun8i-h3-emac\",\n> > > - \"allwinner,sun8i-v3s-emac\":\n> > > +\n> > > +Required properties of the integrated phy node:\n> > > - clocks: a phandle to the reference clock for the EPHY\n> > > - resets: a phandle to the reset control for the EPHY\n> > > +- phy-is-integrated\n> > > +- Should be a child of the integrated mdio\n> > \n> > I'm not sure what you mean by that, you ask that it should (so not\n> > required?) be a child of the integrated mdio...\n> > \n> \n> I will change words to \"must\"\n> \n> > > \n> > > -Example:\n> > > -\n> > > +Example with integrated PHY:\n> > > emac: ethernet@1c0b000 {\n> > > \tcompatible = \"allwinner,sun8i-h3-emac\";\n> > > \tsyscon = <&syscon>;\n> > > @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 {\n> > > \tphy-handle = <&int_mii_phy>;\n> > > \tphy-mode = \"mii\";\n> > > \tallwinner,leds-active-low;\n> > > +\n> > > +\tmdio0: mdio {\n> > \n> > (You don't label it mdio here, unlike what was asked before)\n> > \n> > > +\t\t#address-cells = <1>;\n> > > +\t\t#size-cells = <0>;\n> > > +\t\tcompatible = \"snps,dwmac-mdio\";\n> > > +\t};\n> > \n> > I think Rob wanted that node gone?\n> > \n> \n> MDIO mux does not work without a parent MDIO, either gived by \"parent-bus\" or directly via mdio_mux_init() (like it is the case in dwmac-sun8i)\n\nIs the MDIO controller \"allwinner,sun8i-h3-emac\" or \"snps,dwmac-mdio\"? \nIf the latter, then I think the node is fine, but then the mux should be \na child node of it. IOW, the child of an MDIO controller should either \nbe a mux node or slave devices.\n\n> \n> > > +\tmdio-mux {\n> > > +\t\tcompatible = \"mdio-mux\";\n> > > +\t\t#address-cells = <1>;\n> > > +\t\t#size-cells = <0>;\n> > > +\n> > > +\t\tint_mdio: mdio@1 {\n> > > +\t\t\treg = <0>;\n\nunit address of 1 and reg prop of 0 don't match. Build your dtb with \nW=2.\n\n> > > +\t\t\t#address-cells = <1>;\n> > > +\t\t\t#size-cells = <0>;\n> > > +\t\t\tint_mii_phy: ethernet-phy@1 {\n> > > +\t\t\t\treg = <1>;\n> > > +\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n> > > +\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n> > > +\t\t\t\tphy-is-integrated\n\nMissing ;\n\n> > > +\t\t\t};\n> > > +\t\t};\n> > \n> > ... And in your example it's a child of the mdio mux?\n> > \n> \n> So I confirm, integrated PHY must be a child of integrated MDIO (that must be a child of mdio-mux).\n> The example is good.\n> \n> > > +\t\text_mdio: mdio@0 {\n> > > +\t\t\treg = <1>;\n\nAnother unit address mismatch.\n\nRob","headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xsqhg6DbPz9sNr\n\tfor ;\n\tThu, 14 Sep 2017 04:20:19 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751445AbdIMSUI (ORCPT );\n\tWed, 13 Sep 2017 14:20:08 -0400","from mail-io0-f196.google.com ([209.85.223.196]:38677 \"EHLO\n\tmail-io0-f196.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751106AbdIMSUG (ORCPT\n\t); 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\n\tWed, 13 Sep 2017 11:20:05 -0700 (PDT)","Date":"Wed, 13 Sep 2017 13:20:04 -0500","From":"Rob Herring ","To":"Corentin Labbe ","Cc":"Maxime Ripard ,\n\tmark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk,\n\tcatalin.marinas@arm.com, will.deacon@arm.com,\n\tpeppe.cavallaro@st.com, alexandre.torgue@st.com, andrew@lunn.ch,\n\tf.fainelli@gmail.com, netdev@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org","Subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","Message-ID":"<20170913182004.uniyo5opeilcfk7r@rob-hp-laptop>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-6-clabbe.montjoie@gmail.com>\n\t<20170908072538.rqsp6dobwsqmzrsr@flea.lan>\n\t<20170908074325.GB29999@Red>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170908074325.GB29999@Red>","User-Agent":"NeoMutt/20170113 (1.7.2)","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"}},{"id":1768781,"web_url":"http://patchwork.ozlabs.org/comment/1768781/","msgid":"<20170914185301.GB4021@Red>","list_archive_url":null,"date":"2017-09-14T18:53:01","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Wed, Sep 13, 2017 at 01:20:04PM -0500, Rob Herring wrote:\n> On Fri, Sep 08, 2017 at 09:43:25AM +0200, Corentin Labbe wrote:\n> > On Fri, Sep 08, 2017 at 09:25:38AM +0200, Maxime Ripard wrote:\n> > > On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote:\n> > > > This patch add documentation about the MDIO switch used on sun8i-h3-emac\n> > > > for integrated PHY.\n> > > > \n> > > > Signed-off-by: Corentin Labbe \n> > > > ---\n> > > > .../devicetree/bindings/net/dwmac-sun8i.txt | 127 +++++++++++++++++++--\n> > > > 1 file changed, 120 insertions(+), 7 deletions(-)\n> > > > \n> > > > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > > > index 725f3b187886..3fa0e54825ea 100644\n> > > > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > > > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n> > > > @@ -39,7 +39,7 @@ Optional properties for the following compatibles:\n> > > > - allwinner,leds-active-low: EPHY LEDs are active low\n> > > > \n> > > > Required child node of emac:\n> > > > -- mdio bus node: should be named mdio\n> > > > +- mdio bus node: should be labelled mdio\n> > > \n> > > labels do not end up in the final DT (while the names do) so why are\n> > > you making this change?\n> > > \n> > \n> > I misunderstood label/name.\n> > Anyway, this contrainst should leave due to \"snps,dwmac-mdio MDIOs are automatically registered\"\n> > \n> > > > \n> > > > Required properties of the mdio node:\n> > > > - #address-cells: shall be 1\n> > > > @@ -48,14 +48,28 @@ Required properties of the mdio node:\n> > > > The device node referenced by \"phy\" or \"phy-handle\" should be a child node\n> > > > of the mdio node. See phy.txt for the generic PHY bindings.\n> > > > \n> > > > -Required properties of the phy node with the following compatibles:\n> > > > +The following compatibles require an mdio-mux node called \"mdio-mux\":\n> > > > + - \"allwinner,sun8i-h3-emac\"\n> > > > + - \"allwinner,sun8i-v3s-emac\":\n> > > > +Required properties for the mdio-mux node:\n> > > > + - compatible = \"mdio-mux\"\n> > > > + - one child mdio for the integrated mdio\n> > > > + - one child mdio for the external mdio if present (V3s have none)\n> > > > +Required properties for the mdio-mux children node:\n> > > > + - reg: 0 for internal MDIO bus, 1 for external MDIO bus\n> > > > +\n> > > > +The following compatibles require a PHY node representing the integrated\n> > > > +PHY, under the integrated MDIO bus node if an mdio-mux node is used:\n> > > > - \"allwinner,sun8i-h3-emac\",\n> > > > - \"allwinner,sun8i-v3s-emac\":\n> > > > +\n> > > > +Required properties of the integrated phy node:\n> > > > - clocks: a phandle to the reference clock for the EPHY\n> > > > - resets: a phandle to the reset control for the EPHY\n> > > > +- phy-is-integrated\n> > > > +- Should be a child of the integrated mdio\n> > > \n> > > I'm not sure what you mean by that, you ask that it should (so not\n> > > required?) be a child of the integrated mdio...\n> > > \n> > \n> > I will change words to \"must\"\n> > \n> > > > \n> > > > -Example:\n> > > > -\n> > > > +Example with integrated PHY:\n> > > > emac: ethernet@1c0b000 {\n> > > > \tcompatible = \"allwinner,sun8i-h3-emac\";\n> > > > \tsyscon = <&syscon>;\n> > > > @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 {\n> > > > \tphy-handle = <&int_mii_phy>;\n> > > > \tphy-mode = \"mii\";\n> > > > \tallwinner,leds-active-low;\n> > > > +\n> > > > +\tmdio0: mdio {\n> > > \n> > > (You don't label it mdio here, unlike what was asked before)\n> > > \n> > > > +\t\t#address-cells = <1>;\n> > > > +\t\t#size-cells = <0>;\n> > > > +\t\tcompatible = \"snps,dwmac-mdio\";\n> > > > +\t};\n> > > \n> > > I think Rob wanted that node gone?\n> > > \n> > \n> > MDIO mux does not work without a parent MDIO, either gived by \"parent-bus\" or directly via mdio_mux_init() (like it is the case in dwmac-sun8i)\n> \n> Is the MDIO controller \"allwinner,sun8i-h3-emac\" or \"snps,dwmac-mdio\"? \n> If the latter, then I think the node is fine, but then the mux should be \n> a child node of it. IOW, the child of an MDIO controller should either \n> be a mux node or slave devices.\n> \n\nIt will be snps,dwmac-mdio but putting mdio-mux as a child of it (the mdio node) give me:\n[ 18.175338] libphy: stmmac: probed\n[ 18.175379] mdio_bus stmmac-0: /soc/ethernet@1c30000/mdio/mdio-mux has invalid PHY address\n[ 18.175408] mdio_bus stmmac-0: scan phy mdio-mux at address 0\n[ 18.175450] mdio_bus stmmac-0: scan phy mdio-mux at address 1\n[ 18.175482] mdio_bus stmmac-0: scan phy mdio-mux at address 2\n[ 18.175513] mdio_bus stmmac-0: scan phy mdio-mux at address 3\n[ 18.175544] mdio_bus stmmac-0: scan phy mdio-mux at address 4\n[ 18.175575] mdio_bus stmmac-0: scan phy mdio-mux at address 5\n[ 18.175607] mdio_bus stmmac-0: scan phy mdio-mux at address 6\n[ 18.175638] mdio_bus stmmac-0: scan phy mdio-mux at address 7\n[ 18.175669] mdio_bus stmmac-0: scan phy mdio-mux at address 8\n[ 18.175700] mdio_bus stmmac-0: scan phy mdio-mux at address 9\n[ 18.175731] mdio_bus stmmac-0: scan phy mdio-mux at address 10\n[ 18.175762] mdio_bus stmmac-0: scan phy mdio-mux at address 11\n[ 18.175795] mdio_bus stmmac-0: scan phy mdio-mux at address 12\n[ 18.175827] mdio_bus stmmac-0: scan phy mdio-mux at address 13\n[ 18.175858] mdio_bus stmmac-0: scan phy mdio-mux at address 14\n[ 18.175889] mdio_bus stmmac-0: scan phy mdio-mux at address 15\n[ 18.175919] mdio_bus stmmac-0: scan phy mdio-mux at address 16\n[ 18.175951] mdio_bus stmmac-0: scan phy mdio-mux at address 17\n[ 18.175982] mdio_bus stmmac-0: scan phy mdio-mux at address 18\n[ 18.176014] mdio_bus stmmac-0: scan phy mdio-mux at address 19\n[ 18.176045] mdio_bus stmmac-0: scan phy mdio-mux at address 20\n[ 18.176076] mdio_bus stmmac-0: scan phy mdio-mux at address 21\n[ 18.176107] mdio_bus stmmac-0: scan phy mdio-mux at address 22\n[ 18.176139] mdio_bus stmmac-0: scan phy mdio-mux at address 23\n[ 18.176170] mdio_bus stmmac-0: scan phy mdio-mux at address 24\n[ 18.176202] mdio_bus stmmac-0: scan phy mdio-mux at address 25\n[ 18.176233] mdio_bus stmmac-0: scan phy mdio-mux at address 26\n[ 18.176271] mdio_bus stmmac-0: scan phy mdio-mux at address 27\n[ 18.176320] mdio_bus stmmac-0: scan phy mdio-mux at address 28\n[ 18.176371] mdio_bus stmmac-0: scan phy mdio-mux at address 29\n[ 18.176420] mdio_bus stmmac-0: scan phy mdio-mux at address 30\n[ 18.176452] mdio_bus stmmac-0: scan phy mdio-mux at address 31\n\nAdding a fake to mdio-mux remove it.\nDoes it is acceptable ? or perhaps patching of_mdiobus_register() to not scan node with compatible \"mdio-mux\".\n\n> > \n> > > > +\tmdio-mux {\n> > > > +\t\tcompatible = \"mdio-mux\";\n> > > > +\t\t#address-cells = <1>;\n> > > > +\t\t#size-cells = <0>;\n> > > > +\n> > > > +\t\tint_mdio: mdio@1 {\n> > > > +\t\t\treg = <0>;\n> \n> unit address of 1 and reg prop of 0 don't match. Build your dtb with \n> W=2.\n> \n\nreg are arbitrary value (like mdio-mux-mmioreg), but in our case it is easy to fix this warning.\n\nThanks","headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"u3a/BJoT\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtSNM5MQRz9sBZ\n\tfor ;\n\tFri, 15 Sep 2017 04:53:23 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751685AbdINSxM (ORCPT );\n\tThu, 14 Sep 2017 14:53:12 -0400","from mail-wr0-f195.google.com ([209.85.128.195]:38049 \"EHLO\n\tmail-wr0-f195.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751621AbdINSxL (ORCPT\n\t); Thu, 14 Sep 2017 14:53:11 -0400","by mail-wr0-f195.google.com with SMTP id p37so109552wrb.5;\n\tThu, 14 Sep 2017 11:53:10 -0700 (PDT)","from Red ([2a01:cb1d:16e:1300:2e56:dcff:fed2:c6d6])\n\tby smtp.googlemail.com with ESMTPSA id\n\t25sm16558796wrv.8.2017.09.14.11.53.08\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 14 Sep 2017 11:53:08 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=date:from:to:cc:subject:message-id:references:mime-version\n\t:content-disposition:in-reply-to:user-agent;\n\tbh=oqiv0ancbSM49Phf+Whs9rdeLhf4ITAp1ubg//niem0=;\n\tb=u3a/BJoT3IUCt49pPBHDMxEGoopBI8NtT0eDhTaDtxNF9WKfmWWIe9lJ5ARUj//4lt\n\t9FJFs+qhTuEoHtNUqyiT83oMMkasc4jVvIxoLpNWEUh44AHB7Vrs4AJdEN20dTvqhBB4\n\tXwQ5Zac1T3NESTF1yoMAGXSGWPrl9PfD4HdFTk45F3G9Y8AG1fZaN0P4uLLQ5kkORJ/4\n\tlImeDvowloPbI/yPViedb1P2NwFbTE2x427tvzmKvhMw9Q1zwnUDiX5Mvdeev27gwMvi\n\tVF+rrwqUj6NFV3PAWogxRQ9HxLOlQPj1dtcbX+YeXZWuyZpxhm+g/ivgEXoWcMZHsdD8\n\tjGSA==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=oqiv0ancbSM49Phf+Whs9rdeLhf4ITAp1ubg//niem0=;\n\tb=NWhPEr0uuuAGGI+uD4TGGcKDHNn36PK6walU5w/KPyVy9S9XGxn50q0ZhwAvTUqpYR\n\tYJFUfnEir1wdLo4YUmK6uROPTKKyjOMju/hQErArNRBF2LC4GyFvhRWQ5x99XEXmk5uJ\n\t4/qPTKjbFwMommfKK2r5Qtx7XsygdNhOE1iIosewDkSYsk9Y2/d78KU0DQ689qHEWlCX\n\tuQVDDS/hG/7X3ARsRDZNXg+i3YCuEx2DxvePiX79VFFOlN2gRExihrRD7zHghSKj31Tf\n\tXIr8Bgjj4WX4l0MbZcY2J3c2tojPx0ezbC1vfIpMnqe9BOwnPW7dJbBYKjE40wWbiEAn\n\tfLaw==","X-Gm-Message-State":"AHPjjUinBgh1mpcsKkGCEyXwL+XqpjKHMvcBmQAOIhDk3kJGXAYzshxk\n\tc/diD5Unm2L5Pg==","X-Google-Smtp-Source":"ADKCNb7MF3MltRZnkBctTeisZ5BUikL8AQB2p/V5S2JSBkNe1OknLQ5lqOPQ5mEt5jJxFifq5WaeLw==","X-Received":"by 10.223.138.151 with SMTP id\n\ty23mr17599526wry.244.1505415189296; \n\tThu, 14 Sep 2017 11:53:09 -0700 (PDT)","Date":"Thu, 14 Sep 2017 20:53:01 +0200","From":"Corentin Labbe ","To":"Rob Herring ","Cc":"Maxime Ripard ,\n\tmark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk,\n\tcatalin.marinas@arm.com, will.deacon@arm.com,\n\tpeppe.cavallaro@st.com, alexandre.torgue@st.com, andrew@lunn.ch,\n\tf.fainelli@gmail.com, netdev@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org","Subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","Message-ID":"<20170914185301.GB4021@Red>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-6-clabbe.montjoie@gmail.com>\n\t<20170908072538.rqsp6dobwsqmzrsr@flea.lan>\n\t<20170908074325.GB29999@Red>\n\t<20170913182004.uniyo5opeilcfk7r@rob-hp-laptop>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170913182004.uniyo5opeilcfk7r@rob-hp-laptop>","User-Agent":"Mutt/1.7.2 (2016-11-26)","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"}},{"id":1768791,"web_url":"http://patchwork.ozlabs.org/comment/1768791/","msgid":"<20170914191949.GA3796@lunn.ch>","list_archive_url":null,"date":"2017-09-14T19:19:49","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":13608,"url":"http://patchwork.ozlabs.org/api/people/13608/","name":"Andrew Lunn","email":"andrew@lunn.ch"},"content":"> > Is the MDIO controller \"allwinner,sun8i-h3-emac\" or \"snps,dwmac-mdio\"? \n> > If the latter, then I think the node is fine, but then the mux should be \n> > a child node of it. IOW, the child of an MDIO controller should either \n> > be a mux node or slave devices.\n\nHi Rob\n\nUp until now, children of an MDIO bus have been MDIO devices. Those\nMDIO devices are either Ethernet PHYs, Ethernet Switches, or the\noddball devices that Broadcom iProc has, like generic PHYs.\n\nWe have never had MDIO-muxes as MDIO children. A Mux is not an MDIO\ndevice, and does not have the properties of an MDIO device. It is not\naddressable on the MDIO bus. The current MUXes are addressed via GPIOs\nor MMIO.\n\nThere other similar cases. i2c-mux-gpio is not a child of an i2c bus,\nnor i2c-mux-reg or gpio-mux. nxp,pca9548 is however a child of the i2c\nbus, because it is an i2c device itself...\n\nIf the MDIO mux was an MDIO device, i would agree with you. Bit it is\nnot, so lets not make it a child.\n\n\t Andrew","headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtT0C6zppz9s5L\n\tfor ;\n\tFri, 15 Sep 2017 05:20:58 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751789AbdINTUZ (ORCPT );\n\tThu, 14 Sep 2017 15:20:25 -0400","from vps0.lunn.ch ([185.16.172.187]:43696 \"EHLO vps0.lunn.ch\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751623AbdINTUY (ORCPT );\n\tThu, 14 Sep 2017 15:20:24 -0400","from andrew by vps0.lunn.ch with local (Exim 4.84_2)\n\t(envelope-from )\n\tid 1dsZfx-00016S-FE; Thu, 14 Sep 2017 21:19:49 +0200"],"Date":"Thu, 14 Sep 2017 21:19:49 +0200","From":"Andrew Lunn ","To":"Corentin Labbe ","Cc":"Rob Herring ,\n\tMaxime Ripard ,\n\tmark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk,\n\tcatalin.marinas@arm.com, will.deacon@arm.com,\n\tpeppe.cavallaro@st.com, alexandre.torgue@st.com,\n\tf.fainelli@gmail.com, netdev@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org","Subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","Message-ID":"<20170914191949.GA3796@lunn.ch>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-6-clabbe.montjoie@gmail.com>\n\t<20170908072538.rqsp6dobwsqmzrsr@flea.lan>\n\t<20170908074325.GB29999@Red>\n\t<20170913182004.uniyo5opeilcfk7r@rob-hp-laptop>\n\t<20170914185301.GB4021@Red>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170914185301.GB4021@Red>","User-Agent":"Mutt/1.5.23 (2014-03-12)","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"}},{"id":1770662,"web_url":"http://patchwork.ozlabs.org/comment/1770662/","msgid":"<20170919053112.GA15105@Red>","list_archive_url":null,"date":"2017-09-19T05:31:12","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Thu, Sep 14, 2017 at 09:19:49PM +0200, Andrew Lunn wrote:\n> > > Is the MDIO controller \"allwinner,sun8i-h3-emac\" or \"snps,dwmac-mdio\"? \n> > > If the latter, then I think the node is fine, but then the mux should be \n> > > a child node of it. IOW, the child of an MDIO controller should either \n> > > be a mux node or slave devices.\n> \n> Hi Rob\n> \n> Up until now, children of an MDIO bus have been MDIO devices. Those\n> MDIO devices are either Ethernet PHYs, Ethernet Switches, or the\n> oddball devices that Broadcom iProc has, like generic PHYs.\n> \n> We have never had MDIO-muxes as MDIO children. A Mux is not an MDIO\n> device, and does not have the properties of an MDIO device. It is not\n> addressable on the MDIO bus. The current MUXes are addressed via GPIOs\n> or MMIO.\n> \n> There other similar cases. i2c-mux-gpio is not a child of an i2c bus,\n> nor i2c-mux-reg or gpio-mux. nxp,pca9548 is however a child of the i2c\n> bus, because it is an i2c device itself...\n> \n> If the MDIO mux was an MDIO device, i would agree with you. Bit it is\n> not, so lets not make it a child.\n> \n> \t Andrew\n\nHello Rob, could you anwser/confirm please.\nI wait on this for sending the next version.\n\nThanks\nRegards\nCorentin Labbe","headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"njT8Mud9\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxBLy2wS8z9s5L\n\tfor ;\n\tTue, 19 Sep 2017 15:31:38 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751227AbdISFbY (ORCPT );\n\tTue, 19 Sep 2017 01:31:24 -0400","from mail-wm0-f48.google.com ([74.125.82.48]:49412 \"EHLO\n\tmail-wm0-f48.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750713AbdISFbX (ORCPT\n\t); Tue, 19 Sep 2017 01:31:23 -0400","by mail-wm0-f48.google.com with SMTP id e71so1850691wmg.4;\n\tMon, 18 Sep 2017 22:31:22 -0700 (PDT)","from Red ([2a01:cb1d:16e:1300:2e56:dcff:fed2:c6d6])\n\tby smtp.googlemail.com with ESMTPSA id\n\ta69sm645726wme.40.2017.09.18.22.31.20\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tMon, 18 Sep 2017 22:31:21 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=date:from:to:cc:subject:message-id:references:mime-version\n\t:content-disposition:in-reply-to:user-agent;\n\tbh=Z8EAt6TUHOiVEmCyA9AVDGQJNlU1ILLee5oOIqGGrBQ=;\n\tb=njT8Mud928NfeEtCIotbf4Uqo9jq73j/lE/EgNIcp8NmPTJtbaP7cZ+6Mjk0N3h4ey\n\te77yCt13JIqZ1kWXObVNqIkjRyny4jpL6OLeGY2CYPzxFt+GFZ7FMwC+THXPvm0tmqvM\n\tfAv33o/l1aOy1C6puSF+WrZCIMxhbkRueF+/RP46dL39hNe7h1PJtaP0Sbmxhdrs7Of5\n\tj4Ukom9u4DcGic216Cv4qYz16iMm1p2ZVXKTs00DevOoQ558NhCi4cIG3m9a0IR/CjMF\n\tv9yw+o+Foz7c9Fqtfak+R4h0DQu35F2WUjUrBLr1pa5CirPbznZwftoE7oxgj899gO8r\n\ti2+g==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=Z8EAt6TUHOiVEmCyA9AVDGQJNlU1ILLee5oOIqGGrBQ=;\n\tb=K325q0ozsAMoLHU5tQO4+kPKe0jqxW3rsRustoRpF9Th7o/HeC2AXwNVomMP7PjL6J\n\ttdDvbv0aPbOS8xVUafE3hxiBdinXOqCEI6JjPGG08q4CxUrnKL5OLOvIKxTWJZY33y9I\n\twpfAxleMYNZ8PgeLKhCNfcwyGR+U7INDhd6G/RypsoJLFPUAvHG4vvQ1j0mt0WpovIvg\n\tGy2qezCqhVA8Sz4wr/EetEMSqOir4n8PFMoc85WLuLiv5kMkW6gQLAdhZvnCKJr6k75g\n\tHI/KIKErjkdw4Mp33K7nD79SWqF/q02JAyc5sXf54/6d9mXwp5VvnVKO6XiADBmPymWx\n\tIAmA==","X-Gm-Message-State":"AHPjjUiRdRUzej4wRIdlr/WjLzrQuURHVmdNDRyDmBRAO+zjZ06aWYlP\n\tmcnId4x3yrarf+A3eITS8Oo=","X-Google-Smtp-Source":"AOwi7QB0U3VVpVX7hvaU/qhq6dPmGQ+1hr+A5Nw2wNwQyF+48SD3b2TnvOmvK6DAkC/dyK/wwfMBGg==","X-Received":"by 10.28.16.16 with SMTP id 16mr415572wmq.62.1505799081755;\n\tMon, 18 Sep 2017 22:31:21 -0700 (PDT)","Date":"Tue, 19 Sep 2017 07:31:12 +0200","From":"Corentin Labbe ","To":"robh@kernel.org","Cc":"Rob Herring ,\n\tMaxime Ripard ,\n\tmark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk,\n\tcatalin.marinas@arm.com, will.deacon@arm.com,\n\tpeppe.cavallaro@st.com, alexandre.torgue@st.com,\n\tf.fainelli@gmail.com, netdev@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org, andrew@lunn.ch","Subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","Message-ID":"<20170919053112.GA15105@Red>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-6-clabbe.montjoie@gmail.com>\n\t<20170908072538.rqsp6dobwsqmzrsr@flea.lan>\n\t<20170908074325.GB29999@Red>\n\t<20170913182004.uniyo5opeilcfk7r@rob-hp-laptop>\n\t<20170914185301.GB4021@Red> <20170914191949.GA3796@lunn.ch>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170914191949.GA3796@lunn.ch>","User-Agent":"Mutt/1.7.2 (2016-11-26)","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"}},{"id":1771515,"web_url":"http://patchwork.ozlabs.org/comment/1771515/","msgid":"","list_archive_url":null,"date":"2017-09-20T02:49:52","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Thu, Sep 14, 2017 at 2:19 PM, Andrew Lunn wrote:\n>> > Is the MDIO controller \"allwinner,sun8i-h3-emac\" or \"snps,dwmac-mdio\"?\n>> > If the latter, then I think the node is fine, but then the mux should be\n>> > a child node of it. IOW, the child of an MDIO controller should either\n>> > be a mux node or slave devices.\n>\n> Hi Rob\n>\n> Up until now, children of an MDIO bus have been MDIO devices. Those\n> MDIO devices are either Ethernet PHYs, Ethernet Switches, or the\n> oddball devices that Broadcom iProc has, like generic PHYs.\n>\n> We have never had MDIO-muxes as MDIO children. A Mux is not an MDIO\n> device, and does not have the properties of an MDIO device. It is not\n> addressable on the MDIO bus. The current MUXes are addressed via GPIOs\n> or MMIO.\n\nThe DT parent/child relationship defines the bus topology. We describe\nMDIO buses in that way and if a mux is sitting between the controller\nand the devices, then the DT hierarchy should reflect that. Now\nsometimes we have 2 options for what interface has the parent/child\nrelationship (e.g. an I2C controlled USB hub chip), but in this case\nwe don't.\n\n> There other similar cases. i2c-mux-gpio is not a child of an i2c bus,\n> nor i2c-mux-reg or gpio-mux. nxp,pca9548 is however a child of the i2c\n> bus, because it is an i2c device itself...\n\nSome are i2c controlled mux devices, but some can be GPIO controlled.\n\n>\n> If the MDIO mux was an MDIO device, i would agree with you. Bit it is\n> not, so lets not make it a child.\n>\n> Andrew\n>\n> _______________________________________________\n> linux-arm-kernel mailing list\n> linux-arm-kernel@lists.infradead.org\n> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel","headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","mail.kernel.org;\n\tdmarc=none (p=none dis=none) header.from=kernel.org","mail.kernel.org;\n\tspf=none smtp.mailfrom=robh@kernel.org"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxkkb5kgWz9s78\n\tfor ;\n\tWed, 20 Sep 2017 12:50:31 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751544AbdITCuQ (ORCPT );\n\tTue, 19 Sep 2017 22:50:16 -0400","from mail.kernel.org ([198.145.29.99]:39546 \"EHLO mail.kernel.org\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1750733AbdITCuO (ORCPT );\n\tTue, 19 Sep 2017 22:50:14 -0400","from mail-qk0-f173.google.com (mail-qk0-f173.google.com\n\t[209.85.220.173])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby mail.kernel.org (Postfix) with ESMTPSA id 1818821D28;\n\tWed, 20 Sep 2017 02:50:14 +0000 (UTC)","by mail-qk0-f173.google.com with SMTP id b23so1509430qkg.1;\n\tTue, 19 Sep 2017 19:50:14 -0700 (PDT)","by 10.12.209.75 with HTTP; Tue, 19 Sep 2017 19:49:52 -0700 (PDT)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mail.kernel.org 1818821D28","X-Gm-Message-State":"AHPjjUhN5Ew/SBwZ9asfGif2awQzEGLNuce/seixQa8GxTSn9DSxLIT9\n\tU4Uo7YQSZNJoONA3bmA+9gJ7h/e5ID+Mz+M0gg==","X-Google-Smtp-Source":"AOwi7QAd0ok1Ei+6Tj+NrCahxTwP5Uigg48YeVgmV8FYFtkhdxfsms6QvX+zbC4choJzEF+SYUREUKfL3CMTfGGsQjM=","X-Received":"by 10.55.95.71 with SMTP id t68mr4989911qkb.233.1505875813191;\n\tTue, 19 Sep 2017 19:50:13 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170914191949.GA3796@lunn.ch>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-6-clabbe.montjoie@gmail.com>\n\t<20170908072538.rqsp6dobwsqmzrsr@flea.lan>\n\t<20170908074325.GB29999@Red>\n\t<20170913182004.uniyo5opeilcfk7r@rob-hp-laptop>\n\t<20170914185301.GB4021@Red> <20170914191949.GA3796@lunn.ch>","From":"Rob Herring ","Date":"Tue, 19 Sep 2017 21:49:52 -0500","X-Gmail-Original-Message-ID":"","Message-ID":"","Subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","To":"Andrew Lunn ","Cc":"Corentin Labbe ,\n\tMark Rutland ,\n\tFlorian Fainelli ,\n\tAlexandre Torgue ,\n\t\"devicetree@vger.kernel.org\" ,\n\tCatalin Marinas ,\n\tWill Deacon , Russell King ,\n\t\"linux-kernel@vger.kernel.org\" ,\n\tChen-Yu Tsai , netdev ,\n\tGiuseppe CAVALLARO ,\n\tMaxime Ripard ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"}},{"id":1772144,"web_url":"http://patchwork.ozlabs.org/comment/1772144/","msgid":"<20170920182350.GA21482@Red>","list_archive_url":null,"date":"2017-09-20T18:23:50","subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/people/64152/","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"content":"On Tue, Sep 19, 2017 at 09:49:52PM -0500, Rob Herring wrote:\n> On Thu, Sep 14, 2017 at 2:19 PM, Andrew Lunn wrote:\n> >> > Is the MDIO controller \"allwinner,sun8i-h3-emac\" or \"snps,dwmac-mdio\"?\n> >> > If the latter, then I think the node is fine, but then the mux should be\n> >> > a child node of it. IOW, the child of an MDIO controller should either\n> >> > be a mux node or slave devices.\n> >\n> > Hi Rob\n> >\n> > Up until now, children of an MDIO bus have been MDIO devices. Those\n> > MDIO devices are either Ethernet PHYs, Ethernet Switches, or the\n> > oddball devices that Broadcom iProc has, like generic PHYs.\n> >\n> > We have never had MDIO-muxes as MDIO children. A Mux is not an MDIO\n> > device, and does not have the properties of an MDIO device. It is not\n> > addressable on the MDIO bus. The current MUXes are addressed via GPIOs\n> > or MMIO.\n> \n> The DT parent/child relationship defines the bus topology. We describe\n> MDIO buses in that way and if a mux is sitting between the controller\n> and the devices, then the DT hierarchy should reflect that. Now\n> sometimes we have 2 options for what interface has the parent/child\n> relationship (e.g. an I2C controlled USB hub chip), but in this case\n> we don't.\n> \n\nPutting mdio-mux as a child of it (the mdio node) give me:\n[ 18.175338] libphy: stmmac: probed\n[ 18.175379] mdio_bus stmmac-0: /soc/ethernet@1c30000/mdio/mdio-mux has invalid PHY address\n[ 18.175408] mdio_bus stmmac-0: scan phy mdio-mux at address 0\n[ 18.175450] mdio_bus stmmac-0: scan phy mdio-mux at address 1\n[ 18.175482] mdio_bus stmmac-0: scan phy mdio-mux at address 2\n[ 18.175513] mdio_bus stmmac-0: scan phy mdio-mux at address 3\n[ 18.175544] mdio_bus stmmac-0: scan phy mdio-mux at address 4\n[ 18.175575] mdio_bus stmmac-0: scan phy mdio-mux at address 5\n[ 18.175607] mdio_bus stmmac-0: scan phy mdio-mux at address 6\n[ 18.175638] mdio_bus stmmac-0: scan phy mdio-mux at address 7\n[ 18.175669] mdio_bus stmmac-0: scan phy mdio-mux at address 8\n[ 18.175700] mdio_bus stmmac-0: scan phy mdio-mux at address 9\n[ 18.175731] mdio_bus stmmac-0: scan phy mdio-mux at address 10\n[ 18.175762] mdio_bus stmmac-0: scan phy mdio-mux at address 11\n[ 18.175795] mdio_bus stmmac-0: scan phy mdio-mux at address 12\n[ 18.175827] mdio_bus stmmac-0: scan phy mdio-mux at address 13\n[ 18.175858] mdio_bus stmmac-0: scan phy mdio-mux at address 14\n[ 18.175889] mdio_bus stmmac-0: scan phy mdio-mux at address 15\n[ 18.175919] mdio_bus stmmac-0: scan phy mdio-mux at address 16\n[ 18.175951] mdio_bus stmmac-0: scan phy mdio-mux at address 17\n[ 18.175982] mdio_bus stmmac-0: scan phy mdio-mux at address 18\n[ 18.176014] mdio_bus stmmac-0: scan phy mdio-mux at address 19\n[ 18.176045] mdio_bus stmmac-0: scan phy mdio-mux at address 20\n[ 18.176076] mdio_bus stmmac-0: scan phy mdio-mux at address 21\n[ 18.176107] mdio_bus stmmac-0: scan phy mdio-mux at address 22\n[ 18.176139] mdio_bus stmmac-0: scan phy mdio-mux at address 23\n[ 18.176170] mdio_bus stmmac-0: scan phy mdio-mux at address 24\n[ 18.176202] mdio_bus stmmac-0: scan phy mdio-mux at address 25\n[ 18.176233] mdio_bus stmmac-0: scan phy mdio-mux at address 26\n[ 18.176271] mdio_bus stmmac-0: scan phy mdio-mux at address 27\n[ 18.176320] mdio_bus stmmac-0: scan phy mdio-mux at address 28\n[ 18.176371] mdio_bus stmmac-0: scan phy mdio-mux at address 29\n[ 18.176420] mdio_bus stmmac-0: scan phy mdio-mux at address 30\n[ 18.176452] mdio_bus stmmac-0: scan phy mdio-mux at address 31\n\nAdding a fake to mdio-mux remove it, but I found that a bit ugly.\nOr perhaps patching of_mdiobus_register() to not scan node with compatible \"mdio-mux\".\n\nWhat do you think ?\n\nRegards","headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tWed, 20 Sep 2017 11:23:59 -0700 (PDT)","Date":"Wed, 20 Sep 2017 20:23:50 +0200","From":"Corentin Labbe ","To":"Rob Herring ","Cc":"Andrew Lunn , Mark Rutland ,\n\tFlorian Fainelli ,\n\tAlexandre Torgue ,\n\t\"devicetree@vger.kernel.org\" ,\n\tCatalin Marinas ,\n\tWill Deacon , Russell King ,\n\t\"linux-kernel@vger.kernel.org\" ,\n\tChen-Yu Tsai , netdev ,\n\tGiuseppe CAVALLARO ,\n\tMaxime Ripard ,\n\t\"linux-arm-kernel@lists.infradead.org\" \n\t","Subject":"Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","Message-ID":"<20170920182350.GA21482@Red>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>\n\t<20170908071156.5115-6-clabbe.montjoie@gmail.com>\n\t<20170908072538.rqsp6dobwsqmzrsr@flea.lan>\n\t<20170908074325.GB29999@Red>\n\t<20170913182004.uniyo5opeilcfk7r@rob-hp-laptop>\n\t<20170914185301.GB4021@Red> <20170914191949.GA3796@lunn.ch>\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"","User-Agent":"Mutt/1.7.2 (2016-11-26)","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"}}]