[{"id":1765154,"web_url":"http://patchwork.ozlabs.org/comment/1765154/","msgid":"","list_archive_url":null,"date":"2017-09-08T08:39:07","subject":"Re: [U-Boot] rockchip: enable SPL_SYSRESET config for all sockchip\n\tSoCs","submitter":{"id":53488,"url":"http://patchwork.ozlabs.org/api/people/53488/","name":"Philipp Tomsich","email":"philipp.tomsich@theobroma-systems.com"},"content":"> After the patch below, we need to add SPL_SYSRESET for do_reset()\n> in SPL:\n> 87c16d4 drivers: spl: consistently use the $(SPL_TPL_) macro\n> \n> Signed-off-by: Kever Yang \n> ---\n> \n> arch/arm/Kconfig | 1 +\n> 1 file changed, 1 insertion(+)\n> \n\nAcked-by: Philipp Tomsich ","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xpW2g58DKz9s8J\n\tfor ;\n\tFri, 8 Sep 2017 18:39:23 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 6710AC21E84; Fri, 8 Sep 2017 08:39:12 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id F0F54C21D19;\n\tFri, 8 Sep 2017 08:39:09 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 1E622C21D19; Fri, 8 Sep 2017 08:39:08 +0000 (UTC)","from mail.theobroma-systems.com (vegas.theobroma-systems.com\n\t[144.76.126.164])\n\tby lists.denx.de (Postfix) with ESMTPS id E964EC21C5C\n\tfor ; Fri, 8 Sep 2017 08:39:07 +0000 (UTC)","from 89-104-28-141.customer.bnet.at ([89.104.28.141]:55586\n\thelo=vpn-10-11-0-14.lan) by mail.theobroma-systems.com with esmtpsa\n\t(TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80)\n\t(envelope-from )\n\tid 1dqEod-0000P7-4y; Fri, 08 Sep 2017 10:39:07 +0200"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0","MIME-Version":"1.0","From":"Philipp Tomsich ","To":"Kever Yang ","In-Reply-To":"<1504839654-16808-1-git-send-email-kever.yang@rock-chips.com>","References":"<1504839654-16808-1-git-send-email-kever.yang@rock-chips.com>","Message-Id":"","Date":"Fri, 08 Sep 2017 10:39:07 +0200","Cc":"u-boot@lists.denx.de, Albert Aribaud ","Subject":"Re: [U-Boot] rockchip: enable SPL_SYSRESET config for all sockchip\n\tSoCs","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1765157,"web_url":"http://patchwork.ozlabs.org/comment/1765157/","msgid":"","list_archive_url":null,"date":"2017-09-08T08:39:11","subject":"Re: [U-Boot] rockchip: enable SPL_SYSRESET config for all sockchip\n\tSoCs","submitter":{"id":53488,"url":"http://patchwork.ozlabs.org/api/people/53488/","name":"Philipp Tomsich","email":"philipp.tomsich@theobroma-systems.com"},"content":"> After the patch below, we need to add SPL_SYSRESET for do_reset()\n> in SPL:\n> 87c16d4 drivers: spl: consistently use the $(SPL_TPL_) macro\n> \n> Signed-off-by: Kever Yang \n> ---\n> \n> arch/arm/Kconfig | 1 +\n> 1 file changed, 1 insertion(+)\n> \n\nReviewed-by: Philipp Tomsich ","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xpW4H52F5z9rxl\n\tfor ;\n\tFri, 8 Sep 2017 18:40:47 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 742CFC21EE9; Fri, 8 Sep 2017 08:39:57 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 05539C21ED7;\n\tFri, 8 Sep 2017 08:39:35 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid A09F3C21D19; Fri, 8 Sep 2017 08:39:15 +0000 (UTC)","from mail.theobroma-systems.com (vegas.theobroma-systems.com\n\t[144.76.126.164])\n\tby lists.denx.de (Postfix) with ESMTPS id 713BCC21DE6\n\tfor ; Fri, 8 Sep 2017 08:39:12 +0000 (UTC)","from 89-104-28-141.customer.bnet.at ([89.104.28.141]:55591\n\thelo=vpn-10-11-0-14.lan) by mail.theobroma-systems.com with esmtpsa\n\t(TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80)\n\t(envelope-from )\n\tid 1dqEoh-0000PE-Ah; Fri, 08 Sep 2017 10:39:11 +0200"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0","MIME-Version":"1.0","From":"Philipp Tomsich ","To":"Kever Yang ","In-Reply-To":"<1504839654-16808-1-git-send-email-kever.yang@rock-chips.com>","References":"<1504839654-16808-1-git-send-email-kever.yang@rock-chips.com>","Message-Id":"","Date":"Fri, 08 Sep 2017 10:39:11 +0200","Cc":"u-boot@lists.denx.de, Albert Aribaud ","Subject":"Re: [U-Boot] rockchip: enable SPL_SYSRESET config for all sockchip\n\tSoCs","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1765188,"web_url":"http://patchwork.ozlabs.org/comment/1765188/","msgid":"<6994DF37-C437-43FD-A14F-881B61A9F4C4@theobroma-systems.com>","list_archive_url":null,"date":"2017-09-08T09:25:57","subject":"Re: [U-Boot] [PATCH] rockchip: enable SPL_SYSRESET config for all\n\tsockchip SoCs","submitter":{"id":53488,"url":"http://patchwork.ozlabs.org/api/people/53488/","name":"Philipp Tomsich","email":"philipp.tomsich@theobroma-systems.com"},"content":"Kever,\n\nNote that this patch applies neither to master nor to next cleanly.\nGiven that it’s a single line change, I’ll patch this in by hand.\n\nThanks,\nPhilipp.\n\n\n> On 8 Sep 2017, at 05:00, Kever Yang wrote:\n> \n> After the patch below, we need to add SPL_SYSRESET for do_reset()\n> in SPL:\n> 87c16d4 drivers: spl: consistently use the $(SPL_TPL_) macro\n> \n> Signed-off-by: Kever Yang \n> ---\n> \n> arch/arm/Kconfig | 1 +\n> 1 file changed, 1 insertion(+)\n> \n> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig\n> index e01b72e..7872cfd 100644\n> --- a/arch/arm/Kconfig\n> +++ b/arch/arm/Kconfig\n> @@ -1118,6 +1118,7 @@ config ARCH_ROCKCHIP\n> \timply USB_FUNCTION_FASTBOOT\n> \timply USB_FUNCTION_ROCKUSB\n> \timply CMD_ROCKUSB\n> +\timply SPL_SYSRESET\n> \n> config TARGET_THUNDERX_88XX\n> \tbool \"Support ThunderX 88xx\"\n> -- \n> 1.9.1\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xpX4g554Gz9rxm\n\tfor ;\n\tFri, 8 Sep 2017 19:26:10 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 8B72BC21E42; Fri, 8 Sep 2017 09:26:04 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 34481C21D80;\n\tFri, 8 Sep 2017 09:26:02 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid D9177C21DC1; Fri, 8 Sep 2017 09:26:00 +0000 (UTC)","from mail.theobroma-systems.com (vegas.theobroma-systems.com\n\t[144.76.126.164])\n\tby lists.denx.de (Postfix) with ESMTPS id 9D761C21C5C\n\tfor ; Fri, 8 Sep 2017 09:26:00 +0000 (UTC)","from 89-104-28-141.customer.bnet.at ([89.104.28.141]:57606\n\thelo=[192.168.2.129]) by mail.theobroma-systems.com with esmtpsa\n\t(TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80)\n\t(envelope-from )\n\tid 1dqFXy-0001pl-QM; Fri, 08 Sep 2017 11:25:58 +0200"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"*","X-Spam-Status":"No, score=1.0 required=5.0 tests=HK_NAME_DR autolearn=no\n\tautolearn_force=no version=3.4.0","Mime-Version":"1.0 (Mac OS X Mail 10.3 \\(3273\\))","From":"\"Dr. Philipp Tomsich\" ","In-Reply-To":"<1504839654-16808-1-git-send-email-kever.yang@rock-chips.com>","Date":"Fri, 8 Sep 2017 11:25:57 +0200","Message-Id":"<6994DF37-C437-43FD-A14F-881B61A9F4C4@theobroma-systems.com>","References":"<1504839654-16808-1-git-send-email-kever.yang@rock-chips.com>","To":"Kever Yang ","X-Mailer":"Apple Mail (2.3273)","Cc":"u-boot@lists.denx.de, Albert Aribaud ","Subject":"Re: [U-Boot] [PATCH] rockchip: enable SPL_SYSRESET config for all\n\tsockchip SoCs","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1765211,"web_url":"http://patchwork.ozlabs.org/comment/1765211/","msgid":"","list_archive_url":null,"date":"2017-09-08T09:44:10","subject":"Re: [U-Boot] rockchip: enable SPL_SYSRESET config for all sockchip\n\tSoCs","submitter":{"id":53488,"url":"http://patchwork.ozlabs.org/api/people/53488/","name":"Philipp Tomsich","email":"philipp.tomsich@theobroma-systems.com"},"content":"> After the patch below, we need to add SPL_SYSRESET for do_reset()\n> in SPL:\n> 87c16d4 drivers: spl: consistently use the $(SPL_TPL_) macro\n> \n> Signed-off-by: Kever Yang \n> ---\n> \n> arch/arm/Kconfig | 1 +\n> 1 file changed, 1 insertion(+)\n> \n\nApplied to u-boot-rockchip, thanks!","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xpXVP0d5wz9s81\n\tfor ;\n\tFri, 8 Sep 2017 19:45:01 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid B44B8C21EC1; Fri, 8 Sep 2017 09:44:32 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id CE9CAC21EC1;\n\tFri, 8 Sep 2017 09:44:17 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 98ACFC21DBE; Fri, 8 Sep 2017 09:44:14 +0000 (UTC)","from mail.theobroma-systems.com (vegas.theobroma-systems.com\n\t[144.76.126.164])\n\tby lists.denx.de (Postfix) with ESMTPS id 5F4DAC21D80\n\tfor ; Fri, 8 Sep 2017 09:44:14 +0000 (UTC)","from 89-104-28-141.customer.bnet.at ([89.104.28.141]:58487\n\thelo=vpn-10-11-0-14.lan) by mail.theobroma-systems.com with esmtpsa\n\t(TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80)\n\t(envelope-from )\n\tid 1dqFpa-0002Gl-64; Fri, 08 Sep 2017 11:44:10 +0200"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0","MIME-Version":"1.0","From":"Philipp Tomsich ","To":"Kever Yang ","In-Reply-To":"<1504839654-16808-1-git-send-email-kever.yang@rock-chips.com>","References":"<1504839654-16808-1-git-send-email-kever.yang@rock-chips.com>","Message-Id":"","Date":"Fri, 08 Sep 2017 11:44:10 +0200","Cc":"u-boot@lists.denx.de, Albert Aribaud ","Subject":"Re: [U-Boot] rockchip: enable SPL_SYSRESET config for all sockchip\n\tSoCs","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1766031,"web_url":"http://patchwork.ozlabs.org/comment/1766031/","msgid":"","list_archive_url":null,"date":"2017-09-11T02:06:22","subject":"Re: [U-Boot] [PATCH] rockchip: enable SPL_SYSRESET config for all\n\tsockchip SoCs","submitter":{"id":64532,"url":"http://patchwork.ozlabs.org/api/people/64532/","name":"Kever Yang","email":"kever.yang@rock-chips.com"},"content":"Philipp,\n\n Sorry for it can not be applied directly, I believe that's because \nthe rockusb\n\npatch still not applied.\n\n\nThanks,\n- Kever\nOn 09/08/2017 05:25 PM, Dr. Philipp Tomsich wrote:\n> Kever,\n>\n> Note that this patch applies neither to master nor to next cleanly.\n> Given that it’s a single line change, I’ll patch this in by hand.\n>\n> Thanks,\n> Philipp.\n>\n>\n>> On 8 Sep 2017, at 05:00, Kever Yang wrote:\n>>\n>> After the patch below, we need to add SPL_SYSRESET for do_reset()\n>> in SPL:\n>> 87c16d4 drivers: spl: consistently use the $(SPL_TPL_) macro\n>>\n>> Signed-off-by: Kever Yang \n>> ---\n>>\n>> arch/arm/Kconfig | 1 +\n>> 1 file changed, 1 insertion(+)\n>>\n>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig\n>> index e01b72e..7872cfd 100644\n>> --- a/arch/arm/Kconfig\n>> +++ b/arch/arm/Kconfig\n>> @@ -1118,6 +1118,7 @@ config ARCH_ROCKCHIP\n>> \timply USB_FUNCTION_FASTBOOT\n>> \timply USB_FUNCTION_ROCKUSB\n>> \timply CMD_ROCKUSB\n>> +\timply SPL_SYSRESET\n>>\n>> config TARGET_THUNDERX_88XX\n>> \tbool \"Support ThunderX 88xx\"\n>> -- \n>> 1.9.1\n>>\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xrBBB3BF6z9s7g\n\tfor ;\n\tMon, 11 Sep 2017 12:06:42 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 38863C21D82; Mon, 11 Sep 2017 02:06:39 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 055D8C21C4C;\n\tMon, 11 Sep 2017 02:06:37 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid AC35CC21C4C; Mon, 11 Sep 2017 02:06:35 +0000 (UTC)","from regular1.263xmail.com (regular1.263xmail.com [211.150.99.132])\n\tby lists.denx.de (Postfix) with ESMTPS id E9EBCC21C41\n\tfor ; Mon, 11 Sep 2017 02:06:34 +0000 (UTC)","from kever.yang?rock-chips.com (unknown [192.168.165.141])\n\tby regular1.263xmail.com (Postfix) with ESMTP id 0E89E9433;\n\tMon, 11 Sep 2017 10:06:30 +0800 (CST)","from [192.168.60.65] (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id 95DF341B;\n\tMon, 11 Sep 2017 10:06:25 +0800 (CST)","from [192.168.60.65] (unknown [103.29.142.67])\n\tby smtp.263.net (Postfix) whith ESMTP id 110848J7RVI;\n\tMon, 11 Sep 2017 10:06:28 +0800 (CST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tRCVD_IN_MSPIKE_H2 autolearn=unavailable autolearn_force=no\n\tversion=3.4.0","X-263anti-spam":"KSV:0;BIG:0;","X-MAIL-GRAY":"0","X-MAIL-DELIVERY":"1","X-KSVirus-check":"0","X-ADDR-CHECKED4":"1","X-ABS-CHECKED":"1","X-SKE-CHECKED":"1","X-ANTISPAM-LEVEL":"2","X-RL-SENDER":"kever.yang@rock-chips.com","X-FST-TO":"albert.u.boot@aribaud.net","X-SENDER-IP":"103.29.142.67","X-LOGIN-NAME":"kever.yang@rock-chips.com","X-UNIQUE-TAG":"","X-ATTACHMENT-NUM":"0","X-SENDER":"yk@rock-chips.com","X-DNS-TYPE":"0","To":"\"Dr. Philipp Tomsich\" ","References":"<1504839654-16808-1-git-send-email-kever.yang@rock-chips.com>\n\t<6994DF37-C437-43FD-A14F-881B61A9F4C4@theobroma-systems.com>","From":"Kever Yang ","Message-ID":"","Date":"Mon, 11 Sep 2017 10:06:22 +0800","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101\n\tThunderbird/45.8.0","MIME-Version":"1.0","In-Reply-To":"<6994DF37-C437-43FD-A14F-881B61A9F4C4@theobroma-systems.com>","Cc":"u-boot@lists.denx.de, Albert Aribaud ","Subject":"Re: [U-Boot] [PATCH] rockchip: enable SPL_SYSRESET config for all\n\tsockchip SoCs","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Transfer-Encoding":"base64","Content-Type":"text/plain; charset=\"utf-8\"; Format=\"flowed\"","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}}]