[{"id":1764972,"web_url":"http://patchwork.ozlabs.org/comment/1764972/","msgid":"<1504821938.12628.28.camel@kernel.crashing.org>","date":"2017-09-07T22:05:38","subject":"Re: [RFC PATCH 8/8] powerpc/64s/radix: Only flush local TLB for\n\tspurious fault flushes","submitter":{"id":38,"url":"http://patchwork.ozlabs.org/api/people/38/","name":"Benjamin Herrenschmidt","email":"benh@kernel.crashing.org"},"content":"On Fri, 2017-09-08 at 00:51 +1000, Nicholas Piggin wrote:\n> When permissiveness is relaxed, or found to have been relaxed by\n> another thread, we flush that address out of the TLB to avoid a\n> future fault or micro-fault due to a stale TLB entry.\n> \n> Currently for processes with TLBs on other CPUs, this flush is always\n> done with a global tlbie. Although that could reduce faults on remote\n> CPUs, a broadcast operation seems to be wasteful for something that\n> can be handled in-core by the remote CPU if it comes to it.\n> \n> This is not benchmarked yet. It does seem cut some tlbie operations\n> from the bus.\n\nWhat happens with the nest MMU here ?\n\n> Signed-off-by: Nicholas Piggin \n> ---\n> .../powerpc/include/asm/book3s/64/tlbflush-radix.h | 5 ++++\n> arch/powerpc/include/asm/book3s/64/tlbflush.h | 11 +++++++++\n> arch/powerpc/mm/pgtable-book3s64.c | 5 +++-\n> arch/powerpc/mm/pgtable.c | 2 +-\n> arch/powerpc/mm/tlb-radix.c | 27 ++++++++++++++++++++++\n> 5 files changed, 48 insertions(+), 2 deletions(-)\n> \n> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h\n> index b12460b306a7..34cd864b8fc1 100644\n> --- a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h\n> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h\n> @@ -16,6 +16,8 @@ extern bool radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long sta\n> \t\t\t\t\t unsigned long end, int psize);\n> extern void radix__flush_pmd_tlb_range(struct vm_area_struct *vma,\n> \t\t\t\t unsigned long start, unsigned long end);\n> +extern void radix__local_flush_pmd_tlb_range(struct vm_area_struct *vma,\n> +\t\t\t\tunsigned long start, unsigned long end);\n> extern void radix__flush_tlb_range(struct vm_area_struct *vma, unsigned long start,\n> \t\t\t unsigned long end);\n> extern void radix__flush_tlb_kernel_range(unsigned long start, unsigned long end);\n> @@ -24,6 +26,9 @@ extern void radix__local_flush_tlb_mm(struct mm_struct *mm);\n> extern void radix__local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);\n> extern void radix__local_flush_tlb_page_psize(struct mm_struct *mm, unsigned long vmaddr,\n> \t\t\t\t\t int psize);\n> +extern void radix__local_flush_tlb_range_psize(struct mm_struct *mm,\n> +\t\t\t\tunsigned long start, unsigned long end,\n> +\t\t\t\tint psize);\n> extern void radix__tlb_flush(struct mmu_gather *tlb);\n> #ifdef CONFIG_SMP\n> extern void radix__flush_tlb_mm(struct mm_struct *mm);\n> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush.h b/arch/powerpc/include/asm/book3s/64/tlbflush.h\n> index 72b925f97bab..8a8b3e11a28e 100644\n> --- a/arch/powerpc/include/asm/book3s/64/tlbflush.h\n> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush.h\n> @@ -83,6 +83,17 @@ static inline void flush_tlb_page(struct vm_area_struct *vma,\n> #define flush_tlb_mm(mm)\t\tlocal_flush_tlb_mm(mm)\n> #define flush_tlb_page(vma, addr)\tlocal_flush_tlb_page(vma, addr)\n> #endif /* CONFIG_SMP */\n> +\n> +#define flush_tlb_fix_spurious_fault flush_tlb_fix_spurious_fault\n> +static inline void flush_tlb_fix_spurious_fault(struct vm_area_struct *vma,\n> +\t\t\t\t\t\tunsigned long address)\n> +{\n> +\tif (radix_enabled())\n> +\t\tradix__local_flush_tlb_page(vma, address);\n> +\telse\n> +\t\tflush_tlb_page(vma, address);\n> +}\n> +\n> /*\n> * flush the page walk cache for the address\n> */\n> diff --git a/arch/powerpc/mm/pgtable-book3s64.c b/arch/powerpc/mm/pgtable-book3s64.c\n> index 3b65917785a5..e46f346388d6 100644\n> --- a/arch/powerpc/mm/pgtable-book3s64.c\n> +++ b/arch/powerpc/mm/pgtable-book3s64.c\n> @@ -40,7 +40,10 @@ int pmdp_set_access_flags(struct vm_area_struct *vma, unsigned long address,\n> \tif (changed) {\n> \t\t__ptep_set_access_flags(vma->vm_mm, pmdp_ptep(pmdp),\n> \t\t\t\t\tpmd_pte(entry), address);\n> -\t\tflush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);\n> +\t\tif (radix_enabled())\n> +\t\t\tradix__local_flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);\n> +\t\telse\n> +\t\t\tflush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);\n> \t}\n> \treturn changed;\n> }\n> diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c\n> index a03ff3d99e0c..acd6ae8062ce 100644\n> --- a/arch/powerpc/mm/pgtable.c\n> +++ b/arch/powerpc/mm/pgtable.c\n> @@ -223,7 +223,7 @@ int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,\n> \t\tif (!is_vm_hugetlb_page(vma))\n> \t\t\tassert_pte_locked(vma->vm_mm, address);\n> \t\t__ptep_set_access_flags(vma->vm_mm, ptep, entry, address);\n> -\t\tflush_tlb_page(vma, address);\n> +\t\tflush_tlb_fix_spurious_fault(vma, address);\n> \t}\n> \treturn changed;\n> }\n> diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c\n> index 7452e1f4aa3c..bcb41d037593 100644\n> --- a/arch/powerpc/mm/tlb-radix.c\n> +++ b/arch/powerpc/mm/tlb-radix.c\n> @@ -396,6 +396,27 @@ void radix__tlb_flush(struct mmu_gather *tlb)\n> static unsigned long tlb_single_page_flush_ceiling __read_mostly = 33;\n> static unsigned long tlb_local_single_page_flush_ceiling __read_mostly = POWER9_TLB_SETS_RADIX * 2;\n> \n> +void radix__local_flush_tlb_range_psize(struct mm_struct *mm,\n> +\t\t\t\tunsigned long start, unsigned long end,\n> +\t\t\t\tint psize)\n> +{\n> +\tunsigned long pid;\n> +\tunsigned int page_shift = mmu_psize_defs[psize].shift;\n> +\tunsigned long page_size = 1UL << page_shift;\n> +\n> +\tpid = mm ? mm->context.id : 0;\n> +\tif (unlikely(pid == MMU_NO_CONTEXT))\n> +\t\treturn;\n> +\n> +\tpreempt_disable();\n> +\tif (end == TLB_FLUSH_ALL || ((end - start) >> page_shift) >\n> +\t\t\t\ttlb_local_single_page_flush_ceiling)\n> +\t\t_tlbiel_pid(pid, RIC_FLUSH_TLB);\n> +\telse\n> +\t\t_tlbiel_va_range(start, end, pid, page_size, psize);\n> +\tpreempt_enable();\n> +}\n> +\n> static bool __radix__flush_tlb_range_psize(struct mm_struct *mm,\n> \t\t\t\tunsigned long start, unsigned long end,\n> \t\t\t\tint psize, bool also_pwc)\n> @@ -518,6 +539,12 @@ void radix__flush_tlb_lpid(unsigned long lpid)\n> }\n> EXPORT_SYMBOL(radix__flush_tlb_lpid);\n> \n> +void radix__local_flush_pmd_tlb_range(struct vm_area_struct *vma,\n> +\t\t\t\tunsigned long start, unsigned long end)\n> +{\n> +\tradix__local_flush_tlb_range_psize(vma->vm_mm, start, end, MMU_PAGE_2M);\n> +}\n> +\n> void radix__flush_pmd_tlb_range(struct vm_area_struct *vma,\n> \t\t\t\tunsigned long start, unsigned long end)\n> {","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpF132Grzz9sCZ\n\tfor ;\n\tFri, 8 Sep 2017 08:07:03 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xpF131PpZzDrbl\n\tfor ;\n\tFri, 8 Sep 2017 08:07:03 +1000 (AEST)","from gate.crashing.org (gate.crashing.org [63.228.1.57])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xpDzf5QywzDrWR\n\tfor ;\n\tFri, 8 Sep 2017 08:05:50 +1000 (AEST)","from localhost (localhost.localdomain [127.0.0.1])\n\tby gate.crashing.org (8.14.1/8.13.8) with ESMTP id v87M5dDx023881;\n\tThu, 7 Sep 2017 17:05:40 -0500"],"Authentication-Results":"ozlabs.org; spf=permerror (mailfrom)\n\tsmtp.mailfrom=kernel.crashing.org (client-ip=63.228.1.57;\n\thelo=gate.crashing.org; envelope-from=benh@kernel.crashing.org;\n\treceiver=)","Message-ID":"<1504821938.12628.28.camel@kernel.crashing.org>","Subject":"Re: [RFC PATCH 8/8] powerpc/64s/radix: Only flush local TLB for\n\tspurious fault flushes","From":"Benjamin Herrenschmidt ","To":"Nicholas Piggin , linuxppc-dev@lists.ozlabs.org","Date":"Fri, 08 Sep 2017 08:05:38 +1000","In-Reply-To":"<20170907145148.24398-9-npiggin@gmail.com>","References":"<20170907145148.24398-1-npiggin@gmail.com>\n\t<20170907145148.24398-9-npiggin@gmail.com>","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.24.5 (3.24.5-1.fc26) ","Mime-Version":"1.0","Content-Transfer-Encoding":"7bit","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"\"Aneesh Kumar K . V\" ,\n\tAnton Blanchard ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1765076,"web_url":"http://patchwork.ozlabs.org/comment/1765076/","msgid":"<20170908144437.65c6c982@roar.ozlabs.ibm.com>","date":"2017-09-08T04:44:37","subject":"Re: [RFC PATCH 8/8] powerpc/64s/radix: Only flush local TLB for\n\tspurious fault flushes","submitter":{"id":69518,"url":"http://patchwork.ozlabs.org/api/people/69518/","name":"Nicholas Piggin","email":"npiggin@gmail.com"},"content":"On Fri, 08 Sep 2017 08:05:38 +1000\nBenjamin Herrenschmidt wrote:\n\n> On Fri, 2017-09-08 at 00:51 +1000, Nicholas Piggin wrote:\n> > When permissiveness is relaxed, or found to have been relaxed by\n> > another thread, we flush that address out of the TLB to avoid a\n> > future fault or micro-fault due to a stale TLB entry.\n> > \n> > Currently for processes with TLBs on other CPUs, this flush is always\n> > done with a global tlbie. Although that could reduce faults on remote\n> > CPUs, a broadcast operation seems to be wasteful for something that\n> > can be handled in-core by the remote CPU if it comes to it.\n> > \n> > This is not benchmarked yet. It does seem cut some tlbie operations\n> > from the bus. \n> \n> What happens with the nest MMU here ?\n\nGood question, I'm not sure. I can't tell from the UM or not if the\nagent and NMMU must discard cached translations if there is a\ntranslation cached but it has a permission fault. It's not clear \nfrom that I've read that if it's relying on the host to send back a\ntlbie.\n\nI'll keep digging.\n\nThanks,\nNick","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpPsn2M1hz9s8J\n\tfor ;\n\tFri, 8 Sep 2017 14:46:21 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xpPsn19sHzDrSN\n\tfor ;\n\tFri, 8 Sep 2017 14:46:21 +1000 (AEST)","from mail-pf0-x242.google.com (mail-pf0-x242.google.com\n\t[IPv6:2607:f8b0:400e:c00::242])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xpPr64HM3zDqZ9\n\tfor ;\n\tFri, 8 Sep 2017 14:44:54 +1000 (AEST)","by mail-pf0-x242.google.com with SMTP id g65so662687pfe.1\n\tfor ;\n\tThu, 07 Sep 2017 21:44:53 -0700 (PDT)","from roar.ozlabs.ibm.com (203-219-56-202.tpgi.com.au.\n\t[203.219.56.202]) by smtp.gmail.com with ESMTPSA id\n\tu77sm1557789pfk.87.2017.09.07.21.44.49\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tThu, 07 Sep 2017 21:44:51 -0700 (PDT)"],"Authentication-Results":["ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"m5CWXMvx\"; dkim-atps=neutral","lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"m5CWXMvx\"; dkim-atps=neutral","ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gmail.com\n\t(client-ip=2607:f8b0:400e:c00::242; helo=mail-pf0-x242.google.com;\n\tenvelope-from=npiggin@gmail.com; receiver=)","lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"m5CWXMvx\"; dkim-atps=neutral"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=date:from:to:cc:subject:message-id:in-reply-to:references\n\t:organization:mime-version:content-transfer-encoding;\n\tbh=lbx8uVkYRNkDmTH5jsIl2Oef3ko+of7RRt8XM1mGrqs=;\n\tb=m5CWXMvxIux5xPND6i2myYENlOqIMEU8h372yJgH1eYybRVeDs3+siEApvSCt+XtSO\n\t+CV7SVumz8zpv8qYs1aqRxmmkWki0zMiXL9jUPXkdVUq9NRjDoilcwiRA+8P+j7QMmMf\n\tHRpS8xnWbmVXr/qrrSbhRJeW1GwsdJ9PV74aO6kwNbKkc1FsXlOI97KYioheOoZ5hgxX\n\tIB9dbBtuZm395qTg+g/kDE3FOKKNyqfrqL2k0wue+8fPaa/R9jGafNvuYPpr+c8ctdRk\n\t3W1B7s2NfIyVtqapENN0f9EVzS4UlVYY7iH64UrgdRoOKxpEW/eh14DlE+h1ST4AbEFl\n\tynBA==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:in-reply-to\n\t:references:organization:mime-version:content-transfer-encoding;\n\tbh=lbx8uVkYRNkDmTH5jsIl2Oef3ko+of7RRt8XM1mGrqs=;\n\tb=l7dVFinLi8527KQTca7j4yXD1Celm5VBli5VAfrSuueRy0GMbn9tYNLt/vW1vAMqik\n\tJQBBfgMaSQYww9G2zg3Vwd7nhvVD6JUSyTI3LycJ+0fj21yIqR961yE7l/qG5tj7hjzp\n\tLJBXh8AC5uZ3GoB9BEj9ABHLoy9b630c8got+giwmeVgSMemm9qh4uZL6aumf37frao/\n\t0v7r+qyBHYO4FadIcVq0tQcgMMoG0nopHSoCUPYZr8uOjF0mr07HOmeFnQbnACmP80BZ\n\tOGF0OwrjNPy+9hFySb8xGY6DKnJfZ5nj4lGRv6g2cB9+8YrNsEzj1VC8L/A++oJKPnoY\n\t5TtQ==","X-Gm-Message-State":"AHPjjUhZBCVP4PYiYj3bFrTzdDQstbfxOMcdZtQ4yFZe/lxcDZ/iljo/\n\tbNhj0ZTrZFbp2qk7","X-Google-Smtp-Source":"ADKCNb7QevtJ7TXWU72HS3uCzcGGIPUHNlI64QB2le1waUGVfB74krobP0nWxienSxMbDcGILgYBzQ==","X-Received":"by 10.101.68.193 with SMTP id g1mr1849658pgs.232.1504845892183; \n\tThu, 07 Sep 2017 21:44:52 -0700 (PDT)","Date":"Fri, 8 Sep 2017 14:44:37 +1000","From":"Nicholas Piggin ","To":"Benjamin Herrenschmidt ","Subject":"Re: [RFC PATCH 8/8] powerpc/64s/radix: Only flush local TLB for\n\tspurious fault flushes","Message-ID":"<20170908144437.65c6c982@roar.ozlabs.ibm.com>","In-Reply-To":"<1504821938.12628.28.camel@kernel.crashing.org>","References":"<20170907145148.24398-1-npiggin@gmail.com>\n\t<20170907145148.24398-9-npiggin@gmail.com>\n\t<1504821938.12628.28.camel@kernel.crashing.org>","Organization":"IBM","X-Mailer":"Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu)","MIME-Version":"1.0","Content-Type":"text/plain; charset=US-ASCII","Content-Transfer-Encoding":"7bit","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"linuxppc-dev@lists.ozlabs.org,\n\t\"Aneesh Kumar K . V\" ,\n\tAnton Blanchard ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1765091,"web_url":"http://patchwork.ozlabs.org/comment/1765091/","msgid":"<87377xspm9.fsf@linux.vnet.ibm.com>","date":"2017-09-08T05:53:18","subject":"Re: [RFC PATCH 8/8] powerpc/64s/radix: Only flush local TLB for\n\tspurious fault flushes","submitter":{"id":664,"url":"http://patchwork.ozlabs.org/api/people/664/","name":"Aneesh Kumar K.V","email":"aneesh.kumar@linux.vnet.ibm.com"},"content":"Nicholas Piggin writes:\n\n> When permissiveness is relaxed, or found to have been relaxed by\n> another thread, we flush that address out of the TLB to avoid a\n> future fault or micro-fault due to a stale TLB entry.\n>\n> Currently for processes with TLBs on other CPUs, this flush is always\n> done with a global tlbie. Although that could reduce faults on remote\n> CPUs, a broadcast operation seems to be wasteful for something that\n> can be handled in-core by the remote CPU if it comes to it.\n>\n> This is not benchmarked yet. It does seem cut some tlbie operations\n> from the bus.\n>\n> Signed-off-by: Nicholas Piggin \n> ---\n> .../powerpc/include/asm/book3s/64/tlbflush-radix.h | 5 ++++\n> arch/powerpc/include/asm/book3s/64/tlbflush.h | 11 +++++++++\n> arch/powerpc/mm/pgtable-book3s64.c | 5 +++-\n> arch/powerpc/mm/pgtable.c | 2 +-\n> arch/powerpc/mm/tlb-radix.c | 27 ++++++++++++++++++++++\n> 5 files changed, 48 insertions(+), 2 deletions(-)\n>\n> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h\n> index b12460b306a7..34cd864b8fc1 100644\n> --- a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h\n> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h\n> @@ -16,6 +16,8 @@ extern bool radix__flush_tlb_range_psize(struct mm_struct *mm, unsigned long sta\n> \t\t\t\t\t unsigned long end, int psize);\n> extern void radix__flush_pmd_tlb_range(struct vm_area_struct *vma,\n> \t\t\t\t unsigned long start, unsigned long end);\n> +extern void radix__local_flush_pmd_tlb_range(struct vm_area_struct *vma,\n> +\t\t\t\tunsigned long start, unsigned long end);\n> extern void radix__flush_tlb_range(struct vm_area_struct *vma, unsigned long start,\n> \t\t\t unsigned long end);\n> extern void radix__flush_tlb_kernel_range(unsigned long start, unsigned long end);\n> @@ -24,6 +26,9 @@ extern void radix__local_flush_tlb_mm(struct mm_struct *mm);\n> extern void radix__local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);\n> extern void radix__local_flush_tlb_page_psize(struct mm_struct *mm, unsigned long vmaddr,\n> \t\t\t\t\t int psize);\n> +extern void radix__local_flush_tlb_range_psize(struct mm_struct *mm,\n> +\t\t\t\tunsigned long start, unsigned long end,\n> +\t\t\t\tint psize);\n> extern void radix__tlb_flush(struct mmu_gather *tlb);\n> #ifdef CONFIG_SMP\n> extern void radix__flush_tlb_mm(struct mm_struct *mm);\n> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush.h b/arch/powerpc/include/asm/book3s/64/tlbflush.h\n> index 72b925f97bab..8a8b3e11a28e 100644\n> --- a/arch/powerpc/include/asm/book3s/64/tlbflush.h\n> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush.h\n> @@ -83,6 +83,17 @@ static inline void flush_tlb_page(struct vm_area_struct *vma,\n> #define flush_tlb_mm(mm)\t\tlocal_flush_tlb_mm(mm)\n> #define flush_tlb_page(vma, addr)\tlocal_flush_tlb_page(vma, addr)\n> #endif /* CONFIG_SMP */\n> +\n> +#define flush_tlb_fix_spurious_fault flush_tlb_fix_spurious_fault\n> +static inline void flush_tlb_fix_spurious_fault(struct vm_area_struct *vma,\n> +\t\t\t\t\t\tunsigned long address)\n> +{\n> +\tif (radix_enabled())\n> +\t\tradix__local_flush_tlb_page(vma, address);\n> +\telse\n> +\t\tflush_tlb_page(vma, address);\n> +}\n> +\n> /*\n> * flush the page walk cache for the address\n> */\n> diff --git a/arch/powerpc/mm/pgtable-book3s64.c b/arch/powerpc/mm/pgtable-book3s64.c\n> index 3b65917785a5..e46f346388d6 100644\n> --- a/arch/powerpc/mm/pgtable-book3s64.c\n> +++ b/arch/powerpc/mm/pgtable-book3s64.c\n> @@ -40,7 +40,10 @@ int pmdp_set_access_flags(struct vm_area_struct *vma, unsigned long address,\n> \tif (changed) {\n> \t\t__ptep_set_access_flags(vma->vm_mm, pmdp_ptep(pmdp),\n> \t\t\t\t\tpmd_pte(entry), address);\n> -\t\tflush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);\n> +\t\tif (radix_enabled())\n> +\t\t\tradix__local_flush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);\n> +\t\telse\n> +\t\t\tflush_pmd_tlb_range(vma, address, address + HPAGE_PMD_SIZE);\n\t\t\t^^^^ this is no-op for hash.\n\n\n> \t}\n> \treturn changed;\n> }\n> diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c\n> index a03ff3d99e0c..acd6ae8062ce 100644\n\n\n-aneesh","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpRPx5584z9sBZ\n\tfor ;\n\tFri, 8 Sep 2017 15:55:49 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xpRPx2BSdzDrYW\n\tfor ;\n\tFri, 8 Sep 2017 15:55:49 +1000 (AEST)","from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com\n\t[148.163.156.1])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xpRMF4c3VzDrJl\n\tfor ;\n\tFri, 8 Sep 2017 15:53:28 +1000 (AEST)","from pps.filterd (m0098396.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv885pG6w009871\n\tfor ; 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Violators will be prosecuted; \n\tFri, 8 Sep 2017 15:53:22 +1000","from d23av05.au.ibm.com (d23av05.au.ibm.com [9.190.234.119])\n\tby d23relay10.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id\n\tv885rL6h33816700\n\tfor ; Fri, 8 Sep 2017 15:53:22 +1000","from d23av05.au.ibm.com (localhost [127.0.0.1])\n\tby d23av05.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id\n\tv885rLWe001966\n\tfor ; Fri, 8 Sep 2017 15:53:21 +1000","from skywalker (skywalker.in.ibm.com [9.124.35.86])\n\tby d23av05.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with SMTP id\n\tv885rIus001902; Fri, 8 Sep 2017 15:53:19 +1000","(nullmailer pid 18191 invoked by uid 1000);\n\tFri, 08 Sep 2017 05:53:18 -0000"],"Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com\n\t(client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=aneesh.kumar@linux.vnet.ibm.com; receiver=)","From":"\"Aneesh Kumar K.V\" ","To":"Nicholas Piggin , linuxppc-dev@lists.ozlabs.org","Subject":"Re: [RFC PATCH 8/8] powerpc/64s/radix: Only flush local TLB for\n\tspurious fault flushes","In-Reply-To":"<20170907145148.24398-9-npiggin@gmail.com>","References":"<20170907145148.24398-1-npiggin@gmail.com>\n\t<20170907145148.24398-9-npiggin@gmail.com>","Date":"Fri, 08 Sep 2017 11:23:18 +0530","MIME-Version":"1.0","Content-Type":"text/plain","X-TM-AS-MML":"disable","x-cbid":"17090805-0040-0000-0000-000003552F9D","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17090805-0041-0000-0000-00000CD53084","Message-Id":"<87377xspm9.fsf@linux.vnet.ibm.com>","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-08_03:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=1\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1709080090","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Anton Blanchard , Nicholas Piggin ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1765094,"web_url":"http://patchwork.ozlabs.org/comment/1765094/","msgid":"<1504850111.12628.50.camel@kernel.crashing.org>","date":"2017-09-08T05:55:11","subject":"Re: [RFC PATCH 8/8] powerpc/64s/radix: Only flush local TLB for\n\tspurious fault flushes","submitter":{"id":38,"url":"http://patchwork.ozlabs.org/api/people/38/","name":"Benjamin Herrenschmidt","email":"benh@kernel.crashing.org"},"content":"On Fri, 2017-09-08 at 14:44 +1000, Nicholas Piggin wrote:\n> On Fri, 08 Sep 2017 08:05:38 +1000\n> Benjamin Herrenschmidt wrote:\n> \n> > On Fri, 2017-09-08 at 00:51 +1000, Nicholas Piggin wrote:\n> > > When permissiveness is relaxed, or found to have been relaxed by\n> > > another thread, we flush that address out of the TLB to avoid a\n> > > future fault or micro-fault due to a stale TLB entry.\n> > > \n> > > Currently for processes with TLBs on other CPUs, this flush is always\n> > > done with a global tlbie. Although that could reduce faults on remote\n> > > CPUs, a broadcast operation seems to be wasteful for something that\n> > > can be handled in-core by the remote CPU if it comes to it.\n> > > \n> > > This is not benchmarked yet. It does seem cut some tlbie operations\n> > > from the bus. \n> > \n> > What happens with the nest MMU here ?\n> \n> Good question, I'm not sure. I can't tell from the UM or not if the\n> agent and NMMU must discard cached translations if there is a\n> translation cached but it has a permission fault. It's not clear \n> from that I've read that if it's relying on the host to send back a\n> tlbie.\n\nI think it's supposed to re-do a tablewalk.\n\n> I'll keep digging.\n> \n> Thanks,\n> Nick","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpRSZ6jFGz9sBZ\n\tfor ;\n\tFri, 8 Sep 2017 15:58:06 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xpRSZ5R85zDrYl\n\tfor ;\n\tFri, 8 Sep 2017 15:58:06 +1000 (AEST)","from gate.crashing.org (gate.crashing.org [63.228.1.57])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xpRPT5Ml3zDrVv\n\tfor ;\n\tFri, 8 Sep 2017 15:55:25 +1000 (AEST)","from localhost (localhost.localdomain [127.0.0.1])\n\tby gate.crashing.org (8.14.1/8.13.8) with ESMTP id v885tBoW019514;\n\tFri, 8 Sep 2017 00:55:12 -0500"],"Authentication-Results":"ozlabs.org; spf=permerror (mailfrom)\n\tsmtp.mailfrom=kernel.crashing.org (client-ip=63.228.1.57;\n\thelo=gate.crashing.org; envelope-from=benh@kernel.crashing.org;\n\treceiver=)","Message-ID":"<1504850111.12628.50.camel@kernel.crashing.org>","Subject":"Re: [RFC PATCH 8/8] powerpc/64s/radix: Only flush local TLB for\n\tspurious fault flushes","From":"Benjamin Herrenschmidt ","To":"Nicholas Piggin ","Date":"Fri, 08 Sep 2017 15:55:11 +1000","In-Reply-To":"<20170908144437.65c6c982@roar.ozlabs.ibm.com>","References":"<20170907145148.24398-1-npiggin@gmail.com>\n\t<20170907145148.24398-9-npiggin@gmail.com>\n\t<1504821938.12628.28.camel@kernel.crashing.org>\n\t<20170908144437.65c6c982@roar.ozlabs.ibm.com>","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailer":"Evolution 3.24.5 (3.24.5-1.fc26) ","Mime-Version":"1.0","Content-Transfer-Encoding":"7bit","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"linuxppc-dev@lists.ozlabs.org,\n\t\"Aneesh Kumar K . V\" ,\n\tAnton Blanchard ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}},{"id":1765115,"web_url":"http://patchwork.ozlabs.org/comment/1765115/","msgid":"<20170908170316.11f33cc6@roar.ozlabs.ibm.com>","date":"2017-09-08T07:03:16","subject":"Re: [RFC PATCH 8/8] powerpc/64s/radix: Only flush local TLB for\n\tspurious fault flushes","submitter":{"id":69518,"url":"http://patchwork.ozlabs.org/api/people/69518/","name":"Nicholas Piggin","email":"npiggin@gmail.com"},"content":"On Fri, 8 Sep 2017 14:44:37 +1000\nNicholas Piggin wrote:\n\n> On Fri, 08 Sep 2017 08:05:38 +1000\n> Benjamin Herrenschmidt wrote:\n> \n> > On Fri, 2017-09-08 at 00:51 +1000, Nicholas Piggin wrote: \n> > > When permissiveness is relaxed, or found to have been relaxed by\n> > > another thread, we flush that address out of the TLB to avoid a\n> > > future fault or micro-fault due to a stale TLB entry.\n> > > \n> > > Currently for processes with TLBs on other CPUs, this flush is always\n> > > done with a global tlbie. Although that could reduce faults on remote\n> > > CPUs, a broadcast operation seems to be wasteful for something that\n> > > can be handled in-core by the remote CPU if it comes to it.\n> > > \n> > > This is not benchmarked yet. It does seem cut some tlbie operations\n> > > from the bus. \n> > \n> > What happens with the nest MMU here ? \n> \n> Good question, I'm not sure. I can't tell from the UM or not if the\n> agent and NMMU must discard cached translations if there is a\n> translation cached but it has a permission fault. It's not clear \n> from that I've read that if it's relying on the host to send back a\n> tlbie.\n> \n> I'll keep digging.\n\nOkay, talking to Alistair and for NPU/CAPI, this is a concern because\nthe NMMU may not walk page tables if it has a cached translation. Have\nto confirm that with hardware.\n\nSo we've got them wanting to hook into the core code and make it give\nthem tibies.\n\nFor now I'll put this on hold until NPU and CAPI and VAS get their\npatches in and working, then maybe revisit. Might be good to get them\nall moved to using a common nmmu.c driver that gives them a page fault\nhandler and uses mmu notifiers to do their nmmu invalidations.\n\nThanks,\nNick","headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpSxl6gmyz9s83\n\tfor ;\n\tFri, 8 Sep 2017 17:04:59 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xpSxl5P7MzDrbm\n\tfor ;\n\tFri, 8 Sep 2017 17:04:59 +1000 (AEST)","from mail-pf0-x22d.google.com (mail-pf0-x22d.google.com\n\t[IPv6:2607:f8b0:400e:c00::22d])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xpSw82MRDzDqF7\n\tfor ;\n\tFri, 8 Sep 2017 17:03:35 +1000 (AEST)","by mail-pf0-x22d.google.com with SMTP id e199so3260794pfh.3\n\tfor ;\n\tFri, 08 Sep 2017 00:03:35 -0700 (PDT)","from roar.ozlabs.ibm.com (203-219-56-202.tpgi.com.au.\n\t[203.219.56.202]) by smtp.gmail.com with ESMTPSA id\n\ts27sm1898333pgo.37.2017.09.08.00.03.30\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tFri, 08 Sep 2017 00:03:32 -0700 (PDT)"],"Authentication-Results":["ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"KyJi42x0\"; dkim-atps=neutral","lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"KyJi42x0\"; dkim-atps=neutral","ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gmail.com\n\t(client-ip=2607:f8b0:400e:c00::22d; helo=mail-pf0-x22d.google.com;\n\tenvelope-from=npiggin@gmail.com; receiver=)","lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"KyJi42x0\"; dkim-atps=neutral"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=date:from:to:cc:subject:message-id:in-reply-to:references\n\t:organization:mime-version:content-transfer-encoding;\n\tbh=QUZDegpm3vKgPuBZ1ELewEWxViMrLKPOFFkCtJHD7Tk=;\n\tb=KyJi42x0Uz1qd6X4WUkDDujpzb+qbbA0eGF23dubHUYs4luT3AZ+A+iq3E0A8NkA5Q\n\tIaifpsESIJnt+VFmG8LtrBNGzFrReWC1NrvVgne9ZXH5d9JCtFgWLkmWHRgJwrFCRpDS\n\tJF0F8/mtBD5gwa1C4dO/3oXoEbV4AKVXEe8IetZ3ZtW/nRz58pGmbm1qYSCXhEVzzLiu\n\tWTmAd2X1POb6uzLQCf3Keg9ISXEth65VJS8GGdPrPyF3mBdLKkAx5xJj99BrhhynGKWH\n\tAr5vNR9zssZFsnEl3hw5xdnZN+TdV7zwC6G+SiTg5REWuLFoSmSpbCnfsUSnwrEnUmHW\n\tFFfA==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:in-reply-to\n\t:references:organization:mime-version:content-transfer-encoding;\n\tbh=QUZDegpm3vKgPuBZ1ELewEWxViMrLKPOFFkCtJHD7Tk=;\n\tb=WfCEDEUpqwgbSaT6V9UXXiVMbi1OkSHLZ/kGC8Daa1eSkXpelYlvHFGtih8bMSGUTQ\n\tGceRkKewT6YiUNsns4PGyAEupWYNfE1kFA+gamecp2thRU+rjr51YMb/7HdsTe53zigd\n\tsZV+499qG7Mpmd9ztYJkV9Yf5soEsssp2O5mETr/t6bCjJbqRF7TWCCs9ZYVZIBO5D/R\n\toZoFSHirCkKBJuN5Db2NNuNJ6fV0xUmCcvUGrhTeKjg4NpW9Q9ZbYOj00NzMVIHEXsnp\n\tccUBsq79ZXTfakoxlzSJCF8eTOLqwRMkj1tnIeBBKZUBXX1gj90CsofHRle1NYhoDEfu\n\tRZDg==","X-Gm-Message-State":"AHPjjUhk3IiOVCcBBB6/n8nK6bfqwY6GnqWfKyLkg2KvCnvfrImwMkHN\n\twJ1SXrvwXnbpHA==","X-Google-Smtp-Source":"ADKCNb45ToDUTXzM007oIbqZnE5UG9k4GOgbzEA4LyjurLq0R2g/K7em6/+a/cuOwngyyiWASEPEag==","X-Received":"by 10.84.248.13 with SMTP id p13mr2302018pll.447.1504854213586; \n\tFri, 08 Sep 2017 00:03:33 -0700 (PDT)","Date":"Fri, 8 Sep 2017 17:03:16 +1000","From":"Nicholas Piggin ","To":"Benjamin Herrenschmidt ","Subject":"Re: [RFC PATCH 8/8] powerpc/64s/radix: Only flush local TLB for\n\tspurious fault flushes","Message-ID":"<20170908170316.11f33cc6@roar.ozlabs.ibm.com>","In-Reply-To":"<20170908144437.65c6c982@roar.ozlabs.ibm.com>","References":"<20170907145148.24398-1-npiggin@gmail.com>\n\t<20170907145148.24398-9-npiggin@gmail.com>\n\t<1504821938.12628.28.camel@kernel.crashing.org>\n\t<20170908144437.65c6c982@roar.ozlabs.ibm.com>","Organization":"IBM","X-Mailer":"Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu)","MIME-Version":"1.0","Content-Type":"text/plain; charset=US-ASCII","Content-Transfer-Encoding":"7bit","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Alistair Popple , linuxppc-dev@lists.ozlabs.org,\n\t\"Aneesh Kumar K . V\" ,\n\tAnton Blanchard ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"}}]