[{"id":1764689,"web_url":"http://patchwork.ozlabs.org/comment/1764689/","msgid":"","list_archive_url":null,"date":"2017-09-07T12:25:03","subject":"Re: [PATCH v4 2/6] irqdomain: clear trigger type in\n\tirq_domain_push_irq()","submitter":{"id":7353,"url":"http://patchwork.ozlabs.org/api/people/7353/","name":"Marc Zyngier","email":"marc.zyngier@arm.com"},"content":"On 07/09/17 12:41, Masahiro Yamada wrote:\n> Prior to the addition of irq_domain_push_irq(), the hierarchy\n> IRQ domain always allocates IRQs from the outer-most domain.\n> Each irqchip usually calls irq_domain_alloc_irqs_parent(),\n> ascending the topology up to the root irqchip.\n> \n> The brand-new function irq_domain_push_irq() allows us to allocate\n> IRQs for parent domain first, then add a child irq_data to the\n> tail of the chain.\n> \n> For the new use-case, if the parent sets a temporary trigger type,\n> it may differ from the type requested to the outer-most irqchip,\n> then irq_create_fwspec_mapping() warns \"type mismatch, failed to map...\"\n> \n> Clear the trigger type when a new irq_data is connected to the chain.\n> \n> Signed-off-by: Masahiro Yamada \n> ---\n> \n> Changes in v4:\n> - Newly added\n> \n> \n> kernel/irq/irqdomain.c | 3 +++\n> 1 file changed, 3 insertions(+)\n> \n> diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c\n> index da3e0b6..18d11b9 100644\n> --- a/kernel/irq/irqdomain.c\n> +++ b/kernel/irq/irqdomain.c\n> @@ -1532,6 +1532,9 @@ int irq_domain_push_irq(struct irq_domain *domain, int virq, void *arg)\n> \ttail_irq_data->chip = NULL;\n> \ttail_irq_data->chip_data = NULL;\n> \n> +\t/* clear the trigger type to avoid \"type mismatch\" error */\n> +\tirqd_set_trigger_type(tail_irq_data, IRQ_TYPE_NONE);\n> +\n\nThis feels wrong. The initial interrupt hierarchy does have a set\ntrigger, because it has been configured already, and switching it to\nNONE is hiding the fact that you're setting it to another, conflicting\nvalue.\n\nYour new fwspec should have a type that is really compatible with with\nthe underlying interrupt, however \"temporary\". If it is not, you have a\nproblem.\n\nThanks,\n\n\tM.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xp05d6nWXz9s7C\n\tfor ;\n\tThu, 7 Sep 2017 22:25:09 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S932144AbdIGMZI (ORCPT );\n\tThu, 7 Sep 2017 08:25:08 -0400","from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:59238 \"EHLO\n\tfoss.arm.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S932139AbdIGMZH (ORCPT );\n\tThu, 7 Sep 2017 08:25:07 -0400","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4C2D113D5;\n\tThu, 7 Sep 2017 05:25:07 -0700 (PDT)","from [10.1.206.41] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\t6D9873F578; Thu, 7 Sep 2017 05:25:05 -0700 (PDT)"],"Subject":"Re: [PATCH v4 2/6] irqdomain: clear trigger type in\n\tirq_domain_push_irq()","To":"Masahiro Yamada ,\n\tThomas Gleixner ,\n\tLinus Walleij ,\n\tlinux-gpio@vger.kernel.org, Rob Herring ","Cc":"Jassi Brar ,\n\tdevicetree@vger.kernel.org, Jason Cooper ,\n\tMasami Hiramatsu ,\n\tDavid Daney , linux-kernel@vger.kernel.org","References":"<1504784522-26841-1-git-send-email-yamada.masahiro@socionext.com>\n\t<1504784522-26841-3-git-send-email-yamada.masahiro@socionext.com>","From":"Marc Zyngier ","Organization":"ARM Ltd","Message-ID":"","Date":"Thu, 7 Sep 2017 13:25:03 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<1504784522-26841-3-git-send-email-yamada.masahiro@socionext.com>","Content-Type":"text/plain; charset=utf-8","Content-Language":"en-GB","Content-Transfer-Encoding":"7bit","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"}},{"id":1765448,"web_url":"http://patchwork.ozlabs.org/comment/1765448/","msgid":"","list_archive_url":null,"date":"2017-09-08T15:09:35","subject":"Re: [PATCH v4 2/6] irqdomain: clear trigger type in\n\tirq_domain_push_irq()","submitter":{"id":65882,"url":"http://patchwork.ozlabs.org/api/people/65882/","name":"Masahiro Yamada","email":"yamada.masahiro@socionext.com"},"content":"Hi Marc,\n\n\n2017-09-07 21:25 GMT+09:00 Marc Zyngier :\n> On 07/09/17 12:41, Masahiro Yamada wrote:\n>> Prior to the addition of irq_domain_push_irq(), the hierarchy\n>> IRQ domain always allocates IRQs from the outer-most domain.\n>> Each irqchip usually calls irq_domain_alloc_irqs_parent(),\n>> ascending the topology up to the root irqchip.\n>>\n>> The brand-new function irq_domain_push_irq() allows us to allocate\n>> IRQs for parent domain first, then add a child irq_data to the\n>> tail of the chain.\n>>\n>> For the new use-case, if the parent sets a temporary trigger type,\n>> it may differ from the type requested to the outer-most irqchip,\n>> then irq_create_fwspec_mapping() warns \"type mismatch, failed to map...\"\n>>\n>> Clear the trigger type when a new irq_data is connected to the chain.\n>>\n>> Signed-off-by: Masahiro Yamada \n>> ---\n>>\n>> Changes in v4:\n>> - Newly added\n>>\n>>\n>> kernel/irq/irqdomain.c | 3 +++\n>> 1 file changed, 3 insertions(+)\n>>\n>> diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c\n>> index da3e0b6..18d11b9 100644\n>> --- a/kernel/irq/irqdomain.c\n>> +++ b/kernel/irq/irqdomain.c\n>> @@ -1532,6 +1532,9 @@ int irq_domain_push_irq(struct irq_domain *domain, int virq, void *arg)\n>> tail_irq_data->chip = NULL;\n>> tail_irq_data->chip_data = NULL;\n>>\n>> + /* clear the trigger type to avoid \"type mismatch\" error */\n>> + irqd_set_trigger_type(tail_irq_data, IRQ_TYPE_NONE);\n>> +\n>\n> This feels wrong. The initial interrupt hierarchy does have a set\n> trigger, because it has been configured already, and switching it to\n> NONE is hiding the fact that you're setting it to another, conflicting\n> value.\n>\n> Your new fwspec should have a type that is really compatible with with\n> the underlying interrupt, however \"temporary\". If it is not, you have a\n> problem.\n>\n\n\nMy motivation is to describe interrupt connection by\nDT property, like follows:\n\ninterrupts = <48 4>, <49 4>, <50 4>, <51 4>,\n <52 4>, <53 4>, <54 4>, <55 4>,\n <56 4>, <57 4>, <58 4>, <59 4>,\n <60 4>, <61 4>, <62 4>, <63 4>,\n <154 4>, <155 4>, <156 4>, <157 4>,\n <158 4>;\n\n\nThe number of cells is fixed, so I need to\ngive something as the second parameter.\n\nThe \"4\" may not be a real trigger type,\nit is just a temporal value to fill the space.\n\n\nThe device may pass a different trigger type\nwhen it calls gpio_to_irq() && request_irq().\nI cannot know the real trigger type until the device is probed.\n\n\nHaving said that, if this is a bad idea,\nI will consider a different approach for my GPIO driver.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=nifty.com header.i=@nifty.com\n\theader.b=\"c5UgJTyn\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xpgk06ckyz9s8J\n\tfor ;\n\tSat, 9 Sep 2017 01:10:32 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754397AbdIHPKb (ORCPT );\n\tFri, 8 Sep 2017 11:10:31 -0400","from conssluserg-06.nifty.com ([210.131.2.91]:62425 \"EHLO\n\tconssluserg-06.nifty.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1753072AbdIHPKa (ORCPT\n\t); Fri, 8 Sep 2017 11:10:30 -0400","from mail-yw0-f170.google.com (mail-yw0-f170.google.com\n\t[209.85.161.170]) (authenticated)\n\tby conssluserg-06.nifty.com with ESMTP id v88FAGmp017699;\n\tSat, 9 Sep 2017 00:10:17 +0900","by mail-yw0-f170.google.com with SMTP id q80so8288861ywg.2;\n\tFri, 08 Sep 2017 08:10:17 -0700 (PDT)","by 10.37.164.225 with HTTP; Fri, 8 Sep 2017 08:09:35 -0700 (PDT)"],"DKIM-Filter":"OpenDKIM Filter v2.10.3 conssluserg-06.nifty.com v88FAGmp017699","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com;\n\ts=dec2015msa; t=1504883417;\n\tbh=OYbONB/N0BHkYsdS/CfTN5pDChvVEn1uftboDK0ZcF8=;\n\th=In-Reply-To:References:From:Date:Subject:To:Cc:From;\n\tb=c5UgJTynhbcuA5kZzqRcBvsuDuGjyLHq1ZGhLtU3I/6SaJHlBrKIVGTgbHuk0uMDT\n\t6N2OyPUu61VNWKmHNonnotb52Cggv8Sfs7AJ/B2boO0GnQ6iF6fQ7roHMYa4ELsFit\n\t3JnDhLKUlaSu3IwDhRaThCztU47aKt63O5DgxUOQO+c+iBqPzLe7yXWjDONXt4fo9R\n\t2t3nIT7QswX3ATg7oQeLBkXA+74bKCkBRARL1CvuH2IdwqJ25PiSIZkgnnOdYQ/Ogb\n\tZa7Pv1tsOY86Os1hfWu9pZnrmt3jTcqjFPgRdfMtXBE2swWDZ9Ko1h6xgcX9y/HCF1\n\tKf770oiyt3UIg==","X-Nifty-SrcIP":"[209.85.161.170]","X-Gm-Message-State":"AHPjjUhc+yvi9CR43q2oeFsKt0G/UJ1MRrCK8MHutCFhLjSoYT/uK/FO\n\tcGWicVZFeCkpUHvbdo7Tcd5zI+Pf7g==","X-Google-Smtp-Source":"ADKCNb6bSyv1Gg9cFfd64tRoi3u+MviQSwz4TaNLTbCiOF0kkQA4fP82oEdZzcBA1KhEISZvOmu40LhY+0qrKGmW6Tk=","X-Received":"by 10.37.133.76 with SMTP id f12mr2580167ybn.79.1504883416184;\n\tFri, 08 Sep 2017 08:10:16 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"","References":"<1504784522-26841-1-git-send-email-yamada.masahiro@socionext.com>\n\t<1504784522-26841-3-git-send-email-yamada.masahiro@socionext.com>\n\t","From":"Masahiro Yamada ","Date":"Sat, 9 Sep 2017 00:09:35 +0900","X-Gmail-Original-Message-ID":"","Message-ID":"","Subject":"Re: [PATCH v4 2/6] irqdomain: clear trigger type in\n\tirq_domain_push_irq()","To":"Marc Zyngier ","Cc":"Thomas Gleixner ,\n\tLinus Walleij ,\n\tlinux-gpio@vger.kernel.org, Rob Herring ,\n\tJassi Brar ,\n\tdevicetree@vger.kernel.org, Jason Cooper ,\n\tMasami Hiramatsu ,\n\tDavid Daney ,\n\tLinux Kernel Mailing List ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"}}]