[{"id":1774584,"web_url":"http://patchwork.ozlabs.org/comment/1774584/","msgid":"<20170925094759.GB30097@localhost>","list_archive_url":null,"date":"2017-09-25T09:47:59","subject":"Re: [PATCH v3 2/2] dma: sprd: Add Spreadtrum DMA driver","submitter":{"id":8232,"url":"http://patchwork.ozlabs.org/api/people/8232/","name":"Vinod Koul","email":"vinod.koul@intel.com"},"content":"On Thu, Sep 07, 2017 at 06:00:04PM +0800, Baolin Wang wrote:\n\n> +static void sprd_dma_chn_update(struct sprd_dma_chn *schan, u32 reg,\n> +\t\t\t\tu32 mask, u32 val)\n\nright justfied pls\n\n> +static void sprd_dma_clear_int(struct sprd_dma_chn *schan)\n> +{\n> +\tu32 mask = SPRD_DMA_INT_MASK << SPRD_DMA_INT_CLR_OFFSET;\n> +\tu32 val = SPRD_DMA_INT_MASK << SPRD_DMA_INT_CLR_OFFSET;\n\nboth seems same..?\n\n> +\n> +\tsprd_dma_chn_update(schan, SPRD_DMA_CHN_INTC, mask, val);\n\ndo you need local values here, we can just call sprd_dma_chn_update() with\nthe mask and values!\n\nAlso looking at thus shoulnt SPRD_DMA_INT_MASK bits be defined for the bits\nwe have in spec, if so why are we shifting then, perhpas u should redo the\nclear routine to pass mask, shift, bits..?\n\nSame comment for this and others\n\n> +static enum dma_int_type sprd_dma_get_int_type(struct sprd_dma_chn *schan)\n> +{\n> +\tu32 intc_sts = readl(schan->chn_base + SPRD_DMA_CHN_INTC) &\n> +\t\t SPRD_DMA_CHN_INT_STS;\n\nright justfied\n\n> +static enum dma_request_mode sprd_dma_get_req_type(struct sprd_dma_chn *schan)\n> +{\n> +\tu32 frag_reg = readl(schan->chn_base + SPRD_DMA_CHN_FRG_LEN);\n> +\tu32 req_type = (frag_reg >> SPRD_DMA_REQ_MODE_OFFSET) &\n> +\t\t SPRD_DMA_REQ_MODE_MASK;\n> +\n> +\tswitch (req_type) {\n> +\tcase 0:\n> +\t\treturn SPRD_DMA_FRAG_REQ;\n\nwhich is 0\n\n> +\n> +\tcase 1:\n> +\t\treturn SPRD_DMA_BLK_REQ;\n\nand 1 and so on so why the coonversion?\n\nyou can do:\n\n\tswitch (req_type) {\n\tcase 0:\n\tcase 1:\n\tcase 2:\n\tcase 3:\n\t\treturn req_type;\n\tdefault:\n\t\treturn SPRD_DMA_FRAG_REQ;\n\n> +\n> +\tcase 2:\n> +\t\treturn SPRD_DMA_TRANS_REQ;\n> +\n> +\tcase 3:\n> +\t\treturn SPRD_DMA_LIST_REQ;\n> +\n> +\tdefault:\n> +\t\treturn SPRD_DMA_FRAG_REQ;\n> +\t}\n> +}\n> +\tif ((src_step != 0 && des_step != 0) || (src_step | des_step) == 0) {\n> +\t\tfix_en = 0;\n> +\t} else {\n> +\t\tfix_en = 1;\n> +\t\tif (src_step)\n> +\t\t\tfix_mode = 1;\n> +\t\telse\n> +\t\t\tfix_mode = 0;\n> +\t}\n> +\n> +\thw->frg_len = datawidth << SPRD_DMA_SRC_DATAWIDTH_OFFSET |\n> +\t\tdatawidth << SPRD_DMA_DES_DATAWIDTH_OFFSET |\n> +\t\treq_mode << SPRD_DMA_REQ_MODE_OFFSET |\n> +\t\tfix_mode << SPRD_DMA_FIX_SEL_OFFSET |\n> +\t\tfix_en << SPRD_DMA_FIX_SEL_EN |\n> +\t\t(fragment_len & SPRD_DMA_FRG_LEN_MASK);\n> +\thw->blk_len = block_len & SPRD_DMA_BLK_LEN_MASK;\n> +\n> +\thw->intc = SPRD_DMA_CFG_ERR_INT_EN;\n\nempty line here please\n\n> +\tswitch (irq_mode) {\n> +\tcase SPRD_DMA_NO_INT:\n> +\t\tbreak;\n\nno handling?\n\n> +\tcase SPRD_DMA_FRAG_INT:\n> +\t\thw->intc |= SPRD_DMA_FRAG_INT_EN;\n> +\t\tbreak;\n\nempty line after break helps readablity\n\n> +\tcase SPRD_DMA_BLK_INT:\n> +\t\thw->intc |= SPRD_DMA_BLK_INT_EN;\n> +\t\tbreak;\n> +\tcase SPRD_DMA_BLK_FRAG_INT:\n> +\t\thw->intc |= SPRD_DMA_BLK_INT_EN | SPRD_DMA_FRAG_INT_EN;\n> +\t\tbreak;\n> +\tcase SPRD_DMA_TRANS_INT:\n> +\t\thw->intc |= SPRD_DMA_TRANS_INT_EN;\n> +\t\tbreak;\n> +\tcase SPRD_DMA_TRANS_FRAG_INT:\n> +\t\thw->intc |= SPRD_DMA_TRANS_INT_EN | SPRD_DMA_FRAG_INT_EN;\n> +\t\tbreak;\n> +\tcase SPRD_DMA_TRANS_BLK_INT:\n> +\t\thw->intc |= SPRD_DMA_TRANS_INT_EN | SPRD_DMA_BLK_INT_EN;\n> +\t\tbreak;\n> +\tcase SPRD_DMA_LIST_INT:\n> +\t\thw->intc |= SPRD_DMA_LIST_INT_EN;\n> +\t\tbreak;\n> +\tcase SPRD_DMA_CFGERR_INT:\n> +\t\thw->intc |= SPRD_DMA_CFG_ERR_INT_EN;\n> +\t\tbreak;\n> +\tdefault:\n> +\t\tdev_err(sdev->dma_dev.dev, \"invalid irq mode\\n\");\n> +\t\treturn -EINVAL;\n\n[snip]\n\n> +struct dma_async_tx_descriptor *sprd_dma_prep_dma_memcpy(struct dma_chan *chan,\n> +\t\t\t\t\t\t\t dma_addr_t dest,\n> +\t\t\t\t\t\t\t dma_addr_t src,\n> +\t\t\t\t\t\t\t size_t len,\n> +\t\t\t\t\t\t\t unsigned long flags)\n> +{\n> +\tstruct sprd_dma_chn *schan = to_sprd_dma_chan(chan);\n> +\tstruct sprd_dma_desc *sdesc;\n> +\tint ret;\n> +\n> +\tsdesc = kzalloc(sizeof(struct sprd_dma_desc), GFP_NOWAIT);\n\nsizeof(*sdesc) pls\n\n> +\tret = dma_async_device_register(&sdev->dma_dev);\n> +\tif (ret < 0) {\n> +\t\tdev_err(&pdev->dev, \"register dma device failed:%d\\n\", ret);\n> +\t\tgoto err_register;\n> +\t}\n> +\n> +\tsprd_dma_info.dma_cap = sdev->dma_dev.cap_mask;\n> +\tret = of_dma_controller_register(np, of_dma_simple_xlate,\n> +\t\t\t\t\t &sprd_dma_info);\n> +\tif (ret)\n> +\t\tgoto err_of_register;\n> +\n> +\tpm_runtime_put_sync(&pdev->dev);\n\nwhy put_sync, i though you didnt want these?","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y0zgZ05jxz9sBW\n\tfor ;\n\tMon, 25 Sep 2017 19:44:10 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S934154AbdIYJoI (ORCPT );\n\tMon, 25 Sep 2017 05:44:08 -0400","from mga06.intel.com ([134.134.136.31]:3010 \"EHLO mga06.intel.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S933315AbdIYJoH (ORCPT );\n\tMon, 25 Sep 2017 05:44:07 -0400","from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga104.jf.intel.com with ESMTP; 25 Sep 2017 02:44:06 -0700","from vkoul-udesk7.iind.intel.com (HELO localhost) ([10.223.84.143])\n\tby orsmga002.jf.intel.com with ESMTP; 25 Sep 2017 02:44:03 -0700"],"X-ExtLoop1":"1","X-IronPort-AV":"E=Sophos;i=\"5.42,435,1500966000\"; d=\"scan'208\";a=\"139065579\"","Date":"Mon, 25 Sep 2017 15:17:59 +0530","From":"Vinod Koul ","To":"Baolin Wang ","Cc":"robh+dt@kernel.org, mark.rutland@arm.com, dan.j.williams@intel.com,\n\tdmaengine@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, broonie@kernel.org, baolin.wang@linaro.org","Subject":"Re: [PATCH v3 2/2] dma: sprd: Add Spreadtrum DMA driver","Message-ID":"<20170925094759.GB30097@localhost>","References":"<69228f2ae8af7cff6b2a5e75503a08bd756a0d5e.1504777856.git.baolin.wang@spreadtrum.com>\n\t<6225db538d6f22c608da89520576669784a82e1e.1504777856.git.baolin.wang@spreadtrum.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<6225db538d6f22c608da89520576669784a82e1e.1504777856.git.baolin.wang@spreadtrum.com>","User-Agent":"Mutt/1.5.24 (2015-08-30)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1774953,"web_url":"http://patchwork.ozlabs.org/comment/1774953/","msgid":"","list_archive_url":null,"date":"2017-09-25T20:02:52","subject":"Re: [PATCH v3 2/2] dma: sprd: Add Spreadtrum DMA driver","submitter":{"id":66012,"url":"http://patchwork.ozlabs.org/api/people/66012/","name":"Baolin Wang","email":"baolin.wang@linaro.org"},"content":"Hi Vinod,\n\nOn 25 September 2017 at 17:47, Vinod Koul wrote:\n> On Thu, Sep 07, 2017 at 06:00:04PM +0800, Baolin Wang wrote:\n>\n>> +static void sprd_dma_chn_update(struct sprd_dma_chn *schan, u32 reg,\n>> + u32 mask, u32 val)\n>\n> right justfied pls\n\nI have made these to right justified, but I do not know why it looks\nlike in this email. I checked the patch in patchwork[1], it already\nright justified. But I will check again to make sure they are right\njustified.\n\n[1] https://patchwork.kernel.org/patch/9942025/\n\n>\n>> +static void sprd_dma_clear_int(struct sprd_dma_chn *schan)\n>> +{\n>> + u32 mask = SPRD_DMA_INT_MASK << SPRD_DMA_INT_CLR_OFFSET;\n>> + u32 val = SPRD_DMA_INT_MASK << SPRD_DMA_INT_CLR_OFFSET;\n>\n> both seems same..?\n\nYes, I will save one line here in next version.\n\n>\n>> +\n>> + sprd_dma_chn_update(schan, SPRD_DMA_CHN_INTC, mask, val);\n>\n> do you need local values here, we can just call sprd_dma_chn_update() with\n> the mask and values!\n\nSine I want to keep this function to make things clear when users can\nknow what is going on from the function name. But if you think they\nare redundant, I will remove these local values in next version.\n\n>\n> Also looking at thus shoulnt SPRD_DMA_INT_MASK bits be defined for the bits\n> we have in spec, if so why are we shifting then, perhpas u should redo the\n> clear routine to pass mask, shift, bits..?\n>\n> Same comment for this and others\n\nOK.\n\n>\n>> +static enum dma_int_type sprd_dma_get_int_type(struct sprd_dma_chn *schan)\n>> +{\n>> + u32 intc_sts = readl(schan->chn_base + SPRD_DMA_CHN_INTC) &\n>> + SPRD_DMA_CHN_INT_STS;\n>\n> right justfied\n\nOK.\n\n>\n>> +static enum dma_request_mode sprd_dma_get_req_type(struct sprd_dma_chn *schan)\n>> +{\n>> + u32 frag_reg = readl(schan->chn_base + SPRD_DMA_CHN_FRG_LEN);\n>> + u32 req_type = (frag_reg >> SPRD_DMA_REQ_MODE_OFFSET) &\n>> + SPRD_DMA_REQ_MODE_MASK;\n>> +\n>> + switch (req_type) {\n>> + case 0:\n>> + return SPRD_DMA_FRAG_REQ;\n>\n> which is 0\n>\n>> +\n>> + case 1:\n>> + return SPRD_DMA_BLK_REQ;\n>\n> and 1 and so on so why the coonversion?\n>\n> you can do:\n>\n> switch (req_type) {\n> case 0:\n> case 1:\n> case 2:\n> case 3:\n> return req_type;\n> default:\n> return SPRD_DMA_FRAG_REQ;\n\nMake sense.\n\n>\n>> +\n>> + case 2:\n>> + return SPRD_DMA_TRANS_REQ;\n>> +\n>> + case 3:\n>> + return SPRD_DMA_LIST_REQ;\n>> +\n>> + default:\n>> + return SPRD_DMA_FRAG_REQ;\n>> + }\n>> +}\n>> + if ((src_step != 0 && des_step != 0) || (src_step | des_step) == 0) {\n>> + fix_en = 0;\n>> + } else {\n>> + fix_en = 1;\n>> + if (src_step)\n>> + fix_mode = 1;\n>> + else\n>> + fix_mode = 0;\n>> + }\n>> +\n>> + hw->frg_len = datawidth << SPRD_DMA_SRC_DATAWIDTH_OFFSET |\n>> + datawidth << SPRD_DMA_DES_DATAWIDTH_OFFSET |\n>> + req_mode << SPRD_DMA_REQ_MODE_OFFSET |\n>> + fix_mode << SPRD_DMA_FIX_SEL_OFFSET |\n>> + fix_en << SPRD_DMA_FIX_SEL_EN |\n>> + (fragment_len & SPRD_DMA_FRG_LEN_MASK);\n>> + hw->blk_len = block_len & SPRD_DMA_BLK_LEN_MASK;\n>> +\n>> + hw->intc = SPRD_DMA_CFG_ERR_INT_EN;\n>\n> empty line here please\n\nOK.\n\n>\n>> + switch (irq_mode) {\n>> + case SPRD_DMA_NO_INT:\n>> + break;\n>\n> no handling?\n\nYes, we do not need to set any irq type enabled here.\n\n>\n>> + case SPRD_DMA_FRAG_INT:\n>> + hw->intc |= SPRD_DMA_FRAG_INT_EN;\n>> + break;\n>\n> empty line after break helps readablity\n\nOK. I will check the whole file.\n\n>\n>> + case SPRD_DMA_BLK_INT:\n>> + hw->intc |= SPRD_DMA_BLK_INT_EN;\n>> + break;\n>> + case SPRD_DMA_BLK_FRAG_INT:\n>> + hw->intc |= SPRD_DMA_BLK_INT_EN | SPRD_DMA_FRAG_INT_EN;\n>> + break;\n>> + case SPRD_DMA_TRANS_INT:\n>> + hw->intc |= SPRD_DMA_TRANS_INT_EN;\n>> + break;\n>> + case SPRD_DMA_TRANS_FRAG_INT:\n>> + hw->intc |= SPRD_DMA_TRANS_INT_EN | SPRD_DMA_FRAG_INT_EN;\n>> + break;\n>> + case SPRD_DMA_TRANS_BLK_INT:\n>> + hw->intc |= SPRD_DMA_TRANS_INT_EN | SPRD_DMA_BLK_INT_EN;\n>> + break;\n>> + case SPRD_DMA_LIST_INT:\n>> + hw->intc |= SPRD_DMA_LIST_INT_EN;\n>> + break;\n>> + case SPRD_DMA_CFGERR_INT:\n>> + hw->intc |= SPRD_DMA_CFG_ERR_INT_EN;\n>> + break;\n>> + default:\n>> + dev_err(sdev->dma_dev.dev, \"invalid irq mode\\n\");\n>> + return -EINVAL;\n>\n> [snip]\n>\n>> +struct dma_async_tx_descriptor *sprd_dma_prep_dma_memcpy(struct dma_chan *chan,\n>> + dma_addr_t dest,\n>> + dma_addr_t src,\n>> + size_t len,\n>> + unsigned long flags)\n>> +{\n>> + struct sprd_dma_chn *schan = to_sprd_dma_chan(chan);\n>> + struct sprd_dma_desc *sdesc;\n>> + int ret;\n>> +\n>> + sdesc = kzalloc(sizeof(struct sprd_dma_desc), GFP_NOWAIT);\n>\n> sizeof(*sdesc) pls\n\nOK.\n\n>\n>> + ret = dma_async_device_register(&sdev->dma_dev);\n>> + if (ret < 0) {\n>> + dev_err(&pdev->dev, \"register dma device failed:%d\\n\", ret);\n>> + goto err_register;\n>> + }\n>> +\n>> + sprd_dma_info.dma_cap = sdev->dma_dev.cap_mask;\n>> + ret = of_dma_controller_register(np, of_dma_simple_xlate,\n>> + &sprd_dma_info);\n>> + if (ret)\n>> + goto err_of_register;\n>> +\n>> + pm_runtime_put_sync(&pdev->dev);\n>\n> why put_sync, i though you didnt want these?\n\nSorry, I missing this and I will fix this in next version. Thanks for\nyour commnets.","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"U3fXhEfF\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1FPk47j6z9t2l\n\tfor ;\n\tTue, 26 Sep 2017 06:03:06 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S965123AbdIYUCz (ORCPT );\n\tMon, 25 Sep 2017 16:02:55 -0400","from mail-oi0-f41.google.com ([209.85.218.41]:54736 \"EHLO\n\tmail-oi0-f41.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S965095AbdIYUCx (ORCPT\n\t); Mon, 25 Sep 2017 16:02:53 -0400","by mail-oi0-f41.google.com with SMTP id u130so8257821oib.11\n\tfor ;\n\tMon, 25 Sep 2017 13:02:53 -0700 (PDT)","by 10.157.25.230 with HTTP; Mon, 25 Sep 2017 13:02:52 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=prJc0Cze+e5CGJipQBr9v+LDZJKPJDlkD6GrNNulwfQ=;\n\tb=U3fXhEfFG8xtRvUYMVnfnAdcjVvqsTfHd0TApfq19yqPfIPLqLLhNLXqt8sTX65THR\n\tmxg9Oq302g6aMhsJ34YLUcJmOH1swolWRKKQLZaGIGJVAFe0M5/MrGuAulDH7nr+Y/Vg\n\tX07ftKFlqPGXfB0bmWjwBGs85V5mZdHGRY57I=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=prJc0Cze+e5CGJipQBr9v+LDZJKPJDlkD6GrNNulwfQ=;\n\tb=ONz+Vg+9f7N/85h+jDc/oWLq2sV/OZU+WyxPBbBhebI76Nppuz437fFP7HX6De2eDi\n\t7j+ik8Q/CgOwO0V2tOYVfqKuVHAvib/ZeNlGPLBhijDLVOwb7jh1jprG8BykPoIwSNfG\n\tOR3frSqtIhB65LclbkAUr6JpjuTA4luOCoDRd6Uvlad3x2PyYlt8jQuId/XvgwSTIBaI\n\th58KMVFNgycL+DZvvn6vP1EJhdLXOUDp24d8Ma1oWhkegDuMs5YC1BwadC3f9SYWFlXz\n\toSdICeNx99JTXopZmBO6oZKzfuA9GAqWtTAtaAw4iIYc4grmUGhhHbVY/t3v/dhu46xC\n\tIW6A==","X-Gm-Message-State":"AHPjjUi0ESpofL79FZrJQklU6QdjHisP6pQI4ZT2NLy0bGnCIQM91EDF\n\tusVWanokJQiRFtLk/gtS4L2uIVjDG6cyRLm+xmRobQ==","X-Google-Smtp-Source":"AOwi7QBTiTBSx1vgI98QAhRUsJWkHxTP2ZrGdmeYMJttUSNOO6foqGQ6Bt958yo/ocv4LRNKyGFJ4JwTA99g5VozZJQ=","X-Received":"by 10.202.245.213 with SMTP id t204mr9891407oih.88.1506369773054;\n\tMon, 25 Sep 2017 13:02:53 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170925094759.GB30097@localhost>","References":"<69228f2ae8af7cff6b2a5e75503a08bd756a0d5e.1504777856.git.baolin.wang@spreadtrum.com>\n\t<6225db538d6f22c608da89520576669784a82e1e.1504777856.git.baolin.wang@spreadtrum.com>\n\t<20170925094759.GB30097@localhost>","From":"Baolin Wang ","Date":"Tue, 26 Sep 2017 04:02:52 +0800","Message-ID":"","Subject":"Re: [PATCH v3 2/2] dma: sprd: Add Spreadtrum DMA driver","To":"Vinod Koul ","Cc":"Baolin Wang ,\n\tRob Herring , Mark Rutland ,\n\tDan Williams ,\n\tdmaengine@vger.kernel.org, devicetree@vger.kernel.org,\n\tLKML , Mark Brown ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1774982,"web_url":"http://patchwork.ozlabs.org/comment/1774982/","msgid":"<20170925211406.r2zqips6vxv6fgjv@sirena.org.uk>","list_archive_url":null,"date":"2017-09-25T21:14:06","subject":"Re: [PATCH v3 2/2] dma: sprd: Add Spreadtrum DMA driver","submitter":{"id":24878,"url":"http://patchwork.ozlabs.org/api/people/24878/","name":"Mark Brown","email":"broonie@kernel.org"},"content":"On Tue, Sep 26, 2017 at 04:02:52AM +0800, Baolin Wang wrote:\n> On 25 September 2017 at 17:47, Vinod Koul wrote:\n> > On Thu, Sep 07, 2017 at 06:00:04PM +0800, Baolin Wang wrote:\n> >\n> >> +static void sprd_dma_chn_update(struct sprd_dma_chn *schan, u32 reg,\n> >> + u32 mask, u32 val)\n\n> > right justfied pls\n\n> I have made these to right justified, but I do not know why it looks\n> like in this email. I checked the patch in patchwork[1], it already\n> right justified. But I will check again to make sure they are right\n> justified.\n\nThis happens as a result of indenting with tabs - when things get quoted\nor the characters get added at the start of the line you can get an\nextra couple of characters on the line with no blank space but that's\nless than a tab so the lines indented by tabs suddenly aren't lined up.\nIt'll be fine once the patch is applied.","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=sirena.org.uk header.i=@sirena.org.uk\n\theader.b=\"w7DJx7+G\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1H0s2qgMz9t3t\n\tfor ;\n\tTue, 26 Sep 2017 07:15:09 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S934513AbdIYVO4 (ORCPT );\n\tMon, 25 Sep 2017 17:14:56 -0400","from heliosphere.sirena.org.uk ([172.104.155.198]:36638 \"EHLO\n\theliosphere.sirena.org.uk\" rhost-flags-OK-OK-OK-OK) by\n\tvger.kernel.org with ESMTP id S932182AbdIYVOy (ORCPT\n\t); Mon, 25 Sep 2017 17:14:54 -0400","from [70.35.39.2] (helo=finisterre.ee.mobilebroadband)\n\tby heliosphere.sirena.org.uk with esmtpsa\n\t(TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89)\n\t(envelope-from )\n\tid 1dwai7-00022a-NE; Mon, 25 Sep 2017 21:14:40 +0000","by finisterre.ee.mobilebroadband (Postfix, from userid 1000)\n\tid CB42D440053; Mon, 25 Sep 2017 22:14:06 +0100 (BST)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=sirena.org.uk; s=20170815-heliosphere; h=In-Reply-To:Content-Type:\n\tMIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To:\n\tContent-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:\n\tResent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:\n\tList-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive;\n\tbh=7PnikIjMaSbS4am3Oxv15CPIQXOnwEDJbIavDv190xw=;\n\tb=w7DJx7+GlEA+234fGRvXDFJRq\n\takiM4NciWhj33sBe6n4Qh/LrHa3kkjBhbGCeTkoPruUbLpPYBmH76Gi7JfUdBvXPcaU43yqD3HGft\n\tO6vEscdYSbkrslzzRc8WqJNOerTTi33Tz+L64fQUapwlIvIus81V4IaZihi4vXY2nUysQ=;","Date":"Mon, 25 Sep 2017 14:14:06 -0700","From":"Mark Brown ","To":"Baolin Wang ","Cc":"Vinod Koul ,\n\tBaolin Wang ,\n\tRob Herring , Mark Rutland ,\n\tDan Williams ,\n\tdmaengine@vger.kernel.org, devicetree@vger.kernel.org,\n\tLKML ","Subject":"Re: [PATCH v3 2/2] dma: sprd: Add Spreadtrum DMA driver","Message-ID":"<20170925211406.r2zqips6vxv6fgjv@sirena.org.uk>","References":"<69228f2ae8af7cff6b2a5e75503a08bd756a0d5e.1504777856.git.baolin.wang@spreadtrum.com>\n\t<6225db538d6f22c608da89520576669784a82e1e.1504777856.git.baolin.wang@spreadtrum.com>\n\t<20170925094759.GB30097@localhost>\n\t","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha512;\n\tprotocol=\"application/pgp-signature\"; boundary=\"coptyhu7paltrkym\"","Content-Disposition":"inline","In-Reply-To":"","X-Cookie":"MIT:","User-Agent":"NeoMutt/20170609 (1.8.3)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1775061,"web_url":"http://patchwork.ozlabs.org/comment/1775061/","msgid":"","list_archive_url":null,"date":"2017-09-26T00:15:54","subject":"Re: [PATCH v3 2/2] dma: sprd: Add Spreadtrum DMA driver","submitter":{"id":66012,"url":"http://patchwork.ozlabs.org/api/people/66012/","name":"Baolin Wang","email":"baolin.wang@linaro.org"},"content":"On 26 September 2017 at 05:14, Mark Brown wrote:\n> On Tue, Sep 26, 2017 at 04:02:52AM +0800, Baolin Wang wrote:\n>> On 25 September 2017 at 17:47, Vinod Koul wrote:\n>> > On Thu, Sep 07, 2017 at 06:00:04PM +0800, Baolin Wang wrote:\n>> >\n>> >> +static void sprd_dma_chn_update(struct sprd_dma_chn *schan, u32 reg,\n>> >> + u32 mask, u32 val)\n>\n>> > right justfied pls\n>\n>> I have made these to right justified, but I do not know why it looks\n>> like in this email. I checked the patch in patchwork[1], it already\n>> right justified. But I will check again to make sure they are right\n>> justified.\n>\n> This happens as a result of indenting with tabs - when things get quoted\n> or the characters get added at the start of the line you can get an\n> extra couple of characters on the line with no blank space but that's\n> less than a tab so the lines indented by tabs suddenly aren't lined up.\n> It'll be fine once the patch is applied.\n\nMake sense. Thanks.","headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"ZHEkHaij\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1M1V6BX8z9s7C\n\tfor ;\n\tTue, 26 Sep 2017 10:15:58 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S936536AbdIZAP5 (ORCPT );\n\tMon, 25 Sep 2017 20:15:57 -0400","from mail-oi0-f45.google.com ([209.85.218.45]:55892 \"EHLO\n\tmail-oi0-f45.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S935486AbdIZAPz (ORCPT\n\t); Mon, 25 Sep 2017 20:15:55 -0400","by mail-oi0-f45.google.com with SMTP id x85so9568491oix.12\n\tfor ;\n\tMon, 25 Sep 2017 17:15:55 -0700 (PDT)","by 10.157.25.230 with HTTP; Mon, 25 Sep 2017 17:15:54 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=UQ3uKevUoIHgMSWjMk8Etti6xgI3o8D2d41nuZrOmqk=;\n\tb=ZHEkHaiji4M2ITG8eeI17VAnjQXGOGHwAUI4JeYpeBwLEwhpWNlsnMaJRAZD7r2ykS\n\t2uBm9STJcOkvll19DXCKq8Pkr4Nb/hmRjmyb6BbUvu8tvPfS7xC5TmH7eMkBV3TzWD+H\n\tjwLnKkkD2jm3UpwckGzERTTPzMZisChl+eoOs=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=UQ3uKevUoIHgMSWjMk8Etti6xgI3o8D2d41nuZrOmqk=;\n\tb=jotN7IVWm8vgz2vVbzIRiKBd3o4xowbXX0jm8a5F5c1sv87YwEfT8IdgUgxgks0JfR\n\t9NV0xXhX07IcUF0qSMMebimfDCowkMFmgyjKrrwchZ9x4JWCqLGtR+UfQ3Msv/4tQj7Z\n\tsMDkpKb0wHKo7yorv5/0EP2LeMNQwuZG59KmYGRkg9t1G4+1EhW977hOY9hCQHH9BaPI\n\t9Y1QuHRkoIN/5P4+q1jj1x2/cYKHfzB6POufcySlpT0hsEgcqeTsuhM7AL9QOcKduh3N\n\tme5v/CMs+ShbK3rHFTw1ulvsTmISJW2UDe7AuQj1GTQlnTMn+49BF2UcISKGyTbm6o+Z\n\tH08Q==","X-Gm-Message-State":"AHPjjUj/77OTCszhlXLw0eXHx37U+QDTlVg2xgmRUKXSmuh+qrrYsOSl\n\tfTVuWLmmxFTzso+lyMa3P3VsJcA2pR/8CiZX7n3hNw==","X-Google-Smtp-Source":"AOwi7QBUBnJHz97BW2hI4WunvBPgjxm31RWrzQeF0lEo1qG+lDAVwGF1DGXgIeISgrlrsRZ/qT6cXOSHwedDATyTeP8=","X-Received":"by 10.157.1.5 with SMTP id 5mr1030544otu.184.1506384955015; Mon,\n\t25 Sep 2017 17:15:55 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170925211406.r2zqips6vxv6fgjv@sirena.org.uk>","References":"<69228f2ae8af7cff6b2a5e75503a08bd756a0d5e.1504777856.git.baolin.wang@spreadtrum.com>\n\t<6225db538d6f22c608da89520576669784a82e1e.1504777856.git.baolin.wang@spreadtrum.com>\n\t<20170925094759.GB30097@localhost>\n\t\n\t<20170925211406.r2zqips6vxv6fgjv@sirena.org.uk>","From":"Baolin Wang ","Date":"Tue, 26 Sep 2017 08:15:54 +0800","Message-ID":"","Subject":"Re: [PATCH v3 2/2] dma: sprd: Add Spreadtrum DMA driver","To":"Mark Brown ","Cc":"Vinod Koul ,\n\tBaolin Wang ,\n\tRob Herring , Mark Rutland ,\n\tDan Williams ,\n\tdmaengine@vger.kernel.org, devicetree@vger.kernel.org,\n\tLKML ","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"}}]