[{"id":1764785,"web_url":"http://patchwork.ozlabs.org/comment/1764785/","msgid":"<201709072303.wpwEY62K%fengguang.wu@intel.com>","list_archive_url":null,"date":"2017-09-07T15:24:56","subject":"Re: [PATCH v3 1/3] arm: npcm: add basic support for Nuvoton BMCs","submitter":{"id":67315,"url":"http://patchwork.ozlabs.org/api/people/67315/","name":"kernel test robot","email":"lkp@intel.com"},"content":"Hi Brendan,\n\n[auto build test WARNING on linus/master]\n[also build test WARNING on v4.13 next-20170907]\n[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]\n\nurl: https://github.com/0day-ci/linux/commits/Brendan-Higgins/arm-npcm-add-basic-support-for-Nuvoton-BMCs/20170907-214055\nconfig: arm-allmodconfig (attached as .config)\ncompiler: arm-linux-gnueabi-gcc (Debian 6.1.1-9) 6.1.1 20160705\nreproduce:\n wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross\n chmod +x ~/bin/make.cross\n # save the attached .config to linux build tree\n make.cross ARCH=arm \n\nAll warnings (new ones prefixed by >>):\n\nwarning: (CPU_NPCM750) selects ARM_ERRATA_458693 which has unmet direct dependencies (CPU_V7 && !ARCH_MULTIPLATFORM)\nwarning: (CPU_NPCM750) selects ARM_ERRATA_742231 which has unmet direct dependencies (CPU_V7 && SMP && !ARCH_MULTIPLATFORM)\n\n---\n0-DAY kernel test infrastructure Open Source Technology Center\nhttps://lists.01.org/pipermail/kbuild-all Intel Corporation","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","openbmc@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xp45l6Kx7z9t2r\n\tfor ;\n\tFri, 8 Sep 2017 01:25:31 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xp45l4fSPzDrWt\n\tfor ;\n\tFri, 8 Sep 2017 01:25:31 +1000 (AEST)","from mga05.intel.com (mga05.intel.com [192.55.52.43])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xp45Y0vQXzDrW9\n\tfor ; Fri, 8 Sep 2017 01:25:20 +1000 (AEST)","from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby fmsmga105.fm.intel.com with ESMTP; 07 Sep 2017 08:25:18 -0700","from bee.sh.intel.com (HELO bee) ([10.239.97.14])\n\tby fmsmga002.fm.intel.com with ESMTP; 07 Sep 2017 08:25:15 -0700","from kbuild by bee with local (Exim 4.84_2)\n\t(envelope-from )\n\tid 1dpyky-000HHT-SY; Thu, 07 Sep 2017 23:30:16 +0800"],"Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=intel.com\n\t(client-ip=192.55.52.43; helo=mga05.intel.com;\n\tenvelope-from=fengguang.wu@intel.com; receiver=)","X-ExtLoop1":"1","X-IronPort-AV":"E=Sophos;i=\"5.42,359,1500966000\"; \n\td=\"gz'50?scan'50,208,50\";a=\"1215966883\"","Date":"Thu, 7 Sep 2017 23:24:56 +0800","From":"kbuild test robot ","To":"Brendan Higgins ","Subject":"Re: [PATCH v3 1/3] arm: npcm: add basic support for Nuvoton BMCs","Message-ID":"<201709072303.wpwEY62K%fengguang.wu@intel.com>","MIME-Version":"1.0","Content-Type":"multipart/mixed; boundary=\"LQksG6bCIzRHxTLp\"","Content-Disposition":"inline","In-Reply-To":"<20170906003016.2159-2-brendanhiggins@google.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-SA-Exim-Connect-IP":"","X-SA-Exim-Mail-From":"fengguang.wu@intel.com","X-SA-Exim-Scanned":"No (on bee); SAEximRunCond expanded to false","X-BeenThere":"openbmc@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Development list for OpenBMC ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, devicetree@vger.kernel.org, f.fainelli@gmail.com, \n\ttmaimon77@gmail.com, avifishman70@gmail.com, openbmc@lists.ozlabs.org,\n\tBrendan Higgins , linux@armlinux.org.uk,\n\tlinux-kernel@vger.kernel.org, robh+dt@kernel.org, kbuild-all@01.org, \n\tlinux-arm-kernel@lists.infradead.org","Errors-To":"openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org","Sender":"\"openbmc\"\n\t"}},{"id":1764868,"web_url":"http://patchwork.ozlabs.org/comment/1764868/","msgid":"<201709080102.sovqCRiS%fengguang.wu@intel.com>","list_archive_url":null,"date":"2017-09-07T18:01:08","subject":"Re: [PATCH v3 1/3] arm: npcm: add basic support for Nuvoton BMCs","submitter":{"id":67315,"url":"http://patchwork.ozlabs.org/api/people/67315/","name":"kernel test robot","email":"lkp@intel.com"},"content":"Hi Brendan,\n\n[auto build test WARNING on linus/master]\n[also build test WARNING on v4.13 next-20170907]\n[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]\n\nurl: https://github.com/0day-ci/linux/commits/Brendan-Higgins/arm-npcm-add-basic-support-for-Nuvoton-BMCs/20170907-214055\nconfig: arm-allmodconfig (attached as .config)\ncompiler: arm-linux-gnueabi-gcc (Debian 6.1.1-9) 6.1.1 20160705\nreproduce:\n wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross\n chmod +x ~/bin/make.cross\n # save the attached .config to linux build tree\n make.cross ARCH=arm \n\nAll warnings (new ones prefixed by >>):\n\n In file included from include/linux/printk.h:6:0,\n from include/linux/kernel.h:13,\n from include/linux/delay.h:21,\n from arch/arm/mach-npcm/platsmp.c:11:\n arch/arm/mach-npcm/platsmp.c: In function 'npcm7xx_smp_boot_secondary':\n>> include/linux/kern_levels.h:4:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 2 has type 'void *' [-Wformat=]\n #define KERN_SOH \"\\001\" /* ASCII Start Of Header */\n ^\n include/linux/kern_levels.h:10:18: note: in expansion of macro 'KERN_SOH'\n #define KERN_ERR KERN_SOH \"3\" /* error conditions */\n ^~~~~~~~\n include/linux/printk.h:301:9: note: in expansion of macro 'KERN_ERR'\n printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)\n ^~~~~~~~\n>> arch/arm/mach-npcm/platsmp.c:43:3: note: in expansion of macro 'pr_err'\n pr_err(\"could not iomap gcr at: 0x%llx\\n\", gcr_base);\n ^~~~~~\n arch/arm/mach-npcm/platsmp.c: In function 'npcm7xx_smp_prepare_cpus':\n>> include/linux/kern_levels.h:4:18: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 2 has type 'void *' [-Wformat=]\n #define KERN_SOH \"\\001\" /* ASCII Start Of Header */\n ^\n include/linux/kern_levels.h:10:18: note: in expansion of macro 'KERN_SOH'\n #define KERN_ERR KERN_SOH \"3\" /* error conditions */\n ^~~~~~~~\n include/linux/printk.h:301:9: note: in expansion of macro 'KERN_ERR'\n printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)\n ^~~~~~~~\n arch/arm/mach-npcm/platsmp.c:74:3: note: in expansion of macro 'pr_err'\n pr_err(\"could not iomap scu at: 0x%llx\\n\", scu_base);\n ^~~~~~\n arch/arm/mach-npcm/platsmp.c:80:1: warning: label 'out' defined but not used [-Wunused-label]\n out:\n ^~~\n In file included from include/linux/io.h:25:0,\n from arch/arm/mach-npcm/platsmp.c:14:\n arch/arm/mach-npcm/platsmp.c: In function 'npcm7xx_smp_boot_secondary':\n>> arch/arm/include/asm/io.h:421:17: warning: 'gcr_base' may be used uninitialized in this function [-Wmaybe-uninitialized]\n #define iounmap iounmap\n ^~~~~~~\n arch/arm/mach-npcm/platsmp.c:32:16: note: 'gcr_base' was declared here\n void __iomem *gcr_base;\n ^~~~~~~~\n\nvim +/pr_err +43 arch/arm/mach-npcm/platsmp.c\n\n 27\t\n 28\tstatic int npcm7xx_smp_boot_secondary(unsigned int cpu,\n 29\t\t\t\t\t struct task_struct *idle)\n 30\t{\n 31\t\tstruct device_node *gcr_np;\n 32\t\tvoid __iomem *gcr_base;\n 33\t\tint ret = 0;\n 34\t\n 35\t\tgcr_np = of_find_compatible_node(NULL, NULL, \"nuvoton,npcm750-gcr\");\n 36\t\tif (!gcr_np) {\n 37\t\t\tpr_err(\"no gcr device node\\n\");\n 38\t\t\tret = -EFAULT;\n 39\t\t\tgoto out;\n 40\t\t}\n 41\t\tgcr_base = of_iomap(gcr_np, 0);\n 42\t\tif (!gcr_base) {\n > 43\t\t\tpr_err(\"could not iomap gcr at: 0x%llx\\n\", gcr_base);\n 44\t\t\tret = -EFAULT;\n 45\t\t\tgoto out;\n 46\t\t}\n 47\t\n 48\t\t/* give boot ROM kernel start address. */\n 49\t\tiowrite32(__pa_symbol(npcm7xx_secondary_startup), gcr_base +\n 50\t\t\t NPCM7XX_SCRPAD_REG);\n 51\t\t/* make sure npcm7xx_secondary_startup is seen by all observers. */\n 52\t\tsmp_wmb();\n 53\t\tdsb_sev();\n 54\t\t/* make sure write buffer is drained */\n 55\t\tmb();\n 56\t\n 57\tout:\n 58\t\tiounmap(gcr_base);\n 59\t\treturn ret;\n 60\t}\n 61\t\n\n---\n0-DAY kernel test infrastructure Open Source Technology Center\nhttps://lists.01.org/pipermail/kbuild-all Intel Corporation","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","openbmc@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xp7Zg5tnPz9t2R\n\tfor ;\n\tFri, 8 Sep 2017 04:02:19 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xp7Zg2l4wzDrWV\n\tfor ;\n\tFri, 8 Sep 2017 04:02:19 +1000 (AEST)","from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xp7ZD1phLzDrWb\n\tfor ; Fri, 8 Sep 2017 04:01:53 +1000 (AEST)","from fmsmga005.fm.intel.com ([10.253.24.32])\n\tby fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t07 Sep 2017 11:01:49 -0700","from bee.sh.intel.com (HELO bee) ([10.239.97.14])\n\tby fmsmga005.fm.intel.com with ESMTP; 07 Sep 2017 11:01:46 -0700","from kbuild by bee with local (Exim 4.84_2)\n\t(envelope-from )\n\tid 1dq1CS-000IP1-A0; Fri, 08 Sep 2017 02:06:48 +0800"],"Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=intel.com\n\t(client-ip=192.55.52.88; helo=mga01.intel.com;\n\tenvelope-from=fengguang.wu@intel.com; receiver=)","X-ExtLoop1":"1","X-IronPort-AV":"E=Sophos;i=\"5.42,359,1500966000\"; \n\td=\"gz'50?scan'50,208,50\";a=\"148747649\"","Date":"Fri, 8 Sep 2017 02:01:08 +0800","From":"kbuild test robot ","To":"Brendan Higgins ","Subject":"Re: [PATCH v3 1/3] arm: npcm: add basic support for Nuvoton BMCs","Message-ID":"<201709080102.sovqCRiS%fengguang.wu@intel.com>","MIME-Version":"1.0","Content-Type":"multipart/mixed; boundary=\"4Ckj6UjgE2iN1+kY\"","Content-Disposition":"inline","In-Reply-To":"<20170906003016.2159-2-brendanhiggins@google.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-SA-Exim-Connect-IP":"","X-SA-Exim-Mail-From":"fengguang.wu@intel.com","X-SA-Exim-Scanned":"No (on bee); SAEximRunCond expanded to false","X-BeenThere":"openbmc@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Development list for OpenBMC ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"mark.rutland@arm.com, devicetree@vger.kernel.org, f.fainelli@gmail.com, \n\ttmaimon77@gmail.com, avifishman70@gmail.com, openbmc@lists.ozlabs.org,\n\tBrendan Higgins , linux@armlinux.org.uk,\n\tlinux-kernel@vger.kernel.org, robh+dt@kernel.org, kbuild-all@01.org, \n\tlinux-arm-kernel@lists.infradead.org","Errors-To":"openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org","Sender":"\"openbmc\"\n\t"}}]