[{"id":1763472,"web_url":"http://patchwork.ozlabs.org/comment/1763472/","msgid":"","list_archive_url":null,"date":"2017-09-05T16:03:10","subject":"Re: [Qemu-devel] [PATCH v2 1/3] boards.h: Define new flag\n\tignore_memory_transaction_failures","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 09/05/2017 08:53 AM, Peter Maydell wrote:\n> Define a new MachineClass field ignore_memory_transaction_failures.\n> If this is flag is true then the CPU will ignore memory transaction\n> failures which should cause the CPU to take an exception due to an\n> access to an unassigned physical address; the transaction will\n> instead return zero (for a read) or be ignored (for a write). This\n> should be set only by legacy board models which rely on the old\n> RAZ/WI behaviour for handling devices that QEMU does not yet model.\n> New board models should instead use \"unimplemented-device\" for all\n> memory ranges where the guest will attempt to probe for a device that\n> QEMU doesn't implement and a stub device is required.\n> \n> We need this for ARM boards, where we're about to implement support for\n> generating external aborts on memory transaction failures. Too many\n> of our legacy board models rely on the RAZ/WI behaviour and we\n> would break currently working guests when their \"probe for device\"\n> code provoked an external abort rather than a RAZ.\n> \n> Signed-off-by: Peter Maydell \n> ---\n> include/hw/boards.h | 11 +++++++++++\n> include/qom/cpu.h | 7 ++++++-\n> qom/cpu.c | 16 ++++++++++++++++\n> 3 files changed, 33 insertions(+), 1 deletion(-)\n\nReviewed-by: Richard Henderson \n\n\nr~","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"bhB3SzqC\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xms6V6H30z9ryk\n\tfor ;\n\tWed, 6 Sep 2017 02:06:58 +1000 (AEST)","from localhost ([::1]:59981 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dpGNM-0002Fh-Sn\n\tfor incoming@patchwork.ozlabs.org; Tue, 05 Sep 2017 12:06:56 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:36265)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1dpGJr-0008N5-BO\n\tfor qemu-devel@nongnu.org; Tue, 05 Sep 2017 12:03:29 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1dpGJm-00026q-Im\n\tfor qemu-devel@nongnu.org; Tue, 05 Sep 2017 12:03:19 -0400","from mail-pg0-x232.google.com ([2607:f8b0:400e:c05::232]:37967)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from )\n\tid 1dpGJm-00025v-C6\n\tfor qemu-devel@nongnu.org; Tue, 05 Sep 2017 12:03:14 -0400","by mail-pg0-x232.google.com with SMTP id v66so10118754pgb.5\n\tfor ; Tue, 05 Sep 2017 09:03:14 -0700 (PDT)","from bigtime.twiddle.net (97-126-108-236.tukw.qwest.net.\n\t[97.126.108.236]) by smtp.gmail.com with ESMTPSA id\n\ta6sm1707221pfa.76.2017.09.05.09.03.12\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tTue, 05 Sep 2017 09:03:12 -0700 (PDT)"],"DKIM-Signature":"v=1; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<1504626814-23124-2-git-send-email-peter.maydell@linaro.org>","Content-Type":"text/plain; charset=utf-8","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400e:c05::232","Subject":"Re: [Qemu-devel] [PATCH v2 1/3] boards.h: Define new flag\n\tignore_memory_transaction_failures","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"patches@linaro.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1764429,"web_url":"http://patchwork.ozlabs.org/comment/1764429/","msgid":"","list_archive_url":null,"date":"2017-09-06T23:16:44","subject":"Re: [Qemu-devel] [PATCH v2 1/3] boards.h: Define new flag\n\tignore_memory_transaction_failures","submitter":{"id":64571,"url":"http://patchwork.ozlabs.org/api/people/64571/","name":"Alistair Francis","email":"alistair23@gmail.com"},"content":"On Tue, Sep 5, 2017 at 9:03 AM, Richard Henderson\n wrote:\n> On 09/05/2017 08:53 AM, Peter Maydell wrote:\n>> Define a new MachineClass field ignore_memory_transaction_failures.\n>> If this is flag is true then the CPU will ignore memory transaction\n>> failures which should cause the CPU to take an exception due to an\n>> access to an unassigned physical address; the transaction will\n>> instead return zero (for a read) or be ignored (for a write). This\n>> should be set only by legacy board models which rely on the old\n>> RAZ/WI behaviour for handling devices that QEMU does not yet model.\n>> New board models should instead use \"unimplemented-device\" for all\n>> memory ranges where the guest will attempt to probe for a device that\n>> QEMU doesn't implement and a stub device is required.\n>>\n>> We need this for ARM boards, where we're about to implement support for\n>> generating external aborts on memory transaction failures. Too many\n>> of our legacy board models rely on the RAZ/WI behaviour and we\n>> would break currently working guests when their \"probe for device\"\n>> code provoked an external abort rather than a RAZ.\n>>\n>> Signed-off-by: Peter Maydell \n>> ---\n>> include/hw/boards.h | 11 +++++++++++\n>> include/qom/cpu.h | 7 ++++++-\n>> qom/cpu.c | 16 ++++++++++++++++\n>> 3 files changed, 33 insertions(+), 1 deletion(-)\n>\n> Reviewed-by: Richard Henderson \n\nReviewed-by: Alistair Francis \n\nThanks,\nAlistair\n\n>\n>\n> r~\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"qUj9ksMU\"; dkim-atps=neutral"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xnfdS1TGmz9t2W\n\tfor ;\n\tThu, 7 Sep 2017 09:18:01 +1000 (AEST)","from localhost ([::1]:38377 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dpja1-000643-1Y\n\tfor incoming@patchwork.ozlabs.org; Wed, 06 Sep 2017 19:17:57 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:35822)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1dpjZT-00062U-Ms\n\tfor qemu-devel@nongnu.org; Wed, 06 Sep 2017 19:17:24 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1dpjZS-0002RV-Rg\n\tfor qemu-devel@nongnu.org; Wed, 06 Sep 2017 19:17:23 -0400","from mail-wr0-x243.google.com ([2a00:1450:400c:c0c::243]:38856)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16)\n\t(Exim 4.71) (envelope-from )\n\tid 1dpjZM-00021r-Ii; Wed, 06 Sep 2017 19:17:16 -0400","by mail-wr0-x243.google.com with SMTP id p37so1547213wrb.5;\n\tWed, 06 Sep 2017 16:17:16 -0700 (PDT)","by 10.28.191.130 with HTTP; Wed, 6 Sep 2017 16:16:44 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=jutMsoTE9EgUngAVwb2V5YO1m9Q7xArlK5A0+lEi4zA=;\n\tb=qUj9ksMUKAYBh0t/0zVZjqAUOUel8QuSHimNJKWpQGcsvHrFnVw2QxbnEfbwDvN89u\n\tzAACids3Ot7yD2Lv01DqNtEBXLYJIL5qxm2YRlu3eHRyCkJZRBuJXRLJcmLOuCCGbhoU\n\t+Yhog0tky63Q2/sPgHvNiOqtHWal4S5kQ6R0i2ux3d/rdaLkIk3Rvu+v9ChqnyuUvRcr\n\tzlx0dq37acyiica+s1VI6KXW3fMoTTdeXS60K4lHuSpgKFD07nvDhj8qj39jk3LPiTz2\n\t55wB9nCxYH7LnjYHI3IrY5aUS6Awhlom+7q4EBTyZJJPqaTkHXCwKNGdyX70xmPGeDzj\n\tfHCg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=jutMsoTE9EgUngAVwb2V5YO1m9Q7xArlK5A0+lEi4zA=;\n\tb=Afje1iqQcPTs0hNfIBHM/azz26S7qBdrR0DqjQssgA3cpIoTaOlY3mafW6OdbzKI65\n\tc5CkEtNOeD9j2sidD5NSZeiBW17HltcH4UzvKMG3wnjXg1G4PJpRiRWSuTLQq2y5XVIx\n\t2eF680gSVnQCNVAqwyioabxBk3lu31zfxO+LDq9riixwiVfNZAsYuADT0gVsM6aAnqxq\n\tl/9z7uFlpza5wDoPtJz0z+pwTMX4mogCoVtygB1k7lpyY2Zo4sljnbPorxxo6qnwEHou\n\tYmBEM4KctZ6ZaR/eGosOiTzgPt9z5oH/3M9PUKiy7t2kgJbE0h8wxJpgl++1dOBpSD+t\n\tGnDw==","X-Gm-Message-State":"AHPjjUi9hSA41cYxpHBZC+mmsIdRp4Jdm0GIxwmIiSDQWM808ZdPj9eM\n\t8C2n8GkEhL1qqlxLh3AjXNtzTiBSwg==","X-Google-Smtp-Source":"ADKCNb5tIO75iNszEpNN/t3Aurggz3trd8ilNW3gJlY8B85t0rIpjoZ4eY7SiqQmf3F5Nfzg7IltT/VJRv8hD3Q3m9k=","X-Received":"by 10.223.175.100 with SMTP id z91mr492251wrc.177.1504739835447; \n\tWed, 06 Sep 2017 16:17:15 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"","References":"<1504626814-23124-1-git-send-email-peter.maydell@linaro.org>\n\t<1504626814-23124-2-git-send-email-peter.maydell@linaro.org>\n\t","From":"Alistair Francis ","Date":"Wed, 6 Sep 2017 16:16:44 -0700","Message-ID":"","To":"Richard Henderson ","Content-Type":"text/plain; charset=\"UTF-8\"","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2a00:1450:400c:c0c::243","Subject":"Re: [Qemu-devel] [PATCH v2 1/3] boards.h: Define new flag\n\tignore_memory_transaction_failures","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , qemu-arm ,\n\t\"qemu-devel@nongnu.org Developers\" ,\n\tPatch Tracking ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}}]