[{"id":1767406,"web_url":"http://patchwork.ozlabs.org/comment/1767406/","msgid":"<20170912220920.nfg33wbqikja3gml@rob-hp-laptop>","list_archive_url":null,"date":"2017-09-12T22:09:20","subject":"Re: [PATCH 2/7] dt-bindings: gpu: mali-utgard: add optional supply\n\tregulator","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Tue, Sep 05, 2017 at 12:57:34PM +0200, Heiko Stuebner wrote:\n> Mali GPUs have a separate supplying regulator in a lot of socs,\n> so describe a mali-supply property. The already described\n> operating points will likely also need access to this regulator.\n> \n> Signed-off-by: Heiko Stuebner <heiko@sntech.de>\n> ---\n>  Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 3 +++\n>  1 file changed, 3 insertions(+)\n> \n> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n> index 3b7f6f72f032..bcaa640c883f 100644\n> --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n> @@ -39,6 +39,9 @@ Optional properties:\n>      Memory region to allocate from, as defined in\n>      Documentation/devicetree/bindi/reserved-memory/reserved-memory.txt\n>  \n> +  - mali-supply : Phandle to regulator for the Mali device. Refer to\n> +    Documentation/devicetree/bindings/regulator/regulator.txt for details.\n\nWouldn't a power domain be more appropriate?\n\n> +\n>    - operating-points-v2:\n>      Operating Points for the GPU, as defined in\n>      Documentation/devicetree/bindings/opp/opp.txt\n> -- \n> 2.14.1\n> \n> --\n> To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n> the body of a message to majordomo@vger.kernel.org\n> More majordomo info at  http://vger.kernel.org/majordomo-info.html\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xsJqS2Y9Rz9t5W\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tWed, 13 Sep 2017 08:09:24 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751457AbdILWJW (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tTue, 12 Sep 2017 18:09:22 -0400","from mail-oi0-f65.google.com ([209.85.218.65]:33906 \"EHLO\n\tmail-oi0-f65.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751430AbdILWJW (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Tue, 12 Sep 2017 18:09:22 -0400","by mail-oi0-f65.google.com with SMTP id v66so86152oig.1\n\tfor <devicetree@vger.kernel.org>;\n\tTue, 12 Sep 2017 15:09:22 -0700 (PDT)","from localhost (216-188-254-6.dyn.grandenetworks.net.\n\t[216.188.254.6]) by smtp.gmail.com with ESMTPSA id\n\tt188sm12909797oif.19.2017.09.12.15.09.20\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tTue, 12 Sep 2017 15:09:21 -0700 (PDT)"],"X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=5oYtlF4JKsJVwpszSDsCJ4DxsuTW6BcRU5xjnxLRC9o=;\n\tb=oKzl2Ve3V6SoHn3sGTH3TRkZlVBAzDh569I9QtVdRi7ZFOV38IelkXWd/eBAJgnqef\n\tEmO1YPhKZmGTYrXP5mv35TQkUC04A8MCN3rbVQb8H55ZQ5M5I/SNgvzJzUXaRKnR1ElL\n\tDlnGbQ7XfAjjLRYVxkmX8VcSpCS+IvxIf23byLbY2kWF5gM2Pxcgp8kfb+KAJTiFewto\n\tOIDWJKZ5oveI84mrqWtDHelr8JF/1L/UfR06+gb+duY2T2+27dyFp7dQg7L9lxfNgAl+\n\tnVKb6VFYYkW8yB9BwJAlyo2hE31OmWCx0unlS9V1P3UQyG0XHfi2JKa17KYejhHB+xAb\n\tbw/w==","X-Gm-Message-State":"AHPjjUgA2/bCKVdze8lAx70NNW4x6EXg6dAc7DV3otYGUYiX59A8tasI\n\thLaziSaye/TvzQ==","X-Google-Smtp-Source":"AOwi7QCjiokphBZJTcQehIsDz8mauM1qjJihCSZyt1L/abo4dC070QXY1+2XPxI9J4xncBhc5yUXrA==","X-Received":"by 10.202.71.203 with SMTP id u194mr8098734oia.51.1505254161689; \n\tTue, 12 Sep 2017 15:09:21 -0700 (PDT)","Date":"Tue, 12 Sep 2017 17:09:20 -0500","From":"Rob Herring <robh@kernel.org>","To":"Heiko Stuebner <heiko@sntech.de>","Cc":"linux-rockchip@lists.infradead.org, mark.rutland@arm.com,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH 2/7] dt-bindings: gpu: mali-utgard: add optional supply\n\tregulator","Message-ID":"<20170912220920.nfg33wbqikja3gml@rob-hp-laptop>","References":"<20170905105739.8330-1-heiko@sntech.de>\n\t<20170905105739.8330-3-heiko@sntech.de>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170905105739.8330-3-heiko@sntech.de>","User-Agent":"NeoMutt/20170113 (1.7.2)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1767409,"web_url":"http://patchwork.ozlabs.org/comment/1767409/","msgid":"<5517832.4TA9c0NYD6@diego>","list_archive_url":null,"date":"2017-09-12T22:12:24","subject":"Re: [PATCH 2/7] dt-bindings: gpu: mali-utgard: add optional supply\n\tregulator","submitter":{"id":10645,"url":"http://patchwork.ozlabs.org/api/people/10645/","name":"Heiko Stuebner","email":"heiko@sntech.de"},"content":"Hi Rob,\n\nAm Dienstag, 12. September 2017, 17:09:20 CEST schrieb Rob Herring:\n> On Tue, Sep 05, 2017 at 12:57:34PM +0200, Heiko Stuebner wrote:\n> > Mali GPUs have a separate supplying regulator in a lot of socs,\n> > so describe a mali-supply property. The already described\n> > operating points will likely also need access to this regulator.\n> > \n> > Signed-off-by: Heiko Stuebner <heiko@sntech.de>\n> > ---\n> > \n> >  Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 3 +++\n> >  1 file changed, 3 insertions(+)\n> > \n> > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n> > b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt index\n> > 3b7f6f72f032..bcaa640c883f 100644\n> > --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n> > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n> > \n> > @@ -39,6 +39,9 @@ Optional properties:\n> >      Memory region to allocate from, as defined in\n> >      Documentation/devicetree/bindi/reserved-memory/reserved-memory.txt\n> > \n> > +  - mali-supply : Phandle to regulator for the Mali device. Refer to\n> > +    Documentation/devicetree/bindings/regulator/regulator.txt for\n> > details.\n> \n> Wouldn't a power domain be more appropriate?\n\nAt least on Rockchip socs there is a power-domain, but also the separate \nadditional regulator. See the similar mali-midgard binding.\n\n\nHeiko\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xsJv443CMz9t5V\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tWed, 13 Sep 2017 08:12:32 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751675AbdILWMa (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tTue, 12 Sep 2017 18:12:30 -0400","from gloria.sntech.de ([95.129.55.99]:49110 \"EHLO gloria.sntech.de\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751604AbdILWM3 (ORCPT <rfc822;devicetree@vger.kernel.org>);\n\tTue, 12 Sep 2017 18:12:29 -0400","from ip9234ad97.dynamic.kabel-deutschland.de ([146.52.173.151]\n\thelo=diego.localnet) by gloria.sntech.de with esmtpsa\n\t(TLS1.1:DHE_RSA_AES_256_CBC_SHA1:256)\n\t(Exim 4.80) (envelope-from <heiko@sntech.de>)\n\tid 1drtPt-0002rd-BT; Wed, 13 Sep 2017 00:12:25 +0200"],"From":"Heiko =?iso-8859-1?q?St=FCbner?= <heiko@sntech.de>","To":"Rob Herring <robh@kernel.org>","Cc":"linux-rockchip@lists.infradead.org, mark.rutland@arm.com,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH 2/7] dt-bindings: gpu: mali-utgard: add optional supply\n\tregulator","Date":"Wed, 13 Sep 2017 00:12:24 +0200","Message-ID":"<5517832.4TA9c0NYD6@diego>","User-Agent":"KMail/5.2.3 (Linux/4.11.0-1-amd64; KDE/5.28.0; x86_64; ; )","In-Reply-To":"<20170912220920.nfg33wbqikja3gml@rob-hp-laptop>","References":"<20170905105739.8330-1-heiko@sntech.de>\n\t<20170905105739.8330-3-heiko@sntech.de>\n\t<20170912220920.nfg33wbqikja3gml@rob-hp-laptop>","MIME-Version":"1.0","Content-Transfer-Encoding":"7Bit","Content-Type":"text/plain; charset=\"us-ascii\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1767932,"web_url":"http://patchwork.ozlabs.org/comment/1767932/","msgid":"<20170913143415.fcds556hdqwnhsvm@rob-hp-laptop>","list_archive_url":null,"date":"2017-09-13T14:34:15","subject":"Re: [PATCH 2/7] dt-bindings: gpu: mali-utgard: add optional supply\n\tregulator","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Wed, Sep 13, 2017 at 12:12:24AM +0200, Heiko Stübner wrote:\n> Hi Rob,\n> \n> Am Dienstag, 12. September 2017, 17:09:20 CEST schrieb Rob Herring:\n> > On Tue, Sep 05, 2017 at 12:57:34PM +0200, Heiko Stuebner wrote:\n> > > Mali GPUs have a separate supplying regulator in a lot of socs,\n> > > so describe a mali-supply property. The already described\n> > > operating points will likely also need access to this regulator.\n> > > \n> > > Signed-off-by: Heiko Stuebner <heiko@sntech.de>\n> > > ---\n> > > \n> > >  Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 3 +++\n> > >  1 file changed, 3 insertions(+)\n> > > \n> > > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n> > > b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt index\n> > > 3b7f6f72f032..bcaa640c883f 100644\n> > > --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n> > > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n> > > \n> > > @@ -39,6 +39,9 @@ Optional properties:\n> > >      Memory region to allocate from, as defined in\n> > >      Documentation/devicetree/bindi/reserved-memory/reserved-memory.txt\n> > > \n> > > +  - mali-supply : Phandle to regulator for the Mali device. Refer to\n> > > +    Documentation/devicetree/bindings/regulator/regulator.txt for\n> > > details.\n> > \n> > Wouldn't a power domain be more appropriate?\n> \n> At least on Rockchip socs there is a power-domain, but also the separate \n> additional regulator. See the similar mali-midgard binding.\n\nAnd that regulator's state is independent of the power domain's state? \n\nBut I guess OPPs need a regulator. Really we should allow OPPs to be \ntied to the power domain. Maybe we do, I can't keep up with the ever \nevolving PM stuff.\n\nSo, given we already have it for midgard,\n\nAcked-by: Rob Herring <robh@kernel.org>\n\nRob\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xskgv3D5rz9sNr\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tThu, 14 Sep 2017 00:34:19 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751798AbdIMOeS (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tWed, 13 Sep 2017 10:34:18 -0400","from mail-oi0-f43.google.com ([209.85.218.43]:44105 \"EHLO\n\tmail-oi0-f43.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751546AbdIMOeR (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Wed, 13 Sep 2017 10:34:17 -0400","by mail-oi0-f43.google.com with SMTP id l74so2641848oih.1\n\tfor <devicetree@vger.kernel.org>;\n\tWed, 13 Sep 2017 07:34:17 -0700 (PDT)","from localhost (216-188-254-6.dyn.grandenetworks.net.\n\t[216.188.254.6]) by smtp.gmail.com with ESMTPSA id\n\tu144sm15988059oie.11.2017.09.13.07.34.16\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tWed, 13 Sep 2017 07:34:16 -0700 (PDT)"],"X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:content-transfer-encoding\n\t:in-reply-to:user-agent;\n\tbh=rp/cmg2k5obBcYFf2QabqtkUHlRI6/+fjeSvE58kN5I=;\n\tb=baiNHR7x7FEJa058iqiVgURxXBQCCbROv7ipZIeRmMDKzz5smssFnK98vQwMO3NSza\n\tpAwTSWgq9sQbyRLWKwk+O3gdBidgJ57h3KhKBkGk6tZMb+JazRe0UDUokavml2oUWQ1k\n\tj/aVZmag6Qcfqu0LnjY2eOH3ECbyrqrxracfp9NBKjpItIatRyoIU1ZPrl2UtRd4uIzx\n\taeblRpyxPQ7fdRU8EW7OZsK1HkJOKFrP64B+BMxMyxdW4RiMO10GygjmldqrGaHjZxJT\n\t6z6YKbLMNGka9ZaRWsfRiF1exX7v6WtcijHEJCPWosICFtiDxUSJAzdHRYKUcqLu6wW6\n\tOnbg==","X-Gm-Message-State":"AHPjjUgkZf2u3Ua7YgUo38rv3urXeH+0iiD8cKr9/r/BpIEgr4rpRc2Z\n\tfmbgFYTDTPdvA5tNEhs=","X-Google-Smtp-Source":"AOwi7QAwjRu4eC1rr2tpy0Tp5nXF1AAt1EOiixjaIVVTM7AaJOU4cZMc3VY+4XxV1WCwnIMh2lxiLA==","X-Received":"by 10.202.94.67 with SMTP id s64mr9080133oib.249.1505313256942; \n\tWed, 13 Sep 2017 07:34:16 -0700 (PDT)","Date":"Wed, 13 Sep 2017 09:34:15 -0500","From":"Rob Herring <robh@kernel.org>","To":"Heiko =?iso-8859-1?q?St=FCbner?= <heiko@sntech.de>","Cc":"linux-rockchip@lists.infradead.org, mark.rutland@arm.com,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH 2/7] dt-bindings: gpu: mali-utgard: add optional supply\n\tregulator","Message-ID":"<20170913143415.fcds556hdqwnhsvm@rob-hp-laptop>","References":"<20170905105739.8330-1-heiko@sntech.de>\n\t<20170905105739.8330-3-heiko@sntech.de>\n\t<20170912220920.nfg33wbqikja3gml@rob-hp-laptop>\n\t<5517832.4TA9c0NYD6@diego>","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<5517832.4TA9c0NYD6@diego>","User-Agent":"NeoMutt/20170113 (1.7.2)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}},{"id":1769060,"web_url":"http://patchwork.ozlabs.org/comment/1769060/","msgid":"<11237143.FSQKKME6IQ@phil>","list_archive_url":null,"date":"2017-09-15T09:01:45","subject":"Re: [PATCH 2/7] dt-bindings: gpu: mali-utgard: add optional supply\n\tregulator","submitter":{"id":10645,"url":"http://patchwork.ozlabs.org/api/people/10645/","name":"Heiko Stuebner","email":"heiko@sntech.de"},"content":"Am Mittwoch, 13. September 2017, 09:34:15 CEST schrieb Rob Herring:\n> On Wed, Sep 13, 2017 at 12:12:24AM +0200, Heiko Stübner wrote:\n> > Hi Rob,\n> > \n> > Am Dienstag, 12. September 2017, 17:09:20 CEST schrieb Rob Herring:\n> > > On Tue, Sep 05, 2017 at 12:57:34PM +0200, Heiko Stuebner wrote:\n> > > > Mali GPUs have a separate supplying regulator in a lot of socs,\n> > > > so describe a mali-supply property. The already described\n> > > > operating points will likely also need access to this regulator.\n> > > > \n> > > > Signed-off-by: Heiko Stuebner <heiko@sntech.de>\n> > > > ---\n> > > > \n> > > >  Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 3 +++\n> > > >  1 file changed, 3 insertions(+)\n> > > > \n> > > > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n> > > > b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt index\n> > > > 3b7f6f72f032..bcaa640c883f 100644\n> > > > --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n> > > > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt\n> > > > \n> > > > @@ -39,6 +39,9 @@ Optional properties:\n> > > >      Memory region to allocate from, as defined in\n> > > >      Documentation/devicetree/bindi/reserved-memory/reserved-memory.txt\n> > > > \n> > > > +  - mali-supply : Phandle to regulator for the Mali device. Refer to\n> > > > +    Documentation/devicetree/bindings/regulator/regulator.txt for\n> > > > details.\n> > > \n> > > Wouldn't a power domain be more appropriate?\n> > \n> > At least on Rockchip socs there is a power-domain, but also the separate \n> > additional regulator. See the similar mali-midgard binding.\n> \n> And that regulator's state is independent of the power domain's state? \n>\n> But I guess OPPs need a regulator. Really we should allow OPPs to be \n> tied to the power domain. Maybe we do, I can't keep up with the ever \n> evolving PM stuff.\n\nYep, the external gpu regulator state is completely independent of the\npower-domain inside the soc and is most of the time one of the regulators\ncoming from the external pmic or sometimes even a completely separate\ni2c-connected ic.\n\nIt's the same for the cpu cores on Rockchip socs, they have power-domains\nfor controlling the actual on/off state and need separate supplying\ni2c-connected regulators that still have to be enabled on their own.\n\n\n> So, given we already have it for midgard,\n> \n> Acked-by: Rob Herring <robh@kernel.org>\n\nThanks, added for v2.\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtqCL52PGz9sxR\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tFri, 15 Sep 2017 19:01:50 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751225AbdIOJBt convert rfc822-to-8bit (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tFri, 15 Sep 2017 05:01:49 -0400","from gloria.sntech.de ([95.129.55.99]:48116 \"EHLO gloria.sntech.de\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1750879AbdIOJBt (ORCPT <rfc822;devicetree@vger.kernel.org>);\n\tFri, 15 Sep 2017 05:01:49 -0400","from p5b127fef.dip0.t-ipconnect.de ([91.18.127.239]\n\thelo=phil.localnet) by gloria.sntech.de with esmtpsa\n\t(TLS1.1:DHE_RSA_AES_256_CBC_SHA1:256)\n\t(Exim 4.80) (envelope-from <heiko@sntech.de>)\n\tid 1dsmVN-0007Ql-RX; Fri, 15 Sep 2017 11:01:46 +0200"],"From":"Heiko Stuebner <heiko@sntech.de>","To":"Rob Herring <robh@kernel.org>","Cc":"linux-rockchip@lists.infradead.org, mark.rutland@arm.com,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH 2/7] dt-bindings: gpu: mali-utgard: add optional supply\n\tregulator","Date":"Fri, 15 Sep 2017 11:01:45 +0200","Message-ID":"<11237143.FSQKKME6IQ@phil>","User-Agent":"KMail/5.2.3 (Linux/4.11.0-1-amd64; KDE/5.28.0; x86_64; ; )","In-Reply-To":"<20170913143415.fcds556hdqwnhsvm@rob-hp-laptop>","References":"<20170905105739.8330-1-heiko@sntech.de>\n\t<5517832.4TA9c0NYD6@diego>\n\t<20170913143415.fcds556hdqwnhsvm@rob-hp-laptop>","MIME-Version":"1.0","Content-Transfer-Encoding":"8BIT","Content-Type":"text/plain; charset=\"iso-8859-1\"","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}}]