[{"id":1762495,"web_url":"http://patchwork.ozlabs.org/comment/1762495/","msgid":"<20170904075924.jufrqijrtxcqvztd@flea>","list_archive_url":null,"date":"2017-09-04T07:59:24","subject":"Re: [PATCH 02/10] dmaengine: sun6i: Correct burst length field\n\toffsets for H3","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Mon, Sep 04, 2017 at 12:40:53AM +0200, Stefan Brüns wrote:\n> For the H3, the burst lengths field offsets in the channel configuration\n> register differs from earlier SoC generations.\n> \n> Using the A31 register macros actually configured the H3 controller\n> do to bursts of length 1 always, which although working leads to higher\n> bus utilisation.\n> \n> Signed-off-by: Stefan Brüns \n> ---\n> drivers/dma/sun6i-dma.c | 28 +++++++++++++++++++++-------\n> 1 file changed, 21 insertions(+), 7 deletions(-)\n> \n> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c\n> index 1d9b3be30d22..f1a139f0102f 100644\n> --- a/drivers/dma/sun6i-dma.c\n> +++ b/drivers/dma/sun6i-dma.c\n> @@ -68,13 +68,15 @@\n> #define DMA_CHAN_CFG_SRC_DRQ(x)\t\t((x) & 0x1f)\n> #define DMA_CHAN_CFG_SRC_IO_MODE\tBIT(5)\n> #define DMA_CHAN_CFG_SRC_LINEAR_MODE\t(0 << 5)\n> -#define DMA_CHAN_CFG_SRC_BURST(x)\t(((x) & 0x3) << 7)\n> +#define DMA_CHAN_CFG_SRC_BURST_A31(x)\t(((x) & 0x3) << 7)\n> +#define DMA_CHAN_CFG_SRC_BURST_H3(x)\t(((x) & 0x3) << 6)\n> #define DMA_CHAN_CFG_SRC_WIDTH(x)\t(((x) & 0x3) << 9)\n> \n> #define DMA_CHAN_CFG_DST_DRQ(x)\t\t(DMA_CHAN_CFG_SRC_DRQ(x) << 16)\n> #define DMA_CHAN_CFG_DST_IO_MODE\t(DMA_CHAN_CFG_SRC_IO_MODE << 16)\n> #define DMA_CHAN_CFG_DST_LINEAR_MODE\t(DMA_CHAN_CFG_SRC_LINEAR_MODE << 16)\n> -#define DMA_CHAN_CFG_DST_BURST(x)\t(DMA_CHAN_CFG_SRC_BURST(x) << 16)\n> +#define DMA_CHAN_CFG_DST_BURST_A31(x)\t(DMA_CHAN_CFG_SRC_BURST_A31(x) << 16)\n> +#define DMA_CHAN_CFG_DST_BURST_H3(x)\t(DMA_CHAN_CFG_SRC_BURST_H3(x) << 16)\n> #define DMA_CHAN_CFG_DST_WIDTH(x)\t(DMA_CHAN_CFG_SRC_WIDTH(x) << 16)\n> \n> #define DMA_CHAN_CUR_SRC\t0x10\n> @@ -554,11 +556,17 @@ static int set_config(struct sun6i_dma_dev *sdev,\n> \tif (dst_width < 0)\n> \t\treturn dst_width;\n> \n> -\t*p_cfg = DMA_CHAN_CFG_SRC_BURST(src_burst) |\n> -\t\tDMA_CHAN_CFG_SRC_WIDTH(src_width) |\n> -\t\tDMA_CHAN_CFG_DST_BURST(dst_burst) |\n> +\t*p_cfg = DMA_CHAN_CFG_SRC_WIDTH(src_width) |\n> \t\tDMA_CHAN_CFG_DST_WIDTH(dst_width);\n> \n> +\tif (sdev->cfg->dmac_variant == DMAC_VARIANT_H3) {\n> +\t\t*p_cfg |= DMA_CHAN_CFG_SRC_BURST_H3(src_burst) |\n> +\t\t\t DMA_CHAN_CFG_DST_BURST_H3(dst_burst);\n> +\t} else {\n> +\t\t*p_cfg |= DMA_CHAN_CFG_SRC_BURST_A31(src_burst) |\n> +\t\t\t DMA_CHAN_CFG_DST_BURST_A31(dst_burst);\n> +\t}\n> +\n\nI guess we have two options to support that properly. We could either\nhave a different function that would generate that register value\nbased on the parameters we have, or duplicate the set_config function\nentirely, with function pointer stored in the configuration.\n\nI think I prefer the former, as it reduces the code duplication.\n\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"D6x/gU5q\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xm2M807PYz9s82\n\tfor ;\n\tMon, 4 Sep 2017 18:00:04 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1domIa-00049s-O0; Mon, 04 Sep 2017 08:00:00 +0000","from mail.free-electrons.com ([62.4.15.54])\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1domIW-0003iD-2b for linux-arm-kernel@lists.infradead.org;\n\tMon, 04 Sep 2017 07:59:58 +0000","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 8435A20A2F; Mon, 4 Sep 2017 09:59:33 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 4F5A420970;\n\tMon, 4 Sep 2017 09:59:23 +0200 (CEST)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:Content-Type:Cc:\n\tList-Subscribe:List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:\n\tIn-Reply-To:MIME-Version:References:Message-ID:Subject:To:From:Date:Reply-To:\n\tContent-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:\n\tResent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner;\n\tbh=Geinm6rhBzpASWFqnu23HwR0JPEVuoP0Y30okYPYcQ8=;\n\tb=D6x/gU5qg25Rd9LJ/+KUltYJE\n\tSC6/OuytU/FsuFBOxYkMXhsyDbSn1+wMiUEP2Qc0HRntM6cSSl+5xMf3ehn2eGC4iRztEN1I2veU+\n\tOxV1OtcFE8SH0wYGdlYR5psdCVHiFbHlds8CroCptfuEU1cE/DmbJtlExZr7VKAZVesn95fVY0Rlx\n\toOJph0YTo0QQwoSkutsDDZy6Bam/HhxBvABtk2SHCz80xZeRaG9adIQXHP/ADz+VhZMitYmhetdg/\n\tbOyiLHizyhBetTiZOcOBZa8J4MmIPNz6xwbf2QT3z1XQjpq217vGVSTlQHQMUQ3bPVnb/CHIMk6Wc\n\tFEEhctBfg==;","X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","Date":"Mon, 4 Sep 2017 09:59:24 +0200","From":"Maxime Ripard ","To":"Stefan =?iso-8859-1?q?Br=FCns?= ","Subject":"Re: [PATCH 02/10] dmaengine: sun6i: Correct burst length field\n\toffsets for H3","Message-ID":"<20170904075924.jufrqijrtxcqvztd@flea>","References":"<20170903224100.17893-1-stefan.bruens@rwth-aachen.de>\n\t<20170903224100.17893-3-stefan.bruens@rwth-aachen.de>","MIME-Version":"1.0","In-Reply-To":"<20170903224100.17893-3-stefan.bruens@rwth-aachen.de>","User-Agent":"NeoMutt/20170714 (1.8.3)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170904_005956_436267_23E71A72 ","X-CRM114-Status":"GOOD ( 18.01 )","X-Spam-Score":"-1.9 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"devicetree@vger.kernel.org, Vinod Koul ,\n\tAndre Przywara , linux-kernel@vger.kernel.org,\n\tCode Kipper , linux-sunxi@googlegroups.com,\n\tRob Herring , dmaengine@vger.kernel.org,\n\tChen-Yu Tsai , linux-arm-kernel@lists.infradead.org","Content-Type":"multipart/mixed;\n\tboundary=\"===============8377820469402593007==\"","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1762703,"web_url":"http://patchwork.ozlabs.org/comment/1762703/","msgid":"<2223782.bf3lvqWUP7@sbruens-linux>","list_archive_url":null,"date":"2017-09-04T14:47:24","subject":"Re: [PATCH 02/10] dmaengine: sun6i: Correct burst length field\n\toffsets for H3","submitter":{"id":67055,"url":"http://patchwork.ozlabs.org/api/people/67055/","name":"Stefan Brüns","email":"stefan.bruens@rwth-aachen.de"},"content":"On Montag, 4. September 2017 09:59:24 CEST Maxime Ripard wrote:\n> On Mon, Sep 04, 2017 at 12:40:53AM +0200, Stefan Brüns wrote:\n> > For the H3, the burst lengths field offsets in the channel configuration\n> > register differs from earlier SoC generations.\n> > \n> > Using the A31 register macros actually configured the H3 controller\n> > do to bursts of length 1 always, which although working leads to higher\n> > bus utilisation.\n> > \n> > Signed-off-by: Stefan Brüns \n> > ---\n> > \n> > drivers/dma/sun6i-dma.c | 28 +++++++++++++++++++++-------\n> > 1 file changed, 21 insertions(+), 7 deletions(-)\n> > \n> > diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c\n> > index 1d9b3be30d22..f1a139f0102f 100644\n> > --- a/drivers/dma/sun6i-dma.c\n> > +++ b/drivers/dma/sun6i-dma.c\n> > @@ -68,13 +68,15 @@\n> > \n> > #define DMA_CHAN_CFG_SRC_DRQ(x)\t\t((x) & 0x1f)\n> > #define DMA_CHAN_CFG_SRC_IO_MODE\tBIT(5)\n> > #define DMA_CHAN_CFG_SRC_LINEAR_MODE\t(0 << 5)\n> > \n> > -#define DMA_CHAN_CFG_SRC_BURST(x)\t(((x) & 0x3) << 7)\n> > +#define DMA_CHAN_CFG_SRC_BURST_A31(x)\t(((x) & 0x3) << 7)\n> > +#define DMA_CHAN_CFG_SRC_BURST_H3(x)\t(((x) & 0x3) << 6)\n> > \n> > #define DMA_CHAN_CFG_SRC_WIDTH(x)\t(((x) & 0x3) << 9)\n> > \n> > #define DMA_CHAN_CFG_DST_DRQ(x)\t\t(DMA_CHAN_CFG_SRC_DRQ(x) << 16)\n> > #define DMA_CHAN_CFG_DST_IO_MODE\t(DMA_CHAN_CFG_SRC_IO_MODE << 16)\n> > #define DMA_CHAN_CFG_DST_LINEAR_MODE\t(DMA_CHAN_CFG_SRC_LINEAR_MODE << 16)\n> > \n> > -#define DMA_CHAN_CFG_DST_BURST(x)\t(DMA_CHAN_CFG_SRC_BURST(x) << 16)\n> > +#define DMA_CHAN_CFG_DST_BURST_A31(x)\t(DMA_CHAN_CFG_SRC_BURST_A31(x) <<\n> > 16) +#define DMA_CHAN_CFG_DST_BURST_H3(x)\t(DMA_CHAN_CFG_SRC_BURST_H3(x)\n> > << 16)> \n> > #define DMA_CHAN_CFG_DST_WIDTH(x)\t(DMA_CHAN_CFG_SRC_WIDTH(x) << 16)\n> > \n> > #define DMA_CHAN_CUR_SRC\t0x10\n> > \n> > @@ -554,11 +556,17 @@ static int set_config(struct sun6i_dma_dev *sdev,\n> > \n> > \tif (dst_width < 0)\n> > \t\n> > \t\treturn dst_width;\n> > \n> > -\t*p_cfg = DMA_CHAN_CFG_SRC_BURST(src_burst) |\n> > -\t\tDMA_CHAN_CFG_SRC_WIDTH(src_width) |\n> > -\t\tDMA_CHAN_CFG_DST_BURST(dst_burst) |\n> > +\t*p_cfg = DMA_CHAN_CFG_SRC_WIDTH(src_width) |\n> > \n> > \t\tDMA_CHAN_CFG_DST_WIDTH(dst_width);\n> > \n> > +\tif (sdev->cfg->dmac_variant == DMAC_VARIANT_H3) {\n> > +\t\t*p_cfg |= DMA_CHAN_CFG_SRC_BURST_H3(src_burst) |\n> > +\t\t\t DMA_CHAN_CFG_DST_BURST_H3(dst_burst);\n> > +\t} else {\n> > +\t\t*p_cfg |= DMA_CHAN_CFG_SRC_BURST_A31(src_burst) |\n> > +\t\t\t DMA_CHAN_CFG_DST_BURST_A31(dst_burst);\n> > +\t}\n> > +\n> \n> I guess we have two options to support that properly. We could either\n> have a different function that would generate that register value\n> based on the parameters we have, or duplicate the set_config function\n> entirely, with function pointer stored in the configuration.\n> \n> I think I prefer the former, as it reduces the code duplication.\n\nDuplicating \"set_config\" would also mean duplicating sun6i_dma_prep_dma_memcpy \n- there are two hunks which change setting of the burst length register value.\n\nA function pointer in the config would work.\n\nKind regards,\n\nStefan","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"B1jC7Env\"; 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d=\"scan'208\";a=\"11738967\"","From":"=?iso-8859-1?q?Br=FCns=2C_Stefan?= ","To":"Maxime Ripard ","Subject":"Re: [PATCH 02/10] dmaengine: sun6i: Correct burst length field\n\toffsets for H3","Thread-Topic":"[PATCH 02/10] dmaengine: sun6i: Correct burst length field\n\toffsets for H3","Thread-Index":"AQHTJVQjjowTXsWGTEqsv7sWe72pDaKkrUEA","Date":"Mon, 4 Sep 2017 14:47:24 +0000","Message-ID":"<2223782.bf3lvqWUP7@sbruens-linux>","References":"<20170903224100.17893-1-stefan.bruens@rwth-aachen.de>\n\t<20170903224100.17893-3-stefan.bruens@rwth-aachen.de>\n\t<20170904075924.jufrqijrtxcqvztd@flea>","In-Reply-To":"<20170904075924.jufrqijrtxcqvztd@flea>","Accept-Language":"en-US, de-DE","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","x-ms-exchange-messagesentrepresentingtype":"1","x-ms-exchange-transport-fromentityheader":"Hosted","x-originating-ip":"[78.35.13.203]","Content-ID":"","MIME-Version":"1.0","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170904_074748_598633_00200F70 ","X-CRM114-Status":"GOOD ( 14.26 )","X-Spam-Score":"-4.2 (----)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.2 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [134.130.5.47 listed in list.dnswl.org]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"\"devicetree@vger.kernel.org\" ,\n\tVinod Koul ,\n\tAndre Przywara , \n\t\"linux-kernel@vger.kernel.org\" ,\n\tCode Kipper ,\n\t\"linux-sunxi@googlegroups.com\" ,\n\tRob Herring ,\n\t\"dmaengine@vger.kernel.org\" ,\n\tChen-Yu Tsai , \"linux-arm-kernel@lists.infradead.org\"\n\t","Content-Type":"text/plain; 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