[{"id":1769492,"web_url":"http://patchwork.ozlabs.org/comment/1769492/","msgid":"<83ab14ab-8963-a1a4-c5e0-1a6c77432742@ti.com>","list_archive_url":null,"date":"2017-09-15T22:23:17","subject":"Re: [PATCH 13/16] gpio: omap: Rename struct gpio_bank to struct\n\tomap_gpio_bank","submitter":{"id":25084,"url":"http://patchwork.ozlabs.org/api/people/25084/","name":"Grygorii Strashko","email":"grygorii.strashko@ti.com"},"content":"On 09/01/2017 01:57 PM, Thierry Reding wrote:\n> From: Thierry Reding <treding@nvidia.com>\n> \n> Subsequent patches will want to introduce a struct gpio_bank in core\n> code, so rename this to something driver-specific in order to avoid the\n> names from clashing.\n\nI think it can be separated from this series.\nAcked-by: Grygorii Strashko <grygorii.strashko@ti.com>\n\n> \n> Signed-off-by: Thierry Reding <treding@nvidia.com>\n> ---\n>   drivers/gpio/gpio-omap.c | 131 ++++++++++++++++++++++++-----------------------\n>   1 file changed, 68 insertions(+), 63 deletions(-)\n> \n> diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c\n> index 7c600cec3e44..0b80d929d892 100644\n> --- a/drivers/gpio/gpio-omap.c\n> +++ b/drivers/gpio/gpio-omap.c\n> @@ -48,7 +48,7 @@ struct gpio_regs {\n>   \tu32 debounce_en;\n>   };\n>   \n> -struct gpio_bank {\n> +struct omap_gpio_bank {\n>   \tstruct list_head node;\n>   \tvoid __iomem *base;\n>   \tint irq;\n> @@ -76,7 +76,7 @@ struct gpio_bank {\n>   \tint power_mode;\n>   \tbool workaround_enabled;\n>   \n> -\tvoid (*set_dataout)(struct gpio_bank *bank, unsigned int gpio,\n> +\tvoid (*set_dataout)(struct omap_gpio_bank *bank, unsigned int gpio,\n>   \t\t\t    int enable);\n>   \tint (*get_context_loss_count)(struct device *dev);\n>   \n> @@ -90,14 +90,14 @@ struct gpio_bank {\n>   \n>   static void omap_gpio_unmask_irq(struct irq_data *d);\n>   \n> -static inline struct gpio_bank *omap_irq_data_get_bank(struct irq_data *d)\n> +static inline struct omap_gpio_bank *omap_irq_data_get_bank(struct irq_data *d)\n>   {\n>   \tstruct gpio_chip *chip = irq_data_get_irq_chip_data(d);\n>   \n>   \treturn gpiochip_get_data(chip);\n>   }\n>   \n> -static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio,\n> +static void omap_set_gpio_direction(struct omap_gpio_bank *bank, int gpio,\n>   \t\t\t\t    int is_input)\n>   {\n>   \tvoid __iomem *reg = bank->base;\n> @@ -115,7 +115,7 @@ static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio,\n>   \n>   \n>   /* set data out value using dedicate set/clear register */\n> -static void omap_set_gpio_dataout_reg(struct gpio_bank *bank,\n> +static void omap_set_gpio_dataout_reg(struct omap_gpio_bank *bank,\n>   \t\t\t\t      unsigned int offset, int enable)\n>   {\n>   \tvoid __iomem *reg = bank->base;\n> @@ -133,7 +133,7 @@ static void omap_set_gpio_dataout_reg(struct gpio_bank *bank,\n>   }\n>   \n>   /* set data out value using mask register */\n> -static void omap_set_gpio_dataout_mask(struct gpio_bank *bank,\n> +static void omap_set_gpio_dataout_mask(struct omap_gpio_bank *bank,\n>   \t\t\t\t       unsigned int offset, int enable)\n>   {\n>   \tvoid __iomem *reg = bank->base + bank->regs->dataout;\n> @@ -149,14 +149,14 @@ static void omap_set_gpio_dataout_mask(struct gpio_bank *bank,\n>   \tbank->context.dataout = l;\n>   }\n>   \n> -static int omap_get_gpio_datain(struct gpio_bank *bank, int offset)\n> +static int omap_get_gpio_datain(struct omap_gpio_bank *bank, int offset)\n>   {\n>   \tvoid __iomem *reg = bank->base + bank->regs->datain;\n>   \n>   \treturn (readl_relaxed(reg) & (BIT(offset))) != 0;\n>   }\n>   \n> -static int omap_get_gpio_dataout(struct gpio_bank *bank, int offset)\n> +static int omap_get_gpio_dataout(struct omap_gpio_bank *bank, int offset)\n>   {\n>   \tvoid __iomem *reg = bank->base + bank->regs->dataout;\n>   \n> @@ -176,7 +176,7 @@ static inline void omap_gpio_rmw(void __iomem *base, u32 reg, u32 mask,\n>   \twritel_relaxed(l, base + reg);\n>   }\n>   \n> -static inline void omap_gpio_dbck_enable(struct gpio_bank *bank)\n> +static inline void omap_gpio_dbck_enable(struct omap_gpio_bank *bank)\n>   {\n>   \tif (bank->dbck_enable_mask && !bank->dbck_enabled) {\n>   \t\tclk_enable(bank->dbck);\n> @@ -187,7 +187,7 @@ static inline void omap_gpio_dbck_enable(struct gpio_bank *bank)\n>   \t}\n>   }\n>   \n> -static inline void omap_gpio_dbck_disable(struct gpio_bank *bank)\n> +static inline void omap_gpio_dbck_disable(struct omap_gpio_bank *bank)\n>   {\n>   \tif (bank->dbck_enable_mask && bank->dbck_enabled) {\n>   \t\t/*\n> @@ -214,8 +214,8 @@ static inline void omap_gpio_dbck_disable(struct gpio_bank *bank)\n>    *\n>    * Return: 0 on success, negative error otherwise.\n>    */\n> -static int omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned int offset,\n> -\t\t\t\t   unsigned int debounce)\n> +static int omap2_set_gpio_debounce(struct omap_gpio_bank *bank,\n> +\t\t\t\t   unsigned int offset, unsigned int debounce)\n>   {\n>   \tvoid __iomem\t\t*reg;\n>   \tu32\t\t\tval;\n> @@ -275,7 +275,7 @@ static int omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned int offset,\n>    * time too. The debounce clock will also be disabled when calling this function\n>    * if this is the only gpio in the bank using debounce.\n>    */\n> -static void omap_clear_gpio_debounce(struct gpio_bank *bank,\n> +static void omap_clear_gpio_debounce(struct omap_gpio_bank *bank,\n>   \t\t\t\t     unsigned int offset)\n>   {\n>   \tu32 gpio_bit = BIT(offset);\n> @@ -300,7 +300,7 @@ static void omap_clear_gpio_debounce(struct gpio_bank *bank,\n>   \t}\n>   }\n>   \n> -static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio,\n> +static inline void omap_set_gpio_trigger(struct omap_gpio_bank *bank, int gpio,\n>   \t\t\t\t\t unsigned int trigger)\n>   {\n>   \tvoid __iomem *base = bank->base;\n> @@ -362,7 +362,8 @@ static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio,\n>    * This only applies to chips that can't do both rising and falling edge\n>    * detection at once.  For all other chips, this function is a noop.\n>    */\n> -static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)\n> +static void omap_toggle_gpio_edge_triggering(struct omap_gpio_bank *bank,\n> +\t\t\t\t\t     int gpio)\n>   {\n>   \tvoid __iomem *reg = bank->base;\n>   \tu32 l = 0;\n> @@ -381,12 +382,13 @@ static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)\n>   \twritel_relaxed(l, reg);\n>   }\n>   #else\n> -static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)\n> +static void omap_toggle_gpio_edge_triggering(struct omap_gpio_bank *bank,\n> +\t\t\t\t\t     int gpio)\n>   {\n>   }\n>   #endif\n>   \n> -static int omap_set_gpio_triggering(struct gpio_bank *bank, int gpio,\n> +static int omap_set_gpio_triggering(struct omap_gpio_bank *bank, int gpio,\n>   \t\t\t\t    unsigned int trigger)\n>   {\n>   \tvoid __iomem *reg = bank->base;\n> @@ -432,7 +434,8 @@ static int omap_set_gpio_triggering(struct gpio_bank *bank, int gpio,\n>   \treturn 0;\n>   }\n>   \n> -static void omap_enable_gpio_module(struct gpio_bank *bank, unsigned int offset)\n> +static void omap_enable_gpio_module(struct omap_gpio_bank *bank,\n> +\t\t\t\t    unsigned int offset)\n>   {\n>   \tif (bank->regs->pinctrl) {\n>   \t\tvoid __iomem *reg = bank->base + bank->regs->pinctrl;\n> @@ -453,7 +456,7 @@ static void omap_enable_gpio_module(struct gpio_bank *bank, unsigned int offset)\n>   \t}\n>   }\n>   \n> -static void omap_disable_gpio_module(struct gpio_bank *bank,\n> +static void omap_disable_gpio_module(struct omap_gpio_bank *bank,\n>   \t\t\t\t     unsigned int offset)\n>   {\n>   \tvoid __iomem *base = bank->base;\n> @@ -479,14 +482,14 @@ static void omap_disable_gpio_module(struct gpio_bank *bank,\n>   \t}\n>   }\n>   \n> -static int omap_gpio_is_input(struct gpio_bank *bank, unsigned int offset)\n> +static int omap_gpio_is_input(struct omap_gpio_bank *bank, unsigned int offset)\n>   {\n>   \tvoid __iomem *reg = bank->base + bank->regs->direction;\n>   \n>   \treturn readl_relaxed(reg) & BIT(offset);\n>   }\n>   \n> -static void omap_gpio_init_irq(struct gpio_bank *bank, unsigned int offset)\n> +static void omap_gpio_init_irq(struct omap_gpio_bank *bank, unsigned int offset)\n>   {\n>   \tif (!LINE_USED(bank->mod_usage, offset)) {\n>   \t\tomap_enable_gpio_module(bank, offset);\n> @@ -497,7 +500,7 @@ static void omap_gpio_init_irq(struct gpio_bank *bank, unsigned int offset)\n>   \n>   static int omap_gpio_irq_type(struct irq_data *d, unsigned int type)\n>   {\n> -\tstruct gpio_bank *bank = omap_irq_data_get_bank(d);\n> +\tstruct omap_gpio_bank *bank = omap_irq_data_get_bank(d);\n>   \tint retval;\n>   \tunsigned long flags;\n>   \tunsigned int offset = d->hwirq;\n> @@ -534,7 +537,7 @@ static int omap_gpio_irq_type(struct irq_data *d, unsigned int type)\n>   \treturn retval;\n>   }\n>   \n> -static void omap_clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)\n> +static void omap_clear_gpio_irqbank(struct omap_gpio_bank *bank, int gpio_mask)\n>   {\n>   \tvoid __iomem *reg = bank->base;\n>   \n> @@ -551,13 +554,13 @@ static void omap_clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)\n>   \treadl_relaxed(reg);\n>   }\n>   \n> -static inline void omap_clear_gpio_irqstatus(struct gpio_bank *bank,\n> +static inline void omap_clear_gpio_irqstatus(struct omap_gpio_bank *bank,\n>   \t\t\t\t\t     unsigned int offset)\n>   {\n>   \tomap_clear_gpio_irqbank(bank, BIT(offset));\n>   }\n>   \n> -static u32 omap_get_gpio_irqbank_mask(struct gpio_bank *bank)\n> +static u32 omap_get_gpio_irqbank_mask(struct omap_gpio_bank *bank)\n>   {\n>   \tvoid __iomem *reg = bank->base;\n>   \tu32 l;\n> @@ -571,7 +574,7 @@ static u32 omap_get_gpio_irqbank_mask(struct gpio_bank *bank)\n>   \treturn l;\n>   }\n>   \n> -static void omap_enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)\n> +static void omap_enable_gpio_irqbank(struct omap_gpio_bank *bank, int gpio_mask)\n>   {\n>   \tvoid __iomem *reg = bank->base;\n>   \tu32 l;\n> @@ -593,7 +596,8 @@ static void omap_enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)\n>   \twritel_relaxed(l, reg);\n>   }\n>   \n> -static void omap_disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)\n> +static void omap_disable_gpio_irqbank(struct omap_gpio_bank *bank,\n> +\t\t\t\t      int gpio_mask)\n>   {\n>   \tvoid __iomem *reg = bank->base;\n>   \tu32 l;\n> @@ -615,7 +619,7 @@ static void omap_disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)\n>   \twritel_relaxed(l, reg);\n>   }\n>   \n> -static inline void omap_set_gpio_irqenable(struct gpio_bank *bank,\n> +static inline void omap_set_gpio_irqenable(struct omap_gpio_bank *bank,\n>   \t\t\t\t\t   unsigned int offset, int enable)\n>   {\n>   \tif (enable)\n> @@ -627,14 +631,14 @@ static inline void omap_set_gpio_irqenable(struct gpio_bank *bank,\n>   /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */\n>   static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable)\n>   {\n> -\tstruct gpio_bank *bank = omap_irq_data_get_bank(d);\n> +\tstruct omap_gpio_bank *bank = omap_irq_data_get_bank(d);\n>   \n>   \treturn irq_set_irq_wake(bank->irq, enable);\n>   }\n>   \n>   static int omap_gpio_request(struct gpio_chip *chip, unsigned int offset)\n>   {\n> -\tstruct gpio_bank *bank = gpiochip_get_data(chip);\n> +\tstruct omap_gpio_bank *bank = gpiochip_get_data(chip);\n>   \tunsigned long flags;\n>   \n>   \t/*\n> @@ -654,7 +658,7 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned int offset)\n>   \n>   static void omap_gpio_free(struct gpio_chip *chip, unsigned int offset)\n>   {\n> -\tstruct gpio_bank *bank = gpiochip_get_data(chip);\n> +\tstruct omap_gpio_bank *bank = gpiochip_get_data(chip);\n>   \tunsigned long flags;\n>   \n>   \traw_spin_lock_irqsave(&bank->lock, flags);\n> @@ -688,7 +692,7 @@ static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank)\n>   \tvoid __iomem *isr_reg = NULL;\n>   \tu32 isr;\n>   \tunsigned int bit;\n> -\tstruct gpio_bank *bank = gpiobank;\n> +\tstruct omap_gpio_bank *bank = gpiobank;\n>   \tunsigned long wa_lock_flags;\n>   \tunsigned long lock_flags;\n>   \n> @@ -759,7 +763,7 @@ static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank)\n>   \n>   static unsigned int omap_gpio_irq_startup(struct irq_data *d)\n>   {\n> -\tstruct gpio_bank *bank = omap_irq_data_get_bank(d);\n> +\tstruct omap_gpio_bank *bank = omap_irq_data_get_bank(d);\n>   \tunsigned long flags;\n>   \tunsigned int offset = d->hwirq;\n>   \n> @@ -783,7 +787,7 @@ static unsigned int omap_gpio_irq_startup(struct irq_data *d)\n>   \n>   static void omap_gpio_irq_shutdown(struct irq_data *d)\n>   {\n> -\tstruct gpio_bank *bank = omap_irq_data_get_bank(d);\n> +\tstruct omap_gpio_bank *bank = omap_irq_data_get_bank(d);\n>   \tunsigned long flags;\n>   \tunsigned int offset = d->hwirq;\n>   \n> @@ -800,7 +804,7 @@ static void omap_gpio_irq_shutdown(struct irq_data *d)\n>   \n>   static void omap_gpio_irq_bus_lock(struct irq_data *data)\n>   {\n> -\tstruct gpio_bank *bank = omap_irq_data_get_bank(data);\n> +\tstruct omap_gpio_bank *bank = omap_irq_data_get_bank(data);\n>   \n>   \tif (!BANK_USED(bank))\n>   \t\tpm_runtime_get_sync(bank->chip.parent);\n> @@ -808,7 +812,7 @@ static void omap_gpio_irq_bus_lock(struct irq_data *data)\n>   \n>   static void gpio_irq_bus_sync_unlock(struct irq_data *data)\n>   {\n> -\tstruct gpio_bank *bank = omap_irq_data_get_bank(data);\n> +\tstruct omap_gpio_bank *bank = omap_irq_data_get_bank(data);\n>   \n>   \t/*\n>   \t * If this is the last IRQ to be freed in the bank,\n> @@ -820,7 +824,7 @@ static void gpio_irq_bus_sync_unlock(struct irq_data *data)\n>   \n>   static void omap_gpio_ack_irq(struct irq_data *d)\n>   {\n> -\tstruct gpio_bank *bank = omap_irq_data_get_bank(d);\n> +\tstruct omap_gpio_bank *bank = omap_irq_data_get_bank(d);\n>   \tunsigned int offset = d->hwirq;\n>   \n>   \tomap_clear_gpio_irqstatus(bank, offset);\n> @@ -828,7 +832,7 @@ static void omap_gpio_ack_irq(struct irq_data *d)\n>   \n>   static void omap_gpio_mask_irq(struct irq_data *d)\n>   {\n> -\tstruct gpio_bank *bank = omap_irq_data_get_bank(d);\n> +\tstruct omap_gpio_bank *bank = omap_irq_data_get_bank(d);\n>   \tunsigned int offset = d->hwirq;\n>   \tunsigned long flags;\n>   \n> @@ -840,7 +844,7 @@ static void omap_gpio_mask_irq(struct irq_data *d)\n>   \n>   static void omap_gpio_unmask_irq(struct irq_data *d)\n>   {\n> -\tstruct gpio_bank *bank = omap_irq_data_get_bank(d);\n> +\tstruct omap_gpio_bank *bank = omap_irq_data_get_bank(d);\n>   \tunsigned int offset = d->hwirq;\n>   \tu32 trigger = irqd_get_trigger_type(d);\n>   \tunsigned long flags;\n> @@ -867,7 +871,7 @@ static void omap_gpio_unmask_irq(struct irq_data *d)\n>   static int omap_mpuio_suspend_noirq(struct device *dev)\n>   {\n>   \tstruct platform_device *pdev = to_platform_device(dev);\n> -\tstruct gpio_bank\t*bank = platform_get_drvdata(pdev);\n> +\tstruct omap_gpio_bank\t*bank = platform_get_drvdata(pdev);\n>   \tvoid __iomem\t\t*mask_reg = bank->base +\n>   \t\t\t\t\tOMAP_MPUIO_GPIO_MASKIT / bank->stride;\n>   \tunsigned long\t\tflags;\n> @@ -882,7 +886,7 @@ static int omap_mpuio_suspend_noirq(struct device *dev)\n>   static int omap_mpuio_resume_noirq(struct device *dev)\n>   {\n>   \tstruct platform_device *pdev = to_platform_device(dev);\n> -\tstruct gpio_bank\t*bank = platform_get_drvdata(pdev);\n> +\tstruct omap_gpio_bank\t*bank = platform_get_drvdata(pdev);\n>   \tvoid __iomem\t\t*mask_reg = bank->base +\n>   \t\t\t\t\tOMAP_MPUIO_GPIO_MASKIT / bank->stride;\n>   \tunsigned long\t\tflags;\n> @@ -916,7 +920,7 @@ static struct platform_device omap_mpuio_device = {\n>   \t/* could list the /proc/iomem resources */\n>   };\n>   \n> -static inline void omap_mpuio_init(struct gpio_bank *bank)\n> +static inline void omap_mpuio_init(struct omap_gpio_bank *bank)\n>   {\n>   \tplatform_set_drvdata(&omap_mpuio_device, bank);\n>   \n> @@ -928,7 +932,7 @@ static inline void omap_mpuio_init(struct gpio_bank *bank)\n>   \n>   static int omap_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)\n>   {\n> -\tstruct gpio_bank *bank;\n> +\tstruct omap_gpio_bank *bank;\n>   \tunsigned long flags;\n>   \tvoid __iomem *reg;\n>   \tint dir;\n> @@ -943,7 +947,7 @@ static int omap_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)\n>   \n>   static int omap_gpio_input(struct gpio_chip *chip, unsigned int offset)\n>   {\n> -\tstruct gpio_bank *bank;\n> +\tstruct omap_gpio_bank *bank;\n>   \tunsigned long flags;\n>   \n>   \tbank = gpiochip_get_data(chip);\n> @@ -955,7 +959,7 @@ static int omap_gpio_input(struct gpio_chip *chip, unsigned int offset)\n>   \n>   static int omap_gpio_get(struct gpio_chip *chip, unsigned int offset)\n>   {\n> -\tstruct gpio_bank *bank;\n> +\tstruct omap_gpio_bank *bank;\n>   \n>   \tbank = gpiochip_get_data(chip);\n>   \n> @@ -968,7 +972,7 @@ static int omap_gpio_get(struct gpio_chip *chip, unsigned int offset)\n>   static int omap_gpio_output(struct gpio_chip *chip, unsigned int offset,\n>   \t\t\t    int value)\n>   {\n> -\tstruct gpio_bank *bank;\n> +\tstruct omap_gpio_bank *bank;\n>   \tunsigned long flags;\n>   \n>   \tbank = gpiochip_get_data(chip);\n> @@ -982,7 +986,7 @@ static int omap_gpio_output(struct gpio_chip *chip, unsigned int offset,\n>   static int omap_gpio_debounce(struct gpio_chip *chip, unsigned int offset,\n>   \t\t\t      unsigned int debounce)\n>   {\n> -\tstruct gpio_bank *bank;\n> +\tstruct omap_gpio_bank *bank;\n>   \tunsigned long flags;\n>   \tint ret;\n>   \n> @@ -1015,7 +1019,7 @@ static int omap_gpio_set_config(struct gpio_chip *chip, unsigned int offset,\n>   static void omap_gpio_set(struct gpio_chip *chip, unsigned int offset,\n>   \t\t\t  int value)\n>   {\n> -\tstruct gpio_bank *bank;\n> +\tstruct omap_gpio_bank *bank;\n>   \tunsigned long flags;\n>   \n>   \tbank = gpiochip_get_data(chip);\n> @@ -1026,7 +1030,7 @@ static void omap_gpio_set(struct gpio_chip *chip, unsigned int offset,\n>   \n>   /*---------------------------------------------------------------------*/\n>   \n> -static void __init omap_gpio_show_rev(struct gpio_bank *bank)\n> +static void __init omap_gpio_show_rev(struct omap_gpio_bank *bank)\n>   {\n>   \tstatic bool called;\n>   \tu32 rev;\n> @@ -1041,7 +1045,7 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank)\n>   \tcalled = true;\n>   }\n>   \n> -static void omap_gpio_mod_init(struct gpio_bank *bank)\n> +static void omap_gpio_mod_init(struct omap_gpio_bank *bank)\n>   {\n>   \tvoid __iomem *base = bank->base;\n>   \tu32 l = 0xffffffff;\n> @@ -1068,7 +1072,8 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)\n>   \t\twritel_relaxed(0, base + bank->regs->ctrl);\n>   }\n>   \n> -static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc)\n> +static int omap_gpio_chip_init(struct omap_gpio_bank *bank,\n> +\t\t\t       struct irq_chip *irqc)\n>   {\n>   \tstatic int gpio;\n>   \tint irq_base = 0;\n> @@ -1158,7 +1163,7 @@ static int omap_gpio_probe(struct platform_device *pdev)\n>   \tconst struct of_device_id *match;\n>   \tconst struct omap_gpio_platform_data *pdata;\n>   \tstruct resource *res;\n> -\tstruct gpio_bank *bank;\n> +\tstruct omap_gpio_bank *bank;\n>   \tstruct irq_chip *irqc;\n>   \tint ret;\n>   \n> @@ -1168,7 +1173,7 @@ static int omap_gpio_probe(struct platform_device *pdev)\n>   \tif (!pdata)\n>   \t\treturn -EINVAL;\n>   \n> -\tbank = devm_kzalloc(dev, sizeof(struct gpio_bank), GFP_KERNEL);\n> +\tbank = devm_kzalloc(dev, sizeof(struct omap_gpio_bank), GFP_KERNEL);\n>   \tif (!bank)\n>   \t\treturn -ENOMEM;\n>   \n> @@ -1276,7 +1281,7 @@ static int omap_gpio_probe(struct platform_device *pdev)\n>   \n>   static int omap_gpio_remove(struct platform_device *pdev)\n>   {\n> -\tstruct gpio_bank *bank = platform_get_drvdata(pdev);\n> +\tstruct omap_gpio_bank *bank = platform_get_drvdata(pdev);\n>   \n>   \tlist_del(&bank->node);\n>   \tgpiochip_remove(&bank->chip);\n> @@ -1290,12 +1295,12 @@ static int omap_gpio_remove(struct platform_device *pdev)\n>   #ifdef CONFIG_ARCH_OMAP2PLUS\n>   \n>   #if defined(CONFIG_PM)\n> -static void omap_gpio_restore_context(struct gpio_bank *bank);\n> +static void omap_gpio_restore_context(struct omap_gpio_bank *bank);\n>   \n>   static int omap_gpio_runtime_suspend(struct device *dev)\n>   {\n>   \tstruct platform_device *pdev = to_platform_device(dev);\n> -\tstruct gpio_bank *bank = platform_get_drvdata(pdev);\n> +\tstruct omap_gpio_bank *bank = platform_get_drvdata(pdev);\n>   \tu32 l1 = 0, l2 = 0;\n>   \tunsigned long flags;\n>   \tu32 wake_low, wake_hi;\n> @@ -1358,12 +1363,12 @@ static int omap_gpio_runtime_suspend(struct device *dev)\n>   \treturn 0;\n>   }\n>   \n> -static void omap_gpio_init_context(struct gpio_bank *p);\n> +static void omap_gpio_init_context(struct omap_gpio_bank *p);\n>   \n>   static int omap_gpio_runtime_resume(struct device *dev)\n>   {\n>   \tstruct platform_device *pdev = to_platform_device(dev);\n> -\tstruct gpio_bank *bank = platform_get_drvdata(pdev);\n> +\tstruct omap_gpio_bank *bank = platform_get_drvdata(pdev);\n>   \tu32 l = 0, gen, gen0, gen1;\n>   \tunsigned long flags;\n>   \tint c;\n> @@ -1475,7 +1480,7 @@ static int omap_gpio_runtime_resume(struct device *dev)\n>   #if IS_BUILTIN(CONFIG_GPIO_OMAP)\n>   void omap2_gpio_prepare_for_idle(int pwr_mode)\n>   {\n> -\tstruct gpio_bank *bank;\n> +\tstruct omap_gpio_bank *bank;\n>   \n>   \tlist_for_each_entry(bank, &omap_gpio_list, node) {\n>   \t\tif (!BANK_USED(bank) || !bank->loses_context)\n> @@ -1489,7 +1494,7 @@ void omap2_gpio_prepare_for_idle(int pwr_mode)\n>   \n>   void omap2_gpio_resume_after_idle(void)\n>   {\n> -\tstruct gpio_bank *bank;\n> +\tstruct omap_gpio_bank *bank;\n>   \n>   \tlist_for_each_entry(bank, &omap_gpio_list, node) {\n>   \t\tif (!BANK_USED(bank) || !bank->loses_context)\n> @@ -1501,7 +1506,7 @@ void omap2_gpio_resume_after_idle(void)\n>   #endif\n>   \n>   #if defined(CONFIG_PM)\n> -static void omap_gpio_init_context(struct gpio_bank *p)\n> +static void omap_gpio_init_context(struct omap_gpio_bank *p)\n>   {\n>   \tstruct omap_gpio_reg_offs *regs = p->regs;\n>   \tvoid __iomem *base = p->base;\n> @@ -1524,7 +1529,7 @@ static void omap_gpio_init_context(struct gpio_bank *p)\n>   \tp->context_valid = true;\n>   }\n>   \n> -static void omap_gpio_restore_context(struct gpio_bank *bank)\n> +static void omap_gpio_restore_context(struct omap_gpio_bank *bank)\n>   {\n>   \twritel_relaxed(bank->context.wake_en,\n>   \t\t\t\tbank->base + bank->regs->wkup_en);\n> @@ -1561,7 +1566,7 @@ static void omap_gpio_restore_context(struct gpio_bank *bank)\n>   #else\n>   #define omap_gpio_runtime_suspend NULL\n>   #define omap_gpio_runtime_resume NULL\n> -static inline void omap_gpio_init_context(struct gpio_bank *p) {}\n> +static inline void omap_gpio_init_context(struct omap_gpio_bank *p) {}\n>   #endif\n>   \n>   static const struct dev_pm_ops gpio_pm_ops = {\n>","headers":{"Return-Path":"<linux-gpio-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"edUSUTNV\";\n\tdkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xv90F4V5bz9s81\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 16 Sep 2017 08:23:25 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751259AbdIOWXY (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tFri, 15 Sep 2017 18:23:24 -0400","from fllnx210.ext.ti.com ([198.47.19.17]:48010 \"EHLO\n\tfllnx210.ext.ti.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751184AbdIOWXX (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Fri, 15 Sep 2017 18:23:23 -0400","from dlelxv90.itg.ti.com ([172.17.2.17])\n\tby fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8FMNIbU010663; \n\tFri, 15 Sep 2017 17:23:18 -0500","from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113])\n\tby dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8FMNIc0031997; \n\tFri, 15 Sep 2017 17:23:18 -0500","from [128.247.59.147] (128.247.59.147) by DLEE70.ent.ti.com\n\t(157.170.170.113) with Microsoft SMTP Server id 14.3.294.0;\n\tFri, 15 Sep 2017 17:23:17 -0500"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1505514198;\n\tbh=LN53T530xuyRUW2nKd7eQ/YYCv2LN3wN68muZaKZdfg=;\n\th=Subject:To:CC:References:From:Date:In-Reply-To;\n\tb=edUSUTNVMBKT4EKSDPM3T4WIDfI/HYmRpHXcE/VJWL81k3Pf5le+yWxXHIZrxXRzn\n\tRgoKCAaluAnhFDDVlA7plWFIJm6bMu9Kz5ileJxZxMXi2fuzYruJXu0LS4qeGymsVn\n\tyDo/T9pYONXTzOK6S1dbuNNFgshjAZEyIkvhi3pc=","Subject":"Re: [PATCH 13/16] gpio: omap: Rename struct gpio_bank to struct\n\tomap_gpio_bank","To":"Thierry Reding <thierry.reding@gmail.com>,\n\tLinus Walleij <linus.walleij@linaro.org>","CC":"Jonathan Hunter <jonathanh@nvidia.com>,\n\t<linux-gpio@vger.kernel.org>, <linux-tegra@vger.kernel.org>,\n\t<linux-kernel@vger.kernel.org>","References":"<20170901185736.28051-1-thierry.reding@gmail.com>\n\t<20170901185736.28051-14-thierry.reding@gmail.com>","From":"Grygorii Strashko <grygorii.strashko@ti.com>","Message-ID":"<83ab14ab-8963-a1a4-c5e0-1a6c77432742@ti.com>","Date":"Fri, 15 Sep 2017 17:23:17 -0500","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<20170901185736.28051-14-thierry.reding@gmail.com>","Content-Type":"text/plain; charset=\"utf-8\"; format=flowed","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","X-Originating-IP":"[128.247.59.147]","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-gpio.vger.kernel.org>","X-Mailing-List":"linux-gpio@vger.kernel.org"}}]