[{"id":1768620,"web_url":"http://patchwork.ozlabs.org/comment/1768620/","msgid":"<CACRpkdZ7QwyrqqO8iLXDcDimWk5iwOEKZBvXQ-2mBO5s+vg13A@mail.gmail.com>","list_archive_url":null,"date":"2017-09-14T13:59:26","subject":"Re: [PATCH 14/16] gpio: Add support for banked GPIO controllers","submitter":{"id":7055,"url":"http://patchwork.ozlabs.org/api/people/7055/","name":"Linus Walleij","email":"linus.walleij@linaro.org"},"content":"On Fri, Sep 1, 2017 at 8:57 PM, Thierry Reding <thierry.reding@gmail.com> wrote:\n\n> From: Thierry Reding <treding@nvidia.com>\n>\n> Some GPIO controllers are subdivided into multiple logical blocks called\n> banks (or ports). This is often caused by the design assigning separate\n> resources, such as register regions or interrupts, to each bank, or some\n> set of banks.\n>\n> This commit adds support for describing controllers that have such a\n> banked design and provides common code for dealing with them.\n>\n> Signed-off-by: Thierry Reding <treding@nvidia.com>\n\nThis patch makes me really happy.\n\nIt pulls in a lot of weirdness to the OF core and creates a coherent\nway of handling these \"banked\" GPIO chips.\n\nCC to Tony to make sure he checks that OMAP is ready to use this\ntoo.\n\nI would change num_pins to num_lines everywhere in this patch,\nso if you resend the series, please fix that.\n\n> +void gpio_irq_chip_banked_handler(struct irq_desc *desc)\n\nMaybe we should name this gpio_irq_chip_banked_chained_handler()\nsince it only deals with chained IRQs?\n\nSooner or later we will have a nested bank too...\n\nOtherwise it looks fine.\n\nYours,\nLinus Walleij\n--\nTo unsubscribe from this list: send the line \"unsubscribe linux-gpio\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<linux-gpio-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"UZ0yO46P\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtKsF6tLqz9rxj\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 14 Sep 2017 23:59:29 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751407AbdINN72 (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tThu, 14 Sep 2017 09:59:28 -0400","from mail-it0-f43.google.com ([209.85.214.43]:51621 \"EHLO\n\tmail-it0-f43.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751277AbdINN71 (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Thu, 14 Sep 2017 09:59:27 -0400","by mail-it0-f43.google.com with SMTP id o200so287957itg.0\n\tfor <linux-gpio@vger.kernel.org>;\n\tThu, 14 Sep 2017 06:59:27 -0700 (PDT)","by 10.79.164.78 with HTTP; Thu, 14 Sep 2017 06:59:26 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=lbL2Ewof7aWqMKNsklKhI8HZ0t7iU+uL4mDhPCrvZEg=;\n\tb=UZ0yO46P1sGby3Z1mBW8xtZiXPBU5N/1ZTVAfwF/3iuKUuHPE1ap4X5Mh+eJoWNwbT\n\tqzuuAb51O2crLCJizCF0HqB5h91gjViZkcEvAfEtaACKX1aB/4XGCdMzH7JDhmhsb02B\n\tLlwVJunDuxZh4zQirRCl/ID2AWcBEbscr0RaI=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=lbL2Ewof7aWqMKNsklKhI8HZ0t7iU+uL4mDhPCrvZEg=;\n\tb=OIgdFAZ1irmEb75pj1rWNz3Ncs52Zw4X1C59++EbV2ARB3O75CuFlpKy1obZ/+qn+i\n\tstc9SMJY5c34UImqoCDVZ1vnhgh6mwdbmvFytO2t5AYZevRtD8Z8FPeUIlib5R/mM98w\n\t+UUMgcox9ZCjU0SobSQs9nsUHu463k1XgyWf3GYI1yZkDyeQlDomLHYhCRCmPTJQf49Q\n\tuUpbyd9gSjk1aRuVqepWpXn3OU3qbkDIkYVztHlEuhBjf6cdnJaJCY9SjEmAObXHbIMw\n\tVufDRPuS/NbVSjXu7uphiBFhzP67urk7kGT6iYxLaG45fYvOj9+om9tJGdMWKfL9z3nY\n\tJkKg==","X-Gm-Message-State":"AHPjjUjqAvH/wU4idFE95vCSWcVmBMn2wYcWavFWfmBWwPUzHicztyuR\n\tkszXMgJ/OcCphGeKxiCYAqsR9TtEGkTumppgg0sqVrCb","X-Google-Smtp-Source":"AOwi7QBuN3fmg7xXEZMwBIbrCjVOH1f9qrhw6KPQ/SD3WZyHXF7wKmSSAlwThr+nsBO/1a0Hv7ZFx48bVz2ywAffce4=","X-Received":"by 10.36.182.78 with SMTP id d14mr234108itj.74.1505397567082;\n\tThu, 14 Sep 2017 06:59:27 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170901185736.28051-15-thierry.reding@gmail.com>","References":"<20170901185736.28051-1-thierry.reding@gmail.com>\n\t<20170901185736.28051-15-thierry.reding@gmail.com>","From":"Linus Walleij <linus.walleij@linaro.org>","Date":"Thu, 14 Sep 2017 15:59:26 +0200","Message-ID":"<CACRpkdZ7QwyrqqO8iLXDcDimWk5iwOEKZBvXQ-2mBO5s+vg13A@mail.gmail.com>","Subject":"Re: [PATCH 14/16] gpio: Add support for banked GPIO controllers","To":"Thierry Reding <thierry.reding@gmail.com>","Cc":"Jonathan Hunter <jonathanh@nvidia.com>,\n\t\"linux-gpio@vger.kernel.org\" <linux-gpio@vger.kernel.org>,\n\t\"linux-tegra@vger.kernel.org\" <linux-tegra@vger.kernel.org>,\n\t\"linux-kernel@vger.kernel.org\" <linux-kernel@vger.kernel.org>,\n\text Tony Lindgren <tony@atomide.com>","Content-Type":"text/plain; charset=\"UTF-8\"","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-gpio.vger.kernel.org>","X-Mailing-List":"linux-gpio@vger.kernel.org"}},{"id":1768864,"web_url":"http://patchwork.ozlabs.org/comment/1768864/","msgid":"<20170914233731.GU5024@atomide.com>","list_archive_url":null,"date":"2017-09-14T23:37:32","subject":"Re: [PATCH 14/16] gpio: Add support for banked GPIO controllers","submitter":{"id":365,"url":"http://patchwork.ozlabs.org/api/people/365/","name":"Tony Lindgren","email":"tony@atomide.com"},"content":"* Linus Walleij <linus.walleij@linaro.org> [170914 07:00]:\n> On Fri, Sep 1, 2017 at 8:57 PM, Thierry Reding <thierry.reding@gmail.com> wrote:\n> \n> > From: Thierry Reding <treding@nvidia.com>\n> >\n> > Some GPIO controllers are subdivided into multiple logical blocks called\n> > banks (or ports). This is often caused by the design assigning separate\n> > resources, such as register regions or interrupts, to each bank, or some\n> > set of banks.\n> >\n> > This commit adds support for describing controllers that have such a\n> > banked design and provides common code for dealing with them.\n> >\n> > Signed-off-by: Thierry Reding <treding@nvidia.com>\n> \n> This patch makes me really happy.\n> \n> It pulls in a lot of weirdness to the OF core and creates a coherent\n> way of handling these \"banked\" GPIO chips.\n> \n> CC to Tony to make sure he checks that OMAP is ready to use this\n> too.\n\nAdding Grygorii to Cc as well, we'll take a look.\n\nProbably the runtime PM will be an issue here still. We must currently\ndo runtime PM on per GPIO bank basis instead of per GPIO pin level as\nwe constantly runtime_suspend/resume the whole GPIO bank for idle modes\non the SoCs that support PM. So the usage count for the bank needs to\nbe either 0 or 1 and cannot be the lines used in the bank.\n\nRegards,\n\nTony\n--\nTo unsubscribe from this list: send the line \"unsubscribe linux-gpio\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<linux-gpio-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtZhL1QNXz9rvt\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 15 Sep 2017 09:37:38 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751392AbdINXhg (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tThu, 14 Sep 2017 19:37:36 -0400","from muru.com ([72.249.23.125]:40724 \"EHLO muru.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751380AbdINXhg (ORCPT <rfc822;linux-gpio@vger.kernel.org>);\n\tThu, 14 Sep 2017 19:37:36 -0400","from atomide.com (localhost [127.0.0.1])\n\tby muru.com (Postfix) with ESMTPS id A4F2F8256;\n\tThu, 14 Sep 2017 23:38:14 +0000 (UTC)"],"Date":"Thu, 14 Sep 2017 16:37:32 -0700","From":"Tony Lindgren <tony@atomide.com>","To":"Linus Walleij <linus.walleij@linaro.org>","Cc":"Thierry Reding <thierry.reding@gmail.com>,\n\tJonathan Hunter <jonathanh@nvidia.com>,\n\t\"linux-gpio@vger.kernel.org\" <linux-gpio@vger.kernel.org>,\n\t\"linux-tegra@vger.kernel.org\" <linux-tegra@vger.kernel.org>,\n\t\"linux-kernel@vger.kernel.org\" <linux-kernel@vger.kernel.org>,\n\tGrygorii Strashko <grygorii.strashko@ti.com>, linux-omap@vger.kernel.org","Subject":"Re: [PATCH 14/16] gpio: Add support for banked GPIO controllers","Message-ID":"<20170914233731.GU5024@atomide.com>","References":"<20170901185736.28051-1-thierry.reding@gmail.com>\n\t<20170901185736.28051-15-thierry.reding@gmail.com>\n\t<CACRpkdZ7QwyrqqO8iLXDcDimWk5iwOEKZBvXQ-2mBO5s+vg13A@mail.gmail.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<CACRpkdZ7QwyrqqO8iLXDcDimWk5iwOEKZBvXQ-2mBO5s+vg13A@mail.gmail.com>","User-Agent":"Mutt/1.8.3 (2017-05-23)","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-gpio.vger.kernel.org>","X-Mailing-List":"linux-gpio@vger.kernel.org"}},{"id":1768869,"web_url":"http://patchwork.ozlabs.org/comment/1768869/","msgid":"<20170914234934.GV5024@atomide.com>","list_archive_url":null,"date":"2017-09-14T23:49:35","subject":"Re: [PATCH 14/16] gpio: Add support for banked GPIO controllers","submitter":{"id":365,"url":"http://patchwork.ozlabs.org/api/people/365/","name":"Tony Lindgren","email":"tony@atomide.com"},"content":"* Tony Lindgren <tony@atomide.com> [170914 16:38]:\n> * Linus Walleij <linus.walleij@linaro.org> [170914 07:00]:\n> > On Fri, Sep 1, 2017 at 8:57 PM, Thierry Reding <thierry.reding@gmail.com> wrote:\n> > \n> > > From: Thierry Reding <treding@nvidia.com>\n> > >\n> > > Some GPIO controllers are subdivided into multiple logical blocks called\n> > > banks (or ports). This is often caused by the design assigning separate\n> > > resources, such as register regions or interrupts, to each bank, or some\n> > > set of banks.\n> > >\n> > > This commit adds support for describing controllers that have such a\n> > > banked design and provides common code for dealing with them.\n> > >\n> > > Signed-off-by: Thierry Reding <treding@nvidia.com>\n> > \n> > This patch makes me really happy.\n> > \n> > It pulls in a lot of weirdness to the OF core and creates a coherent\n> > way of handling these \"banked\" GPIO chips.\n> > \n> > CC to Tony to make sure he checks that OMAP is ready to use this\n> > too.\n> \n> Adding Grygorii to Cc as well, we'll take a look.\n> \n> Probably the runtime PM will be an issue here still. We must currently\n> do runtime PM on per GPIO bank basis instead of per GPIO pin level as\n> we constantly runtime_suspend/resume the whole GPIO bank for idle modes\n> on the SoCs that support PM. So the usage count for the bank needs to\n> be either 0 or 1 and cannot be the lines used in the bank.\n\nAnd based on a quick look at this series it should not cause\nproblems there. For managing the banks in a generic way, I\nlike the idea too.\n\nRegards,\n\nTony\n--\nTo unsubscribe from this list: send the line \"unsubscribe linux-gpio\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<linux-gpio-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtZyD6Lt3z9s7h\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 15 Sep 2017 09:49:40 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751555AbdINXtj (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tThu, 14 Sep 2017 19:49:39 -0400","from muru.com ([72.249.23.125]:40744 \"EHLO muru.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751550AbdINXti (ORCPT <rfc822;linux-gpio@vger.kernel.org>);\n\tThu, 14 Sep 2017 19:49:38 -0400","from atomide.com (localhost [127.0.0.1])\n\tby muru.com (Postfix) with ESMTPS id 98C068256;\n\tThu, 14 Sep 2017 23:50:17 +0000 (UTC)"],"Date":"Thu, 14 Sep 2017 16:49:35 -0700","From":"Tony Lindgren <tony@atomide.com>","To":"Linus Walleij <linus.walleij@linaro.org>","Cc":"Thierry Reding <thierry.reding@gmail.com>,\n\tJonathan Hunter <jonathanh@nvidia.com>,\n\t\"linux-gpio@vger.kernel.org\" <linux-gpio@vger.kernel.org>,\n\t\"linux-tegra@vger.kernel.org\" <linux-tegra@vger.kernel.org>,\n\t\"linux-kernel@vger.kernel.org\" <linux-kernel@vger.kernel.org>,\n\tGrygorii Strashko <grygorii.strashko@ti.com>, linux-omap@vger.kernel.org","Subject":"Re: [PATCH 14/16] gpio: Add support for banked GPIO controllers","Message-ID":"<20170914234934.GV5024@atomide.com>","References":"<20170901185736.28051-1-thierry.reding@gmail.com>\n\t<20170901185736.28051-15-thierry.reding@gmail.com>\n\t<CACRpkdZ7QwyrqqO8iLXDcDimWk5iwOEKZBvXQ-2mBO5s+vg13A@mail.gmail.com>\n\t<20170914233731.GU5024@atomide.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20170914233731.GU5024@atomide.com>","User-Agent":"Mutt/1.8.3 (2017-05-23)","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-gpio.vger.kernel.org>","X-Mailing-List":"linux-gpio@vger.kernel.org"}}]