[{"id":1761938,"web_url":"http://patchwork.ozlabs.org/comment/1761938/","msgid":"","list_archive_url":null,"date":"2017-09-01T19:22:18","subject":"Re: [Qemu-devel] [PATCH v6 13/29] libqos: Use explicit QTestState\n\tfor pci operations","submitter":{"id":70924,"url":"http://patchwork.ozlabs.org/api/people/70924/","name":"Philippe Mathieu-Daudé","email":"f4bug@amsat.org"},"content":"On 09/01/2017 03:03 PM, Eric Blake wrote:\n> Now that the QPCIBus tracks QTestState, use that state instead\n> of an implicit reliance on global_qtest.\n> \n> Signed-off-by: Eric Blake \n\nReviewed-by: Philippe Mathieu-Daudé \n\n> ---\n> tests/libqos/pci-pc.c | 47 ++++++++++++++++++++++++-----------------------\n> tests/libqos/pci-spapr.c | 20 ++++++++++----------\n> 2 files changed, 34 insertions(+), 33 deletions(-)\n> \n> diff --git a/tests/libqos/pci-pc.c b/tests/libqos/pci-pc.c\n> index 85b34c6d13..9545f881ee 100644\n> --- a/tests/libqos/pci-pc.c\n> +++ b/tests/libqos/pci-pc.c\n> @@ -29,90 +29,91 @@ typedef struct QPCIBusPC\n> \n> static uint8_t qpci_pc_pio_readb(QPCIBus *bus, uint32_t addr)\n> {\n> - return inb(addr);\n> + return qtest_inb(bus->qts, addr);\n> }\n> \n> static void qpci_pc_pio_writeb(QPCIBus *bus, uint32_t addr, uint8_t val)\n> {\n> - outb(addr, val);\n> + qtest_outb(bus->qts, addr, val);\n> }\n> \n> static uint16_t qpci_pc_pio_readw(QPCIBus *bus, uint32_t addr)\n> {\n> - return inw(addr);\n> + return qtest_inw(bus->qts, addr);\n> }\n> \n> static void qpci_pc_pio_writew(QPCIBus *bus, uint32_t addr, uint16_t val)\n> {\n> - outw(addr, val);\n> + qtest_outw(bus->qts, addr, val);\n> }\n> \n> static uint32_t qpci_pc_pio_readl(QPCIBus *bus, uint32_t addr)\n> {\n> - return inl(addr);\n> + return qtest_inl(bus->qts, addr);\n> }\n> \n> static void qpci_pc_pio_writel(QPCIBus *bus, uint32_t addr, uint32_t val)\n> {\n> - outl(addr, val);\n> + qtest_outl(bus->qts, addr, val);\n> }\n> \n> static uint64_t qpci_pc_pio_readq(QPCIBus *bus, uint32_t addr)\n> {\n> - return (uint64_t)inl(addr) + ((uint64_t)inl(addr + 4) << 32);\n> + return (uint64_t)qtest_inl(bus->qts, addr) +\n> + ((uint64_t)qtest_inl(bus->qts, addr + 4) << 32);\n> }\n> \n> static void qpci_pc_pio_writeq(QPCIBus *bus, uint32_t addr, uint64_t val)\n> {\n> - outl(addr, val & 0xffffffff);\n> - outl(addr + 4, val >> 32);\n> + qtest_outl(bus->qts, addr, val & 0xffffffff);\n> + qtest_outl(bus->qts, addr + 4, val >> 32);\n> }\n> \n> static void qpci_pc_memread(QPCIBus *bus, uint32_t addr, void *buf, size_t len)\n> {\n> - memread(addr, buf, len);\n> + qtest_memread(bus->qts, addr, buf, len);\n> }\n> \n> static void qpci_pc_memwrite(QPCIBus *bus, uint32_t addr,\n> const void *buf, size_t len)\n> {\n> - memwrite(addr, buf, len);\n> + qtest_memwrite(bus->qts, addr, buf, len);\n> }\n> \n> static uint8_t qpci_pc_config_readb(QPCIBus *bus, int devfn, uint8_t offset)\n> {\n> - outl(0xcf8, (1U << 31) | (devfn << 8) | offset);\n> - return inb(0xcfc);\n> + qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n> + return qtest_inb(bus->qts, 0xcfc);\n> }\n> \n> static uint16_t qpci_pc_config_readw(QPCIBus *bus, int devfn, uint8_t offset)\n> {\n> - outl(0xcf8, (1U << 31) | (devfn << 8) | offset);\n> - return inw(0xcfc);\n> + qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n> + return qtest_inw(bus->qts, 0xcfc);\n> }\n> \n> static uint32_t qpci_pc_config_readl(QPCIBus *bus, int devfn, uint8_t offset)\n> {\n> - outl(0xcf8, (1U << 31) | (devfn << 8) | offset);\n> - return inl(0xcfc);\n> + qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n> + return qtest_inl(bus->qts, 0xcfc);\n> }\n> \n> static void qpci_pc_config_writeb(QPCIBus *bus, int devfn, uint8_t offset, uint8_t value)\n> {\n> - outl(0xcf8, (1U << 31) | (devfn << 8) | offset);\n> - outb(0xcfc, value);\n> + qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n> + qtest_outb(bus->qts, 0xcfc, value);\n> }\n> \n> static void qpci_pc_config_writew(QPCIBus *bus, int devfn, uint8_t offset, uint16_t value)\n> {\n> - outl(0xcf8, (1U << 31) | (devfn << 8) | offset);\n> - outw(0xcfc, value);\n> + qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n> + qtest_outw(bus->qts, 0xcfc, value);\n> }\n> \n> static void qpci_pc_config_writel(QPCIBus *bus, int devfn, uint8_t offset, uint32_t value)\n> {\n> - outl(0xcf8, (1U << 31) | (devfn << 8) | offset);\n> - outl(0xcfc, value);\n> + qtest_outl(bus->qts, 0xcf8, (1U << 31) | (devfn << 8) | offset);\n> + qtest_outl(bus->qts, 0xcfc, value);\n> }\n> \n> QPCIBus *qpci_init_pc(QTestState *qts, QGuestAllocator *alloc)\n> diff --git a/tests/libqos/pci-spapr.c b/tests/libqos/pci-spapr.c\n> index cd9b8f52d2..d7b2aa75e6 100644\n> --- a/tests/libqos/pci-spapr.c\n> +++ b/tests/libqos/pci-spapr.c\n> @@ -45,63 +45,63 @@ typedef struct QPCIBusSPAPR {\n> static uint8_t qpci_spapr_pio_readb(QPCIBus *bus, uint32_t addr)\n> {\n> QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);\n> - return readb(s->pio_cpu_base + addr);\n> + return qtest_readb(bus->qts, s->pio_cpu_base + addr);\n> }\n> \n> static void qpci_spapr_pio_writeb(QPCIBus *bus, uint32_t addr, uint8_t val)\n> {\n> QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);\n> - writeb(s->pio_cpu_base + addr, val);\n> + qtest_writeb(bus->qts, s->pio_cpu_base + addr, val);\n> }\n> \n> static uint16_t qpci_spapr_pio_readw(QPCIBus *bus, uint32_t addr)\n> {\n> QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);\n> - return bswap16(readw(s->pio_cpu_base + addr));\n> + return bswap16(qtest_readw(bus->qts, s->pio_cpu_base + addr));\n> }\n> \n> static void qpci_spapr_pio_writew(QPCIBus *bus, uint32_t addr, uint16_t val)\n> {\n> QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);\n> - writew(s->pio_cpu_base + addr, bswap16(val));\n> + qtest_writew(bus->qts, s->pio_cpu_base + addr, bswap16(val));\n> }\n> \n> static uint32_t qpci_spapr_pio_readl(QPCIBus *bus, uint32_t addr)\n> {\n> QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);\n> - return bswap32(readl(s->pio_cpu_base + addr));\n> + return bswap32(qtest_readl(bus->qts, s->pio_cpu_base + addr));\n> }\n> \n> static void qpci_spapr_pio_writel(QPCIBus *bus, uint32_t addr, uint32_t val)\n> {\n> QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);\n> - writel(s->pio_cpu_base + addr, bswap32(val));\n> + qtest_writel(bus->qts, s->pio_cpu_base + addr, bswap32(val));\n> }\n> \n> static uint64_t qpci_spapr_pio_readq(QPCIBus *bus, uint32_t addr)\n> {\n> QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);\n> - return bswap64(readq(s->pio_cpu_base + addr));\n> + return bswap64(qtest_readq(bus->qts, s->pio_cpu_base + addr));\n> }\n> \n> static void qpci_spapr_pio_writeq(QPCIBus *bus, uint32_t addr, uint64_t val)\n> {\n> QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);\n> - writeq(s->pio_cpu_base + addr, bswap64(val));\n> + qtest_writeq(bus->qts, s->pio_cpu_base + addr, bswap64(val));\n> }\n> \n> static void qpci_spapr_memread(QPCIBus *bus, uint32_t addr,\n> void *buf, size_t len)\n> {\n> QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);\n> - memread(s->mmio32_cpu_base + addr, buf, len);\n> + qtest_memread(bus->qts, s->mmio32_cpu_base + addr, buf, len);\n> }\n> \n> static void qpci_spapr_memwrite(QPCIBus *bus, uint32_t addr,\n> const void *buf, size_t len)\n> {\n> QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);\n> - memwrite(s->mmio32_cpu_base + addr, buf, len);\n> + qtest_memwrite(bus->qts, s->mmio32_cpu_base + addr, buf, len);\n> }\n> \n> static uint8_t qpci_spapr_config_readb(QPCIBus *bus, int devfn, uint8_t offset)\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification 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,\n\t\"open list:sPAPR\" ,\n\tAlexander Graf , armbru@redhat.com","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1763169,"web_url":"http://patchwork.ozlabs.org/comment/1763169/","msgid":"","list_archive_url":null,"date":"2017-09-05T10:03:36","subject":"Re: [Qemu-devel] [PATCH v6 13/29] libqos: Use explicit QTestState\n\tfor pci operations","submitter":{"id":66152,"url":"http://patchwork.ozlabs.org/api/people/66152/","name":"Thomas Huth","email":"thuth@redhat.com"},"content":"On 01.09.2017 20:03, Eric Blake wrote:\n> Now that the QPCIBus tracks QTestState, use that state instead\n> of an implicit reliance on global_qtest.\n> \n> Signed-off-by: Eric Blake \n> ---\n> tests/libqos/pci-pc.c | 47 ++++++++++++++++++++++++-----------------------\n> tests/libqos/pci-spapr.c | 20 ++++++++++----------\n> 2 files changed, 34 insertions(+), 33 deletions(-)\n\nReviewed-by: Thomas Huth ","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ext-mx06.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com","ext-mx06.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=thuth@redhat.com"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xmj4J15XSz9s9Y\n\tfor ;\n\tTue, 5 Sep 2017 20:04:32 +1000 (AEST)","from localhost ([::1]:57865 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dpAib-00015u-VL\n\tfor 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