[{"id":1762573,"web_url":"http://patchwork.ozlabs.org/comment/1762573/","msgid":"<20170904110110.GB29341@arm.com>","list_archive_url":null,"date":"2017-09-04T11:01:10","subject":"Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch (5/8)]","submitter":{"id":8373,"url":"http://patchwork.ozlabs.org/api/people/8373/","name":"James Greenhalgh","email":"james.greenhalgh@arm.com"},"content":"On Fri, Sep 01, 2017 at 02:22:17PM +0100, Tamar Christina wrote:\n> Hi All,\n> \n> This patch adds the instructions for Dot Product to AArch64 along\n> with the intrinsics and vectorizer pattern.\n> \n> Armv8.2-a dot product supports 8-bit element values both\n> signed and unsigned.\n> \n> Dot product is available from Arm8.2-a and onwards.\n> \n> Regtested and bootstrapped on aarch64-none-elf and no issues.\n> \n> Ok for trunk?\n> \n> gcc/\n> 2017-09-01 Tamar Christina \n> \n> \t* config/aarch64/aarch64-builtins.c\n> \t(aarch64_types_quadopu_lane_qualifiers): New.\n> \t(TYPES_QUADOPU_LANE): New.\n> \t* config/aarch64/aarch64-simd.md (aarch64_dot): New.\n> \t(dot_prod, aarch64_dot_lane): New.\n> \t(aarch64_dot_laneq): New.\n> \t* config/aarch64/aarch64-simd-builtins.def (sdot, udot): New.\n> \t(sdot_lane, udot_lane, sdot_laneq, udot_laneq): New.\n> \t* config/aarch64/iterators.md (UNSPEC_SDOT, UNSPEC_UDOT): New.\n> \t(DOT_MODE, dot_mode, Vdottype, DOTPROD): New.\n> \t(sur): Add SDOT and UDOT.\n> \n> -- \n\n> diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md\n> index f3e084f8778d70c82823b92fa80ff96021ad26db..21d46c84ab317c2d62afdf8c48117886aaf483b0 100644\n> --- a/gcc/config/aarch64/aarch64-simd.md\n> +++ b/gcc/config/aarch64/aarch64-simd.md\n> @@ -386,6 +386,87 @@\n> }\n> )\n> \n> +;; These instructions map to the __builtins for the Dot Product operations.\n> +(define_insn \"aarch64_dot\"\n> + [(set (match_operand:VS 0 \"register_operand\" \"=w\")\n> +\t(unspec:VS [(match_operand:VS 1 \"register_operand\" \"0\")\n> +\t\t (match_operand: 2 \"register_operand\" \"w\")\n> +\t\t (match_operand: 3 \"register_operand\" \"w\")]\n> +\t\tDOTPROD))]\n> + \"TARGET_DOTPROD\"\n> + \"dot\\\\t%0., %2., %3.\"\n> + [(set_attr \"type\" \"neon_dot\")]\n\nWould there be a small benefit in modelling this as:\n\n [(set (match_operand:VS 0 \"register_operand\" \"=w\")\n\t(add:VS ((match_operand:VS 1 \"register_operand\" \"0\")\n (unsepc:VS [(match_operand: 2 \"register_operand\" \"w\")\n\t\t (match_operand: 3 \"register_operand\" \"w\")]\n\t\tDOTPROD)))]\n\n\n> +)\n> +\n> +;; These expands map to the Dot Product optab the vectorizer checks for.\n> +;; The auto-vectorizer expects a dot product builtin that also does an\n> +;; accumulation into the provided register.\n> +;; Given the following pattern\n> +;;\n> +;; for (i=0; i +;; c = a[i] * b[i];\n> +;; r += c;\n> +;; }\n> +;; return result;\n> +;;\n> +;; This can be auto-vectorized to\n> +;; r = a[0]*b[0] + a[1]*b[1] + a[2]*b[2] + a[3]*b[3];\n> +;;\n> +;; given enough iterations. However the vectorizer can keep unrolling the loop\n> +;; r += a[4]*b[4] + a[5]*b[5] + a[6]*b[6] + a[7]*b[7];\n> +;; r += a[8]*b[8] + a[9]*b[9] + a[10]*b[10] + a[11]*b[11];\n> +;; ...\n> +;;\n> +;; and so the vectorizer provides r, in which the result has to be accumulated.\n> +(define_expand \"dot_prod\"\n> + [(set (match_operand:VS 0 \"register_operand\")\n> +\t(unspec:VS [(match_operand: 1 \"register_operand\")\n> +\t\t (match_operand: 2 \"register_operand\")\n> +\t\t (match_operand:VS 3 \"register_operand\")]\n> +\t\tDOTPROD))]\n\nThis is just an expand that always ends in a DONE, so doesn't need the\nfull description here, just:\n\n [(match_operand:VS 0 \"register_operand)\n (match_operand: 1 \"register_operand\")\n (match_operand: 2 \"register_operand\")\n (match_operand:VS 3 \"register_operand\")]\n\n> diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md\n> index cceb57525c7aa44933419bd317b1f03a7b76f4c4..533c12cca916669195e9b094527ee0de31542b12 100644\n> --- a/gcc/config/aarch64/iterators.md\n> +++ b/gcc/config/aarch64/iterators.md\n> @@ -354,6 +354,8 @@\n> UNSPEC_SQRDMLSH ; Used in aarch64-simd.md.\n> UNSPEC_FMAXNM ; Used in aarch64-simd.md.\n> UNSPEC_FMINNM ; Used in aarch64-simd.md.\n> + UNSPEC_SDOT\t\t; Used in aarch64-simd.md.\n> + UNSPEC_UDOT\t\t; Used in aarch64-simd.md.\n> ])\n> \n> ;; ------------------------------------------------------------------\n> @@ -810,6 +812,13 @@\n> (define_mode_attr vsi2qi [(V2SI \"v8qi\") (V4SI \"v16qi\")])\n> (define_mode_attr VSI2QI [(V2SI \"V8QI\") (V4SI \"V16QI\")])\n> \n> +;; Mapping attribute for Dot Product input modes based on result mode.\n> +(define_mode_attr DOT_MODE [(V2SI \"V8QI\") (V4SI \"V16QI\")])\n> +(define_mode_attr dot_mode [(V2SI \"v8qi\") (V4SI \"v16qi\")])\n\nAre these not identical to the two lines above in the context?\n\n> (define_mode_attr vsi2qi [(V2SI \"v8qi\") (V4SI \"v16qi\")])\n> (define_mode_attr VSI2QI [(V2SI \"V8QI\") (V4SI \"V16QI\")])\n\nThanks,\nJames","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461399-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"Lx0hVu54\"; dkim-atps=neutral","sourceware.org; auth=none","spf=pass (sender IP is 217.140.96.140)\n\tsmtp.mailfrom=arm.com; gcc.gnu.org;\n\tdkim=none (message not signed) header.d=none; gcc.gnu.org;\n\tdmarc=bestguesspass action=none header.from=arm.com; "],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xm6Nn0qXkz9s8J\n\tfor ;\n\tMon, 4 Sep 2017 21:01:43 +1000 (AEST)","(qmail 93910 invoked by alias); 4 Sep 2017 11:01:36 -0000","(qmail 93637 invoked by uid 89); 4 Sep 2017 11:01:36 -0000","from mail-ve1eur01on0051.outbound.protection.outlook.com (HELO\n\tEUR01-VE1-obe.outbound.protection.outlook.com) (104.47.1.51)\n\tby sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with\n\tESMTP; Mon, 04 Sep 2017 11:01:30 +0000","from VI1PR0802CA0011.eurprd08.prod.outlook.com\n\t(2603:10a6:800:aa::21) by HE1PR0801MB1946.eurprd08.prod.outlook.com\n\t(2603:10a6:3:4f::12) with Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.13.10; Mon, 4 Sep 2017 11:01:26 +0000","from DB5EUR03FT005.eop-EUR03.prod.protection.outlook.com\n\t(2a01:111:f400:7e0a::209) by\n\tVI1PR0802CA0011.outlook.office365.com (2603:10a6:800:aa::21)\n\twith Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.13.10 via Frontend Transport; Mon, 4 Sep 2017 11:01:25 +0000","from nebula.arm.com (217.140.96.140) by\n\tDB5EUR03FT005.mail.protection.outlook.com (10.152.20.122)\n\twith Microsoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA_P384) id\n\t15.1.1385.11 via Frontend Transport; Mon, 4 Sep 2017 11:01:25 +0000","from arm.com (10.1.2.79) by mail.arm.com (10.1.105.66) with\n\tMicrosoft SMTP Server id 14.3.294.0; Mon, 4 Sep 2017 12:01:11 +0100"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:date\n\t:from:to:cc:subject:message-id:references:mime-version\n\t:content-type:in-reply-to; q=dns; s=default; b=jWORpM6AIFYa0mtvx\n\tIWgbCYWGdigmvYQEifV5XGS/rOMIRuJCuUhU5XxYPitTahFh/TB7LsqwVcEtKD31\n\tlIQPb9JTEPqmgfIhSB9pBicvl/fA2Tw/zylJ/XqMc44sJDBYx56BIUiWOy7FeF07\n\ta5/seTWS21UlEB/FvEixXQG+O8=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:date\n\t:from:to:cc:subject:message-id:references:mime-version\n\t:content-type:in-reply-to; s=default; bh=8BoC5pINiRvL2ciisSs6PpD\n\teUgg=; b=Lx0hVu54wjBh68KN1Nd9n1pOmvLtVyAF7stuSdinSrcUepxoRrm7wPH\n\tb8zdRDTMMqjdeo9Ei4x/9re9QmDx6YwQq2I+JLpyguFyaEuiK6oAYVwO81B48fyM\n\tUjfF70H2rv83KpKsR8EDlvVkZwIrdUyCjxQrcC+E9egnEVJnjQZA=","Mailing-List":"contact gcc-patches-help@gcc.gnu.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Archive":"","List-Post":"","List-Help":"","Sender":"gcc-patches-owner@gcc.gnu.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-24.6 required=5.0 tests=AWL, BAYES_00,\n\tGIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3,\n\tRCVD_IN_DNSWL_NONE, SPF_HELO_PASS,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=3546, Mapping, sur","X-HELO":"EUR01-VE1-obe.outbound.protection.outlook.com","Received-SPF":"Pass (protection.outlook.com: domain of arm.com designates\n\t217.140.96.140 as permitted sender)\n\treceiver=protection.outlook.com; client-ip=217.140.96.140;\n\thelo=nebula.arm.com; ","Date":"Mon, 4 Sep 2017 12:01:10 +0100","From":"James Greenhalgh ","To":"Tamar Christina ","CC":", , ,\n\t","Subject":"Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch (5/8)]","Message-ID":"<20170904110110.GB29341@arm.com>","References":"<20170901132215.GA32134@arm.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Disposition":"inline","In-Reply-To":"<20170901132215.GA32134@arm.com>","User-Agent":"Mutt/1.5.21 (2010-09-15)","X-EOPAttributedMessage":"0","X-MS-Office365-Filtering-HT":"Tenant","X-Forefront-Antispam-Report":"CIP:217.140.96.140; IPV:CAL; SCL:-1; CTRY:GB;\n\tEFV:NLI; SFV:NSPM;\n\tSFS:(10009020)(6009001)(39860400002)(2980300002)(438002)(53754006)(24454002)(377424004)(189002)(199003)(8676002)(7696004)(83506001)(47776003)(6862004)(356003)(106466001)(5660300001)(2906002)(6286002)(246002)(110136004)(8936002)(189998001)(77096006)(72206003)(626005)(305945005)(6246003)(4326008)(104016004)(86362001)(575784001)(229853002)(54906002)(55016002)(97756001)(4001350100001)(36756003)(6636002)(33656002)(1076002)(478600001)(23726003)(26826003)(50466002)(46406003)(2950100002)(76176999)(50986999)(54356999)(18370500001);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:HE1PR0801MB1946;\n\tH:nebula.arm.com; FPR:; SPF:Pass;\n\tPTR:fw-tnat.cambridge.arm.com; MX:1; A:1; LANG:en; ","X-Microsoft-Exchange-Diagnostics":["1; DB5EUR03FT005;\n\t1:L1QT6D8bNVSiArLLtmHstMlh8C11KycB1aa9HP5wdpmlaeD6QUn5HfnEPlwUc2YkCPS9sMl69L2FlEiOOmQc9EPxn2kzsAIUkty1/xdCL81lsKMY9v2b89u8l9xJAxQT","1; HE1PR0801MB1946;\n\t3:55a1UtYrsxfjpfKUJNhBF5T34a5r+XAC9UZc1x8C9RyD4iHoXvnrdsntcFVFfDXJGCxMfmsi6g4f1cucrPgkzmP3akur1TL8W4PwtRtGwI6cXQVGzpDq0R5tY2gssA3O7Zhbh+5ZtbQRg+rLtVoRG3IgDLLdBjf/uYA35E+poZ3gby895V7kiiYLZQAgTInoOGaUn1BSBeK7eGlIO0ImW4NZemRrjaarSwgm7XepxgsaX9xV6ZGbaXb1Ckf54BnX+WOLfhfgyTSFv0hnJIcAGfp2CylCpWnY9tqAqE0GeINWBZ0re/vo2NzLSJp4FdzEFw2OQEKGo1PbMi0GRh+qpL1EQD0FXorWpqwy2ZIiyek=;\n\t25:Gtd3Kuc5Qf42Lvi2VcnNqTjeJerUL93+kNto+ICDFxxWeUDNEKpvXEjV7dDYRlWDaV7Y4NOhf9mGY3sFWabJrLp7tDTa0ebOGT8OMcov906CGcjen+o0yhuGb2QGEqaLufrcZDidSqA1so8P3PAQ05GX4YEDojbCw0OL50RsoR8oDeEcIE4Lu0a7EXMNpU2th7E8Wi1mLiG+UQTe6tEWDhaC0YgBdOHYQJkeaw3aqUAiBv7CECWUPBIMKjtqaVwlwk3lgoVL3hbbzcozQMOFiTQZw2PxhqQNs3NAa4ll/iRQoBH6aSOieBxfzvmjzKpgXB0D/gg8Io6w3je6pmdXuA==","1; HE1PR0801MB1946;\n\t31:o5DuHUXDIOlIuj2lADqYDtaKBmvFk0/vDSRRzO2+AY+l0DUjLapJ98jB/0Ynqosbv5/YKlmLmN5lv3oCQPHolsVVAKW+7z2Z/ipTAP263y8Z4doC9ik+Hub/p5o8u7QuRS3AA1h51X5jrlxDyIxjEjEJH48FIvPAXJvxFzGxBrbK+FUh+PgTRD636YJOYD2vfs35aqcMy5vzIaBTCbsQud1nQVSWG+y5dbMa3aE9Jws=;\n\t20:vosruBczlN3bghBhI7n5md3/tjM0+Z/AphcKB9peLpm7B1KgegJ6U2NtWt7KWmPB7THLG6ACLWGqWSVhTCrgEb9jz0RXX+Px0Gl6L+CxiKpupOTaavFcPhwDOFRL+kRu2DcAOhL9un9ByzARwIMO+EETbbXAMRYE24FMY0CwZFMnETRRiEYEHc6uq98EA6YxVNawn/4HwQ3dO/ApARBcIaodl30SPMlthCXzAPnOYR7Pc/98Pl6nre0GMpX0GKYc;\n\t4:3A/63GJCzRJOv+gQHvA+ukb7iXwE6Atb1YfBA+2mWO848ITHr1j7ylv/7Wtsr/cVdduNfXWoenBHgQOzXNLRaWMZwLdku5DccLfL29a+wQqpZ0P6BKm0Ap7vK9zVhRoRQsBJPPU8ZZ0pLyVqdOhZ1f34GiYmR2db0Hq6Yjo52wmcwjDc1VD8eCuipXtITpamIZt9yAh1MSxe11bpHW8DZK1HSUvC0xOpChZXbVuvPY6JazgxRYxKQyQspNHN17TUP7Y8JlJZv5V5Zkh8+V12TjQf7BQrA17sCHjG9PPZp68=","1; HE1PR0801MB1946;\n\t23:sAVX9nuz+oZ8njT+vt+KQRdooQq0EjKcDod93Y55fBRVaI+sCIQlLdqJsoINwennWP1c+MhAoeHIKnMSKdA3smqKDYHDpONhscAIvXAmRkN6fjOI/wH/Uexnv9LIJC24/78GrUedL480yT+TLHGbWM4Vh7oJaCmsOc5caV58vc+cNMn90K1s4Nf7adQL2HAH/T/32cRY0gxitZ3K5ZOuRMOvfrYvpn34gRcPopt+2ncDgfwATlYXcYn0IbaefHL7WdnttZSKo3C1DSbq0w/KykjbWi/qbL8d//0Jqhw3BuKOfc7YI0Mk2ZNLVhFtIqPOr/uVB6bc4v6GIiVjLpUwgVAmp0pIZTa0MWvjVDKZixwIg5XdLW2f9VLeKbgyicQlaCSwlmAbSTdaTy0U+7BanJU8K2JJk1a1In5QWLdxeiUEpbY1V6iS9miABS6FvvQjLr2b+z2xtfszcLOWblqEgDtMEVgrgbo8welvyps92Lx5J6gO4m63/mNUGTo4iq10wYfFr2jD/ZjYcd4ZMVOPA/W6qgcmDJZXbZJMf0PrGxqRhQsp/T9f9vGuSYptmbKUW5Eblp/Mta35b1Oua3APPyK+2066nlpe16Pc6LfdS3Q6vEOmJNe/j0hntoUycyYXE3FnH0Y4JpgyALyTuO+/ShVRlDAi4mHG0gSKMMke1fPVm63hftmroZcRLN7MY7d3ncQezChiMDLLeHKQQim9WlEqFer0oYLCS0annJMj+8sWMBQx6ppuMcZlTMy3zPk8JTFNEe3GgZB8LP8AZ5JDvRh1EJOKF2SKiXPh4ZNeYxvWqfX/wObeVSVxQdkjM5Z1Yo3b/lPtQ8d0/YQOUqJratKFQVxQZ4h9BkteMutOgbCqbf+4qwhlK/UDwpBJeNBYa3lFYQztMJGc39Qnifyvlztxb5Shox6nxkcgz2pZUIGPF7ChGxeq0S3NLZ9sBjgc+Mgs6VK7xgRq5lGFTSKQTvZ+NyrGlflcGv+TMHGD/8wtBS65FvBb4xZ4rlIuDetduvJrV/XTeOeD8/3Yh+MVlnAytQb+LMJPDykEsu/x4f/i87xpscr2AEFYkBH/eE8GHLVfoYctZFDdCch+7QMgDskmL6FPdXsacv+t+i/L78GgacQSqlq8xDmCVZDf9xeZBvRXRvfBXuoh1ytMYKqKTtk8XHzBi8elfFSLgjV6VFOk58JTIFRVIbhkZFpoWnD4","1; HE1PR0801MB1946;\n\t6:CSQ8sL9A0LVPStaOCVTkpU4LAlcPPvRrHll64mZGPoAr3QDKZgOqZp1MHIayTu9simUB4imFVnZTwWMfZijW5gVpwCtkUJ2MWEHOjwkH/eohZbIpDvkfad6axifuGObaBN/TTLQr8p/kMMlnc9E5qEV+fe1ykPr1dG5qbIg0EW+J6T82TSMkQLdtg5sqM78JsBmxKhEJvlBsCtHXtTfm1kM4Y9ob7YDC7T5zhpVX0VxFoStgspbPP2kIBZo5A9aQ5eYb5jJuy8ReaVKphwsZz3gQLqdgZZo2KrDQT15K9oqefrKEEsqrCM22SqY3o7sFPtZfW22b9950VtLyqg5+Dw==;\n\t5:W6rvdDNJuosnO058zXHeSxGezeFybcJFzPjPybU6NFmleCD3/gac+0H8k/Y4M3AbNyBZoWFytwJHvdT6ZN4OJC4pkwO/FDaSvO1s0BQ0eTzAPOShj2vSBBxRoidr6U3ZdNK3bR1NnDOTKiW22W6CAvKLqPQq/wZLS7ULFlCvJr0=;\n\t24:A/1gqajtqrm8asni7ydgU/r8+1TPJ1zGIepVM5k/nsQVsEQwn1MebTVvIoF6rAHCkckbgRoiC2pKmXSs+pd1a1rowGN8gY5zWd7xwXlKWoI=;\n\t7:gEIMsSFLyNMExdkOTnB8vR7PlAjdPAn/qhjDYzzZM//zQczzACv6i+wo99gkPZpaaCNitQxmL757NeZcqb3V9i70GWshxH+27M4g0+4gEWj6sdbh9S4gyATeea0jkTyAUFSLl5cTskrHwBdbS1998GJganusa1qshsg9xCx0wu1sSOFNUu4rgq6Gk044FG2t1eeERgh2HUPnOwDJPOQ2une2a6bl5wmDWFgIXBvYP2I="],"X-MS-PublicTrafficType":"Email","X-MS-Office365-Filtering-Correlation-Id":"c03cd9aa-d7fd-42c8-f446-08d4f384493d","X-Microsoft-Antispam":"UriScan:; BCL:0; PCL:0;\n\tRULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(2017030254152)(8251501002)(300000503095)(300135400095)(2017052603199)(201703131423075)(201703031133081)(201702281549075)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095);\n\tSRVR:HE1PR0801MB1946; ","X-MS-TrafficTypeDiagnostic":"HE1PR0801MB1946:","NoDisclaimer":"True","X-Exchange-Antispam-Report-Test":"UriScan:(180628864354917);","X-Microsoft-Antispam-PRVS":"","X-Exchange-Antispam-Report-CFA-Test":"BCL:0; PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(2401047)(5005006)(8121501046)(10201501046)(93006095)(93004095)(100000703101)(100105400095)(3002001)(6055026)(6041248)(20161123562025)(20161123564025)(20161123560025)(20161123555025)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123558100)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:HE1PR0801MB1946; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:HE1PR0801MB1946; ","X-Forefront-PRVS":"0420213CCD","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-OriginatorOrg":"arm.com","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"04 Sep 2017 11:01:25.3612\n\t(UTC)","X-MS-Exchange-CrossTenant-Id":"f34e5979-57d9-4aaa-ad4d-b122a662184d","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;\n\tIp=[217.140.96.140]; Helo=[nebula.arm.com]","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"HE1PR0801MB1946","X-IsSubscribed":"yes"}},{"id":1763562,"web_url":"http://patchwork.ozlabs.org/comment/1763562/","msgid":"","list_archive_url":null,"date":"2017-09-05T18:42:40","subject":"Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch (5/8)]","submitter":{"id":69689,"url":"http://patchwork.ozlabs.org/api/people/69689/","name":"Tamar Christina","email":"Tamar.Christina@arm.com"},"content":"> \n> ________________________________________\n> From: James Greenhalgh \n> Sent: Monday, September 4, 2017 12:01 PM\n> To: Tamar Christina\n> Cc: gcc-patches@gcc.gnu.org; nd; Richard Earnshaw; Marcus Shawcroft\n> Subject: Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch (5/8)]\n> \n> On Fri, Sep 01, 2017 at 02:22:17PM +0100, Tamar Christina wrote:\n> > Hi All,\n> >\n> > This patch adds the instructions for Dot Product to AArch64 along\n> > with the intrinsics and vectorizer pattern.\n> >\n> > Armv8.2-a dot product supports 8-bit element values both\n> > signed and unsigned.\n> >\n> > Dot product is available from Arm8.2-a and onwards.\n> >\n> > Regtested and bootstrapped on aarch64-none-elf and no issues.\n> >\n> > Ok for trunk?\n> >\n> > gcc/\n> > 2017-09-01 Tamar Christina \n> >\n> > * config/aarch64/aarch64-builtins.c\n> > (aarch64_types_quadopu_lane_qualifiers): New.\n> > (TYPES_QUADOPU_LANE): New.\n> > * config/aarch64/aarch64-simd.md (aarch64_dot): New.\n> > (dot_prod, aarch64_dot_lane): New.\n> > (aarch64_dot_laneq): New.\n> > * config/aarch64/aarch64-simd-builtins.def (sdot, udot): New.\n> > (sdot_lane, udot_lane, sdot_laneq, udot_laneq): New.\n> > * config/aarch64/iterators.md (UNSPEC_SDOT, UNSPEC_UDOT): New.\n> > (DOT_MODE, dot_mode, Vdottype, DOTPROD): New.\n> > (sur): Add SDOT and UDOT.\n> >\n> > --\n> \n> > diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md\n> > index f3e084f8778d70c82823b92fa80ff96021ad26db..21d46c84ab317c2d62afdf8c48117886aaf483b0 100644\n> > --- a/gcc/config/aarch64/aarch64-simd.md\n> > +++ b/gcc/config/aarch64/aarch64-simd.md\n> > @@ -386,6 +386,87 @@\n> > }\n> > )\n> >\n> > +;; These instructions map to the __builtins for the Dot Product operations.\n> > +(define_insn \"aarch64_dot\"\n> > + [(set (match_operand:VS 0 \"register_operand\" \"=w\")\n> > + (unspec:VS [(match_operand:VS 1 \"register_operand\" \"0\")\n> > + (match_operand: 2 \"register_operand\" \"w\")\n> > + (match_operand: 3 \"register_operand\" \"w\")]\n> > + DOTPROD))]\n> > + \"TARGET_DOTPROD\"\n> > + \"dot\\\\t%0., %2., %3.\"\n> > + [(set_attr \"type\" \"neon_dot\")]\n> \n> Would there be a small benefit in modelling this as:\n> \n> [(set (match_operand:VS 0 \"register_operand\" \"=w\")\n> (add:VS ((match_operand:VS 1 \"register_operand\" \"0\")\n> (unsepc:VS [(match_operand: 2 \"register_operand\" \"w\")\n> (match_operand: 3 \"register_operand\" \"w\")]\n> DOTPROD)))]\n> \n\nMaybe, I can't think of anything at the moment, but it certainly won't hurt.\n\n> \n> > +)\n> > +\n> > +;; These expands map to the Dot Product optab the vectorizer checks for.\n> > +;; The auto-vectorizer expects a dot product builtin that also does an\n> > +;; accumulation into the provided register.\n> > +;; Given the following pattern\n> > +;;\n> > +;; for (i=0; i > +;; c = a[i] * b[i];\n> > +;; r += c;\n> > +;; }\n> > +;; return result;\n> > +;;\n> > +;; This can be auto-vectorized to\n> > +;; r = a[0]*b[0] + a[1]*b[1] + a[2]*b[2] + a[3]*b[3];\n> > +;;\n> > +;; given enough iterations. However the vectorizer can keep unrolling the loop\n> > +;; r += a[4]*b[4] + a[5]*b[5] + a[6]*b[6] + a[7]*b[7];\n> > +;; r += a[8]*b[8] + a[9]*b[9] + a[10]*b[10] + a[11]*b[11];\n> > +;; ...\n> > +;;\n> > +;; and so the vectorizer provides r, in which the result has to be accumulated.\n> > +(define_expand \"dot_prod\"\n> > + [(set (match_operand:VS 0 \"register_operand\")\n> > + (unspec:VS [(match_operand: 1 \"register_operand\")\n> > + (match_operand: 2 \"register_operand\")\n> > + (match_operand:VS 3 \"register_operand\")]\n> > + DOTPROD))]\n> \n> This is just an expand that always ends in a DONE, so doesn't need the\n> full description here, just:\n> \n> [(match_operand:VS 0 \"register_operand)\n> (match_operand: 1 \"register_operand\")\n> (match_operand: 2 \"register_operand\")\n> (match_operand:VS 3 \"register_operand\")]\n\nyes but I use the unspec to match the iterator to generate the signed and unsigned\nversions of the optab.\n\n> \n> > diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md\n> > index cceb57525c7aa44933419bd317b1f03a7b76f4c4..533c12cca916669195e9b094527ee0de31542b12 100644\n> > --- a/gcc/config/aarch64/iterators.md\n> > +++ b/gcc/config/aarch64/iterators.md\n> > @@ -354,6 +354,8 @@\n> > UNSPEC_SQRDMLSH ; Used in aarch64-simd.md.\n> > UNSPEC_FMAXNM ; Used in aarch64-simd.md.\n> > UNSPEC_FMINNM ; Used in aarch64-simd.md.\n> > + UNSPEC_SDOT ; Used in aarch64-simd.md.\n> > + UNSPEC_UDOT ; Used in aarch64-simd.md.\n> > ])\n> >\n> > ;; ------------------------------------------------------------------\n> > @@ -810,6 +812,13 @@\n> > (define_mode_attr vsi2qi [(V2SI \"v8qi\") (V4SI \"v16qi\")])\n> > (define_mode_attr VSI2QI [(V2SI \"V8QI\") (V4SI \"V16QI\")])\n> >\n> > +;; Mapping attribute for Dot Product input modes based on result mode.\n> > +(define_mode_attr DOT_MODE [(V2SI \"V8QI\") (V4SI \"V16QI\")])\n> > +(define_mode_attr dot_mode [(V2SI \"v8qi\") (V4SI \"v16qi\")])\n> \n> Are these not identical to the two lines above in the context?\n> \n> > (define_mode_attr vsi2qi [(V2SI \"v8qi\") (V4SI \"v16qi\")])\n> > (define_mode_attr VSI2QI [(V2SI \"V8QI\") (V4SI \"V16QI\")])\n> \n> Thanks,\n> James","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461533-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"X0NOhnjp\"; dkim-atps=neutral","sourceware.org; auth=none","spf=none (sender IP is )\n\tsmtp.mailfrom=Tamar.Christina@arm.com; "],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xmwZY0HQ5z9sCZ\n\tfor ;\n\tWed, 6 Sep 2017 04:43:00 +1000 (AEST)","(qmail 98860 invoked by alias); 5 Sep 2017 18:42:52 -0000","(qmail 98844 invoked by uid 89); 5 Sep 2017 18:42:51 -0000","from mail-eopbgr10071.outbound.protection.outlook.com (HELO\n\tEUR02-HE1-obe.outbound.protection.outlook.com) (40.107.1.71)\n\tby sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with\n\tESMTP; Tue, 05 Sep 2017 18:42:45 +0000","from DB6PR0802MB2309.eurprd08.prod.outlook.com (10.172.228.13) by\n\tDB6SPR00MB2490.eurprd08.prod.outlook.com (10.168.88.21) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.13.10; Tue, 5 Sep 2017 18:42:40 +0000","from DB6PR0802MB2309.eurprd08.prod.outlook.com\n\t([fe80::9894:78af:87e4:9ded]) by\n\tDB6PR0802MB2309.eurprd08.prod.outlook.com\n\t([fe80::9894:78af:87e4:9ded%17]) with mapi id 15.20.0013.018;\n\tTue, 5 Sep 2017 18:42:40 +0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:from\n\t:to:cc:subject:date:message-id:references:in-reply-to\n\t:content-type:content-transfer-encoding:mime-version; q=dns; s=\n\tdefault; b=vRqyptMuhZpOtrsHTNu/l51ANAGKfFmJ0fDq+5OTySMc45HtdYIxF\n\tSEVm6pbNHjtbq1+r/BOjezJaQPGqHYHPFOibz9NWqqaQGkw6uCwUqvDZv0mseHbM\n\tWalNK3Y/kefb6wNUy3j/vaQcq8t8rKHnTBTainv/FOJ2hsK/l3xbzk=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:from\n\t:to:cc:subject:date:message-id:references:in-reply-to\n\t:content-type:content-transfer-encoding:mime-version; s=default;\n\tbh=oY9sydHkWypAi09rJ2lRXXcQ1Xs=; b=X0NOhnjpick9Gn+Ab1FSEF8VAipl\n\tGlUhUX37wPWyhvAIUQuh+1y2gZpMGcu0l7XwTuJRMsyHpafa8Eful92rDnkn/Uik\n\tSI1sfcah+zG/enYbFVMVL6HNkrDYPZiNz4P/b5sXbN3zpBJE0DapqXAT0niZDZ2U\n\tBa0OQp9fo9YxU34=","Mailing-List":"contact gcc-patches-help@gcc.gnu.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Archive":"","List-Post":"","List-Help":"","Sender":"gcc-patches-owner@gcc.gnu.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-26.1 required=5.0 tests=BAYES_00, GIT_PATCH_0,\n\tGIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS,\n\tRCVD_IN_DNSWL_NONE, SPF_HELO_PASS,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=","X-HELO":"EUR02-HE1-obe.outbound.protection.outlook.com","From":"Tamar Christina ","To":"James Greenhalgh ","CC":"\"gcc-patches@gcc.gnu.org\" , nd ,\n\tRichard Earnshaw ,\n\tMarcus Shawcroft\t","Subject":"Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch (5/8)]","Date":"Tue, 5 Sep 2017 18:42:40 +0000","Message-ID":"","References":"<20170901132215.GA32134@arm.com>,\n\t<20170904110110.GB29341@arm.com>","In-Reply-To":"<20170904110110.GB29341@arm.com>","authentication-results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461533-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"X0NOhnjp\"; dkim-atps=neutral","sourceware.org; auth=none","spf=none (sender IP is )\n\tsmtp.mailfrom=Tamar.Christina@arm.com; "],"x-ms-publictraffictype":"Email","x-microsoft-exchange-diagnostics":"1; DB6SPR00MB2490;\n\t6:H0Gt2wztjoaQCokTrcjDizcx05068xYGcsCQL6moMOJP7TwSMewzG7afx0sxiISICi3QyUPqCcyrHlB7JXD+crOd8oKSK9HtTy2lX5wFAgVvWUGy9Vc8eAnzILmR6V9um7kZdm53TLuMDZEYsRqqNfq00hQr74cnD7A4vaUO+lLc7z5ie3pNXY2yQle7NHBCKTREcU7eIUGM3gfKk5nDVnE/ktmpsrcHNoQnyVVlJ3MMkHW6oJl+Rn2iGjVcSYvxupgH5Rp3DBdnYE0Mnx8NmVgc6wrrSdc0RHmphH/V++j9c167ZLxyatoEf4wF+FqGb/bbxxjIB61xKBnhGXGh3Q==;\n\t5:aFDpCyNOvQQJKYD0AZ7oLwfFCsUdE+YgUkJVQUXRIYa7JpA0fRysrorGGkwx0XcsSJ9SJVrett5IHMdRrTehKIBpL3D7jcYEoeVx9ldeN7G4h8ZSg8u0uJHoljwE01ATJvPl6e9n4RleXXEzBBA43A==;\n\t24:FCITEvll2N3KGaeMRYeFVWJxUIaf3SXfk3RI1j3hBQyFGYmA1gF+LAgungMCIvWQIePMnbMTmUG7WOu1VZ8Aftlv9gv0Ygzl4KIHRn4Ybhc=;\n\t7:4E7723jwr9Yc3hkyBmoXHvHyX705GpeLM9J+5ayPoLxOYRqNBg2rzF+xZXgsHqsQk9k+p4SbRV8AJWLG004Dr01rSrSRphosLAC+8xQ5N/gcxnd4uqee04Fu463hYBH4qaiixXcNl4DTAI2NEGksMPpMb5wweHhlmtxA9yHXc43s9MWuR9s22d4HIsmENXnifCIUyIUOXgPB0gRJuyIeVb9KhB6Jzi/FDfyOmqqPicc=","x-ms-exchange-antispam-srfa-diagnostics":"SSOS;","x-ms-office365-filtering-correlation-id":"68cc61c4-1b3d-408a-7b8a-08d4f48de370","x-ms-office365-filtering-ht":"Tenant","x-microsoft-antispam":"UriScan:; BCL:0; PCL:0;\n\tRULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(2017030254152)(48565401081)(300000503095)(300135400095)(2017052603199)(201703131423075)(201703031133081)(201702281549075)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095);\n\tSRVR:DB6SPR00MB2490; ","x-ms-traffictypediagnostic":"DB6SPR00MB2490:","nodisclaimer":"True","x-exchange-antispam-report-test":"UriScan:(180628864354917)(22074186197030)(183786458502308); ","x-microsoft-antispam-prvs":"","x-exchange-antispam-report-cfa-test":"BCL:0; PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(2401047)(5005006)(8121501046)(93006095)(93001095)(100000703101)(100105400095)(3002001)(10201501046)(6055026)(6041248)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123562025)(20161123564025)(20161123558100)(20161123560025)(20161123555025)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:DB6SPR00MB2490; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:DB6SPR00MB2490; ","x-forefront-prvs":"0421BF7135","x-forefront-antispam-report":"SFV:NSPM;\n\tSFS:(10009020)(6009001)(39860400002)(24454002)(199003)(377454003)(377424004)(53754006)(189002)(97736004)(33656002)(575784001)(6246003)(2906002)(110136004)(7696004)(6862004)(3660700001)(3280700002)(81166006)(68736007)(72206003)(81156014)(74316002)(6636002)(9686003)(8936002)(478600001)(55016002)(2950100002)(106356001)(86362001)(4326008)(105586002)(305945005)(5660300001)(54906002)(99286003)(8676002)(50986999)(102836003)(6116002)(3846002)(76176999)(54356999)(14454004)(189998001)(101416001)(25786009)(6506006)(2900100001)(6436002)(7736002)(53936002)(66066001)(53546010)(5250100002)(229853002);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:DB6SPR00MB2490;\n\tH:DB6PR0802MB2309.eurprd08.prod.outlook.com; FPR:; SPF:None;\n\tPTR:InfoNoRecords; A:1; MX:1; LANG:en; ","received-spf":"None (protection.outlook.com: arm.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"text/plain; charset=\"iso-8859-1\"","Content-Transfer-Encoding":"quoted-printable","MIME-Version":"1.0","X-OriginatorOrg":"arm.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"05 Sep 2017 18:42:40.8354\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"f34e5979-57d9-4aaa-ad4d-b122a662184d","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DB6SPR00MB2490","X-IsSubscribed":"yes"}},{"id":1781571,"web_url":"http://patchwork.ozlabs.org/comment/1781571/","msgid":"","list_archive_url":null,"date":"2017-10-06T12:45:13","subject":"Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch (5/8)]","submitter":{"id":69689,"url":"http://patchwork.ozlabs.org/api/people/69689/","name":"Tamar Christina","email":"Tamar.Christina@arm.com"},"content":"Hi All,\n\nThis is a respin with the feedback suggested.\n\nRegtested on arm-none-eabi, armeb-none-eabi,\naarch64-none-elf and aarch64_be-none-elf with no issues found.\n\nOk for trunk?\n\ngcc/\n2017-10-06 Tamar Christina \n\n * config/aarch64/aarch64-builtins.c\n (aarch64_types_quadopu_lane_qualifiers): New.\n (TYPES_QUADOPU_LANE): New.\n * config/aarch64/aarch64-simd.md (aarch64_dot): New.\n (dot_prod, aarch64_dot_lane): New.\n (aarch64_dot_laneq): New.\n * config/aarch64/aarch64-simd-builtins.def (sdot, udot): New.\n (sdot_lane, udot_lane, sdot_laneq, udot_laneq): New.\n * config/aarch64/iterators.md (sur): Add UNSPEC_SDOT, UNSPEC_UDOT.\n (Vdottype, DOTPROD): New.\n (sur): Add SDOT and UDOT.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-463629-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"FGLqUL8p\"; dkim-atps=neutral","sourceware.org; auth=none","spf=none (sender IP is )\n\tsmtp.mailfrom=Tamar.Christina@arm.com; "],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y7qB74lTYz9sPs\n\tfor ;\n\tFri, 6 Oct 2017 23:45:51 +1100 (AEDT)","(qmail 24991 invoked by alias); 6 Oct 2017 12:45:30 -0000","(qmail 24878 invoked by uid 89); 6 Oct 2017 12:45:21 -0000","from mail-db5eur01on0048.outbound.protection.outlook.com (HELO\n\tEUR01-DB5-obe.outbound.protection.outlook.com) (104.47.2.48)\n\tby sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with\n\tESMTP; Fri, 06 Oct 2017 12:45:18 +0000","from DB6PR0802MB2309.eurprd08.prod.outlook.com (10.172.228.13) by\n\tDB6PR0802MB2392.eurprd08.prod.outlook.com (10.172.250.145)\n\twith Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.77.7; Fri, 6 Oct 2017 12:45:13 +0000","from DB6PR0802MB2309.eurprd08.prod.outlook.com\n\t([fe80::78a8:cb36:9798:56f]) by\n\tDB6PR0802MB2309.eurprd08.prod.outlook.com\n\t([fe80::78a8:cb36:9798:56f%17]) with mapi id 15.20.0077.018;\n\tFri, 6 Oct 2017 12:45:13 +0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:from\n\t:to:cc:subject:date:message-id:references:in-reply-to\n\t:content-type:mime-version; q=dns; s=default; b=btOcXkg3emgLE36b\n\tx+NwVGBUAU+iNuzZjq30KTpnpRdzvlQqUN2OUWrAmud9lYF7BMemFgkKQLbp+6ED\n\t8bflzcYJv/hie4SzVhchYEp5t/0w/nEeQcFWYVd+gztFBwEk4lrcuYmF+DBt5JiV\n\tryEY5biJh1LC6UoGp/7hrp6kaNs=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:from\n\t:to:cc:subject:date:message-id:references:in-reply-to\n\t:content-type:mime-version; s=default; bh=e6NgVZ3tCAUCcfksXGU3Fn\n\tq7nuU=; b=FGLqUL8pjQtvnIXIVMJOfA6wL9K/2Zq2pL1+6DIQ9DSqFVEKEuyqvo\n\taei64QNYI/2uZ57dZM6tbkpuZ9/95LQx2IrzzksqwX49LAbMTqnprycxtXN4cmw3\n\tkIrInctABCMDNVHHWmS99yHfnCFfL8S5yHc8gYH6cQIA/MS3uTrjY=","Mailing-List":"contact gcc-patches-help@gcc.gnu.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Archive":"","List-Post":"","List-Help":"","Sender":"gcc-patches-owner@gcc.gnu.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-24.8 required=5.0 tests=AWL, BAYES_00,\n\tGIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3,\n\tKAM_ASCII_DIVIDERS, KAM_LOTSOFHASH, RCVD_IN_DNSWL_NONE,\n\tSPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 spammy=","X-HELO":"EUR01-DB5-obe.outbound.protection.outlook.com","From":"Tamar Christina ","To":"James Greenhalgh ","CC":"\"gcc-patches@gcc.gnu.org\" , nd ,\n\tRichard Earnshaw ,\n\tMarcus Shawcroft\t","Subject":"Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch (5/8)]","Date":"Fri, 6 Oct 2017 12:45:13 +0000","Message-ID":"","References":"<20170901132215.GA32134@arm.com>,\n\t<20170904110110.GB29341@arm.com>,\n\t","In-Reply-To":"","authentication-results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-463629-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"FGLqUL8p\"; dkim-atps=neutral","sourceware.org; auth=none","spf=none (sender IP is )\n\tsmtp.mailfrom=Tamar.Christina@arm.com; "],"x-ms-publictraffictype":"Email","x-microsoft-exchange-diagnostics":"1; DB6PR0802MB2392;\n\t6:bj8cl5NogsIXuQprAOrOobC0DMw6+7AxtoLOLQLvUR9O3qw7mO67E2opxjIFJY6+03Meo5qNjqwEtRelBFnFxKDUg2aADlP/RKRdsSy0urulSCH5ESEufBy7wWlG7whJL4LfxtsIXJYz/sptEdgZge6clHyjtvPHaKplODnMT1TDHQ2XreNM5BhRjPGrt7lJODxNhLD5x7+W/iq4yk0Nn6zFjaWAvkKAtREsMOJsKwclzPPHUwych/BFo16TwmyWfDCmwQ4HpMMFS864ZM5JF07mJTSTuJdBg5rXI8FbgGJA0b4KHrHF9wzkRNBKZeTMFXbN5oBHU7QacPyhEuXNCg==;\n\t5:AcacbqZEdQaGQI1tzgZiZ/U/BXdNJzp+4oPj3OM9lAauHrmhsDoSv0YjxlgzF1WOQm3airUX504PRw+QT/1bqMUZxjeN4YC32pDKDa/MzN+xOPaTHy1mbfOtsY4IkoRFk/6zhM12fcECPpWrwxxQAw==;\n\t24:KZQj0ytTuodwro3GieG7xpboA1Pkh8bAvgrVokwHvp1SS5976f3hcM6tLEaobrQCBPX0tMfE8nioPf4Cnr41H5fcOBs9W7nlN5bY9g74bbE=;\n\t7:LJeUWXbC09B1DnoG5mHuV28WyEwCuuG8UqzPVD4rQkzbmWYCdFCmwtedqVipezjcUNUTrkUTtUU6HMUUAJ0/WeaPSy68RxVE1BqJJwAiiFjVe2+oIXLW+sby/KpQpwVJxXLPV2Sd1kwV0znqHQk4dXfnmEwOOCzs7OnE0WCcMFrhPEHxZmV8kz3Fs6nGiOaH8EzdJK8vfgNI/p5UMue+9ZfjVUG1g2TlEp+2UF9V5uU=","x-ms-exchange-antispam-srfa-diagnostics":"SSOS;SSOR;","x-ms-office365-filtering-correlation-id":"cabadbbe-a1b5-41d0-fbb6-08d50cb8166a","x-ms-office365-filtering-ht":"Tenant","x-microsoft-antispam":"UriScan:; BCL:0; PCL:0;\n\tRULEID:(22001)(2017030254152)(48565401081)(2017052603199)(49563074)(201703131423075)(201703031133081)(201702281549075);\n\tSRVR:DB6PR0802MB2392; ","x-ms-traffictypediagnostic":"DB6PR0802MB2392:","nodisclaimer":"True","x-exchange-antispam-report-test":"UriScan:(180628864354917)(22074186197030)(183786458502308); ","x-microsoft-antispam-prvs":"","x-exchange-antispam-report-cfa-test":"BCL:0; PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(102415395)(6040450)(2401047)(8121501046)(5005006)(100000703101)(100105400095)(10201501046)(93006095)(93001095)(3002001)(6055026)(6041248)(20161123562025)(20161123555025)(20161123564025)(20161123560025)(20161123558100)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:DB6PR0802MB2392; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:DB6PR0802MB2392; ","x-forefront-prvs":"0452022BE1","x-forefront-antispam-report":"SFV:NSPM;\n\tSFS:(10009020)(6009001)(39860400002)(346002)(376002)(189002)(24454002)(53754006)(377454003)(377424004)(199003)(74316002)(9686003)(72206003)(5250100002)(229853002)(53936002)(6436002)(7736002)(55016002)(6506006)(86362001)(81166006)(8936002)(6246003)(6862004)(105586002)(81156014)(4326008)(106356001)(66066001)(33656002)(575784001)(8676002)(102836003)(54356999)(478600001)(305945005)(3846002)(2906002)(3280700002)(76176999)(6116002)(99936001)(53546010)(68736007)(101416001)(50986999)(6636002)(189998001)(316002)(14454004)(25786009)(54906003)(3660700001)(99286003)(2950100002)(97736004)(2900100001)(5660300001)(7696004);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:DB6PR0802MB2392;\n\tH:DB6PR0802MB2309.eurprd08.prod.outlook.com; FPR:; SPF:None;\n\tPTR:InfoNoRecords; MX:1; A:1; LANG:en; ","received-spf":"None (protection.outlook.com: arm.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"multipart/mixed;\n\tboundary=\"_002_DB6PR0802MB23098E53FF86A06C43582E3FFF710DB6PR0802MB2309_\"","MIME-Version":"1.0","X-OriginatorOrg":"arm.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"06 Oct 2017 12:45:13.1794\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"f34e5979-57d9-4aaa-ad4d-b122a662184d","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DB6PR0802MB2392","X-IsSubscribed":"yes"}},{"id":1785443,"web_url":"http://patchwork.ozlabs.org/comment/1785443/","msgid":"<818d397a-33ba-847d-2a65-4f79879c2a45@arm.com>","list_archive_url":null,"date":"2017-10-12T12:58:02","subject":"Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch (5/8)]","submitter":{"id":67887,"url":"http://patchwork.ozlabs.org/api/people/67887/","name":"Richard Earnshaw","email":"Richard.Earnshaw@arm.com"},"content":"On 06/10/17 13:45, Tamar Christina wrote:\n> Hi All,\n> \n> This is a respin with the feedback suggested.\n> \n> Regtested on arm-none-eabi, armeb-none-eabi,\n> aarch64-none-elf and aarch64_be-none-elf with no issues found.\n> \n> Ok for trunk?\n> \n> gcc/\n> 2017-10-06 Tamar Christina \n> \n> * config/aarch64/aarch64-builtins.c\n> (aarch64_types_quadopu_lane_qualifiers): New.\n> (TYPES_QUADOPU_LANE): New.\n> * config/aarch64/aarch64-simd.md (aarch64_dot): New.\n> (dot_prod, aarch64_dot_lane): New.\n> (aarch64_dot_laneq): New.\n> * config/aarch64/aarch64-simd-builtins.def (sdot, udot): New.\n> (sdot_lane, udot_lane, sdot_laneq, udot_laneq): New.\n> * config/aarch64/iterators.md (sur): Add UNSPEC_SDOT, UNSPEC_UDOT.\n> (Vdottype, DOTPROD): New.\n> (sur): Add SDOT and UDOT.\n\nOK if this passes a native bootstrap.\n\nR.\n> ________________________________________\n> From: Tamar Christina\n> Sent: Tuesday, September 5, 2017 7:42:40 PM\n> To: James Greenhalgh\n> Cc: gcc-patches@gcc.gnu.org; nd; Richard Earnshaw; Marcus Shawcroft\n> Subject: Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch (5/8)]\n> \n>>\n>> ________________________________________\n>> From: James Greenhalgh \n>> Sent: Monday, September 4, 2017 12:01 PM\n>> To: Tamar Christina\n>> Cc: gcc-patches@gcc.gnu.org; nd; Richard Earnshaw; Marcus Shawcroft\n>> Subject: Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch (5/8)]\n>>\n>> On Fri, Sep 01, 2017 at 02:22:17PM +0100, Tamar Christina wrote:\n>>> Hi All,\n>>>\n>>> This patch adds the instructions for Dot Product to AArch64 along\n>>> with the intrinsics and vectorizer pattern.\n>>>\n>>> Armv8.2-a dot product supports 8-bit element values both\n>>> signed and unsigned.\n>>>\n>>> Dot product is available from Arm8.2-a and onwards.\n>>>\n>>> Regtested and bootstrapped on aarch64-none-elf and no issues.\n>>>\n>>> Ok for trunk?\n>>>\n>>> gcc/\n>>> 2017-09-01 Tamar Christina \n>>>\n>>> * config/aarch64/aarch64-builtins.c\n>>> (aarch64_types_quadopu_lane_qualifiers): New.\n>>> (TYPES_QUADOPU_LANE): New.\n>>> * config/aarch64/aarch64-simd.md (aarch64_dot): New.\n>>> (dot_prod, aarch64_dot_lane): New.\n>>> (aarch64_dot_laneq): New.\n>>> * config/aarch64/aarch64-simd-builtins.def (sdot, udot): New.\n>>> (sdot_lane, udot_lane, sdot_laneq, udot_laneq): New.\n>>> * config/aarch64/iterators.md (UNSPEC_SDOT, UNSPEC_UDOT): New.\n>>> (DOT_MODE, dot_mode, Vdottype, DOTPROD): New.\n>>> (sur): Add SDOT and UDOT.\n>>>\n>>> --\n>>\n>>> diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md\n>>> index f3e084f8778d70c82823b92fa80ff96021ad26db..21d46c84ab317c2d62afdf8c48117886aaf483b0 100644\n>>> --- a/gcc/config/aarch64/aarch64-simd.md\n>>> +++ b/gcc/config/aarch64/aarch64-simd.md\n>>> @@ -386,6 +386,87 @@\n>>> }\n>>> )\n>>>\n>>> +;; These instructions map to the __builtins for the Dot Product operations.\n>>> +(define_insn \"aarch64_dot\"\n>>> + [(set (match_operand:VS 0 \"register_operand\" \"=w\")\n>>> + (unspec:VS [(match_operand:VS 1 \"register_operand\" \"0\")\n>>> + (match_operand: 2 \"register_operand\" \"w\")\n>>> + (match_operand: 3 \"register_operand\" \"w\")]\n>>> + DOTPROD))]\n>>> + \"TARGET_DOTPROD\"\n>>> + \"dot\\\\t%0., %2., %3.\"\n>>> + [(set_attr \"type\" \"neon_dot\")]\n>>\n>> Would there be a small benefit in modelling this as:\n>>\n>> [(set (match_operand:VS 0 \"register_operand\" \"=w\")\n>> (add:VS ((match_operand:VS 1 \"register_operand\" \"0\")\n>> (unsepc:VS [(match_operand: 2 \"register_operand\" \"w\")\n>> (match_operand: 3 \"register_operand\" \"w\")]\n>> DOTPROD)))]\n>>\n> \n> Maybe, I can't think of anything at the moment, but it certainly won't hurt.\n> \n>>\n>>> +)\n>>> +\n>>> +;; These expands map to the Dot Product optab the vectorizer checks for.\n>>> +;; The auto-vectorizer expects a dot product builtin that also does an\n>>> +;; accumulation into the provided register.\n>>> +;; Given the following pattern\n>>> +;;\n>>> +;; for (i=0; i>> +;; c = a[i] * b[i];\n>>> +;; r += c;\n>>> +;; }\n>>> +;; return result;\n>>> +;;\n>>> +;; This can be auto-vectorized to\n>>> +;; r = a[0]*b[0] + a[1]*b[1] + a[2]*b[2] + a[3]*b[3];\n>>> +;;\n>>> +;; given enough iterations. However the vectorizer can keep unrolling the loop\n>>> +;; r += a[4]*b[4] + a[5]*b[5] + a[6]*b[6] + a[7]*b[7];\n>>> +;; r += a[8]*b[8] + a[9]*b[9] + a[10]*b[10] + a[11]*b[11];\n>>> +;; ...\n>>> +;;\n>>> +;; and so the vectorizer provides r, in which the result has to be accumulated.\n>>> +(define_expand \"dot_prod\"\n>>> + [(set (match_operand:VS 0 \"register_operand\")\n>>> + (unspec:VS [(match_operand: 1 \"register_operand\")\n>>> + (match_operand: 2 \"register_operand\")\n>>> + (match_operand:VS 3 \"register_operand\")]\n>>> + DOTPROD))]\n>>\n>> This is just an expand that always ends in a DONE, so doesn't need the\n>> full description here, just:\n>>\n>> [(match_operand:VS 0 \"register_operand)\n>> (match_operand: 1 \"register_operand\")\n>> (match_operand: 2 \"register_operand\")\n>> (match_operand:VS 3 \"register_operand\")]\n> \n> yes but I use the unspec to match the iterator to generate the signed and unsigned\n> versions of the optab.\n> \n>>\n>>> diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md\n>>> index cceb57525c7aa44933419bd317b1f03a7b76f4c4..533c12cca916669195e9b094527ee0de31542b12 100644\n>>> --- a/gcc/config/aarch64/iterators.md\n>>> +++ b/gcc/config/aarch64/iterators.md\n>>> @@ -354,6 +354,8 @@\n>>> UNSPEC_SQRDMLSH ; Used in aarch64-simd.md.\n>>> UNSPEC_FMAXNM ; Used in aarch64-simd.md.\n>>> UNSPEC_FMINNM ; Used in aarch64-simd.md.\n>>> + UNSPEC_SDOT ; Used in aarch64-simd.md.\n>>> + UNSPEC_UDOT ; Used in aarch64-simd.md.\n>>> ])\n>>>\n>>> ;; ------------------------------------------------------------------\n>>> @@ -810,6 +812,13 @@\n>>> (define_mode_attr vsi2qi [(V2SI \"v8qi\") (V4SI \"v16qi\")])\n>>> (define_mode_attr VSI2QI [(V2SI \"V8QI\") (V4SI \"V16QI\")])\n>>>\n>>> +;; Mapping attribute for Dot Product input modes based on result mode.\n>>> +(define_mode_attr DOT_MODE [(V2SI \"V8QI\") (V4SI \"V16QI\")])\n>>> +(define_mode_attr dot_mode [(V2SI \"v8qi\") (V4SI \"v16qi\")])\n>>\n>> Are these not identical to the two lines above in the context?\n>>\n>>> (define_mode_attr vsi2qi [(V2SI \"v8qi\") (V4SI \"v16qi\")])\n>>> (define_mode_attr VSI2QI [(V2SI \"V8QI\") (V4SI \"V16QI\")])\n>>\n>> Thanks,\n>> James","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-464026-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"HfMvBqdv\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yCW9m2jmYz9t2m\n\tfor ;\n\tThu, 12 Oct 2017 23:58:20 +1100 (AEDT)","(qmail 21774 invoked by alias); 12 Oct 2017 12:58:11 -0000","(qmail 21758 invoked by uid 89); 12 Oct 2017 12:58:10 -0000","from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com)\n\t(217.140.101.70) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tThu, 12 Oct 2017 12:58:08 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\tby\n\tusa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id\n\t8BBCC1435; Thu, 12 Oct 2017 05:58:07 -0700 (PDT)","from [192.168.1.19] (usa-sjc-mx-foss1.foss.arm.com\n\t[217.140.101.70])\tby usa-sjc-imap-foss1.foss.arm.com\n\t(Postfix) with ESMTPSA id C75313F3E1;\n\tThu, 12 Oct 2017 05:58:05 -0700 (PDT)"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender\n\t:subject:to:cc:references:from:message-id:date:mime-version\n\t:in-reply-to:content-type:content-transfer-encoding; q=dns; s=\n\tdefault; b=gpB8pwycrbcJ2snADpz72irhrl+RLmg2AbqQtFfXjXhBfBBbmUW9d\n\trBFpss7W89DGtzUrmdT5ESm+8dJr/80PWuRfSoMi6UvZaoP/tEeqBnMQs8LzRlyR\n\tdBz2FDhYqQJ/s4gLqqfCcQHZ4Sl99ZCoPTM6tqCkip89DiwqujlRWc=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender\n\t:subject:to:cc:references:from:message-id:date:mime-version\n\t:in-reply-to:content-type:content-transfer-encoding; s=default;\n\tbh=tKpYoHRxozoRwEnHH1dL3AiQF4U=; b=HfMvBqdv75q6uKy/9pjC4YZcd26D\n\t28l7E1dseikpec1OIXk/hEQ7G5KI5M/IDuX23n3DEMQkRVxFd03Pc8QQ2aluBI2G\n\t6JpbcAAW922cCTxnoyxXOcbMHo3D7Kk8Adu+1C7E24Pgsf9ZfW3OxWHPkAzwmgrc\n\tsrmIRMBqpsHDfTo=","Mailing-List":"contact gcc-patches-help@gcc.gnu.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Archive":"","List-Post":"","List-Help":"","Sender":"gcc-patches-owner@gcc.gnu.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-26.1 required=5.0 tests=BAYES_00, GIT_PATCH_0,\n\tGIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS,\n\tRP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=(unknown), 3866,\n\tMarcus, 3546","X-HELO":"foss.arm.com","Subject":"Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch (5/8)]","To":"Tamar Christina ,\n\tJames Greenhalgh ","Cc":"\"gcc-patches@gcc.gnu.org\" , nd ,\n\tMarcus Shawcroft ","References":"<20170901132215.GA32134@arm.com> <20170904110110.GB29341@arm.com>\n\t\n\t","From":"\"Richard Earnshaw (lists)\" ","Message-ID":"<818d397a-33ba-847d-2a65-4f79879c2a45@arm.com>","Date":"Thu, 12 Oct 2017 13:58:02 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64;\n\trv:52.0) Gecko/20100101 Thunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"","Content-Type":"text/plain; charset=utf-8","Content-Transfer-Encoding":"7bit"}},{"id":1785584,"web_url":"http://patchwork.ozlabs.org/comment/1785584/","msgid":"","list_archive_url":null,"date":"2017-10-12T15:37:30","subject":"RE: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch (5/8)]","submitter":{"id":69689,"url":"http://patchwork.ozlabs.org/api/people/69689/","name":"Tamar Christina","email":"Tamar.Christina@arm.com"},"content":"> -----Original Message-----\r\n> From: Richard Earnshaw (lists) [mailto:Richard.Earnshaw@arm.com]\r\n> Sent: 12 October 2017 13:58\r\n> To: Tamar Christina; James Greenhalgh\r\n> Cc: gcc-patches@gcc.gnu.org; nd; Marcus Shawcroft\r\n> Subject: Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch\r\n> (5/8)]\r\n> \r\n> On 06/10/17 13:45, Tamar Christina wrote:\r\n> > Hi All,\r\n> >\r\n> > This is a respin with the feedback suggested.\r\n> >\r\n> > Regtested on arm-none-eabi, armeb-none-eabi, aarch64-none-elf and\r\n> > aarch64_be-none-elf with no issues found.\r\n> >\r\n> > Ok for trunk?\r\n> >\r\n> > gcc/\r\n> > 2017-10-06 Tamar Christina \r\n> >\r\n> > * config/aarch64/aarch64-builtins.c\r\n> > (aarch64_types_quadopu_lane_qualifiers): New.\r\n> > (TYPES_QUADOPU_LANE): New.\r\n> > * config/aarch64/aarch64-simd.md (aarch64_dot): New.\r\n> > (dot_prod, aarch64_dot_lane): New.\r\n> > (aarch64_dot_laneq): New.\r\n> > * config/aarch64/aarch64-simd-builtins.def (sdot, udot): New.\r\n> > (sdot_lane, udot_lane, sdot_laneq, udot_laneq): New.\r\n> > * config/aarch64/iterators.md (sur): Add UNSPEC_SDOT,\r\n> UNSPEC_UDOT.\r\n> > (Vdottype, DOTPROD): New.\r\n> > (sur): Add SDOT and UDOT.\r\n> \r\n> OK if this passes a native bootstrap.\r\n\r\nBoostrapped on aarch64-none-linux-gnu and no issues.\r\n\r\nThanks,\r\nTamar\r\n\r\n> \r\n> R.\r\n> > ________________________________________\r\n> > From: Tamar Christina\r\n> > Sent: Tuesday, September 5, 2017 7:42:40 PM\r\n> > To: James Greenhalgh\r\n> > Cc: gcc-patches@gcc.gnu.org; nd; Richard Earnshaw; Marcus Shawcroft\r\n> > Subject: Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch\r\n> > (5/8)]\r\n> >\r\n> >>\r\n> >> ________________________________________\r\n> >> From: James Greenhalgh \r\n> >> Sent: Monday, September 4, 2017 12:01 PM\r\n> >> To: Tamar Christina\r\n> >> Cc: gcc-patches@gcc.gnu.org; nd; Richard Earnshaw; Marcus Shawcroft\r\n> >> Subject: Re: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch\r\n> >> (5/8)]\r\n> >>\r\n> >> On Fri, Sep 01, 2017 at 02:22:17PM +0100, Tamar Christina wrote:\r\n> >>> Hi All,\r\n> >>>\r\n> >>> This patch adds the instructions for Dot Product to AArch64 along\r\n> >>> with the intrinsics and vectorizer pattern.\r\n> >>>\r\n> >>> Armv8.2-a dot product supports 8-bit element values both signed and\r\n> >>> unsigned.\r\n> >>>\r\n> >>> Dot product is available from Arm8.2-a and onwards.\r\n> >>>\r\n> >>> Regtested and bootstrapped on aarch64-none-elf and no issues.\r\n> >>>\r\n> >>> Ok for trunk?\r\n> >>>\r\n> >>> gcc/\r\n> >>> 2017-09-01 Tamar Christina \r\n> >>>\r\n> >>> * config/aarch64/aarch64-builtins.c\r\n> >>> (aarch64_types_quadopu_lane_qualifiers): New.\r\n> >>> (TYPES_QUADOPU_LANE): New.\r\n> >>> * config/aarch64/aarch64-simd.md (aarch64_dot):\r\n> New.\r\n> >>> (dot_prod, aarch64_dot_lane):\r\n> New.\r\n> >>> (aarch64_dot_laneq): New.\r\n> >>> * config/aarch64/aarch64-simd-builtins.def (sdot, udot): New.\r\n> >>> (sdot_lane, udot_lane, sdot_laneq, udot_laneq): New.\r\n> >>> * config/aarch64/iterators.md (UNSPEC_SDOT, UNSPEC_UDOT):\r\n> New.\r\n> >>> (DOT_MODE, dot_mode, Vdottype, DOTPROD): New.\r\n> >>> (sur): Add SDOT and UDOT.\r\n> >>>\r\n> >>> --\r\n> >>\r\n> >>> diff --git a/gcc/config/aarch64/aarch64-simd.md\r\n> >>> b/gcc/config/aarch64/aarch64-simd.md\r\n> >>> index\r\n> >>>\r\n> f3e084f8778d70c82823b92fa80ff96021ad26db..21d46c84ab317c2d62afdf8c48\r\n> >>> 117886aaf483b0 100644\r\n> >>> --- a/gcc/config/aarch64/aarch64-simd.md\r\n> >>> +++ b/gcc/config/aarch64/aarch64-simd.md\r\n> >>> @@ -386,6 +386,87 @@\r\n> >>> }\r\n> >>> )\r\n> >>>\r\n> >>> +;; These instructions map to the __builtins for the Dot Product\r\n> operations.\r\n> >>> +(define_insn \"aarch64_dot\"\r\n> >>> + [(set (match_operand:VS 0 \"register_operand\" \"=w\")\r\n> >>> + (unspec:VS [(match_operand:VS 1 \"register_operand\" \"0\")\r\n> >>> + (match_operand: 2 \"register_operand\" \"w\")\r\n> >>> + (match_operand: 3 \"register_operand\" \"w\")]\r\n> >>> + DOTPROD))]\r\n> >>> + \"TARGET_DOTPROD\"\r\n> >>> + \"dot\\\\t%0., %2., %3.\"\r\n> >>> + [(set_attr \"type\" \"neon_dot\")]\r\n> >>\r\n> >> Would there be a small benefit in modelling this as:\r\n> >>\r\n> >> [(set (match_operand:VS 0 \"register_operand\" \"=w\")\r\n> >> (add:VS ((match_operand:VS 1 \"register_operand\" \"0\")\r\n> >> (unsepc:VS [(match_operand: 2\r\n> \"register_operand\" \"w\")\r\n> >> (match_operand: 3 \"register_operand\" \"w\")]\r\n> >> DOTPROD)))]\r\n> >>\r\n> >\r\n> > Maybe, I can't think of anything at the moment, but it certainly won't hurt.\r\n> >\r\n> >>\r\n> >>> +)\r\n> >>> +\r\n> >>> +;; These expands map to the Dot Product optab the vectorizer checks\r\n> for.\r\n> >>> +;; The auto-vectorizer expects a dot product builtin that also does\r\n> >>> +an ;; accumulation into the provided register.\r\n> >>> +;; Given the following pattern\r\n> >>> +;;\r\n> >>> +;; for (i=0; i >>> +;; c = a[i] * b[i];\r\n> >>> +;; r += c;\r\n> >>> +;; }\r\n> >>> +;; return result;\r\n> >>> +;;\r\n> >>> +;; This can be auto-vectorized to\r\n> >>> +;; r = a[0]*b[0] + a[1]*b[1] + a[2]*b[2] + a[3]*b[3]; ;; ;; given\r\n> >>> +enough iterations. However the vectorizer can keep unrolling the\r\n> >>> +loop ;; r += a[4]*b[4] + a[5]*b[5] + a[6]*b[6] + a[7]*b[7]; ;; r +=\r\n> >>> +a[8]*b[8] + a[9]*b[9] + a[10]*b[10] + a[11]*b[11]; ;; ...\r\n> >>> +;;\r\n> >>> +;; and so the vectorizer provides r, in which the result has to be\r\n> accumulated.\r\n> >>> +(define_expand \"dot_prod\"\r\n> >>> + [(set (match_operand:VS 0 \"register_operand\")\r\n> >>> + (unspec:VS [(match_operand: 1 \"register_operand\")\r\n> >>> + (match_operand: 2 \"register_operand\")\r\n> >>> + (match_operand:VS 3 \"register_operand\")]\r\n> >>> + DOTPROD))]\r\n> >>\r\n> >> This is just an expand that always ends in a DONE, so doesn't need\r\n> >> the full description here, just:\r\n> >>\r\n> >> [(match_operand:VS 0 \"register_operand)\r\n> >> (match_operand: 1 \"register_operand\")\r\n> >> (match_operand: 2 \"register_operand\")\r\n> >> (match_operand:VS 3 \"register_operand\")]\r\n> >\r\n> > yes but I use the unspec to match the iterator to generate the\r\n> > signed and unsigned versions of the optab.\r\n> >\r\n> >>\r\n> >>> diff --git a/gcc/config/aarch64/iterators.md\r\n> >>> b/gcc/config/aarch64/iterators.md index\r\n> >>>\r\n> cceb57525c7aa44933419bd317b1f03a7b76f4c4..533c12cca916669195e9b09452\r\n> >>> 7ee0de31542b12 100644\r\n> >>> --- a/gcc/config/aarch64/iterators.md\r\n> >>> +++ b/gcc/config/aarch64/iterators.md\r\n> >>> @@ -354,6 +354,8 @@\r\n> >>> UNSPEC_SQRDMLSH ; Used in aarch64-simd.md.\r\n> >>> UNSPEC_FMAXNM ; Used in aarch64-simd.md.\r\n> >>> UNSPEC_FMINNM ; Used in aarch64-simd.md.\r\n> >>> + UNSPEC_SDOT ; Used in aarch64-simd.md.\r\n> >>> + UNSPEC_UDOT ; Used in aarch64-simd.md.\r\n> >>> ])\r\n> >>>\r\n> >>> ;;\r\n> >>> ------------------------------------------------------------------\r\n> >>> @@ -810,6 +812,13 @@\r\n> >>> (define_mode_attr vsi2qi [(V2SI \"v8qi\") (V4SI \"v16qi\")])\r\n> >>> (define_mode_attr VSI2QI [(V2SI \"V8QI\") (V4SI \"V16QI\")])\r\n> >>>\r\n> >>> +;; Mapping attribute for Dot Product input modes based on result\r\n> mode.\r\n> >>> +(define_mode_attr DOT_MODE [(V2SI \"V8QI\") (V4SI \"V16QI\")])\r\n> >>> +(define_mode_attr dot_mode [(V2SI \"v8qi\") (V4SI \"v16qi\")])\r\n> >>\r\n> >> Are these not identical to the two lines above in the context?\r\n> >>\r\n> >>> (define_mode_attr vsi2qi [(V2SI \"v8qi\") (V4SI \"v16qi\")])\r\n> >>> (define_mode_attr VSI2QI [(V2SI \"V8QI\") (V4SI \"V16QI\")])\r\n> >>\r\n> >> Thanks,\r\n> >> James","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-464044-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"y0t7uHkd\"; dkim-atps=neutral","sourceware.org; auth=none","spf=none (sender IP is )\n\tsmtp.mailfrom=Tamar.Christina@arm.com; "],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yCZjp5HqSz9t2V\n\tfor ;\n\tFri, 13 Oct 2017 02:37:46 +1100 (AEDT)","(qmail 40294 invoked by alias); 12 Oct 2017 15:37:38 -0000","(qmail 40229 invoked by uid 89); 12 Oct 2017 15:37:37 -0000","from mail-ve1eur01on0080.outbound.protection.outlook.com (HELO\n\tEUR01-VE1-obe.outbound.protection.outlook.com) (104.47.1.80)\n\tby sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with\n\tESMTP; Thu, 12 Oct 2017 15:37:35 +0000","from DB6PR0802MB2309.eurprd08.prod.outlook.com (10.172.228.13) by\n\tDB6PR0802MB2613.eurprd08.prod.outlook.com (10.172.252.18)\n\twith Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.77.7; Thu, 12 Oct 2017 15:37:30 +0000","from DB6PR0802MB2309.eurprd08.prod.outlook.com\n\t([fe80::78a8:cb36:9798:56f]) by\n\tDB6PR0802MB2309.eurprd08.prod.outlook.com\n\t([fe80::78a8:cb36:9798:56f%17]) with mapi id 15.20.0077.021;\n\tThu, 12 Oct 2017 15:37:30 +0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:from\n\t:to:cc:subject:date:message-id:references:in-reply-to\n\t:content-type:content-transfer-encoding:mime-version; q=dns; s=\n\tdefault; b=aDAPJbDONvBPpyJSUMjg/N7b9Eq/vM22nQY1EILMUrofO+dW/WG27\n\tNvVL2jZMVl00uVXrCpdGKi8No1pKuM5jwM0MLPyJrIH4wXIwBpI4gOpx8I+w6daV\n\tXvpDnlXhgzCv+FI9eBpT9c+/O2V7Hzu7jvsgSAEheIxgIqzv4aN0qA=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:from\n\t:to:cc:subject:date:message-id:references:in-reply-to\n\t:content-type:content-transfer-encoding:mime-version; s=default;\n\tbh=OJcUqvMo8G4Oxl/3+YUjDP88kfc=; b=y0t7uHkducbep4P6dVVSt7nj/Laz\n\tk8EulYfMvr+oVBdp6rv72KbiNfaOeq/C5q0Fu1EzrF/jhnXZyMrlvR6GQt4fkBse\n\tU66iF0NMBjB+0+/d0LWFzgkOnVdPz4wrksvaVVGecGQJrXfrXV0ILL2sjJe12Zh7\n\tkqov8LAbvW36FeU=","Mailing-List":"contact gcc-patches-help@gcc.gnu.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Archive":"","List-Post":"","List-Help":"","Sender":"gcc-patches-owner@gcc.gnu.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-25.0 required=5.0 tests=AWL, BAYES_00,\n\tGIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3,\n\tKAM_ASCII_DIVIDERS, MIME_BASE64_BLANKS, RCVD_IN_DNSWL_NONE,\n\tSPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 spammy=","X-HELO":"EUR01-VE1-obe.outbound.protection.outlook.com","From":"Tamar Christina ","To":"Richard Earnshaw ,\n\tJames Greenhalgh\t","CC":"\"gcc-patches@gcc.gnu.org\" , nd ,\n\tMarcus Shawcroft ","Subject":"RE: [PATCH][GCC][AArch64] Dot Product SIMD patterns [Patch (5/8)]","Date":"Thu, 12 Oct 2017 15:37:30 +0000","Message-ID":"","References":"<20170901132215.GA32134@arm.com> <20170904110110.GB29341@arm.com>\n\t\n\t\n\t<818d397a-33ba-847d-2a65-4f79879c2a45@arm.com>","In-Reply-To":"<818d397a-33ba-847d-2a65-4f79879c2a45@arm.com>","authentication-results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-464044-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"y0t7uHkd\"; dkim-atps=neutral","sourceware.org; auth=none","spf=none (sender IP is )\n\tsmtp.mailfrom=Tamar.Christina@arm.com; "],"x-ms-publictraffictype":"Email","x-microsoft-exchange-diagnostics":"1; DB6PR0802MB2613;\n\t6:fWi7aSCk+sphKaDpqss/szOGhWQPHMwkzFjmBiYIsEHAxgWTycP2RisofwAPNPz2ddwf9yN1jHxQxttladpUil0akkeIwkE3whzzwbwL6jQVrwIHRxXeIS14QcQTRfiFtXo9FD8sqgyCXPfRyDESTkCeiNrYrHO+5HblHKVEN8S0gjqYvajBn2r0IIGur4X4JV4njG8HEOfJ2IxgZvSNBV+3R3oanfw8NOIIjwW3qrwqa0ZXJ6KpelsoBD4pKUql9SqhOfK8+qdGXEc41MZp3is8eruarmFmVJiv+zvUvkEaWDEeiiao/XIdAAflx8svhSqkbNgNQn0sG4xDVmkUBA==;\n\t5:VTJyCfG2BpDh2uH4E2FJMm8opHTgfpjxWLB9SncugBxY8LpRe48dW13abddYcB+5WwMk8x75+LtRhh4FTle/ImeSOFAdjpIN0mdUX4fBWgnSn7sESDYG9/+UnnXAMyklsx6oerqVT0H1Yf6aAOQDNu0spAJ0XMbbdzpoNlUYTYA=;\n\t24:hz8bS8X8kegAX7oa+KEHAJrZjwFpaaJhUZL2WgloDqyqMVApvcWhUIcjezJKUwdLI2c7wKJrTx5KGBnNHToj2bulW9YqO9FBYzKO8YspQWk=;\n\t7:1DzOz2MqtXMJh0HZrSHVcz3uiTWmliprnJh+MYG01YyboW1b+iz83K4I+mymEb5SDy6fLLiqrEG85jkcUlZX9aThMGLZwyPENkQwCrY2ZF7Ge54LfaQaDlbrwnXkjq2l0nP6856WaliFixAYbCtaNbD+MTOZM44SHicGFGcvMfutpMizdyjyxYKjb0uTqDuV9W0S4hbtziTdvo2r2Q7m0cM5edyS+Q17Ji77Drw1svU=","x-ms-exchange-antispam-srfa-diagnostics":"SSOS;SSOR;","x-ms-office365-filtering-correlation-id":"823fba9b-13d3-46dd-d0d5-08d51187268b","x-ms-office365-filtering-ht":"Tenant","x-microsoft-antispam":"UriScan:; BCL:0; PCL:0;\n\tRULEID:(22001)(2017030254152)(48565401081)(2017052603199)(201703131423075)(201703031133081)(201702281549075);\n\tSRVR:DB6PR0802MB2613; ","x-ms-traffictypediagnostic":"DB6PR0802MB2613:","nodisclaimer":"True","x-exchange-antispam-report-test":"UriScan:(180628864354917)(22074186197030)(183786458502308); ","x-microsoft-antispam-prvs":"","x-exchange-antispam-report-cfa-test":"BCL:0; PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(2401047)(8121501046)(5005006)(3002001)(93006095)(93001095)(10201501046)(100000703101)(100105400095)(6055026)(6041248)(20161123560025)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123558100)(20161123555025)(20161123562025)(20161123564025)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:DB6PR0802MB2613; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:DB6PR0802MB2613; ","x-forefront-prvs":"04583CED1A","x-forefront-antispam-report":"SFV:NSPM;\n\tSFS:(10009020)(6009001)(39860400002)(376002)(346002)(53754006)(377454003)(24454002)(189002)(13464003)(377424004)(199003)(14454004)(7696004)(478600001)(2906002)(305945005)(2950100002)(3846002)(8676002)(102836003)(50986999)(6436002)(81156014)(81166006)(54906003)(6506006)(54356999)(76176999)(25786009)(72206003)(229853002)(110136005)(6636002)(4326008)(316002)(6116002)(3280700002)(3660700001)(97736004)(7736002)(105586002)(53936002)(66066001)(106356001)(189998001)(74316002)(6246003)(93886005)(68736007)(8936002)(99286003)(33656002)(5250100002)(5660300001)(575784001)(9686003)(86362001)(53546010)(2900100001)(55016002)(101416001);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:DB6PR0802MB2613;\n\tH:DB6PR0802MB2309.eurprd08.prod.outlook.com; FPR:; SPF:None;\n\tPTR:InfoNoRecords; MX:1; A:1; LANG:en; ","received-spf":"None (protection.outlook.com: arm.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","MIME-Version":"1.0","X-OriginatorOrg":"arm.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"12 Oct 2017 15:37:30.6497\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"f34e5979-57d9-4aaa-ad4d-b122a662184d","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DB6PR0802MB2613","X-IsSubscribed":"yes"}}]