[{"id":1792820,"web_url":"http://patchwork.ozlabs.org/comment/1792820/","msgid":"","list_archive_url":null,"date":"2017-10-23T21:20:46","subject":"Re: [U-Boot] [PATCH 2/2] armv8: sec_firmware: Add support for\n\tloadables in FIT","submitter":{"id":67822,"url":"http://patchwork.ozlabs.org/api/people/67822/","name":"York Sun","email":"york.sun@nxp.com"},"content":"On 09/01/2017 01:25 AM, Sumit Garg wrote:\n> Enable support for loadables in SEC firmware FIT image. Currently support\n> is added for single loadable image.\n> \n> Brief description of implementation:\n> - Add two more address pointers (loadable_h, loadable_l) as arguments to\n> sec_firmware_init() api.\n> - Create new api: sec_firmware_checks_copy_loadable() to check if loadables\n> node is present in SEC firmware FIT image. If present, verify loadable\n> image and copies it to secure DDR memory.\n> - Populate address pointers with secure DDR memory addresses where loadable\n> is copied.\n> \n> Example use-case could be trusted OS (tee.bin) as loadables node in SEC\n> firmware FIT image.\n> \n> Signed-off-by: Sumit Garg \n> ---\n> arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 16 +++++-\n> arch/arm/cpu/armv8/sec_firmware.c | 92 +++++++++++++++++++++++++++++--\n> arch/arm/include/asm/armv8/sec_firmware.h | 4 +-\n> 3 files changed, 104 insertions(+), 8 deletions(-)\n> \n> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c\n> index 35c612d..87a0885 100644\n> --- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c\n> +++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c\n> @@ -35,6 +35,7 @@ int ppa_init(void)\n> \tunsigned int el = current_el();\n> \tvoid *ppa_fit_addr;\n> \tu32 *boot_loc_ptr_l, *boot_loc_ptr_h;\n> +\tu32 *loadable_l, *loadable_h;\n> \tint ret;\n> \n> #ifdef CONFIG_CHAIN_OF_TRUST\n> @@ -252,9 +253,9 @@ int ppa_init(void)\n> \t\t\t\t\t PPA_KEY_HASH,\n> \t\t\t\t\t &ppa_img_addr);\n> \t\tif (ret != 0)\n> -\t\t\tprintf(\"PPA validation failed\\n\");\n> +\t\t\tprintf(\"SEC firmware(s) validation failed\\n\");\n> \t\telse\n> -\t\t\tprintf(\"PPA validation Successful\\n\");\n> +\t\t\tprintf(\"SEC firmware(s) validation Successful\\n\");\n> \t}\n> #if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \\\n> \tdefined(CONFIG_SYS_LS_PPA_FW_IN_NAND)\n> @@ -266,15 +267,24 @@ int ppa_init(void)\n> \tstruct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);\n> \tboot_loc_ptr_l = &gur->bootlocptrl;\n> \tboot_loc_ptr_h = &gur->bootlocptrh;\n> +\n> +\t/* Assign addresses to loadable ptrs */\n> +\tloadable_l = &gur->scratchrw[4];\n> +\tloadable_h = &gur->scratchrw[5];\n> #elif defined(CONFIG_FSL_LSCH2)\n> \tstruct ccsr_scfg __iomem *scfg = (void *)(CONFIG_SYS_FSL_SCFG_ADDR);\n> \tboot_loc_ptr_l = &scfg->scratchrw[1];\n> \tboot_loc_ptr_h = &scfg->scratchrw[0];\n> +\n> +\t/* Assign addresses to loadable ptrs */\n> +\tloadable_l = &scfg->scratchrw[2];\n> +\tloadable_h = &scfg->scratchrw[3];\n> #endif\n> \n> \tdebug(\"fsl-ppa: boot_loc_ptr_l = 0x%p, boot_loc_ptr_h =0x%p\\n\",\n> \t boot_loc_ptr_l, boot_loc_ptr_h);\n> -\tret = sec_firmware_init(ppa_fit_addr, boot_loc_ptr_l, boot_loc_ptr_h);\n> +\tret = sec_firmware_init(ppa_fit_addr, boot_loc_ptr_l, boot_loc_ptr_h,\n> +\t\t\t\tloadable_l, loadable_h);\n> \n> #if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \\\n> \tdefined(CONFIG_SYS_LS_PPA_FW_IN_NAND)\n> diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c\n> index 0e74834..927eae4 100644\n> --- a/arch/arm/cpu/armv8/sec_firmware.c\n> +++ b/arch/arm/cpu/armv8/sec_firmware.c\n> @@ -105,6 +105,74 @@ static int sec_firmware_parse_image(const void *sec_firmware_img,\n> \treturn 0;\n> }\n> \n> +/*\n> + * SEC Firmware FIT image parser to check if any loadable is\n> + * present. If present, verify integrity of the loadable and\n> + * copy loadable to address provided in (loadable_h, loadable_l).\n> + *\n> + * Returns 0 on success and a negative errno on error task fail.\n> + */\n> +static int sec_firmware_check_copy_loadable(const void *sec_firmware_img,\n> +\t\t\t\t\t u32 *loadable_l, u32 *loadable_h)\n> +{\n> +\tphys_addr_t sec_firmware_loadable_addr = 0;\n> +\tint conf_node_off, ld_node_off;\n> +\tchar *conf_node_name = NULL;\n> +\tconst void *data;\n> +\tsize_t size;\n> +\tulong load;\n> +\n> +\tconf_node_name = SEC_FIRMEWARE_FIT_CNF_NAME;\n> +\n> +\tconf_node_off = fit_conf_get_node(sec_firmware_img, conf_node_name);\n> +\tif (conf_node_off < 0) {\n> +\t\tprintf(\"SEC Firmware: %s: no such config\\n\", conf_node_name);\n> +\treturn -ENOENT;\n> +\t}\n> +\n> +\tld_node_off = fit_conf_get_prop_node(sec_firmware_img, conf_node_off,\n> +\t\t\t\t\t FIT_LOADABLE_PROP);\n> +\tif (ld_node_off >= 0) {\n> +\t\tprintf(\"SEC Firmware: '%s' present in config\\n\",\n> +\t\t FIT_LOADABLE_PROP);\n> +\n> +\t\t/* Verify secure firmware image */\n> +\t\tif (!(fit_image_verify(sec_firmware_img, ld_node_off))) {\n> +\t\t\tprintf(\"SEC Loadable: Bad loadable image (bad CRC)\\n\");\n> +\t\t\treturn -EINVAL;\n> +\t\t}\n> +\n> +\t\tif (fit_image_get_data(sec_firmware_img, ld_node_off,\n> +\t\t\t\t &data, &size)) {\n> +\t\t\tprintf(\"SEC Loadable: Can't get subimage data/size\");\n> +\t\t\treturn -ENOENT;\n> +\t\t}\n> +\n> +\t\t/* Get load address, treated as load offset to secure memory */\n> +\t\tif (fit_image_get_load(sec_firmware_img, ld_node_off, &load)) {\n> +\t\t\tprintf(\"SEC Loadable: Can't get subimage load\");\n> +\t\t\treturn -ENOENT;\n> +\t\t}\n> +\n> +\t\t/* Compute load address for loadable in secure memory */\n> +\t\tsec_firmware_loadable_addr = (sec_firmware_addr -\n> +\t\t\t\t\t\tgd->arch.tlb_size) + load;\n> +\n> +\t\t/* Copy loadable to secure memory and flush dcache */\n> +\t\tdebug(\"%s copied to address 0x%p\\n\",\n> +\t\t FIT_LOADABLE_PROP, (void *)sec_firmware_loadable_addr);\n> +\t\tmemcpy((void *)sec_firmware_loadable_addr, data, size);\n> +\t\tflush_dcache_range(sec_firmware_loadable_addr,\n> +\t\t\t\t sec_firmware_loadable_addr + size);\n> +\t}\n> +\n> +\t/* Populate address ptrs for loadable image with loadbale addr */\n> +\tout_le32(loadable_l, (sec_firmware_loadable_addr & WORD_MASK));\n> +\tout_le32(loadable_h, (sec_firmware_loadable_addr >> WORD_SHIFT));\n> +\n> +\treturn 0;\n> +}\n> +\n> static int sec_firmware_copy_image(const char *title,\n> \t\t\t u64 image_addr, u32 image_size, u64 sec_firmware)\n> {\n> @@ -117,9 +185,11 @@ static int sec_firmware_copy_image(const char *title,\n> \n> /*\n> * This function will parse the SEC Firmware image, and then load it\n> - * to secure memory.\n> + * to secure memory. Also load any loadable if present along with SEC\n> + * Firmware image.\n> */\n> -static int sec_firmware_load_image(const void *sec_firmware_img)\n> +static int sec_firmware_load_image(const void *sec_firmware_img,\n> +\t\t\t\t u32 *loadable_l, u32 *loadable_h)\n> {\n> \tconst void *raw_image_addr;\n> \tsize_t raw_image_size = 0;\n> @@ -172,6 +242,15 @@ static int sec_firmware_load_image(const void *sec_firmware_img)\n> \tif (ret)\n> \t\tgoto out;\n> \n> +\t/*\n> +\t * Check if any loadable are present along with firmware image, if\n> +\t * present load them.\n> +\t */\n> +\tret = sec_firmware_check_copy_loadable(sec_firmware_img, loadable_l,\n> +\t\t\t\t\t loadable_h);\n> +\tif (ret)\n> +\t\tgoto out;\n> +\n> \tsec_firmware_addr |= SEC_FIRMWARE_LOADED;\n> \tdebug(\"SEC Firmware: Entry point: 0x%llx\\n\",\n> \t sec_firmware_addr & SEC_FIRMWARE_ADDR_MASK);\n> @@ -289,17 +368,22 @@ int sec_firmware_get_random(uint8_t *rand, int bytes)\n> * @sec_firmware_img:\tthe SEC Firmware image address\n> * @eret_hold_l:\tthe address to hold exception return address low\n> * @eret_hold_h:\tthe address to hold exception return address high\n> + * @loadable_l:\t\tthe address to hold loadable address low\n> + * @loadable_h:\t\tthe address to hold loadable address high\n> */\n> int sec_firmware_init(const void *sec_firmware_img,\n> \t\t\tu32 *eret_hold_l,\n> -\t\t\tu32 *eret_hold_h)\n> +\t\t\tu32 *eret_hold_h,\n> +\t\t\tu32 *loadable_l,\n> +\t\t\tu32 *loadable_h)\n> {\n> \tint ret;\n> \n> \tif (!sec_firmware_is_valid(sec_firmware_img))\n> \t\treturn -EINVAL;\n> \n> -\tret = sec_firmware_load_image(sec_firmware_img);\n> +\tret = sec_firmware_load_image(sec_firmware_img, loadable_l,\n> +\t\t\t\t loadable_h);\n> \tif (ret) {\n> \t\tprintf(\"SEC Firmware: Failed to load image\\n\");\n> \t\treturn ret;\n> diff --git a/arch/arm/include/asm/armv8/sec_firmware.h b/arch/arm/include/asm/armv8/sec_firmware.h\n> index 6d42a71..2ba1847 100644\n> --- a/arch/arm/include/asm/armv8/sec_firmware.h\n> +++ b/arch/arm/include/asm/armv8/sec_firmware.h\n> @@ -9,8 +9,10 @@\n> \n> #define PSCI_INVALID_VER\t\t0xffffffff\n> #define SEC_JR3_OFFSET\t\t\t0x40000\n> +#define WORD_MASK\t\t\t0xffffffff\n> +#define WORD_SHIFT\t\t\t32\n> \n> -int sec_firmware_init(const void *, u32 *, u32 *);\n> +int sec_firmware_init(const void *, u32 *, u32 *, u32 *, u32 *);\n> int _sec_firmware_entry(const void *, u32 *, u32 *);\n> bool sec_firmware_is_valid(const void *);\n> bool sec_firmware_support_hwrng(void);\n> \n\nSumit,\n\nIf I understand you correctly, you are parsing the secure firmware FIT\nimage to find the loadable node and store the 64-bit load address in the\nscratch registers. How do you determine which scratch registers to use?\n\nYork","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"mDsoklna\";\n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=york.sun@nxp.com; "],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3yLTph6q48z9sNw\n\tfor ;\n\tTue, 24 Oct 2017 08:21:00 +1100 (AEDT)","by lists.denx.de (Postfix, from userid 105)\n\tid A243FC21D93; Mon, 23 Oct 2017 21:20:56 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id EF951C21D19;\n\tMon, 23 Oct 2017 21:20:51 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid C8024C21D19; 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Hou\" , \n\tPankaj Gupta , Arun Pathak ,\n\tRuchika Gupta ","Subject":"Re: [U-Boot] [PATCH 2/2] armv8: sec_firmware: Add support for\n\tloadables in FIT","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Reply-To":"York Sun ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1792964,"web_url":"http://patchwork.ozlabs.org/comment/1792964/","msgid":"","list_archive_url":null,"date":"2017-10-24T04:21:02","subject":"Re: [U-Boot] [PATCH 2/2] armv8: sec_firmware: Add support for\n\tloadables in FIT","submitter":{"id":68653,"url":"http://patchwork.ozlabs.org/api/people/68653/","name":"Sumit Garg","email":"sumit.garg@nxp.com"},"content":"> -----Original Message-----\n> From: York Sun\n> Sent: Tuesday, October 24, 2017 2:51 AM\n> To: Sumit Garg ; u-boot@lists.denx.de\n> Cc: Ruchika Gupta ; Prabhakar Kushwaha\n> ; Z.q. Hou ; Pankaj\n> Gupta ; Arun Pathak ; Sahil\n> Malhotra \n> Subject: Re: [PATCH 2/2] armv8: sec_firmware: Add support for loadables in FIT\n> \n> On 09/01/2017 01:25 AM, Sumit Garg wrote:\n> > Enable support for loadables in SEC firmware FIT image. Currently\n> > support is added for single loadable image.\n> >\n> > Brief description of implementation:\n> > - Add two more address pointers (loadable_h, loadable_l) as arguments to\n> > sec_firmware_init() api.\n> > - Create new api: sec_firmware_checks_copy_loadable() to check if\n> loadables\n> > node is present in SEC firmware FIT image. If present, verify loadable\n> > image and copies it to secure DDR memory.\n> > - Populate address pointers with secure DDR memory addresses where\n> loadable\n> > is copied.\n> >\n> > Example use-case could be trusted OS (tee.bin) as loadables node in\n> > SEC firmware FIT image.\n> >\n> > Signed-off-by: Sumit Garg \n> > ---\n> > arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 16 +++++-\n> > arch/arm/cpu/armv8/sec_firmware.c | 92\n> +++++++++++++++++++++++++++++--\n> > arch/arm/include/asm/armv8/sec_firmware.h | 4 +-\n> > 3 files changed, 104 insertions(+), 8 deletions(-)\n> >\n> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c\n> > b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c\n> > index 35c612d..87a0885 100644\n> > --- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c\n> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c\n> > @@ -35,6 +35,7 @@ int ppa_init(void)\n> > \tunsigned int el = current_el();\n> > \tvoid *ppa_fit_addr;\n> > \tu32 *boot_loc_ptr_l, *boot_loc_ptr_h;\n> > +\tu32 *loadable_l, *loadable_h;\n> > \tint ret;\n> >\n> > #ifdef CONFIG_CHAIN_OF_TRUST\n> > @@ -252,9 +253,9 @@ int ppa_init(void)\n> > \t\t\t\t\t PPA_KEY_HASH,\n> > \t\t\t\t\t &ppa_img_addr);\n> > \t\tif (ret != 0)\n> > -\t\t\tprintf(\"PPA validation failed\\n\");\n> > +\t\t\tprintf(\"SEC firmware(s) validation failed\\n\");\n> > \t\telse\n> > -\t\t\tprintf(\"PPA validation Successful\\n\");\n> > +\t\t\tprintf(\"SEC firmware(s) validation Successful\\n\");\n> > \t}\n> > #if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \\\n> > \tdefined(CONFIG_SYS_LS_PPA_FW_IN_NAND)\n> > @@ -266,15 +267,24 @@ int ppa_init(void)\n> > \tstruct ccsr_gur __iomem *gur = (void\n> *)(CONFIG_SYS_FSL_GUTS_ADDR);\n> > \tboot_loc_ptr_l = &gur->bootlocptrl;\n> > \tboot_loc_ptr_h = &gur->bootlocptrh;\n> > +\n> > +\t/* Assign addresses to loadable ptrs */\n> > +\tloadable_l = &gur->scratchrw[4];\n> > +\tloadable_h = &gur->scratchrw[5];\n> > #elif defined(CONFIG_FSL_LSCH2)\n> > \tstruct ccsr_scfg __iomem *scfg = (void\n> *)(CONFIG_SYS_FSL_SCFG_ADDR);\n> > \tboot_loc_ptr_l = &scfg->scratchrw[1];\n> > \tboot_loc_ptr_h = &scfg->scratchrw[0];\n> > +\n> > +\t/* Assign addresses to loadable ptrs */\n> > +\tloadable_l = &scfg->scratchrw[2];\n> > +\tloadable_h = &scfg->scratchrw[3];\n> > #endif\n> >\n> > \tdebug(\"fsl-ppa: boot_loc_ptr_l = 0x%p, boot_loc_ptr_h =0x%p\\n\",\n> > \t boot_loc_ptr_l, boot_loc_ptr_h);\n> > -\tret = sec_firmware_init(ppa_fit_addr, boot_loc_ptr_l,\n> boot_loc_ptr_h);\n> > +\tret = sec_firmware_init(ppa_fit_addr, boot_loc_ptr_l, boot_loc_ptr_h,\n> > +\t\t\t\tloadable_l, loadable_h);\n> >\n> > #if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \\\n> > \tdefined(CONFIG_SYS_LS_PPA_FW_IN_NAND)\n> > diff --git a/arch/arm/cpu/armv8/sec_firmware.c\n> > b/arch/arm/cpu/armv8/sec_firmware.c\n> > index 0e74834..927eae4 100644\n> > --- a/arch/arm/cpu/armv8/sec_firmware.c\n> > +++ b/arch/arm/cpu/armv8/sec_firmware.c\n> > @@ -105,6 +105,74 @@ static int sec_firmware_parse_image(const void\n> *sec_firmware_img,\n> > \treturn 0;\n> > }\n> >\n> > +/*\n> > + * SEC Firmware FIT image parser to check if any loadable is\n> > + * present. If present, verify integrity of the loadable and\n> > + * copy loadable to address provided in (loadable_h, loadable_l).\n> > + *\n> > + * Returns 0 on success and a negative errno on error task fail.\n> > + */\n> > +static int sec_firmware_check_copy_loadable(const void\n> *sec_firmware_img,\n> > +\t\t\t\t\t u32 *loadable_l, u32 *loadable_h) {\n> > +\tphys_addr_t sec_firmware_loadable_addr = 0;\n> > +\tint conf_node_off, ld_node_off;\n> > +\tchar *conf_node_name = NULL;\n> > +\tconst void *data;\n> > +\tsize_t size;\n> > +\tulong load;\n> > +\n> > +\tconf_node_name = SEC_FIRMEWARE_FIT_CNF_NAME;\n> > +\n> > +\tconf_node_off = fit_conf_get_node(sec_firmware_img,\n> conf_node_name);\n> > +\tif (conf_node_off < 0) {\n> > +\t\tprintf(\"SEC Firmware: %s: no such config\\n\",\n> conf_node_name);\n> > +\treturn -ENOENT;\n> > +\t}\n> > +\n> > +\tld_node_off = fit_conf_get_prop_node(sec_firmware_img,\n> conf_node_off,\n> > +\t\t\t\t\t FIT_LOADABLE_PROP);\n> > +\tif (ld_node_off >= 0) {\n> > +\t\tprintf(\"SEC Firmware: '%s' present in config\\n\",\n> > +\t\t FIT_LOADABLE_PROP);\n> > +\n> > +\t\t/* Verify secure firmware image */\n> > +\t\tif (!(fit_image_verify(sec_firmware_img, ld_node_off))) {\n> > +\t\t\tprintf(\"SEC Loadable: Bad loadable image (bad\n> CRC)\\n\");\n> > +\t\t\treturn -EINVAL;\n> > +\t\t}\n> > +\n> > +\t\tif (fit_image_get_data(sec_firmware_img, ld_node_off,\n> > +\t\t\t\t &data, &size)) {\n> > +\t\t\tprintf(\"SEC Loadable: Can't get subimage data/size\");\n> > +\t\t\treturn -ENOENT;\n> > +\t\t}\n> > +\n> > +\t\t/* Get load address, treated as load offset to secure memory\n> */\n> > +\t\tif (fit_image_get_load(sec_firmware_img, ld_node_off,\n> &load)) {\n> > +\t\t\tprintf(\"SEC Loadable: Can't get subimage load\");\n> > +\t\t\treturn -ENOENT;\n> > +\t\t}\n> > +\n> > +\t\t/* Compute load address for loadable in secure memory */\n> > +\t\tsec_firmware_loadable_addr = (sec_firmware_addr -\n> > +\t\t\t\t\t\tgd->arch.tlb_size) + load;\n> > +\n> > +\t\t/* Copy loadable to secure memory and flush dcache */\n> > +\t\tdebug(\"%s copied to address 0x%p\\n\",\n> > +\t\t FIT_LOADABLE_PROP, (void\n> *)sec_firmware_loadable_addr);\n> > +\t\tmemcpy((void *)sec_firmware_loadable_addr, data, size);\n> > +\t\tflush_dcache_range(sec_firmware_loadable_addr,\n> > +\t\t\t\t sec_firmware_loadable_addr + size);\n> > +\t}\n> > +\n> > +\t/* Populate address ptrs for loadable image with loadbale addr */\n> > +\tout_le32(loadable_l, (sec_firmware_loadable_addr & WORD_MASK));\n> > +\tout_le32(loadable_h, (sec_firmware_loadable_addr >>\n> WORD_SHIFT));\n> > +\n> > +\treturn 0;\n> > +}\n> > +\n> > static int sec_firmware_copy_image(const char *title,\n> > \t\t\t u64 image_addr, u32 image_size, u64 sec_firmware) {\n> @@ -117,9\n> > +185,11 @@ static int sec_firmware_copy_image(const char *title,\n> >\n> > /*\n> > * This function will parse the SEC Firmware image, and then load it\n> > - * to secure memory.\n> > + * to secure memory. Also load any loadable if present along with SEC\n> > + * Firmware image.\n> > */\n> > -static int sec_firmware_load_image(const void *sec_firmware_img)\n> > +static int sec_firmware_load_image(const void *sec_firmware_img,\n> > +\t\t\t\t u32 *loadable_l, u32 *loadable_h)\n> > {\n> > \tconst void *raw_image_addr;\n> > \tsize_t raw_image_size = 0;\n> > @@ -172,6 +242,15 @@ static int sec_firmware_load_image(const void\n> *sec_firmware_img)\n> > \tif (ret)\n> > \t\tgoto out;\n> >\n> > +\t/*\n> > +\t * Check if any loadable are present along with firmware image, if\n> > +\t * present load them.\n> > +\t */\n> > +\tret = sec_firmware_check_copy_loadable(sec_firmware_img,\n> loadable_l,\n> > +\t\t\t\t\t loadable_h);\n> > +\tif (ret)\n> > +\t\tgoto out;\n> > +\n> > \tsec_firmware_addr |= SEC_FIRMWARE_LOADED;\n> > \tdebug(\"SEC Firmware: Entry point: 0x%llx\\n\",\n> > \t sec_firmware_addr & SEC_FIRMWARE_ADDR_MASK); @@ -289,17\n> > +368,22 @@ int sec_firmware_get_random(uint8_t *rand, int bytes)\n> > * @sec_firmware_img:\tthe SEC Firmware image address\n> > * @eret_hold_l:\tthe address to hold exception return address low\n> > * @eret_hold_h:\tthe address to hold exception return address high\n> > + * @loadable_l:\t\tthe address to hold loadable address low\n> > + * @loadable_h:\t\tthe address to hold loadable address high\n> > */\n> > int sec_firmware_init(const void *sec_firmware_img,\n> > \t\t\tu32 *eret_hold_l,\n> > -\t\t\tu32 *eret_hold_h)\n> > +\t\t\tu32 *eret_hold_h,\n> > +\t\t\tu32 *loadable_l,\n> > +\t\t\tu32 *loadable_h)\n> > {\n> > \tint ret;\n> >\n> > \tif (!sec_firmware_is_valid(sec_firmware_img))\n> > \t\treturn -EINVAL;\n> >\n> > -\tret = sec_firmware_load_image(sec_firmware_img);\n> > +\tret = sec_firmware_load_image(sec_firmware_img, loadable_l,\n> > +\t\t\t\t loadable_h);\n> > \tif (ret) {\n> > \t\tprintf(\"SEC Firmware: Failed to load image\\n\");\n> > \t\treturn ret;\n> > diff --git a/arch/arm/include/asm/armv8/sec_firmware.h\n> > b/arch/arm/include/asm/armv8/sec_firmware.h\n> > index 6d42a71..2ba1847 100644\n> > --- a/arch/arm/include/asm/armv8/sec_firmware.h\n> > +++ b/arch/arm/include/asm/armv8/sec_firmware.h\n> > @@ -9,8 +9,10 @@\n> >\n> > #define PSCI_INVALID_VER\t\t0xffffffff\n> > #define SEC_JR3_OFFSET\t\t\t0x40000\n> > +#define WORD_MASK\t\t\t0xffffffff\n> > +#define WORD_SHIFT\t\t\t32\n> >\n> > -int sec_firmware_init(const void *, u32 *, u32 *);\n> > +int sec_firmware_init(const void *, u32 *, u32 *, u32 *, u32 *);\n> > int _sec_firmware_entry(const void *, u32 *, u32 *); bool\n> > sec_firmware_is_valid(const void *); bool\n> > sec_firmware_support_hwrng(void);\n> >\n> \n> Sumit,\n> \n> If I understand you correctly, you are parsing the secure firmware FIT image to\n> find the loadable node and store the 64-bit load address in the scratch\n> registers. How do you determine which scratch registers to use?\n> \n> York\n\nYes your understanding is correct. The scratch registers which I used are as follows:\n\nFor Chassis gen 3 platforms:\n\t/* Assign addresses to loadable ptrs */\n\tloadable_l = &gur->scratchrw[4];\n\tloadable_h = &gur->scratchrw[5];\n\nFor Chassis gen 2 platforms:\n\t/* Assign addresses to loadable ptrs */\n\tloadable_l = &scfg->scratchrw[2];\n\tloadable_h = &scfg->scratchrw[3];\n\nI choose above scratch registers to avoid any conflict with usage of scratch registers\nin Boot-ROM, u-boot and PPA.\n\nSumit","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"Iupol8cs\";\n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=sumit.garg@nxp.com; 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Hou\" , \n\tPankaj Gupta , Arun Pathak ,\n\tRuchika Gupta ","Subject":"Re: [U-Boot] [PATCH 2/2] armv8: sec_firmware: Add support for\n\tloadables in FIT","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1793186,"web_url":"http://patchwork.ozlabs.org/comment/1793186/","msgid":"","list_archive_url":null,"date":"2017-10-24T14:29:51","subject":"Re: [U-Boot] [PATCH 2/2] armv8: sec_firmware: Add support for\n\tloadables in FIT","submitter":{"id":67822,"url":"http://patchwork.ozlabs.org/api/people/67822/","name":"York Sun","email":"york.sun@nxp.com"},"content":"On 10/23/2017 09:21 PM, Sumit Garg wrote:\n\n>>\n>> Sumit,\n>>\n>> If I understand you correctly, you are parsing the secure firmware FIT image to\n>> find the loadable node and store the 64-bit load address in the scratch\n>> registers. How do you determine which scratch registers to use?\n>>\n>> York\n> \n> Yes your understanding is correct. The scratch registers which I used are as follows:\n> \n> For Chassis gen 3 platforms:\n> \t/* Assign addresses to loadable ptrs */\n> \tloadable_l = &gur->scratchrw[4];\n> \tloadable_h = &gur->scratchrw[5];\n> \n> For Chassis gen 2 platforms:\n> \t/* Assign addresses to loadable ptrs */\n> \tloadable_l = &scfg->scratchrw[2];\n> \tloadable_h = &scfg->scratchrw[3];\n> \n> I choose above scratch registers to avoid any conflict with usage of scratch registers\n> in Boot-ROM, u-boot and PPA.\n\nI see you write to these scratch registers but never read from them.\nWhat's the purpose to store the address in them?\n\nYork","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"KZJpXzIj\";\n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=york.sun@nxp.com; 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a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=rRz93DCIFYabiA6cxWCNrYdFfAx3/zynw19jsfU8HPs=;\n\tb=KZJpXzIjmSUjl7T6T9tKoSBw36cMaBKmbX6JY4TWEBlTmR9MH1IUWmuAh0a6drUG/CnETUvpjiEsYNzyehwKUrD2LQ/kFFVBiaodlzRhhe+5gboiZGBQlfBM1waieNrRN/YzFTs1Ihf5/EJpjU45TGz716TByYThvcw3vv9S2b0=","From":"York Sun ","To":"Sumit Garg , \"u-boot@lists.denx.de\"\n\t","Thread-Topic":"[PATCH 2/2] armv8: sec_firmware: Add support for loadables in\n\tFIT","Thread-Index":"AQHTIvvOMspI/1gXeUyY6InPiXTrcA==","Date":"Tue, 24 Oct 2017 14:29:51 +0000","Message-ID":"","References":"<1504254301-7970-1-git-send-email-sumit.garg@nxp.com>\n\t<1504254301-7970-2-git-send-email-sumit.garg@nxp.com>\n\t\n\t","Accept-Language":"en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"KZJpXzIj\";\n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=york.sun@nxp.com; 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Hou\" , \n\tPankaj Gupta , Arun Pathak ,\n\tRuchika Gupta ","Subject":"Re: [U-Boot] [PATCH 2/2] armv8: sec_firmware: Add support for\n\tloadables in FIT","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Reply-To":"York Sun ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1793554,"web_url":"http://patchwork.ozlabs.org/comment/1793554/","msgid":"","list_archive_url":null,"date":"2017-10-25T04:00:28","subject":"Re: [U-Boot] [PATCH 2/2] armv8: sec_firmware: Add support for\n\tloadables in FIT","submitter":{"id":68653,"url":"http://patchwork.ozlabs.org/api/people/68653/","name":"Sumit Garg","email":"sumit.garg@nxp.com"},"content":"> -----Original Message-----\n> From: York Sun\n> Sent: Tuesday, October 24, 2017 8:00 PM\n> To: Sumit Garg ; u-boot@lists.denx.de\n> Cc: Ruchika Gupta ; Prabhakar Kushwaha\n> ; Z.q. Hou ; Pankaj\n> Gupta ; Arun Pathak ; Sahil\n> Malhotra \n> Subject: Re: [PATCH 2/2] armv8: sec_firmware: Add support for loadables in FIT\n> \n> On 10/23/2017 09:21 PM, Sumit Garg wrote:\n> \n> >>\n> >> Sumit,\n> >>\n> >> If I understand you correctly, you are parsing the secure firmware\n> >> FIT image to find the loadable node and store the 64-bit load address\n> >> in the scratch registers. How do you determine which scratch registers to\n> use?\n> >>\n> >> York\n> >\n> > Yes your understanding is correct. The scratch registers which I used are as\n> follows:\n> >\n> > For Chassis gen 3 platforms:\n> > \t/* Assign addresses to loadable ptrs */\n> > \tloadable_l = &gur->scratchrw[4];\n> > \tloadable_h = &gur->scratchrw[5];\n> >\n> > For Chassis gen 2 platforms:\n> > \t/* Assign addresses to loadable ptrs */\n> > \tloadable_l = &scfg->scratchrw[2];\n> > \tloadable_h = &scfg->scratchrw[3];\n> >\n> > I choose above scratch registers to avoid any conflict with usage of\n> > scratch registers in Boot-ROM, u-boot and PPA.\n> \n> I see you write to these scratch registers but never read from them.\n> What's the purpose to store the address in them?\n> \n> York\n \nThese scratch registers are used to communicate loadable address to PPA similar\nto how return address is communicated in boot-location pointer registers to PPA.\n\nPPA uses this loadable address (Trusted OS address) to initialize Trusted OS.\n\nSumit","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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Hou\" , \n\tPankaj Gupta , Arun Pathak ,\n\tRuchika Gupta ","Subject":"Re: [U-Boot] [PATCH 2/2] armv8: sec_firmware: Add support for\n\tloadables in FIT","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1793836,"web_url":"http://patchwork.ozlabs.org/comment/1793836/","msgid":"","list_archive_url":null,"date":"2017-10-25T16:17:58","subject":"Re: [U-Boot] [PATCH 2/2] armv8: sec_firmware: Add support for\n\tloadables in FIT","submitter":{"id":67822,"url":"http://patchwork.ozlabs.org/api/people/67822/","name":"York Sun","email":"york.sun@nxp.com"},"content":"On 10/24/2017 09:00 PM, Sumit Garg wrote:\n>> -----Original Message-----\n>> From: York Sun\n>> Sent: Tuesday, October 24, 2017 8:00 PM\n>> To: Sumit Garg ; u-boot@lists.denx.de\n>> Cc: Ruchika Gupta ; Prabhakar Kushwaha\n>> ; Z.q. Hou ; Pankaj\n>> Gupta ; Arun Pathak ; Sahil\n>> Malhotra \n>> Subject: Re: [PATCH 2/2] armv8: sec_firmware: Add support for loadables in FIT\n>>\n>> On 10/23/2017 09:21 PM, Sumit Garg wrote:\n>> \n>>>>\n>>>> Sumit,\n>>>>\n>>>> If I understand you correctly, you are parsing the secure firmware\n>>>> FIT image to find the loadable node and store the 64-bit load address\n>>>> in the scratch registers. How do you determine which scratch registers to\n>> use?\n>>>>\n>>>> York\n>>>\n>>> Yes your understanding is correct. The scratch registers which I used are as\n>> follows:\n>>>\n>>> For Chassis gen 3 platforms:\n>>> \t/* Assign addresses to loadable ptrs */\n>>> \tloadable_l = &gur->scratchrw[4];\n>>> \tloadable_h = &gur->scratchrw[5];\n>>>\n>>> For Chassis gen 2 platforms:\n>>> \t/* Assign addresses to loadable ptrs */\n>>> \tloadable_l = &scfg->scratchrw[2];\n>>> \tloadable_h = &scfg->scratchrw[3];\n>>>\n>>> I choose above scratch registers to avoid any conflict with usage of\n>>> scratch registers in Boot-ROM, u-boot and PPA.\n>>\n>> I see you write to these scratch registers but never read from them.\n>> What's the purpose to store the address in them?\n>>\n>> York\n> \n> These scratch registers are used to communicate loadable address to PPA similar\n> to how return address is communicated in boot-location pointer registers to PPA.\n> \n> PPA uses this loadable address (Trusted OS address) to initialize Trusted OS.\n\nOK. So these registers are actually consumed by PPA image. That makes\nmore sense.\n\nYork","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"Iy3mGdg9\";\n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=york.sun@nxp.com; "],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3yMb0Q2S18z9t3k\n\tfor ;\n\tThu, 26 Oct 2017 03:18:12 +1100 (AEDT)","by lists.denx.de (Postfix, from userid 105)\n\tid 69EE5C21DE9; Wed, 25 Oct 2017 16:18:06 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 1334EC21D75;\n\tWed, 25 Oct 2017 16:18:04 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid C371BC21D75; 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Hou\" , \n\tPankaj Gupta , Arun Pathak ,\n\tRuchika Gupta ","Subject":"Re: [U-Boot] [PATCH 2/2] armv8: sec_firmware: Add support for\n\tloadables in FIT","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Reply-To":"York Sun ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1796167,"web_url":"http://patchwork.ozlabs.org/comment/1796167/","msgid":"","list_archive_url":null,"date":"2017-10-30T18:37:25","subject":"Re: [U-Boot] [PATCH 2/2] armv8: sec_firmware: Add support for\n\tloadables in FIT","submitter":{"id":67822,"url":"http://patchwork.ozlabs.org/api/people/67822/","name":"York Sun","email":"york.sun@nxp.com"},"content":"On 09/01/2017 01:25 AM, Sumit Garg wrote:\n> Enable support for loadables in SEC firmware FIT image. Currently support\n> is added for single loadable image.\n> \n> Brief description of implementation:\n> - Add two more address pointers (loadable_h, loadable_l) as arguments to\n> sec_firmware_init() api.\n> - Create new api: sec_firmware_checks_copy_loadable() to check if loadables\n> node is present in SEC firmware FIT image. If present, verify loadable\n> image and copies it to secure DDR memory.\n> - Populate address pointers with secure DDR memory addresses where loadable\n> is copied.\n> \n> Example use-case could be trusted OS (tee.bin) as loadables node in SEC\n> firmware FIT image.\n> \n> Signed-off-by: Sumit Garg \n> ---\n\nReformatted commit message get rid of the bulletin style.\nApplied to fsl-qoriq master. Thanks.\n\nYork","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"mCECFafY\";\n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=york.sun@nxp.com; "],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3yQjrv524cz9t5Y\n\tfor ;\n\tTue, 31 Oct 2017 05:37:35 +1100 (AEDT)","by lists.denx.de (Postfix, from userid 105)\n\tid 08BA6C21D5B; Mon, 30 Oct 2017 18:37:31 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 9D486C21C93;\n\tMon, 30 Oct 2017 18:37:30 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid BBB08C21C4F; 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Hou\" , \n\tPankaj Gupta , Arun Pathak ,\n\tRuchika Gupta ","Subject":"Re: [U-Boot] [PATCH 2/2] armv8: sec_firmware: Add support for\n\tloadables in FIT","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Reply-To":"York Sun ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}}]