[{"id":1768577,"web_url":"http://patchwork.ozlabs.org/comment/1768577/","msgid":"<878thha0si.fsf@linaro.org>","list_archive_url":null,"date":"2017-09-14T13:05:01","subject":"Re: [PATCH v2 21/28] arm64/sve: Add sysctl to set the default vector\n\tlength for new processes","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"content":"Dave Martin <Dave.Martin@arm.com> writes:\n\n> Because of the effect of SVE on the size of the signal frame, the\n> default vector length used for new processes involves a tradeoff\n> between performance of SVE-enabled software on the one hand, and\n> reliability of non-SVE-aware software on the other hand.\n>\n> For this reason, the best choice depends on the repertoire of\n> userspace software in use and is thus best left up to distro\n> maintainers, sysadmins and developers.\n>\n> If CONFIG_SYSCTL is enabled, this patch exposes the default vector\n> length in /proc/sys/abi/sve_default_vector_length, where boot\n> scripts or the adventurous can poke it.\n>\n> In common with other arm64 ABI sysctls, this control is currently\n> global: setting it requires CAP_SYS_ADMIN in the root user\n> namespace, but the value set is effective for subsequent execs in\n> all namespaces.  The control only affects _new_ processes, however:\n> changing it does not affect the vector length of any existing\n> process.\n>\n> The intended usage model is that if userspace is known to be fully\n> SVE-tolerant (or a developer is curious to find out) then init\n> scripts can crank this up during startup.\n>\n> Signed-off-by: Dave Martin <Dave.Martin@arm.com>\n> Cc: Alex Bennée <alex.bennee@linaro.org>\n\nReviewed-by: Alex Bennée <alex.bennee@linaro.org>\n\n>\n> ---\n>\n> Changes since v1\n> ----------------\n>\n> Changes requested by Alex Bennée:\n>\n> * Thin out BUG_ON()s:\n> Redundant BUG_ON()s and ones that just check invariants are removed.\n> Important sanity-checks are migrated to WARN_ON()s, with some\n> minimal best-effort patch-up code.\n> ---\n>  arch/arm64/kernel/fpsimd.c | 62 +++++++++++++++++++++++++++++++++++++++++++++-\n>  1 file changed, 61 insertions(+), 1 deletion(-)\n>\n> diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c\n> index 42e8331..b430ee0 100644\n> --- a/arch/arm64/kernel/fpsimd.c\n> +++ b/arch/arm64/kernel/fpsimd.c\n> @@ -34,6 +34,7 @@\n>  #include <linux/sched/signal.h>\n>  #include <linux/signal.h>\n>  #include <linux/slab.h>\n> +#include <linux/sysctl.h>\n>\n>  #include <asm/fpsimd.h>\n>  #include <asm/cputype.h>\n> @@ -244,6 +245,65 @@ static unsigned int find_supported_vector_length(unsigned int vl)\n>  \treturn sve_vl_from_vq(bit_to_vq(bit));\n>  }\n>\n> +#ifdef CONFIG_SYSCTL\n> +\n> +static int sve_proc_do_default_vl(struct ctl_table *table, int write,\n> +\t\t\t\t  void __user *buffer, size_t *lenp,\n> +\t\t\t\t  loff_t *ppos)\n> +{\n> +\tint ret;\n> +\tint vl = sve_default_vl;\n> +\tstruct ctl_table tmp_table = {\n> +\t\t.data = &vl,\n> +\t\t.maxlen = sizeof(vl),\n> +\t};\n> +\n> +\tret = proc_dointvec(&tmp_table, write, buffer, lenp, ppos);\n> +\tif (ret || !write)\n> +\t\treturn ret;\n> +\n> +\t/* Writing -1 has the special meaning \"set to max\": */\n> +\tif (vl == -1) {\n> +\t\t/* Fail safe if sve_max_vl wasn't initialised */\n> +\t\tif (WARN_ON(!sve_vl_valid(sve_max_vl)))\n> +\t\t\tvl = SVE_VL_MIN;\n> +\t\telse\n> +\t\t\tvl = sve_max_vl;\n> +\n> +\t\tgoto chosen;\n> +\t}\n> +\n> +\tif (!sve_vl_valid(vl))\n> +\t\treturn -EINVAL;\n> +\n> +\tvl = find_supported_vector_length(vl);\n> +chosen:\n> +\tsve_default_vl = vl;\n> +\treturn 0;\n> +}\n> +\n> +static struct ctl_table sve_default_vl_table[] = {\n> +\t{\n> +\t\t.procname\t= \"sve_default_vector_length\",\n> +\t\t.mode\t\t= 0644,\n> +\t\t.proc_handler\t= sve_proc_do_default_vl,\n> +\t},\n> +\t{ }\n> +};\n> +\n> +static int __init sve_sysctl_init(void)\n> +{\n> +\tif (system_supports_sve())\n> +\t\tif (!register_sysctl(\"abi\", sve_default_vl_table))\n> +\t\t\treturn -EINVAL;\n> +\n> +\treturn 0;\n> +}\n> +\n> +#else /* ! CONFIG_SYSCTL */\n> +static int __init sve_sysctl_init(void) { return 0; }\n> +#endif /* ! CONFIG_SYSCTL */\n> +\n>  #define ZREG(sve_state, vq, n) ((char *)(sve_state) +\t\t\\\n>  \t(SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET))\n>\n> @@ -1030,6 +1090,6 @@ static int __init fpsimd_init(void)\n>  \tif (!(elf_hwcap & HWCAP_ASIMD))\n>  \t\tpr_notice(\"Advanced SIMD is not implemented\\n\");\n>\n> -\treturn 0;\n> +\treturn sve_sysctl_init();\n>  }\n>  late_initcall(fpsimd_init);\n\n\n--\nAlex Bennée","headers":{"Return-Path":"<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"tlsP00Aj\"; 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emacs 25.2.50.3","From":"Alex =?utf-8?q?Benn=C3=A9e?= <alex.bennee@linaro.org>","To":"Dave Martin <Dave.Martin@arm.com>","Subject":"Re: [PATCH v2 21/28] arm64/sve: Add sysctl to set the default vector\n\tlength for new processes","In-reply-to":"<1504198860-12951-22-git-send-email-Dave.Martin@arm.com>","Date":"Thu, 14 Sep 2017 14:05:01 +0100","Message-ID":"<878thha0si.fsf@linaro.org>","MIME-Version":"1.0","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170914_060524_981382_4F1684F3 ","X-CRM114-Status":"GOOD (  25.72  )","X-Spam-Score":"-2.7 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details:   (-2.7 points)\n\tpts rule name              description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/,\n\tlow\n\ttrust [2a00:1450:400c:c09:0:0:0:231 listed in] [list.dnswl.org]\n\t-0.0 SPF_PASS               SPF: sender matches SPF record\n\t-1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":"<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>","List-Archive":"<http://lists.infradead.org/pipermail/linux-arm-kernel/>","List-Post":"<mailto:linux-arm-kernel@lists.infradead.org>","List-Help":"<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>","List-Subscribe":"<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>","Cc":"linux-arch@vger.kernel.org, libc-alpha@sourceware.org,\n\tArd Biesheuvel <ard.biesheuvel@linaro.org>,\n\tSzabolcs Nagy <szabolcs.nagy@arm.com>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tWill Deacon <will.deacon@arm.com>, \n\tRichard Sandiford <richard.sandiford@arm.com>,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; 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