[{"id":1768052,"web_url":"http://patchwork.ozlabs.org/comment/1768052/","msgid":"<20170913172911.3ca2h6cpju7etifi@localhost>","list_archive_url":null,"date":"2017-09-13T17:29:11","subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","submitter":{"id":938,"url":"http://patchwork.ozlabs.org/api/people/938/","name":"Catalin Marinas","email":"catalin.marinas@arm.com"},"content":"On Thu, Aug 31, 2017 at 06:00:46PM +0100, Dave P Martin wrote:\n> This patch implements the core logic for changing a task's vector\n> length on request from userspace. This will be used by the ptrace\n> and prctl frontends that are implemented in later patches.\n> \n> The SVE architecture permits, but does not require, implementations\n> to support vector lengths that are not a power of two. To handle\n> this, logic is added to check a requested vector length against a\n> possibly sparse bitmap of available vector lengths at runtime, so\n> that the best supported value can be chosen.\n> \n> Signed-off-by: Dave Martin \n> Cc: Alex Bennée \n\nCan this be merged with patch 20? It seems to add the PR_ definitions\nwhich get actually used later when the prctl interface is added.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-84569-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"ssmizcVQ\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xspZ159yZz9sNV\n\tfor ;\n\tThu, 14 Sep 2017 03:29:29 +1000 (AEST)","(qmail 10005 invoked by alias); 13 Sep 2017 17:29:18 -0000","(qmail 9486 invoked by uid 89); 13 Sep 2017 17:29:17 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; q=dns; s=default; b=HW0ftB1J372ocOJdEWVSmmnXhnOjsU\n\t54vKmRgH0Ct4EzRPNbIyuFls+bMXyGd0e+j/g7kr093M3gHiJXKJklVwx8YRb+Ng\n\tW/8er/HSi6VJQxRc+aEyfB792IMTLwZd7VPjbvk8EZAzmdqk3sLeMUEUGVWqhTNb\n\tBpB9sWO8Wz85s=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; s=default; bh=9LW+S1jQw3HNOj9TipasURvW1Yo=; b=ssmi\n\tzcVQdybH0piSKHBskJxKjJoHHhezfIXel+6DmWAy1mOM8+b+drMoxAacvubXpYY6\n\tkhPWT4778yzdABujl3Ip0lDYRvX9Y9O/W0cmPntcEiMhyphvRMOpUEQRI2/G5YEf\n\tePqlNAAUeRZtpriVlM8hG+WQzj+f5G3J/e2Q2OQ=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n\tRP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2\n\tspammy=HContent-Transfer-Encoding:8bit","X-Spam-User":"qpsmtpd, 2 recipients","X-HELO":"foss.arm.com","Date":"Wed, 13 Sep 2017 10:29:11 -0700","From":"Catalin Marinas ","To":"Dave Martin ","Cc":"linux-arm-kernel@lists.infradead.org, Will Deacon , \n\tArd Biesheuvel , Alex =?iso-8859-1?q?Benn?=\n\t=?iso-8859-1?q?=E9e?= ,\n\tSzabolcs Nagy , Richard Sandiford\n\t, kvmarm@lists.cs.columbia.edu,\n\tlibc-alpha@sourceware.org, \n\tlinux-arch@vger.kernel.org, gdb@sourceware.org,\n\tAlan Hayward , Yao Qi ","Subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","Message-ID":"<20170913172911.3ca2h6cpju7etifi@localhost>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-15-git-send-email-Dave.Martin@arm.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<1504198860-12951-15-git-send-email-Dave.Martin@arm.com>","User-Agent":"NeoMutt/20170113 (1.7.2)"}},{"id":1768089,"web_url":"http://patchwork.ozlabs.org/comment/1768089/","msgid":"<20170913190611.GC23415@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-09-13T19:06:12","subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Wed, Sep 13, 2017 at 10:29:11AM -0700, Catalin Marinas wrote:\n> On Thu, Aug 31, 2017 at 06:00:46PM +0100, Dave P Martin wrote:\n> > This patch implements the core logic for changing a task's vector\n> > length on request from userspace. This will be used by the ptrace\n> > and prctl frontends that are implemented in later patches.\n> > \n> > The SVE architecture permits, but does not require, implementations\n> > to support vector lengths that are not a power of two. To handle\n> > this, logic is added to check a requested vector length against a\n> > possibly sparse bitmap of available vector lengths at runtime, so\n> > that the best supported value can be chosen.\n> > \n> > Signed-off-by: Dave Martin \n> > Cc: Alex Bennée \n> \n> Can this be merged with patch 20? It seems to add the PR_ definitions\n> which get actually used later when the prctl interface is added.\n\nThis patch is used both by patch 19 and by patch 20, which I preferred\nnot to merge with each other: ptrace and prctl are significantly\ndifferent things.\n\nThe prctl bit definitions are added here because they are the canonical\ndefinitions used by both interfaces. The ptrace #defines are based on\nthem.\n\nDoes it make sense if I merge patch 20 into this one and apply patch 19\non top? This avoide the appearance of prctl #defines with no prctl\nimplementation.\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-84570-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"ECUrh6IS\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsrjt71tgz9sPk\n\tfor ;\n\tThu, 14 Sep 2017 05:06:26 +1000 (AEST)","(qmail 85205 invoked by alias); 13 Sep 2017 19:06:20 -0000","(qmail 85186 invoked by uid 89); 13 Sep 2017 19:06:19 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; q=dns; s=default; b=CxrDo6BM/bVXd/ldKIpD0HgQcehgMM\n\tW7cNxvdGExZxuuqjY3Mq/d0+Z06UpaRCq5gbq8KprkV1cFRBP/WMo7woRna8OKqw\n\tNfsD5QVt76qpwRjOj+d1+KXxbF6KoIL4KGpYDQwP2IVB5n0JYZOpGF1VrE/urptu\n\tOixPWnKVA0Tgs=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; s=default; bh=q/vEXNdPEqdQvSsVfCsdzwKMf+c=; b=ECUr\n\th6IS7D0cA33ufV93RtNfokHI/chiUOxyJiImQ0rnVe4Oip5/FjrQv4BG6PaBUfR1\n\ty9UPoXBnoSYq2TM2uzxsWdfEzmN6cmDi/Rjud/uqjCghY3ANmyx0cof8jzE/PRZR\n\tHqeN8mthvCm3mtSUBkClFqu54dqfViVRA3oYOL4=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n\tRP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:1463","X-Spam-User":"qpsmtpd, 2 recipients","X-HELO":"foss.arm.com","Date":"Wed, 13 Sep 2017 20:06:12 +0100","From":"Dave Martin ","To":"Catalin Marinas ","Cc":"linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Ard Biesheuvel\n\t, \tSzabolcs Nagy ,\n\tRichard Sandiford , Yao Qi ,\n\tAlan Hayward , Will Deacon ,\n\tgdb@sourceware.org, Alex =?iso-8859-1?q?Benn=E9e?=\n\t, kvmarm@lists.cs.columbia.edu,\n\tlinux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","Message-ID":"<20170913190611.GC23415@e103592.cambridge.arm.com>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-15-git-send-email-Dave.Martin@arm.com>\n\t<20170913172911.3ca2h6cpju7etifi@localhost>","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<20170913172911.3ca2h6cpju7etifi@localhost>","User-Agent":"Mutt/1.5.23 (2014-03-12)"}},{"id":1768220,"web_url":"http://patchwork.ozlabs.org/comment/1768220/","msgid":"<20170913221123.y4znytmxtplx24m4@localhost>","list_archive_url":null,"date":"2017-09-13T22:11:23","subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","submitter":{"id":938,"url":"http://patchwork.ozlabs.org/api/people/938/","name":"Catalin Marinas","email":"catalin.marinas@arm.com"},"content":"On Wed, Sep 13, 2017 at 08:06:12PM +0100, Dave P Martin wrote:\n> On Wed, Sep 13, 2017 at 10:29:11AM -0700, Catalin Marinas wrote:\n> > On Thu, Aug 31, 2017 at 06:00:46PM +0100, Dave P Martin wrote:\n> > > This patch implements the core logic for changing a task's vector\n> > > length on request from userspace. This will be used by the ptrace\n> > > and prctl frontends that are implemented in later patches.\n> > > \n> > > The SVE architecture permits, but does not require, implementations\n> > > to support vector lengths that are not a power of two. To handle\n> > > this, logic is added to check a requested vector length against a\n> > > possibly sparse bitmap of available vector lengths at runtime, so\n> > > that the best supported value can be chosen.\n> > > \n> > > Signed-off-by: Dave Martin \n> > > Cc: Alex Bennée \n> > \n> > Can this be merged with patch 20? It seems to add the PR_ definitions\n> > which get actually used later when the prctl interface is added.\n> \n> This patch is used both by patch 19 and by patch 20, which I preferred\n> not to merge with each other: ptrace and prctl are significantly\n> different things.\n> \n> The prctl bit definitions are added here because they are the canonical\n> definitions used by both interfaces. The ptrace #defines are based on\n> them.\n> \n> Does it make sense if I merge patch 20 into this one and apply patch 19\n> on top? This avoide the appearance of prctl #defines with no prctl\n> implementation.\n\nThat's fine, you can bring patch 20 forward. If there are other\nnon-trivial issues, feel free to ignore my comment.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-84579-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"vFNEDppL\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xswqq6kfJz9sRg\n\tfor ;\n\tThu, 14 Sep 2017 08:11:51 +1000 (AEST)","(qmail 88225 invoked by alias); 13 Sep 2017 22:11:28 -0000","(qmail 88196 invoked by uid 89); 13 Sep 2017 22:11:28 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; q=dns; s=default; b=SC70TJ9H0hf73ruIoO+2BI2r9M3Qia\n\t8LU51ujm0Jv7qrhkAC02NCH0GVd74eWgomF6qpO2vD5yeOrwroGCfrO51RCd6Q/x\n\tXfSCrssh4se608xLCv5eY8vdqjK9hjE0tsz/rvylVLUDyWmvQ5p0nOhzEOZOxMz5\n\tNQWQFuCmD2KXU=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; s=default; bh=m4ruXJ/5RviSpHUftiQogEiqlSI=; b=vFNE\n\tDppLoR1mMxL1MazTqXQKcC1/sMkiULkmZUN1XPnAZFbEhFUxruYhKpN0km3lKnEC\n\t19WGNNESM0UKGehgr4GmfumWhzhMRr1xrOrjeuTWELGgjXNRC0XcmTdJiSrYgeI2\n\tpVYPAulzUT2SloQYtwV1TClPERP+BUYFFgCKRMQ=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n\tRP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:1694","X-Spam-User":"qpsmtpd, 2 recipients","X-HELO":"foss.arm.com","Date":"Wed, 13 Sep 2017 15:11:23 -0700","From":"Catalin Marinas ","To":"Dave Martin ","Cc":"linux-arch@vger.kernel.org, libc-alpha@sourceware.org,\n\tgdb@sourceware.org, Ard Biesheuvel ,\n\tSzabolcs Nagy , Richard Sandiford\n\t, Yao Qi ,\n\tWill Deacon , Alan Hayward ,\n\tAlex =?iso-8859-1?q?Benn=E9e?= ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","Message-ID":"<20170913221123.y4znytmxtplx24m4@localhost>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-15-git-send-email-Dave.Martin@arm.com>\n\t<20170913172911.3ca2h6cpju7etifi@localhost>\n\t<20170913190611.GC23415@e103592.cambridge.arm.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<20170913190611.GC23415@e103592.cambridge.arm.com>","User-Agent":"NeoMutt/20170113 (1.7.2)"}},{"id":1771736,"web_url":"http://patchwork.ozlabs.org/comment/1771736/","msgid":"","list_archive_url":null,"date":"2017-09-20T10:59:55","subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","submitter":{"id":65004,"url":"http://patchwork.ozlabs.org/api/people/65004/","name":"Alan Hayward","email":"alan.hayward@arm.com"},"content":"(Resending without disclaimer)\r\n\r\n> On 31 Aug 2017, at 18:00, Dave Martin wrote:\r\n\r\n> \r\n> +int sve_set_vector_length(struct task_struct *task,\r\n> +\t\t\t unsigned long vl, unsigned long flags)\r\n> +{\r\n> +\tWARN_ON(task == current && preemptible());\r\n> +\r\n> +\tif (flags & ~(unsigned long)(PR_SVE_VL_INHERIT |\r\n> +\t\t\t\t PR_SVE_SET_VL_ONEXEC))\r\n> +\t\treturn -EINVAL;\r\n> +\r\n> +\tif (!sve_vl_valid(vl))\r\n> +\t\treturn -EINVAL;\r\n> +\r\n> +\t/*\r\n> +\t * Clamp to the maximum vector length that VL-agnostic SVE code can\r\n> +\t * work with. A flag may be assigned in the future to allow setting\r\n> +\t * of larger vector lengths without confusing older software.\r\n> +\t */\r\n> +\tif (vl > SVE_VL_ARCH_MAX)\r\n> +\t\tvl = SVE_VL_ARCH_MAX;\r\n> +\r\n> +\tvl = find_supported_vector_length(vl);\r\n> +\r\n\r\n\r\nGiven, sve_set_vector_length is called when setting the vector length in\r\nPTRACE_SETREGSET, it looks to me like if you set VL to a value that’s not\r\nsupported by the hardware, then it’s going to round down to the previous value.\r\nIs that correct? I’m not sure if that’s explained in the docs?\r\n\r\nWhat happens if you give a vl value lower than the min supported value in the\r\nhardware?\r\n\r\n\r\n> +/*\r\n> + * All vector length selection from userspace comes through here.\r\n> + * We're on a slow path, so some sanity-checks are included.\r\n> + * If things go wrong there's a bug somewhere, but try to fall back to a\r\n> + * safe choice.\r\n> + */\r\n> +static unsigned int find_supported_vector_length(unsigned int vl)\r\n> +{\r\n> +\tint bit;\r\n> +\tint max_vl = sve_max_vl;\r\n> +\r\n> +\tif (WARN_ON(!sve_vl_valid(vl)))\r\n> +\t\tvl = SVE_VL_MIN;\r\n> +\r\n> +\tif (WARN_ON(!sve_vl_valid(max_vl)))\r\n> +\t\tmax_vl = SVE_VL_MIN;\r\n> +\r\n> +\tif (vl > max_vl)\r\n> +\t\tvl = max_vl;\r\n> +\r\n> +\tbit = find_next_bit(sve_vq_map, SVE_VQ_MAX,\r\n> +\t\t\t vq_to_bit(sve_vq_from_vl(vl)));\r\n> +\treturn sve_vl_from_vq(bit_to_vq(bit));\r\n> +}\r\n> +\r\n\r\n\r\nThanks,\r\nAlan.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-84775-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"srjrArj7\"; dkim-atps=neutral","sourceware.org; auth=none","spf=none (sender IP is )\n\tsmtp.mailfrom=Alan.Hayward@arm.com; "],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxxbl5tNxz9sPt\n\tfor ;\n\tWed, 20 Sep 2017 21:00:19 +1000 (AEST)","(qmail 99560 invoked by alias); 20 Sep 2017 11:00:03 -0000","(qmail 96425 invoked by uid 89); 20 Sep 2017 11:00:01 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:from:to:cc:subject:date:message-id:references\n\t:in-reply-to:content-type:content-id:content-transfer-encoding\n\t:mime-version; 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MX:1; A:1; LANG:en; ","received-spf":"None (protection.outlook.com: arm.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"text/plain; charset=\"utf-8\"","Content-ID":"<6B3111D0F66877459DFF3822341B37B7@eurprd08.prod.outlook.com>","Content-Transfer-Encoding":"base64","MIME-Version":"1.0","X-OriginatorOrg":"arm.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"20 Sep 2017 10:59:55.8092\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"f34e5979-57d9-4aaa-ad4d-b122a662184d","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"AM3PR08MB0166"}},{"id":1771741,"web_url":"http://patchwork.ozlabs.org/comment/1771741/","msgid":"<20170920110902.GG24231@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-09-20T11:09:04","subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","submitter":{"id":72402,"url":"http://patchwork.ozlabs.org/api/people/72402/","name":"Dave Martin","email":"dave.martin@foss.arm.com"},"content":"On Wed, Sep 20, 2017 at 10:59:55AM +0000, Alan Hayward wrote:\n> (Resending without disclaimer)\n> \n> > On 31 Aug 2017, at 18:00, Dave Martin wrote:\n> \n> > \n> > +int sve_set_vector_length(struct task_struct *task,\n> > +\t\t\t unsigned long vl, unsigned long flags)\n> > +{\n> > +\tWARN_ON(task == current && preemptible());\n> > +\n> > +\tif (flags & ~(unsigned long)(PR_SVE_VL_INHERIT |\n> > +\t\t\t\t PR_SVE_SET_VL_ONEXEC))\n> > +\t\treturn -EINVAL;\n> > +\n> > +\tif (!sve_vl_valid(vl))\n> > +\t\treturn -EINVAL;\n> > +\n> > +\t/*\n> > +\t * Clamp to the maximum vector length that VL-agnostic SVE code can\n> > +\t * work with. A flag may be assigned in the future to allow setting\n> > +\t * of larger vector lengths without confusing older software.\n> > +\t */\n> > +\tif (vl > SVE_VL_ARCH_MAX)\n> > +\t\tvl = SVE_VL_ARCH_MAX;\n> > +\n> > +\tvl = find_supported_vector_length(vl);\n> > +\n> \n> \n> Given, sve_set_vector_length is called when setting the vector length in\n> PTRACE_SETREGSET, it looks to me like if you set VL to a value that’s not\n> supported by the hardware, then it’s going to round down to the previous value.\n> Is that correct? I’m not sure if that’s explained in the docs?\n\nDoes this cover it?\n\n\"On success, the calling thread's vector length is changed to the\nlargest value supported by the system that is less than or equal to vl.\"\n\n(For ptrace, I just cross-reference the PR_SVE_SET_VL behaviour, above.)\n\n> What happens if you give a vl value lower than the min supported value in the\n> hardware?\n\nThis is impossible, unless vl < SVE_VL_MIN (which is rejected explicitly\nby the !sve_vl_valid() check in sve_set_vector_length()).\n\nThe architecture required support for all power-of-two vector lengths\nless than the maximum supported vector length, so by construction\nSVE_VL_MIN is supported by all hardware.\n\nTo be defensive, if we fail to detect support for SVE_VL_MIN, I set the\ncorresponding bit in sve_vq_map and WARN. This is just to help ensure\nfind_supported_vector_length doesn't fall off the end of sve_vq_map.\n\n\nDoes that sounds correct? There may be a clearer way of achieving this.\n\nCheers\n---Dave\n\n> \n> \n> > +/*\n> > + * All vector length selection from userspace comes through here.\n> > + * We're on a slow path, so some sanity-checks are included.\n> > + * If things go wrong there's a bug somewhere, but try to fall back to a\n> > + * safe choice.\n> > + */\n> > +static unsigned int find_supported_vector_length(unsigned int vl)\n> > +{\n> > +\tint bit;\n> > +\tint max_vl = sve_max_vl;\n> > +\n> > +\tif (WARN_ON(!sve_vl_valid(vl)))\n> > +\t\tvl = SVE_VL_MIN;\n> > +\n> > +\tif (WARN_ON(!sve_vl_valid(max_vl)))\n> > +\t\tmax_vl = SVE_VL_MIN;\n> > +\n> > +\tif (vl > max_vl)\n> > +\t\tvl = max_vl;\n> > +\n> > +\tbit = find_next_bit(sve_vq_map, SVE_VQ_MAX,\n> > +\t\t\t vq_to_bit(sve_vq_from_vl(vl)));\n> > +\treturn sve_vl_from_vq(bit_to_vq(bit));\n> > +}\n> > +\n> \n> \n> Thanks,\n> Alan.\n> _______________________________________________\n> linux-arm-kernel mailing list\n> linux-arm-kernel@lists.infradead.org\n> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-84776-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"ZpOcE6Pv\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxxpD6fPWz9s7f\n\tfor ;\n\tWed, 20 Sep 2017 21:09:24 +1000 (AEST)","(qmail 21017 invoked by alias); 20 Sep 2017 11:09:13 -0000","(qmail 20914 invoked by uid 89); 20 Sep 2017 11:09:12 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; q=dns; s=default; b=IDi4zIUstsocYxGODN1b5wLNwisTTg\n\t65ACpyVB2XQVDqfDq8KrtZzLxp834Kvz9S/EMuupaBOpTvRHf7OM61sAzBmBdTBE\n\tyCXCiyRlpMZO4GHa3Pum8tq2z3D+e5Mz5HD77n9SpsgZT9mJf93pe4xL/Q+GSU/l\n\t0LoTvwl2HbqYk=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; s=default; bh=ui8p9UWbxgEzoq5bk7tUHsEwKEg=; b=ZpOc\n\tE6PvRr277zQ+b+giP0xWyA2E+UgTSUHVWBH58/PGwpi26f74MPYy5R37fd45Fg5B\n\tY46WRZ1e+Q/YS28brLOTBExFJtaEn1h0eJNw+h+cUA88rDYZlf06caTvCw1LINgd\n\ty3iYRqGAHMfwqj+nIE2g7hlUkEGG65JKlPo1h5k=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n\tRP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=disclaimer","X-Spam-User":"qpsmtpd, 2 recipients","X-HELO":"foss.arm.com","Date":"Wed, 20 Sep 2017 12:09:04 +0100","From":"Dave Martin ","To":"Alan Hayward ","Cc":"Dave P Martin , \"linux-arch@vger.kernel.org\"\n\t, \"libc-alpha@sourceware.org\"\n\t, \"gdb@sourceware.org\" , \n\tArd Biesheuvel , \n\tSzabolcs Nagy , Catalin Marinas\n\t, Yao Qi , Will Deacon\n\t, Richard Sandiford ,\n\tnd , Alex =?iso-8859-1?q?Benn=E9e?= ,\n\t\"kvmarm@lists.cs.columbia.edu\" , \n\t\"linux-arm-kernel@lists.infradead.org\"\n\t","Subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","Message-ID":"<20170920110902.GG24231@e103592.cambridge.arm.com>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-15-git-send-email-Dave.Martin@arm.com>\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"","User-Agent":"Mutt/1.5.23 (2014-03-12)"}},{"id":1772135,"web_url":"http://patchwork.ozlabs.org/comment/1772135/","msgid":"","list_archive_url":null,"date":"2017-09-20T18:08:21","subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","submitter":{"id":65004,"url":"http://patchwork.ozlabs.org/api/people/65004/","name":"Alan Hayward","email":"alan.hayward@arm.com"},"content":"> On 20 Sep 2017, at 12:09, Dave Martin wrote:\r\n> \r\n> On Wed, Sep 20, 2017 at 10:59:55AM +0000, Alan Hayward wrote:\r\n>> (Resending without disclaimer)\r\n>> \r\n>>> On 31 Aug 2017, at 18:00, Dave Martin wrote:\r\n>> \r\n>>> \r\n>>> +int sve_set_vector_length(struct task_struct *task,\r\n>>> +\t\t\t unsigned long vl, unsigned long flags)\r\n>>> +{\r\n>>> +\tWARN_ON(task == current && preemptible());\r\n>>> +\r\n>>> +\tif (flags & ~(unsigned long)(PR_SVE_VL_INHERIT |\r\n>>> +\t\t\t\t PR_SVE_SET_VL_ONEXEC))\r\n>>> +\t\treturn -EINVAL;\r\n>>> +\r\n>>> +\tif (!sve_vl_valid(vl))\r\n>>> +\t\treturn -EINVAL;\r\n>>> +\r\n>>> +\t/*\r\n>>> +\t * Clamp to the maximum vector length that VL-agnostic SVE code can\r\n>>> +\t * work with. A flag may be assigned in the future to allow setting\r\n>>> +\t * of larger vector lengths without confusing older software.\r\n>>> +\t */\r\n>>> +\tif (vl > SVE_VL_ARCH_MAX)\r\n>>> +\t\tvl = SVE_VL_ARCH_MAX;\r\n>>> +\r\n>>> +\tvl = find_supported_vector_length(vl);\r\n>>> +\r\n>> \r\n>> \r\n>> Given, sve_set_vector_length is called when setting the vector length in\r\n>> PTRACE_SETREGSET, it looks to me like if you set VL to a value that’s not\r\n>> supported by the hardware, then it’s going to round down to the previous value.\r\n>> Is that correct? I’m not sure if that’s explained in the docs?\r\n> \r\n> Does this cover it?\r\n> \r\n> \"On success, the calling thread's vector length is changed to the\r\n> largest value supported by the system that is less than or equal to vl.\"\r\n> \r\n> (For ptrace, I just cross-reference the PR_SVE_SET_VL behaviour, above.)\r\n\r\nFor ptrace is it worth mentioning user should do a GET after a SET to confirm\r\nwhat VL value was actually set?\r\n\r\n> \r\n>> What happens if you give a vl value lower than the min supported value in the\r\n>> hardware?\r\n> \r\n> This is impossible, unless vl < SVE_VL_MIN (which is rejected explicitly\r\n> by the !sve_vl_valid() check in sve_set_vector_length()).\r\n> \r\n> The architecture required support for all power-of-two vector lengths\r\n> less than the maximum supported vector length, so by construction\r\n> SVE_VL_MIN is supported by all hardware.\r\n\r\nOk, I’m happy with that.\r\n\r\n> \r\n> To be defensive, if we fail to detect support for SVE_VL_MIN, I set the\r\n> corresponding bit in sve_vq_map and WARN. This is just to help ensure\r\n> find_supported_vector_length doesn't fall off the end of sve_vq_map.\r\n> \r\n> \r\n> Does that sounds correct? There may be a clearer way of achieving this.\r\n> \r\n> Cheers\r\n> ---Dave\r\n> \r\n>> \r\n>> \r\n>>> +/*\r\n>>> + * All vector length selection from userspace comes through here.\r\n>>> + * We're on a slow path, so some sanity-checks are included.\r\n>>> + * If things go wrong there's a bug somewhere, but try to fall back to a\r\n>>> + * safe choice.\r\n>>> + */\r\n>>> +static unsigned int find_supported_vector_length(unsigned int vl)\r\n>>> +{\r\n>>> +\tint bit;\r\n>>> +\tint max_vl = sve_max_vl;\r\n>>> +\r\n>>> +\tif (WARN_ON(!sve_vl_valid(vl)))\r\n>>> +\t\tvl = SVE_VL_MIN;\r\n>>> +\r\n>>> +\tif (WARN_ON(!sve_vl_valid(max_vl)))\r\n>>> +\t\tmax_vl = SVE_VL_MIN;\r\n>>> +\r\n>>> +\tif (vl > max_vl)\r\n>>> +\t\tvl = max_vl;\r\n>>> +\r\n>>> +\tbit = find_next_bit(sve_vq_map, SVE_VQ_MAX,\r\n>>> +\t\t\t vq_to_bit(sve_vq_from_vl(vl)));\r\n>>> +\treturn sve_vl_from_vq(bit_to_vq(bit));\r\n>>> +}\r\n>>> +\r\n>> \r\n>> \r\n>> Thanks,\r\n>> Alan.\r\n>> _______________________________________________\r\n>> linux-arm-kernel mailing list\r\n>> linux-arm-kernel@lists.infradead.org\r\n>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; 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SPF:None;\n\tPTR:InfoNoRecords; A:1; MX:1; LANG:en; ","received-spf":"None (protection.outlook.com: arm.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"text/plain; charset=\"utf-8\"","Content-ID":"","Content-Transfer-Encoding":"base64","MIME-Version":"1.0","X-OriginatorOrg":"arm.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"20 Sep 2017 18:08:21.6426\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"f34e5979-57d9-4aaa-ad4d-b122a662184d","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"AM3PR08MB0708"}},{"id":1772708,"web_url":"http://patchwork.ozlabs.org/comment/1772708/","msgid":"<20170921111937.GA17434@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-09-21T11:19:45","subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Wed, Sep 20, 2017 at 06:08:21PM +0000, Alan Hayward wrote:\n> \n> > On 20 Sep 2017, at 12:09, Dave Martin wrote:\n\n[...]\n\n> >> Given, sve_set_vector_length is called when setting the vector length in\n> >> PTRACE_SETREGSET, it looks to me like if you set VL to a value that’s not\n> >> supported by the hardware, then it’s going to round down to the previous value.\n> >> Is that correct? I’m not sure if that’s explained in the docs?\n> > \n> > Does this cover it?\n> > \n> > \"On success, the calling thread's vector length is changed to the\n> > largest value supported by the system that is less than or equal to vl.\"\n> > \n> > (For ptrace, I just cross-reference the PR_SVE_SET_VL behaviour, above.)\n> \n> For ptrace is it worth mentioning user should do a GET after a SET to confirm\n> what VL value was actually set?\n\nThis seems worth a clarification -- I'd thought this was already\nmentioned, but it isn't.\n\nHow about:\n\n The caller must make a further GETREGSET call if it needs to know what VL is\n actually set by SETREGSET, unless is it known in advance that the requested\n VL is supported.\n\n\n[...]\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-84810-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"tsJplgD+\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xyZ032pdHz9t3m\n\tfor ;\n\tThu, 21 Sep 2017 21:20:03 +1000 (AEST)","(qmail 121209 invoked by alias); 21 Sep 2017 11:19:57 -0000","(qmail 121186 invoked by uid 89); 21 Sep 2017 11:19:55 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; q=dns; s=default; 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charset=utf-8","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"","User-Agent":"Mutt/1.5.23 (2014-03-12)"}},{"id":1772739,"web_url":"http://patchwork.ozlabs.org/comment/1772739/","msgid":"","list_archive_url":null,"date":"2017-09-21T11:57:24","subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","submitter":{"id":65004,"url":"http://patchwork.ozlabs.org/api/people/65004/","name":"Alan Hayward","email":"alan.hayward@arm.com"},"content":"> On 21 Sep 2017, at 12:19, Dave Martin wrote:\r\n> \r\n> On Wed, Sep 20, 2017 at 06:08:21PM +0000, Alan Hayward wrote:\r\n>> \r\n>>> On 20 Sep 2017, at 12:09, Dave Martin wrote:\r\n> \r\n> [...]\r\n> \r\n>>>> Given, sve_set_vector_length is called when setting the vector length in\r\n>>>> PTRACE_SETREGSET, it looks to me like if you set VL to a value that’s not\r\n>>>> supported by the hardware, then it’s going to round down to the previous value.\r\n>>>> Is that correct? I’m not sure if that’s explained in the docs?\r\n>>> \r\n>>> Does this cover it?\r\n>>> \r\n>>> \"On success, the calling thread's vector length is changed to the\r\n>>> largest value supported by the system that is less than or equal to vl.\"\r\n>>> \r\n>>> (For ptrace, I just cross-reference the PR_SVE_SET_VL behaviour, above.)\r\n>> \r\n>> For ptrace is it worth mentioning user should do a GET after a SET to confirm\r\n>> what VL value was actually set?\r\n> \r\n> This seems worth a clarification -- I'd thought this was already\r\n> mentioned, but it isn't.\r\n> \r\n> How about:\r\n> \r\n> The caller must make a further GETREGSET call if it needs to know what VL is\r\n> actually set by SETREGSET, unless is it known in advance that the requested\r\n> VL is supported.\r\n> \r\n\r\nLooks good to me.\r\n\r\n\r\nAlan.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; 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MX:1; A:1; LANG:en; ","received-spf":"None (protection.outlook.com: arm.com does not designate\n\tpermitted sender hosts)","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-Type":"text/plain; charset=\"utf-8\"","Content-ID":"","Content-Transfer-Encoding":"base64","MIME-Version":"1.0","X-OriginatorOrg":"arm.com","X-MS-Exchange-CrossTenant-originalarrivaltime":"21 Sep 2017 11:57:24.8207\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"f34e5979-57d9-4aaa-ad4d-b122a662184d","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DB3PR08MB0074"}},{"id":1780797,"web_url":"http://patchwork.ozlabs.org/comment/1780797/","msgid":"<20171005164229.GX3611@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-05T16:42:29","subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Wed, Sep 13, 2017 at 03:11:23PM -0700, Catalin Marinas wrote:\n> On Wed, Sep 13, 2017 at 08:06:12PM +0100, Dave P Martin wrote:\n> > On Wed, Sep 13, 2017 at 10:29:11AM -0700, Catalin Marinas wrote:\n> > > On Thu, Aug 31, 2017 at 06:00:46PM +0100, Dave P Martin wrote:\n> > > > This patch implements the core logic for changing a task's vector\n> > > > length on request from userspace. This will be used by the ptrace\n> > > > and prctl frontends that are implemented in later patches.\n> > > > \n> > > > The SVE architecture permits, but does not require, implementations\n> > > > to support vector lengths that are not a power of two. To handle\n> > > > this, logic is added to check a requested vector length against a\n> > > > possibly sparse bitmap of available vector lengths at runtime, so\n> > > > that the best supported value can be chosen.\n> > > > \n> > > > Signed-off-by: Dave Martin \n> > > > Cc: Alex Bennée \n> > > \n> > > Can this be merged with patch 20? It seems to add the PR_ definitions\n> > > which get actually used later when the prctl interface is added.\n> > \n> > This patch is used both by patch 19 and by patch 20, which I preferred\n> > not to merge with each other: ptrace and prctl are significantly\n> > different things.\n> > \n> > The prctl bit definitions are added here because they are the canonical\n> > definitions used by both interfaces. The ptrace #defines are based on\n> > them.\n> > \n> > Does it make sense if I merge patch 20 into this one and apply patch 19\n> > on top? This avoide the appearance of prctl #defines with no prctl\n> > implementation.\n> \n> That's fine, you can bring patch 20 forward. If there are other\n> non-trivial issues, feel free to ignore my comment.\n\nI've had a go at this, but I think it's going to be more trouble than\nit's worth -- there are other interdependencies between the patches\nwhich make them tricky to reorder.\n\nI could add a note in the commit message for this patch explaining why\nthe prctl flag #defines are being added here. What do you think?\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-85467-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"J1XFL4N4\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y7JTw1QN8z9t16\n\tfor ;\n\tFri, 6 Oct 2017 03:42:44 +1100 (AEDT)","(qmail 40978 invoked by alias); 5 Oct 2017 16:42:37 -0000","(qmail 40379 invoked by uid 89); 5 Oct 2017 16:42:36 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; q=dns; s=default; b=TvLR0sbQxunll5EXDbeSF7IPE1bdHc\n\tLR5F8dXLscEEHBrUV47yY+DhKhVRhsn8b3aQOWRBmiwA6epJodJp1igtIj4JZOMu\n\tIKgfRIJ1DTy9v0vKpVItCfhKj8JSoQHERBmyon+AQcni5O72u0B90MwfmMtORylA\n\tEdAaPXxBa/8cw=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; s=default; bh=ZmCyQ3RXAjA6L2gY0SN1Px9wPAA=; b=J1XF\n\tL4N49otpJIqThr4NxZeFOjRkh4UUGDajTUG4cdbJlG9HgB26/FTRWt88UhiZTnXK\n\t6VIUTEEYNUQJd9V6TK5pRQqBGTCCxzhITEdvWy6pWriTq7bhp6ph0Idbgfvtwa2o\n\t+kb5bmtIdAiIYOAEOcQd+JFQsxhsdkZemeGvhUY=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n\tRP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=appearance, Alex","X-Spam-User":"qpsmtpd, 2 recipients","X-HELO":"foss.arm.com","Date":"Thu, 5 Oct 2017 17:42:29 +0100","From":"Dave Martin ","To":"Catalin Marinas ","Cc":"linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Ard Biesheuvel\n\t, Szabolcs Nagy ,\n\tgdb@sourceware.org, Yao Qi ,\n\tAlan Hayward , Will Deacon , \n\tRichard Sandiford , Alex\n\t=?iso-8859-1?q?Benn=E9e?= ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","Message-ID":"<20171005164229.GX3611@e103592.cambridge.arm.com>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-15-git-send-email-Dave.Martin@arm.com>\n\t<20170913172911.3ca2h6cpju7etifi@localhost>\n\t<20170913190611.GC23415@e103592.cambridge.arm.com>\n\t<20170913221123.y4znytmxtplx24m4@localhost>","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<20170913221123.y4znytmxtplx24m4@localhost>","User-Agent":"Mutt/1.5.23 (2014-03-12)"}},{"id":1780818,"web_url":"http://patchwork.ozlabs.org/comment/1780818/","msgid":"<20171005165334.cstx6fszl7shaudg@armageddon.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-05T16:53:34","subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","submitter":{"id":938,"url":"http://patchwork.ozlabs.org/api/people/938/","name":"Catalin Marinas","email":"catalin.marinas@arm.com"},"content":"On Thu, Oct 05, 2017 at 05:42:29PM +0100, Dave P Martin wrote:\n> On Wed, Sep 13, 2017 at 03:11:23PM -0700, Catalin Marinas wrote:\n> > On Wed, Sep 13, 2017 at 08:06:12PM +0100, Dave P Martin wrote:\n> > > On Wed, Sep 13, 2017 at 10:29:11AM -0700, Catalin Marinas wrote:\n> > > > On Thu, Aug 31, 2017 at 06:00:46PM +0100, Dave P Martin wrote:\n> > > > > This patch implements the core logic for changing a task's vector\n> > > > > length on request from userspace. This will be used by the ptrace\n> > > > > and prctl frontends that are implemented in later patches.\n> > > > > \n> > > > > The SVE architecture permits, but does not require, implementations\n> > > > > to support vector lengths that are not a power of two. To handle\n> > > > > this, logic is added to check a requested vector length against a\n> > > > > possibly sparse bitmap of available vector lengths at runtime, so\n> > > > > that the best supported value can be chosen.\n> > > > > \n> > > > > Signed-off-by: Dave Martin \n> > > > > Cc: Alex Bennée \n> > > > \n> > > > Can this be merged with patch 20? It seems to add the PR_ definitions\n> > > > which get actually used later when the prctl interface is added.\n> > > \n> > > This patch is used both by patch 19 and by patch 20, which I preferred\n> > > not to merge with each other: ptrace and prctl are significantly\n> > > different things.\n> > > \n> > > The prctl bit definitions are added here because they are the canonical\n> > > definitions used by both interfaces. The ptrace #defines are based on\n> > > them.\n> > > \n> > > Does it make sense if I merge patch 20 into this one and apply patch 19\n> > > on top? This avoide the appearance of prctl #defines with no prctl\n> > > implementation.\n> > \n> > That's fine, you can bring patch 20 forward. If there are other\n> > non-trivial issues, feel free to ignore my comment.\n> \n> I've had a go at this, but I think it's going to be more trouble than\n> it's worth -- there are other interdependencies between the patches\n> which make them tricky to reorder.\n> \n> I could add a note in the commit message for this patch explaining why\n> the prctl flag #defines are being added here. What do you think?\n\nAs I said, it's up to you. A line in the commit message would do.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-85471-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"Yu9f11pD\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y7Jkh5FFLz9t2l\n\tfor ;\n\tFri, 6 Oct 2017 03:53:48 +1100 (AEDT)","(qmail 27689 invoked by alias); 5 Oct 2017 16:53:42 -0000","(qmail 27664 invoked by uid 89); 5 Oct 2017 16:53:42 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; q=dns; s=default; b=RyrK8spco4RfMwTLxnj8d//axAI6UN\n\tHIR0xj076GFB0Iqjvw9rOu7btvjfDEhXdYI9wMofypsoEOnKuo87+7FYatQdJFbO\n\tmn8MsyUppMSAbRTndkyKhBU0kPv5jE6JoN+I+r3UnwmelFrObgeSpy21KW/Z+Xbm\n\tzycgMpVe8YSAs=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; s=default; bh=JW3gMGGLShusWgibiXGz6WsdqKE=; b=Yu9f\n\t11pDms4UYR6rl4hpCiHs2tYUc8MUtMnR4K6qkAZpfk1plL9jcvLV+nY61Q0yxZI3\n\tBz3PgLH9fTRuCFtfT3ZI9G8epyOwJEyy+bBb3iMBy5svyljGs8Ilc+vOG1I8ZBqb\n\tvtg/C8VHLKbmqvJ3ueiSg7Z/mbtlH6e/4Ll03LY=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n\tRP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy=","X-Spam-User":"qpsmtpd, 2 recipients","X-HELO":"foss.arm.com","Date":"Thu, 5 Oct 2017 17:53:34 +0100","From":"Catalin Marinas ","To":"Dave Martin ","Cc":"linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Ard Biesheuvel\n\t, Szabolcs Nagy ,\n\tgdb@sourceware.org, Yao Qi ,\n\tWill Deacon , Richard Sandiford\n\t, \tAlan Hayward , Alex\n\t=?iso-8859-1?q?Benn=E9e?= ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","Message-ID":"<20171005165334.cstx6fszl7shaudg@armageddon.cambridge.arm.com>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-15-git-send-email-Dave.Martin@arm.com>\n\t<20170913172911.3ca2h6cpju7etifi@localhost>\n\t<20170913190611.GC23415@e103592.cambridge.arm.com>\n\t<20170913221123.y4znytmxtplx24m4@localhost>\n\t<20171005164229.GX3611@e103592.cambridge.arm.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<20171005164229.GX3611@e103592.cambridge.arm.com>","User-Agent":"NeoMutt/20170113 (1.7.2)"}},{"id":1780829,"web_url":"http://patchwork.ozlabs.org/comment/1780829/","msgid":"<20171005170446.GZ3611@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-05T17:04:47","subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Thu, Oct 05, 2017 at 05:53:34PM +0100, Catalin Marinas wrote:\n> On Thu, Oct 05, 2017 at 05:42:29PM +0100, Dave P Martin wrote:\n> > On Wed, Sep 13, 2017 at 03:11:23PM -0700, Catalin Marinas wrote:\n> > > On Wed, Sep 13, 2017 at 08:06:12PM +0100, Dave P Martin wrote:\n> > > > On Wed, Sep 13, 2017 at 10:29:11AM -0700, Catalin Marinas wrote:\n\n[...]\n\n> > > > > Can this be merged with patch 20? It seems to add the PR_ definitions\n> > > > > which get actually used later when the prctl interface is added.\n> > > > \n> > > > This patch is used both by patch 19 and by patch 20, which I preferred\n> > > > not to merge with each other: ptrace and prctl are significantly\n> > > > different things.\n> > > > \n> > > > The prctl bit definitions are added here because they are the canonical\n> > > > definitions used by both interfaces. The ptrace #defines are based on\n> > > > them.\n> > > > \n> > > > Does it make sense if I merge patch 20 into this one and apply patch 19\n> > > > on top? This avoide the appearance of prctl #defines with no prctl\n> > > > implementation.\n> > > \n> > > That's fine, you can bring patch 20 forward. If there are other\n> > > non-trivial issues, feel free to ignore my comment.\n> > \n> > I've had a go at this, but I think it's going to be more trouble than\n> > it's worth -- there are other interdependencies between the patches\n> > which make them tricky to reorder.\n> > \n> > I could add a note in the commit message for this patch explaining why\n> > the prctl flag #defines are being added here. What do you think?\n> \n> As I said, it's up to you. A line in the commit message would do.\n\nOK, I think I'll stick with this then.\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-85477-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"wmc8fyj0\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y7K0456DDz9t2l\n\tfor ;\n\tFri, 6 Oct 2017 04:05:24 +1100 (AEDT)","(qmail 44253 invoked by alias); 5 Oct 2017 17:04:54 -0000","(qmail 44235 invoked by uid 89); 5 Oct 2017 17:04:54 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:in-reply-to; q=dns; s=default; b=jEzg\n\tOqSmJeuYurkMOvbMHOuBP58qdnGQvOlPvkitdWNuqpiUK61GV5XBC0oqHvoJ/4rB\n\tFK1iTcg4Uw0lf0R41T3NziE5uXq4Waep+EkgobtBYt9j/HCmFjYweTS7lJiYOJsT\n\tKyb9jORyFzzF3aedKGMdiRONFk3pJCgzkl//2mQ=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:in-reply-to; s=default; bh=bla39j524D\n\t8A8yJzZZO1CBsEXIA=; b=wmc8fyj09dRbuzdHRZ3+TYhjvqPxCPfGyqlQ2uzX98\n\tsfJQaqAVvn/FYKotgDSXSAYyeDXC3V6Or0GeAMMcw4KN4RkUe6VgJu+r6z3fG/H2\n\t5+lWoaOB8+7fs9sbZurYXuZWqkh5w/RV4G0+KSLXusUkSjqMfTJnOICV24LbFE3Z\n\tk=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n\tRP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:1731","X-Spam-User":"qpsmtpd, 2 recipients","X-HELO":"foss.arm.com","Date":"Thu, 5 Oct 2017 18:04:47 +0100","From":"Dave Martin ","To":"Catalin Marinas ","Cc":"linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Ard Biesheuvel\n\t, Szabolcs Nagy ,\n\tgdb@sourceware.org, Yao Qi ,\n\tAlan Hayward , Will Deacon , \n\tRichard Sandiford , Alex\n\t=?iso-8859-1?q?Benn=E9e?= ,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH v2 14/28] arm64/sve: Backend logic for setting the vector\n\tlength","Message-ID":"<20171005170446.GZ3611@e103592.cambridge.arm.com>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-15-git-send-email-Dave.Martin@arm.com>\n\t<20170913172911.3ca2h6cpju7etifi@localhost>\n\t<20170913190611.GC23415@e103592.cambridge.arm.com>\n\t<20170913221123.y4znytmxtplx24m4@localhost>\n\t<20171005164229.GX3611@e103592.cambridge.arm.com>\n\t<20171005165334.cstx6fszl7shaudg@armageddon.cambridge.arm.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20171005165334.cstx6fszl7shaudg@armageddon.cambridge.arm.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)"}}]