[{"id":1768511,"web_url":"http://patchwork.ozlabs.org/comment/1768511/","msgid":"<87d16ta6ih.fsf@linaro.org>","list_archive_url":null,"date":"2017-09-14T11:01:26","subject":"Re: [PATCH v2 18/28] arm64/sve: Preserve SVE registers around EFI\n\truntime service calls","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"content":"Dave Martin <Dave.Martin@arm.com> writes:\n\n> The EFI runtime services ABI allows EFI to make free use of the\n> FPSIMD registers during EFI runtime service calls, subject to the\n> callee-save requirements of the AArch64 procedure call standard.\n>\n> However, the SVE architecture allows upper bits of the SVE vector\n> registers to be zeroed as a side-effect of FPSIMD V-register\n> writes.  This means that the SVE vector registers must be saved in\n> their entirety in order to avoid data loss: non-SVE-aware EFI\n> implementations cannot restore them correctly.\n>\n> The non-IRQ case is already handled gracefully by\n> kernel_neon_begin().  For the IRQ case, this patch allocates a\n> suitable per-CPU stash buffer for the full SVE register state and\n> uses it to preserve the affected registers around EFI calls.  It is\n> currently unclear how the EFI runtime services ABI will be\n> clarified with respect to SVE, so it safest to assume that the\n> predicate registers and FFR must be saved and restored too.\n>\n> No attempt is made to restore the restore the vector length after\n> a call, for now.  It is deemed rather insane for EFI to change it,\n> and contemporary EFI implementations certainly won't.\n>\n> Signed-off-by: Dave Martin <Dave.Martin@arm.com>\n> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>\n\nReviewed-by: Alex Bennée <alex.bennee@linaro.org>\n\n>\n> ---\n>\n> Changes since v1\n> ----------------\n>\n> Requested by Ard Biesheuvel:\n>\n> * Fix unbalanced ifelse bracing to conform to the kernel coding style.\n>\n> * Make efi_sve_state_used static.\n>\n> Changes related to Alex Bennée's comments:\n>\n> * Migrate away from magic numbers for SVE_VQ_BYTES.\n>\n> Other:\n>\n> * Rename sve_kernel_mode_neon_setup() to sve_efi_setup().\n> The EFI FPSIMD code is something semi-independent from kernel-mode NEON\n> now, so the \"neon\" in the names no longer really makes sense.\n>\n> * Make the EFI FPSIMD setup code dependent on CONFIG_EFI (it's not\n> supposed to work with CONFIG_EFI=n anyway).\n> ---\n>  arch/arm64/kernel/fpsimd.c | 60 +++++++++++++++++++++++++++++++++++++++++-----\n>  1 file changed, 54 insertions(+), 6 deletions(-)\n>\n> diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c\n> index dd89acf..fff9fcf 100644\n> --- a/arch/arm64/kernel/fpsimd.c\n> +++ b/arch/arm64/kernel/fpsimd.c\n> @@ -118,11 +118,13 @@ static int sve_default_vl = -1;\n>  int __ro_after_init sve_max_vl = -1;\n>  /* Set of available vector lengths, as vq_to_bit(vq): */\n>  static __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX);\n> +static void __percpu *efi_sve_state;\n>\n>  #else /* ! CONFIG_ARM64_SVE */\n>\n>  /* Dummy declaration for code that will be optimised out: */\n>  extern __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX);\n> +extern void __percpu *efi_sve_state;\n>\n>  #endif /* ! CONFIG_ARM64_SVE */\n>\n> @@ -447,6 +449,23 @@ int sve_verify_vq_map(void)\n>  \treturn ret;\n>  }\n>\n> +static void __init sve_efi_setup(void)\n> +{\n> +\tif (!IS_ENABLED(CONFIG_EFI))\n> +\t\treturn;\n> +\n> +\t/*\n> +\t * alloc_percpu() warns and prints a backtrace if this goes wrong.\n> +\t * This is evidence of a crippled system and we are returning void,\n> +\t * so no attempt is made to handle this situation here.\n> +\t */\n> +\tBUG_ON(!sve_vl_valid(sve_max_vl));\n> +\tefi_sve_state = __alloc_percpu(\n> +\t\tSVE_SIG_REGS_SIZE(sve_vq_from_vl(sve_max_vl)), SVE_VQ_BYTES);\n> +\tif (!efi_sve_state)\n> +\t\tpanic(\"Cannot allocate percpu memory for EFI SVE save/restore\");\n> +}\n> +\n>  void __init sve_setup(void)\n>  {\n>  \tu64 zcr;\n> @@ -482,6 +501,8 @@ void __init sve_setup(void)\n>  \t\tsve_max_vl);\n>  \tpr_info(\"SVE: default vector length %u bytes per vector\\n\",\n>  \t\tsve_default_vl);\n> +\n> +\tsve_efi_setup();\n>  }\n>\n>  void fpsimd_release_thread(struct task_struct *dead_task)\n> @@ -783,6 +804,7 @@ EXPORT_SYMBOL(kernel_neon_end);\n>\n>  static DEFINE_PER_CPU(struct fpsimd_state, efi_fpsimd_state);\n>  static DEFINE_PER_CPU(bool, efi_fpsimd_state_used);\n> +static DEFINE_PER_CPU(bool, efi_sve_state_used);\n>\n>  /*\n>   * EFI runtime services support functions\n> @@ -808,10 +830,24 @@ void __efi_fpsimd_begin(void)\n>\n>  \tWARN_ON(preemptible());\n>\n> -\tif (may_use_simd())\n> +\tif (may_use_simd()) {\n>  \t\tkernel_neon_begin();\n> -\telse {\n> -\t\tfpsimd_save_state(this_cpu_ptr(&efi_fpsimd_state));\n> +\t} else {\n> +\t\t/*\n> +\t\t * If !efi_sve_state, SVE can't be in use yet and doesn't need\n> +\t\t * preserving:\n> +\t\t */\n> +\t\tif (system_supports_sve() && likely(efi_sve_state)) {\n> +\t\t\tchar *sve_state = this_cpu_ptr(efi_sve_state);\n> +\n> +\t\t\t__this_cpu_write(efi_sve_state_used, true);\n> +\n> +\t\t\tsve_save_state(sve_state + sve_ffr_offset(sve_max_vl),\n> +\t\t\t\t       &this_cpu_ptr(&efi_fpsimd_state)->fpsr);\n> +\t\t} else {\n> +\t\t\tfpsimd_save_state(this_cpu_ptr(&efi_fpsimd_state));\n> +\t\t}\n> +\n>  \t\t__this_cpu_write(efi_fpsimd_state_used, true);\n>  \t}\n>  }\n> @@ -824,10 +860,22 @@ void __efi_fpsimd_end(void)\n>  \tif (!system_supports_fpsimd())\n>  \t\treturn;\n>\n> -\tif (__this_cpu_xchg(efi_fpsimd_state_used, false))\n> -\t\tfpsimd_load_state(this_cpu_ptr(&efi_fpsimd_state));\n> -\telse\n> +\tif (!__this_cpu_xchg(efi_fpsimd_state_used, false)) {\n>  \t\tkernel_neon_end();\n> +\t} else {\n> +\t\tif (system_supports_sve() &&\n> +\t\t    likely(__this_cpu_read(efi_sve_state_used))) {\n> +\t\t\tchar const *sve_state = this_cpu_ptr(efi_sve_state);\n> +\n> +\t\t\tsve_load_state(sve_state + sve_ffr_offset(sve_max_vl),\n> +\t\t\t\t       &this_cpu_ptr(&efi_fpsimd_state)->fpsr,\n> +\t\t\t\t       sve_vq_from_vl(sve_get_vl()) - 1);\n> +\n> +\t\t\t__this_cpu_write(efi_sve_state_used, false);\n> +\t\t} else {\n> +\t\t\tfpsimd_load_state(this_cpu_ptr(&efi_fpsimd_state));\n> +\t\t}\n> +\t}\n>  }\n>\n>  #endif /* CONFIG_KERNEL_MODE_NEON */\n\n\n--\nAlex Bennée","headers":{"Return-Path":"<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"Vuh+K68e\"; \n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"fxvNWA8b\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xtFwN6cTfz9t1G\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tThu, 14 Sep 2017 21:01:56 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dsRu5-000670-Sg; Thu, 14 Sep 2017 11:01:53 +0000","from mail-wr0-x22f.google.com ([2a00:1450:400c:c0c::22f])\n\tby bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dsRu2-00063a-0e for linux-arm-kernel@lists.infradead.org;\n\tThu, 14 Sep 2017 11:01:52 +0000","by mail-wr0-x22f.google.com with SMTP id k20so5526371wre.4\n\tfor <linux-arm-kernel@lists.infradead.org>;\n\tThu, 14 Sep 2017 04:01:29 -0700 (PDT)","from zen.linaro.local ([81.128.185.34])\n\tby smtp.gmail.com with ESMTPSA id\n\tn9sm1746918wmd.12.2017.09.14.04.01.26\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 14 Sep 2017 04:01:26 -0700 (PDT)","from zen (localhost [127.0.0.1])\n\tby zen.linaro.local (Postfix) with ESMTPS id 6F6D13E0049;\n\tThu, 14 Sep 2017 12:01:26 +0100 (BST)"],"DKIM-Signature":["v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:\n\tIn-reply-to:Subject:To:From:References:Reply-To:Content-ID:\n\tContent-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc\n\t:Resent-Message-ID:List-Owner;\n\tbh=t2qgxvPW4Q3FV2G9jJrkg9HlHz5HCKVXQ7DkxAEQae8=;\n\tb=Vuh+K68emQGr/yBJ1qKXRwrxj3\n\tUDvl89lQ52MzqLOpDTvkhVBAu8wjrVcTSueXU5Qj7Cu0scSlSFSnqIzjFu/2p/v2bDEoOohZyDmdB\n\tvzyT/QuHmXzfamAPYS17OsJhvaRG4vPoInpOEdeUAcF8uHZQWOhY6WjS3DozkIIU7oD+vXaGzEOBb\n\tbjjkrTgFUwILsefJHlCh2DOjVsoP8L/jXG3SGvreCy9GnOSUHsT9RPTJD+DfppXOR4ydeUXWtQZnU\n\tdWQkO0SErTm0xbCtqpEX7j2zOzjvXE94U/3QLRCQHGt1SklhGc6+5xhMWBf7OIAW8r6GPOgUyl7lK\n\tbr2C+U8A==;","v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google;\n\th=references:user-agent:from:to:cc:subject:in-reply-to:date\n\t:message-id:mime-version:content-transfer-encoding;\n\tbh=VaS6vfIzC5WVqhvWm1bFaD+oqwtBnI03uGz0bFD3RoI=;\n\tb=fxvNWA8bPaeow6K89+0/7mGPtsFLiUqk5H/2Cj3YS304fWByvKMy2P/t7uSjIn6fkZ\n\t2u7BLD5g+1DM8omAo0J6xUM19RYgQLqLCEi94yIU5Y+i0J20v7Hu+EpSljxnthfVYTro\n\t1Z4OFQdiS5fElJyVgAqXo2XiyIBMfnRkg6I0s="],"X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:references:user-agent:from:to:cc:subject\n\t:in-reply-to:date:message-id:mime-version:content-transfer-encoding; \n\tbh=VaS6vfIzC5WVqhvWm1bFaD+oqwtBnI03uGz0bFD3RoI=;\n\tb=s5w1jGNKMxsaJj+qC/fyyeG56hawaM3psBA+rOMwg98dg2p4bwVKFUVaSgnnox3rqH\n\tNu1/tHELnCITPjg4VP1IgTvKIUEEbUW6MmGkFM8V9Smi8VTTwp3rxsdJ4QtKsfnCLBcV\n\tAALtszz72xBUPROoTRmFGJzLjNGrpu9gzw5b9oMVlUN5QMF2vX5AKYVQ72h3kw/LG19I\n\tD+MLqf2AGFbOKyW1SyIEdZEHppXHCI0WWZhtAYLHsW0FDsuvlYaAuBPBz9z7ezCZ63Ly\n\ty3s0728cIOSdrvvL8lTR7vDoGxJyZ+nNU0CmQwYXNiGOBr/gYqyFr2bDz+hd2RGsmOVJ\n\tZalw==","X-Gm-Message-State":"AHPjjUghChrG5YJM6MnEI5QkhEOfYjWdSjxFC6/Bswr1jrOPaBBsrNf5\n\tbQWlQoRojBvPsrUK","X-Google-Smtp-Source":"AOwi7QDO3D7nGpE64UrOd45PqOqLSGFYzKgJDokWyUjUC2OYwZbgyDur/88gTovJR42frh4xbrWjzg==","X-Received":"by 10.223.186.142 with SMTP id p14mr9322216wrg.169.1505386887758;\n\tThu, 14 Sep 2017 04:01:27 -0700 (PDT)","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-19-git-send-email-Dave.Martin@arm.com>","User-agent":"mu4e 0.9.19; emacs 25.2.50.3","From":"Alex =?utf-8?q?Benn=C3=A9e?= <alex.bennee@linaro.org>","To":"Dave Martin <Dave.Martin@arm.com>","Subject":"Re: [PATCH v2 18/28] arm64/sve: Preserve SVE registers around EFI\n\truntime service calls","In-reply-to":"<1504198860-12951-19-git-send-email-Dave.Martin@arm.com>","Date":"Thu, 14 Sep 2017 12:01:26 +0100","Message-ID":"<87d16ta6ih.fsf@linaro.org>","MIME-Version":"1.0","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170914_040150_224578_69A02732 ","X-CRM114-Status":"GOOD (  22.08  )","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details:   (-2.0 points)\n\tpts rule name              description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno\n\ttrust [2a00:1450:400c:c0c:0:0:0:22f listed in] [list.dnswl.org]\n\t-0.0 SPF_PASS               SPF: sender matches SPF record\n\t-1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":"<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>","List-Archive":"<http://lists.infradead.org/pipermail/linux-arm-kernel/>","List-Post":"<mailto:linux-arm-kernel@lists.infradead.org>","List-Help":"<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>","List-Subscribe":"<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>","Cc":"linux-arch@vger.kernel.org, libc-alpha@sourceware.org,\n\tArd Biesheuvel <ard.biesheuvel@linaro.org>,\n\tSzabolcs Nagy <szabolcs.nagy@arm.com>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tWill Deacon <will.deacon@arm.com>, \n\tRichard Sandiford <richard.sandiford@arm.com>,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}}]