[{"id":1780792,"web_url":"http://patchwork.ozlabs.org/comment/1780792/","msgid":"<59D6603C.2040603@arm.com>","list_archive_url":null,"date":"2017-10-05T16:39:24","subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","submitter":{"id":65667,"url":"http://patchwork.ozlabs.org/api/people/65667/","name":"Szabolcs Nagy","email":"szabolcs.nagy@arm.com"},"content":"On 31/08/17 18:00, Dave Martin wrote:\n> +prctl(PR_SVE_SET_VL, unsigned long arg)\n> +\n> + Sets the vector length of the calling thread and related flags, where\n> + arg == vl | flags.\n> +\n> + vl is the desired vector length, where sve_vl_valid(vl) must be true.\n> +\n> + flags:\n> +\n> +\tPR_SVE_SET_VL_INHERIT\n> +\n> +\t Inherit the current vector length across execve(). Otherwise, the\n> +\t vector length is reset to the system default at execve(). (See\n> +\t Section 9.)\n> +\n> +\tPR_SVE_SET_VL_ONEXEC\n> +\n> +\t Defer the requested vector length change until the next execve().\n> +\t This allows launching of a new program with a different vector\n> +\t length, while avoiding runtime side effects in the caller.\n> +\n> +\t This also overrides the effect of PR_SVE_SET_VL_INHERIT for the\n> +\t first execve().\n> +\n> +\t Without PR_SVE_SET_VL_ONEXEC, any outstanding deferred vector\n> +\t length change is cancelled.\n> +\n\nbased on later text it seems this works if exeve is\ncalled in the same thread as prctl was called in.\n\nthis is a bit weird from user-space pov so it may\nmake sense to state it here explicitly.\n\n> + Return value: a nonnegative on success, or a negative value on error:\n> +\tEINVAL: SVE not supported, invalid vector length requested, or\n> +\t invalid flags.\n> +\n> + On success, the calling thread's vector length is changed to the largest\n> + value supported by the system that is less than or equal to vl.\n> + If vl == SVE_VL_MAX, the calling thread's vector length is changed to the\n> + largest value supported by the system.\n> +\n> + The returned value describes the resulting configuration, encoded as for\n> + PR_SVE_GET_VL.\n> +\n> + Changing the vector length causes all of P0..P15, FFR and all bits of\n> + Z0..V31 except for Z0 bits [127:0] .. Z31 bits [127:0] to become\n> + unspecified. Calling PR_SVE_SET_VL with vl equal to the thread's current\n> + vector length does not constitute a change to the vector length for this\n> + purpose.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-85466-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"psRNzRYH\"; dkim-atps=neutral","sourceware.org; auth=none","spf=none (sender IP is )\n\tsmtp.mailfrom=Szabolcs.Nagy@arm.com; "],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y7JQN5KYhz9t2m\n\tfor ;\n\tFri, 6 Oct 2017 03:39:40 +1100 (AEDT)","(qmail 19997 invoked by alias); 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run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-2.3 required=5.0 tests=AWL, BAYES_00,\n\tRCVD_IN_DNSWL_NONE, SPF_HELO_PASS,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=constitute,\n\tlaunching, Hx-languages-length:1983","X-HELO":"EUR01-DB5-obe.outbound.protection.outlook.com","Message-ID":"<59D6603C.2040603@arm.com>","Date":"Thu, 05 Oct 2017 17:39:24 +0100","From":"Szabolcs Nagy ","User-Agent":"Mozilla/5.0 (X11; Linux x86_64;\n\trv:31.0) Gecko/20100101 Thunderbird/31.8.0","MIME-Version":"1.0","To":"Dave Martin , linux-arm-kernel@lists.infradead.org","CC":"nd@arm.com, Catalin Marinas , Will Deacon\n\t, Ard Biesheuvel , \n\t=?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= ,\n\tRichard Sandiford , \n\tkvmarm@lists.cs.columbia.edu, libc-alpha@sourceware.org, \n\tlinux-arch@vger.kernel.org, Mark Rutland ","Subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-27-git-send-email-Dave.Martin@arm.com>","In-Reply-To":"<1504198860-12951-27-git-send-email-Dave.Martin@arm.com>","Content-Type":"text/plain; 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SFP:1101; SCL:1; SRVR:AM5PR0802MB2484;\n\tH:[10.2.206.69]; FPR:; SPF:None; PTR:InfoNoRecords; A:1; MX:1;\n\tLANG:en; ","Received-SPF":"None (protection.outlook.com: arm.com does not designate\n\tpermitted sender hosts)","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-OriginatorOrg":"arm.com","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"05 Oct 2017 16:39:27.4261\n\t(UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"f34e5979-57d9-4aaa-ad4d-b122a662184d","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"AM5PR0802MB2484"}},{"id":1780825,"web_url":"http://patchwork.ozlabs.org/comment/1780825/","msgid":"<20171005170254.GY3611@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-05T17:02:54","subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Thu, Oct 05, 2017 at 05:39:24PM +0100, Szabolcs Nagy wrote:\n> On 31/08/17 18:00, Dave Martin wrote:\n\n[...]\n\n> > +\tPR_SVE_SET_VL_ONEXEC\n> > +\n> > +\t Defer the requested vector length change until the next execve().\n> > +\t This allows launching of a new program with a different vector\n> > +\t length, while avoiding runtime side effects in the caller.\n> > +\n> > +\t This also overrides the effect of PR_SVE_SET_VL_INHERIT for the\n> > +\t first execve().\n> > +\n> > +\t Without PR_SVE_SET_VL_ONEXEC, any outstanding deferred vector\n> > +\t length change is cancelled.\n> > +\n> \n> based on later text it seems this works if exeve is\n> called in the same thread as prctl was called in.\n> \n> this is a bit weird from user-space pov so it may\n> make sense to state it here explicitly.\n\nTrue. Looking at the prctl(2) man page it looks like other per-thread\nproperties are inherited across execve() in a similar way, but it's at\nleast worth a mention. PR_SET_SECCOMP seems to work like this, for\nexample.\n\nSo, the intention is that you do a prctl(...ONEXEC) in the run up to\nexecve(), rather than doing it at other random times. The primary\nreason for ONEXEC is to avoid the side-effects of actually changing\nthe VL.\n\n\nLooking at this though...\nI wonder whether PR_SVE_SET_VL(... PR_SVE_SET_VL_ONEXEC) should return\nthe VL set for exec, rather than the current VL (which is unchanged by\ndefinition in this case, thus uninteresting).\n\nThis would allow the ONEXEC flag to be used to probe for available VLs\nwithout the other side-effects of changing VL, something like:\n\n\tint old = prctl(PR_SVE_GET_VL);\n\tint ret;\n\n\tret = prctl(PR_SVE_SET_VL, 144 | PR_SVE_SET_VL_ONEXEC);\n\tif (ret == -1) {\n\t\tperror(\"PR_SVE_SET_VL\");\n\t\tgoto error;\n\t}\n\n\tif ((ret & PR_SVE_VL_LEN_MASK) == 144)\n\t\thave_vl_144 = true;\n\n\tif (prctl(PR_SVE_SET_VL, old | PR_SVE_SET_VL_ONEXEC) == -1) {\n\t\tperror(\"PR_SVE_SET_VL\");\n\t\tgoto error;\n\t}\n\n\nThis does _not_ do the expected thing right now, since there's no\ndirect way to retrieve thread.sve_vl_onexec directly from the kernel\n(and it didn't really seem justified to add one).\n\nThoughts?\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-85476-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"LhAfI/+j\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y7JxW5ZFpz9t1G\n\tfor ;\n\tFri, 6 Oct 2017 04:03:11 +1100 (AEDT)","(qmail 41616 invoked by alias); 5 Oct 2017 17:03:02 -0000","(qmail 41577 invoked by uid 89); 5 Oct 2017 17:03:02 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:in-reply-to; q=dns; s=default; b=ENnW\n\tyPXszUiisMvS3yTd6oSf0CMnZW9gLIpTnAXMI63KqaJiaZLHYZheVgXXsYTxpqI1\n\t0dEVm8DiyIboR/58LA/LZaFH7ZdvnL/sWTLFf/r8JFqRaa2P7LvjR+6MEGeDAkeH\n\tCxjwht3ehsisJYeZlSXdcQHVmRLz4CO/BKyRM3s=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:in-reply-to; s=default; bh=zda0ofu/lQ\n\tspwiGKkHqcYM/JC4A=; b=LhAfI/+jpAHyNG0HZdlVzbh/1Hnl8HP1uWsFPPisib\n\tZMGMxRocNZ/wgy/jwkdPdv1mdlpkEzxgDPTZcfUgKafdXIQdLXW8PdRx3i9xkLRP\n\tnyYaS4PODnDFb14Ktpz7ENuEgXmKbodq9riUoi3mMkysmsgrGba9jcJSdYqveGGm\n\t0=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n\tRP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:2131","X-HELO":"foss.arm.com","Date":"Thu, 5 Oct 2017 18:02:54 +0100","From":"Dave Martin ","To":"Szabolcs Nagy ","Cc":"linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org, Mark\n\tRutland , libc-alpha@sourceware.org, Ard\n\tBiesheuvel , Catalin Marinas\n\t, \tWill Deacon ,\n\tRichard Sandiford , nd@arm.com, Alex\n\t=?iso-8859-1?q?Benn=E9e?= ,\n\tkvmarm@lists.cs.columbia.edu","Subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","Message-ID":"<20171005170254.GY3611@e103592.cambridge.arm.com>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-27-git-send-email-Dave.Martin@arm.com>\n\t<59D6603C.2040603@arm.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<59D6603C.2040603@arm.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)"}},{"id":1781741,"web_url":"http://patchwork.ozlabs.org/comment/1781741/","msgid":"<59D7A4AF.40408@arm.com>","list_archive_url":null,"date":"2017-10-06T15:43:43","subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","submitter":{"id":65667,"url":"http://patchwork.ozlabs.org/api/people/65667/","name":"Szabolcs Nagy","email":"szabolcs.nagy@arm.com"},"content":"On 31/08/17 18:00, Dave Martin wrote:\n> +9. System runtime configuration\n> +--------------------------------\n> +\n> +* To mitigate the ABI impact of expansion of the signal frame, a policy\n> + mechanism is provided for administrators, distro maintainers and developers\n> + to set the default vector length for userspace processes:\n> +\n> +/proc/cpu/sve_default_vector_length\n\n\nelsewhere in the patch series i see\n\n/proc/sys/abi/sve_default_vector_length\n\nis this supposed to be the same?","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-85513-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"W9VT5tqh\"; dkim-atps=neutral","sourceware.org; auth=none","spf=none (sender IP is )\n\tsmtp.mailfrom=Szabolcs.Nagy@arm.com; "],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y7v7k0Zh9z9t3m\n\tfor ;\n\tSat, 7 Oct 2017 02:44:01 +1100 (AEDT)","(qmail 67940 invoked by alias); 6 Oct 2017 15:43:55 -0000","(qmail 67763 invoked by uid 89); 6 Oct 2017 15:43:54 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:message-id:date:from:mime-version:to:cc\n\t:subject:references:in-reply-to:content-type\n\t:content-transfer-encoding; q=dns; s=default; b=R3rGtEpmLVse8cE/\n\tCeIBk5LPFaxBHZrVACCJVG8vZXqSOqk9wih+8X/OmsTzJnxLFa9hs0HTX+SeyZbY\n\tEzcQSPHD9Jg+Fvc3AmusTf8D83Xl2uKDq1ZwcUzi7ZEqLaYgGtyh3cqwtTxDsImP\n\tVWPXk8JlAu9kHij2Gp78IvQ0Yfo=","DKIM-Signature":"v=1; a=rsa-sha1; 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Linux x86_64;\n\trv:31.0) Gecko/20100101 Thunderbird/31.8.0","MIME-Version":"1.0","To":"Dave Martin , linux-arm-kernel@lists.infradead.org","CC":"nd@arm.com, Catalin Marinas , Will Deacon\n\t, Ard Biesheuvel , \n\t=?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= ,\n\tRichard Sandiford , \n\tkvmarm@lists.cs.columbia.edu, libc-alpha@sourceware.org, \n\tlinux-arch@vger.kernel.org, Mark Rutland ","Subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-27-git-send-email-Dave.Martin@arm.com>","In-Reply-To":"<1504198860-12951-27-git-send-email-Dave.Martin@arm.com>","Content-Type":"text/plain; charset=utf-8","Content-Transfer-Encoding":"7bit","X-ClientProxiedBy":"HE1PR0202CA0015.eurprd02.prod.outlook.com\n\t(2603:10a6:3:8c::25) To HE1PR0802MB2489.eurprd08.prod.outlook.com\n\t(2603:10a6:3:d8::23)","X-MS-PublicTrafficType":"Email","X-MS-Office365-Filtering-Correlation-Id":"bd783be2-8fe3-4990-ffd2-08d50cd1091e","X-MS-Office365-Filtering-HT":"Tenant","X-Microsoft-Antispam":"UriScan:; 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SFP:1101; SCL:1; SRVR:HE1PR0802MB2489;\n\tH:[10.2.206.69]; FPR:; SPF:None; PTR:InfoNoRecords; MX:1; A:1;\n\tLANG:en; ","Received-SPF":"None (protection.outlook.com: arm.com does not designate\n\tpermitted sender hosts)","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-OriginatorOrg":"arm.com","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"06 Oct 2017 15:43:47.7111\n\t(UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"f34e5979-57d9-4aaa-ad4d-b122a662184d","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"HE1PR0802MB2489"}},{"id":1781823,"web_url":"http://patchwork.ozlabs.org/comment/1781823/","msgid":"<20171006173715.GC3611@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-06T17:37:15","subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Fri, Oct 06, 2017 at 04:43:43PM +0100, Szabolcs Nagy wrote:\n> On 31/08/17 18:00, Dave Martin wrote:\n> > +9. System runtime configuration\n> > +--------------------------------\n> > +\n> > +* To mitigate the ABI impact of expansion of the signal frame, a policy\n> > + mechanism is provided for administrators, distro maintainers and developers\n> > + to set the default vector length for userspace processes:\n> > +\n> > +/proc/cpu/sve_default_vector_length\n> \n> \n> elsewhere in the patch series i see\n> \n> /proc/sys/abi/sve_default_vector_length\n> \n> is this supposed to be the same?\n\nGood spot, thanks!\n\n/proc/cpu/ was the old location: they should both say /proc/abi/.\nI'll fix it.\n\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-85517-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"lSjlDQak\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y7xfd1R91z9t3R\n\tfor ;\n\tSat, 7 Oct 2017 04:37:29 +1100 (AEDT)","(qmail 31569 invoked by alias); 6 Oct 2017 17:37:23 -0000","(qmail 31557 invoked by uid 89); 6 Oct 2017 17:37:22 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:in-reply-to; q=dns; s=default; b=hd7i\n\th0qiqzc0sXoAIvPGHqSJ9IIQrzYj0Js48FvoP2/+yy3gzkWlpoznedNMYlnTc2AC\n\tfTmjV7h2YCMuT2Y3ukHmHdFQ3hOxcCWeK/as85D6cVCS6hneNY83ioxX+ho2yUnN\n\tTO81qlcOl3RaPYyk5V70OJarokfflnNKmfdXpWE=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:in-reply-to; s=default; bh=1UAAQzPPrI\n\tx8I/6LwuUOnDXOa8s=; b=lSjlDQakDG9HjEIgLf/XIZljL5EfeC8kSorPCjJLDw\n\t+E6vXRoaGevnZu3uZA7OkqRMOiyumv94jgDEgf5gDsLEhDp3iio7rGs0trvmyxfg\n\t0a5U4cRcjkPSe3L+yhJFwpKUT9zAnUbjBED7hTbdMRX28ygUQtDUl0E350Txssh9\n\t4=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-6.9 required=5.0 tests=BAYES_00, GIT_PATCH_2,\n\tRP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:737,\n\tpolicy","X-HELO":"foss.arm.com","Date":"Fri, 6 Oct 2017 18:37:15 +0100","From":"Dave Martin ","To":"Szabolcs Nagy ","Cc":"linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org, Mark\n\tRutland , libc-alpha@sourceware.org, Ard\n\tBiesheuvel , Catalin Marinas\n\t, \tWill Deacon ,\n\tRichard Sandiford , nd@arm.com, Alex\n\t=?iso-8859-1?q?Benn=E9e?= ,\n\tkvmarm@lists.cs.columbia.edu","Subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","Message-ID":"<20171006173715.GC3611@e103592.cambridge.arm.com>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-27-git-send-email-Dave.Martin@arm.com>\n\t<59D7A4AF.40408@arm.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<59D7A4AF.40408@arm.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)"}},{"id":1782641,"web_url":"http://patchwork.ozlabs.org/comment/1782641/","msgid":"<878tgkbr6m.fsf@linaro.org>","list_archive_url":null,"date":"2017-10-09T09:34:25","subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"content":"Dave Martin writes:\n\n> On Fri, Oct 06, 2017 at 04:43:43PM +0100, Szabolcs Nagy wrote:\n>> On 31/08/17 18:00, Dave Martin wrote:\n>> > +9. System runtime configuration\n>> > +--------------------------------\n>> > +\n>> > +* To mitigate the ABI impact of expansion of the signal frame, a policy\n>> > + mechanism is provided for administrators, distro maintainers and developers\n>> > + to set the default vector length for userspace processes:\n>> > +\n>> > +/proc/cpu/sve_default_vector_length\n>>\n>>\n>> elsewhere in the patch series i see\n>>\n>> /proc/sys/abi/sve_default_vector_length\n>>\n>> is this supposed to be the same?\n>\n> Good spot, thanks!\n>\n> /proc/cpu/ was the old location: they should both say /proc/abi/.\n> I'll fix it.\n\nIsn't /sys (or rather sysfs) the preferred location for modern control\nknobs that mirror the kernels object model or is SVE a special case for\nextending /proc?\n\n\n>\n> ---Dave\n\n\n--\nAlex Bennée","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-85536-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"NylC8XDw\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y9Zp45mxsz9tXx\n\tfor ;\n\tMon, 9 Oct 2017 20:34:36 +1100 (AEDT)","(qmail 32197 invoked by alias); 9 Oct 2017 09:34:30 -0000","(qmail 32184 invoked by uid 89); 9 Oct 2017 09:34:30 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:references:from:to:cc:subject:in-reply-to:date\n\t:message-id:mime-version:content-type:content-transfer-encoding;\n\tq=dns; s=default; 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a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:references:user-agent:from:to:cc:subject\n\t:in-reply-to:date:message-id:mime-version:content-transfer-encoding; \n\tbh=7Tdv/ftctkLDkaxt25+4Z1W6F+UxAMHNStAVWdLT6O4=;\n\tb=cxjOieU2vT7kxNcz6fdMuesFff7nzgTderiAgIa48sNbDAsRvvaT/2of3pkNH8mbNI\n\t34rGhDbqCP6s8S9WbTFPnb0enUwHTiAyqNX3WCbNaYt2Ec/LkK9F4jclMepyQVfvd6YR\n\ttaH5R7K0ID2c1K4g/KXUxyolpCefyYA3va++DBTjD7dLzHSvHFT7Fu6XD7X4BdJAK9Xr\n\t8/UOX5W0tkOAz+EWL6DKuwiQksu1BMGWFqy/FlUBbD4VGayPp3VxJc54UfSYZMjqDKP2\n\tl5Z6RBE7PzgVnXsA1nd1rcDJnSHSAntrPZNBEaCyLzIPB8xORmAHlsboeG/4vS6gZUpg\n\tm4Mg==","X-Gm-Message-State":"AMCzsaXGdRSzrD9SZr4lZZJ/OWvoK2kVhGf2pWLOYZlcuXmMIWC/kPDO\n\tSwZblsQ0OMKe7b97fPMIX5BB7g==","X-Google-Smtp-Source":"AOwi7QAIgptct2ETYz4M48ycDlqGrJ4peFY5rYvfiEZ3UiW0gIxlzVWrUwgCZx7IGSugxxppFVC/RA==","X-Received":"by 10.28.1.70 with SMTP id 67mr6848857wmb.34.1507541666488;\n\tMon, 09 Oct 2017 02:34:26 -0700 (PDT)","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-27-git-send-email-Dave.Martin@arm.com>\n\t<59D7A4AF.40408@arm.com>\n\t<20171006173715.GC3611@e103592.cambridge.arm.com>","User-agent":"mu4e 0.9.19; emacs 26.0.60","From":"Alex =?utf-8?q?Benn=C3=A9e?= ","To":"Dave Martin ","Cc":"Szabolcs Nagy ,\n\tlinux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org,\n\tMark Rutland , libc-alpha@sourceware.org,\n\tArd Biesheuvel ,\n\tCatalin Marinas ,\n\tWill Deacon ,\n\tRichard Sandiford , nd@arm.com,\n\tkvmarm@lists.cs.columbia.edu","Subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","In-reply-to":"<20171006173715.GC3611@e103592.cambridge.arm.com>","Date":"Mon, 09 Oct 2017 10:34:25 +0100","Message-ID":"<878tgkbr6m.fsf@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Transfer-Encoding":"quoted-printable"}},{"id":1782661,"web_url":"http://patchwork.ozlabs.org/comment/1782661/","msgid":"<20171009094930.GD3611@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-09T09:49:32","subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Mon, Oct 09, 2017 at 10:34:25AM +0100, Alex Bennée wrote:\n> \n> Dave Martin writes:\n> \n> > On Fri, Oct 06, 2017 at 04:43:43PM +0100, Szabolcs Nagy wrote:\n> >> On 31/08/17 18:00, Dave Martin wrote:\n> >> > +9. System runtime configuration\n> >> > +--------------------------------\n> >> > +\n> >> > +* To mitigate the ABI impact of expansion of the signal frame, a policy\n> >> > + mechanism is provided for administrators, distro maintainers and developers\n> >> > + to set the default vector length for userspace processes:\n> >> > +\n> >> > +/proc/cpu/sve_default_vector_length\n> >>\n> >>\n> >> elsewhere in the patch series i see\n> >>\n> >> /proc/sys/abi/sve_default_vector_length\n> >>\n> >> is this supposed to be the same?\n> >\n> > Good spot, thanks!\n> >\n> > /proc/cpu/ was the old location: they should both say /proc/abi/.\n> > I'll fix it.\n> \n> Isn't /sys (or rather sysfs) the preferred location for modern control\n> knobs that mirror the kernels object model or is SVE a special case for\n> extending /proc?\n\nI couldn't figure out which kernel object this maps to. There's no\ndevice, no driver. This isn't even per-cpu.\n\nsysctl is already used for similar knobs to this one, so I followed that\nprecedent -- though if someone argues strongly enough it could be\nchanged.\n\nAre there already examples of arch controls like this in sysfs? I\nwasn't aware of any, but I didn't look all that hard...\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-85537-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"PQ1j/a5a\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y9b7b5KSRz9tXv\n\tfor ;\n\tMon, 9 Oct 2017 20:49:47 +1100 (AEDT)","(qmail 61040 invoked by alias); 9 Oct 2017 09:49:40 -0000","(qmail 61027 invoked by uid 89); 9 Oct 2017 09:49:39 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; q=dns; s=default; b=uqp8549da2mA2Bu5Jwdawiij56ds44\n\tcN9iCsdW5EgwCdJmpdqVriF6stoOZ0p93k0TtFGQXybnMwNUal/317Cr7LcY7dMV\n\tefiCeScC0+WkZ8EuOa/BoQ/WAhjvzecl57zYzZCHTP2aRZeY53fleGoiYz3qnFNh\n\trL8bp3MOZPoYM=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; s=default; bh=JnP37rZ+FthrvgFI350yiYIPGzI=; b=PQ1j\n\t/a5ar1u0OVJOr1UaodaWOowqV8snp2SC2KcCGB0/eT4z7o6b5VKvdtQ/Iv1NgeL8\n\tCJlyt643mMbJYv3xO6LEEL/ZoEUwMvY5NpKxZHiZZpCFO+idGfELPUtt+q98L1s+\n\tFbRkXWUJCjJTtX0zQXwZJ4OirFvb9E/+3qKJJpc=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-6.9 required=5.0 tests=BAYES_00, GIT_PATCH_2,\n\tRP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=strongly, policy,\n\tHContent-Transfer-Encoding:8bit","X-HELO":"foss.arm.com","Date":"Mon, 9 Oct 2017 10:49:32 +0100","From":"Dave Martin ","To":"Alex =?iso-8859-1?q?Benn=E9e?= ","Cc":"linux-arch@vger.kernel.org, Mark Rutland ,\n\tlibc-alpha@sourceware.org, Ard Biesheuvel ,\n\tSzabolcs Nagy ,\n\tCatalin Marinas ,\n\tWill Deacon ,\n\tRichard Sandiford , nd@arm.com,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","Message-ID":"<20171009094930.GD3611@e103592.cambridge.arm.com>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-27-git-send-email-Dave.Martin@arm.com>\n\t<59D7A4AF.40408@arm.com>\n\t<20171006173715.GC3611@e103592.cambridge.arm.com>\n\t<878tgkbr6m.fsf@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<878tgkbr6m.fsf@linaro.org>","User-Agent":"Mutt/1.5.23 (2014-03-12)"}},{"id":1782869,"web_url":"http://patchwork.ozlabs.org/comment/1782869/","msgid":"<87376sbejo.fsf@linaro.org>","list_archive_url":null,"date":"2017-10-09T14:07:23","subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"content":"Dave Martin writes:\n\n> On Mon, Oct 09, 2017 at 10:34:25AM +0100, Alex Bennée wrote:\n>>\n>> Dave Martin writes:\n>>\n>> > On Fri, Oct 06, 2017 at 04:43:43PM +0100, Szabolcs Nagy wrote:\n>> >> On 31/08/17 18:00, Dave Martin wrote:\n>> >> > +9. System runtime configuration\n>> >> > +--------------------------------\n>> >> > +\n>> >> > +* To mitigate the ABI impact of expansion of the signal frame, a policy\n>> >> > + mechanism is provided for administrators, distro maintainers and developers\n>> >> > + to set the default vector length for userspace processes:\n>> >> > +\n>> >> > +/proc/cpu/sve_default_vector_length\n>> >>\n>> >>\n>> >> elsewhere in the patch series i see\n>> >>\n>> >> /proc/sys/abi/sve_default_vector_length\n>> >>\n>> >> is this supposed to be the same?\n>> >\n>> > Good spot, thanks!\n>> >\n>> > /proc/cpu/ was the old location: they should both say /proc/abi/.\n>> > I'll fix it.\n>>\n>> Isn't /sys (or rather sysfs) the preferred location for modern control\n>> knobs that mirror the kernels object model or is SVE a special case for\n>> extending /proc?\n>\n> I couldn't figure out which kernel object this maps to. There's no\n> device, no driver. This isn't even per-cpu.\n\nHmm I can see:\n\n /sys/devices/system/cpu\n\nOn both my x86 and arm64 systems - but I guess this is more ABIish than\nCPU feature related.\n\n> sysctl is already used for similar knobs to this one, so I followed that\n> precedent -- though if someone argues strongly enough it could be\n> changed.\n>\n> Are there already examples of arch controls like this in sysfs? I\n> wasn't aware of any, but I didn't look all that hard...\n\nGiven the paucity of the /proc/sys/abi on both systems I guess this sort\nof knob is rare enough that people haven't expressed a strong preference\nfor sysfs here. I have no objection to staying with /proc/sys/abi/.\n\n--\nAlex Bennée","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-85549-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"xFSLY8vM\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y9hs34pZtz9tXF\n\tfor ;\n\tTue, 10 Oct 2017 01:07:35 +1100 (AEDT)","(qmail 104275 invoked by alias); 9 Oct 2017 14:07:30 -0000","(qmail 104260 invoked by uid 89); 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emacs 26.0.60","From":"Alex =?utf-8?q?Benn=C3=A9e?= ","To":"Dave Martin ","Cc":"linux-arch@vger.kernel.org, Mark Rutland ,\n\tlibc-alpha@sourceware.org, Ard Biesheuvel ,\n\tSzabolcs Nagy ,\n\tCatalin Marinas ,\n\tWill Deacon ,\n\tRichard Sandiford , nd@arm.com,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","In-reply-to":"<20171009094930.GD3611@e103592.cambridge.arm.com>","Date":"Mon, 09 Oct 2017 15:07:23 +0100","Message-ID":"<87376sbejo.fsf@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Transfer-Encoding":"quoted-printable"}},{"id":1782974,"web_url":"http://patchwork.ozlabs.org/comment/1782974/","msgid":"<20171009162041.GE3611@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-09T16:20:41","subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Mon, Oct 09, 2017 at 03:07:23PM +0100, Alex Bennée wrote:\n> \n> Dave Martin writes:\n> \n> > On Mon, Oct 09, 2017 at 10:34:25AM +0100, Alex Bennée wrote:\n> >>\n> >> Dave Martin writes:\n> >>\n> >> > On Fri, Oct 06, 2017 at 04:43:43PM +0100, Szabolcs Nagy wrote:\n> >> >> On 31/08/17 18:00, Dave Martin wrote:\n> >> >> > +9. System runtime configuration\n> >> >> > +--------------------------------\n> >> >> > +\n> >> >> > +* To mitigate the ABI impact of expansion of the signal frame, a policy\n> >> >> > + mechanism is provided for administrators, distro maintainers and developers\n> >> >> > + to set the default vector length for userspace processes:\n> >> >> > +\n> >> >> > +/proc/cpu/sve_default_vector_length\n> >> >>\n> >> >>\n> >> >> elsewhere in the patch series i see\n> >> >>\n> >> >> /proc/sys/abi/sve_default_vector_length\n> >> >>\n> >> >> is this supposed to be the same?\n> >> >\n> >> > Good spot, thanks!\n> >> >\n> >> > /proc/cpu/ was the old location: they should both say /proc/abi/.\n> >> > I'll fix it.\n> >>\n> >> Isn't /sys (or rather sysfs) the preferred location for modern control\n> >> knobs that mirror the kernels object model or is SVE a special case for\n> >> extending /proc?\n> >\n> > I couldn't figure out which kernel object this maps to. There's no\n> > device, no driver. This isn't even per-cpu.\n> \n> Hmm I can see:\n> \n> /sys/devices/system/cpu\n> \n> On both my x86 and arm64 systems - but I guess this is more ABIish than\n> CPU feature related.\n> \n> > sysctl is already used for similar knobs to this one, so I followed that\n> > precedent -- though if someone argues strongly enough it could be\n> > changed.\n> >\n> > Are there already examples of arch controls like this in sysfs? I\n> > wasn't aware of any, but I didn't look all that hard...\n> \n> Given the paucity of the /proc/sys/abi on both systems I guess this sort\n> of knob is rare enough that people haven't expressed a strong preference\n> for sysfs here. I have no objection to staying with /proc/sys/abi/.\n\nThat was my thinking: sysctls tend to control the kernel, especially\nprocess behaviour, whereas /sys/ controls devices and subsystems.\nThat's not a concrete rule though and not written down, and doubtless a\nmajor new set of sysctls would be shot down regardless of what they do.\n\nPart of the problem with /proc is that people historically put things in\nthere that have random ad-hoc behaviour and semantics. The sysctl\nframework at least imposes some sanity here.\n\nThere is also some support for specialising sysctls to user namespaces,\nwhich makes some sense in that /proc/sys/abi/* should probably be per-\ncontainer -- though whether it's ever considered important enough to\nactually be implemented is another question. I certainly don't attempt\nto do it today.\n\nI don't know how sysfs interacts with namespaces, but probably it can.\n\nI guess I'll wait for someone to object loudly...\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-85558-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"pRKwHZht\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y9lpw3vtyz9tXx\n\tfor ;\n\tTue, 10 Oct 2017 03:20:56 +1100 (AEDT)","(qmail 113042 invoked by alias); 9 Oct 2017 16:20:50 -0000","(qmail 113030 invoked by uid 89); 9 Oct 2017 16:20:50 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; q=dns; s=default; b=eIRTf10xwxQXCpHk9S9UJUHr7wyOpm\n\tLu66N9lYG5gbqGuFfuiIU+w3iHbvIoBtoQTH6sSwaXH70p6OhrWDdyq4xa32olMV\n\t61d4Y9MOgPTbbDE3UjDS8I00JgSYMEJw9hQVk+PbYSRlDRIgv/Ft6Z6KWWGr1+US\n\to8UlbTnqXsHqg=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; s=default; bh=B9Pd6nu4lBw4JAV5WnnPmr+tgps=; b=pRKw\n\tHZht74xoj0TbhUpis2w2btoOl06n2nN0mpAEeJ/J4Kb6h0t/xP1qnfUIzv5nXJ9s\n\tpyJnAp5XTf+B8YUjcarM0ZPTNwhV4hnFvUO8loyvRpoPSYseZxEb2mGJtnv3SUk2\n\tFr42rVTn0hM87JqIBrSktKK//6Z3naFaoK/J3s0=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-6.9 required=5.0 tests=BAYES_00, GIT_PATCH_2,\n\tRP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=shot","X-HELO":"foss.arm.com","Date":"Mon, 9 Oct 2017 17:20:41 +0100","From":"Dave Martin ","To":"Alex =?iso-8859-1?q?Benn=E9e?= ","Cc":"linux-arch@vger.kernel.org, Mark Rutland ,\n\tlibc-alpha@sourceware.org, Ard Biesheuvel ,\n\tSzabolcs Nagy ,\n\tCatalin Marinas ,\n\tWill Deacon ,\n\tRichard Sandiford , nd@arm.com,\n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH v2 26/28] arm64/sve: Add documentation","Message-ID":"<20171009162041.GE3611@e103592.cambridge.arm.com>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-27-git-send-email-Dave.Martin@arm.com>\n\t<59D7A4AF.40408@arm.com>\n\t<20171006173715.GC3611@e103592.cambridge.arm.com>\n\t<878tgkbr6m.fsf@linaro.org>\n\t<20171009094930.GD3611@e103592.cambridge.arm.com>\n\t<87376sbejo.fsf@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<87376sbejo.fsf@linaro.org>","User-Agent":"Mutt/1.5.23 (2014-03-12)"}}]