[{"id":1767884,"web_url":"http://patchwork.ozlabs.org/comment/1767884/","msgid":"<20170913133206.rwobtu7ft5nrsh4p@localhost>","list_archive_url":null,"date":"2017-09-13T13:32:06","subject":"Re: [PATCH v2 10/28] arm64/sve: Low-level CPU setup","submitter":{"id":938,"url":"http://patchwork.ozlabs.org/api/people/938/","name":"Catalin Marinas","email":"catalin.marinas@arm.com"},"content":"On Thu, Aug 31, 2017 at 06:00:42PM +0100, Dave P Martin wrote:\n> diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S\n> index 877d42f..dd22ef2 100644\n> --- a/arch/arm64/mm/proc.S\n> +++ b/arch/arm64/mm/proc.S\n> @@ -27,6 +27,7 @@\n> #include \n> #include \n> #include \n> +#include \n> \n> #ifdef CONFIG_ARM64_64K_PAGES\n> #define TCR_TG_FLAGS\tTCR_TG0_64K | TCR_TG1_64K\n> @@ -186,8 +187,17 @@ ENTRY(__cpu_setup)\n> \ttlbi\tvmalle1\t\t\t\t// Invalidate local TLB\n> \tdsb\tnsh\n> \n> -\tmov\tx0, #3 << 20\n> -\tmsr\tcpacr_el1, x0\t\t\t// Enable FP/ASIMD\n> +\tmov\tx0, #3 << 20\t\t\t// FEN\n> +\n> +\t/* SVE */\n> +\tmrs\tx5, id_aa64pfr0_el1\n> +\tubfx\tx5, x5, #ID_AA64PFR0_SVE_SHIFT, #4\n> +\tcbz\tx5, 1f\n> +\n> +\tbic\tx0, x0, #CPACR_EL1_ZEN\n> +\torr\tx0, x0, #CPACR_EL1_ZEN_EL1EN\t// SVE: trap for EL0, not EL1\n> +1:\tmsr\tcpacr_el1, x0\t\t\t// Enable FP/ASIMD\n\nFor EL1, I wonder whether we could move this later to cpufeature.c. IIRC\nI tried to do the same with FPSIMD but hit an issue with EFI run-time\nservices (I may be wrong though).","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"pJJ7ysOo\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsjJj6L2Kz9sNV\n\tfor ;\n\tWed, 13 Sep 2017 23:32:37 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1ds7mM-0000uY-JK; Wed, 13 Sep 2017 13:32:34 +0000","from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]\n\thelo=foss.arm.com)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1ds7mI-0000sp-Vf for linux-arm-kernel@lists.infradead.org;\n\tWed, 13 Sep 2017 13:32:32 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 79B771596;\n\tWed, 13 Sep 2017 06:32:09 -0700 (PDT)","from localhost (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\t659263F58C; Wed, 13 Sep 2017 06:32:09 -0700 (PDT)","from cmarinas by localhost with local (Exim 4.89)\n\t(envelope-from )\n\tid 1ds7lv-0005Xe-3E; Wed, 13 Sep 2017 06:32:07 -0700"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=Y4okK2pUNrict/hWBspxR5v9bOlwmFNwatqLLF+R4cY=;\n\tb=pJJ7ysOo43fTOI\n\t1yLwSO228lDWd7RVGKf4jr70dIEPFuBj3503bE9VrZxgSkAZqgYyEx8WiGNfq1nQm/U0Gzt+6/rMi\n\tFROCY7ABSomespCMG418B3657k5tRDqUCYZWgh8vxyydyrT/PfRwRCN+6WcOGLOWhGe3dXzMgGKI0\n\tzugy7KmxynruL14zOAVjXWalr2qkcdlGXR/ao/EiPqieNkJBF9znCeLjAWA9CPUew25gTh1sofk+x\n\tYDHS8En1GpnQTmsn/4QWOA0AqQdld2twB+VnOzUZxJVUaMd0OmrMSkIE8KG4JORD04rV0BlUIa1hk\n\tFUStXWNsiJ5AFgKwwI6A==;","Date":"Wed, 13 Sep 2017 06:32:06 -0700","From":"Catalin Marinas ","To":"Dave Martin ","Subject":"Re: [PATCH v2 10/28] arm64/sve: Low-level CPU setup","Message-ID":"<20170913133206.rwobtu7ft5nrsh4p@localhost>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-11-git-send-email-Dave.Martin@arm.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<1504198860-12951-11-git-send-email-Dave.Martin@arm.com>","User-Agent":"NeoMutt/20170113 (1.7.2)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170913_063231_036985_799596ED ","X-CRM114-Status":"UNSURE ( 9.20 )","X-CRM114-Notice":"Please train this message.","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Ard Biesheuvel\n\t, Szabolcs Nagy ,\n\tRichard Sandiford , \n\tWill Deacon , Alex =?iso-8859-1?q?Benn=E9e?=\n\t, kvmarm@lists.cs.columbia.edu,\n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1768099,"web_url":"http://patchwork.ozlabs.org/comment/1768099/","msgid":"<20170913192110.GE23415@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-09-13T19:21:11","subject":"Re: [PATCH v2 10/28] arm64/sve: Low-level CPU setup","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Wed, Sep 13, 2017 at 06:32:06AM -0700, Catalin Marinas wrote:\n> On Thu, Aug 31, 2017 at 06:00:42PM +0100, Dave P Martin wrote:\n> > diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S\n> > index 877d42f..dd22ef2 100644\n> > --- a/arch/arm64/mm/proc.S\n> > +++ b/arch/arm64/mm/proc.S\n> > @@ -27,6 +27,7 @@\n> > #include \n> > #include \n> > #include \n> > +#include \n> > \n> > #ifdef CONFIG_ARM64_64K_PAGES\n> > #define TCR_TG_FLAGS\tTCR_TG0_64K | TCR_TG1_64K\n> > @@ -186,8 +187,17 @@ ENTRY(__cpu_setup)\n> > \ttlbi\tvmalle1\t\t\t\t// Invalidate local TLB\n> > \tdsb\tnsh\n> > \n> > -\tmov\tx0, #3 << 20\n> > -\tmsr\tcpacr_el1, x0\t\t\t// Enable FP/ASIMD\n> > +\tmov\tx0, #3 << 20\t\t\t// FEN\n> > +\n> > +\t/* SVE */\n> > +\tmrs\tx5, id_aa64pfr0_el1\n> > +\tubfx\tx5, x5, #ID_AA64PFR0_SVE_SHIFT, #4\n> > +\tcbz\tx5, 1f\n> > +\n> > +\tbic\tx0, x0, #CPACR_EL1_ZEN\n> > +\torr\tx0, x0, #CPACR_EL1_ZEN_EL1EN\t// SVE: trap for EL0, not EL1\n> > +1:\tmsr\tcpacr_el1, x0\t\t\t// Enable FP/ASIMD\n> \n> For EL1, I wonder whether we could move this later to cpufeature.c. IIRC\n> I tried to do the same with FPSIMD but hit an issue with EFI run-time\n> services (I may be wrong though).\n\nI'll take a look at this -- I believe it should be safe to disable this\ntrap for EL1 relatively late. This is needed before probing for\navailable vector lengths, but apart from that the kernel shouldn't touch\nSVE until/unless some user task uses SVE.\n\nThis would change if we eventually enable kernel-mode SVE, but I wouldn't\nexpect that to get used in early boot before the cpufeatures code runs.\n\nArd may have a view on this.\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"NFAYdv4Y\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xss3Z6sDlz9s06\n\tfor ;\n\tThu, 14 Sep 2017 05:21:44 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dsDEB-0004ZE-QU; Wed, 13 Sep 2017 19:21:39 +0000","from foss.arm.com ([217.140.101.70])\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1dsDE8-0004XQ-2Y for linux-arm-kernel@lists.infradead.org;\n\tWed, 13 Sep 2017 19:21:37 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 772891529;\n\tWed, 13 Sep 2017 12:21:15 -0700 (PDT)","from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com\n\t[10.72.51.249])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\tA6E7E3F483; Wed, 13 Sep 2017 12:21:13 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=ewgkTR043Ey/1K8fumU0ptnOj/0YkXNom8v+f4LdfyE=;\n\tb=NFAYdv4Yv3FrRW\n\tMaXEkDUz/cIttrUrSV4HMvcchX062b+T6D+NEOALymZD+VghqjjzWdDnhoefS2ba4dbkoErFmUVG5\n\tT8I86VSBMiZXGDdJF2dPh1MACuFCgBdfmwOheuGYQFQg0SN8pY7yLh0WKR4C3t6ZCmPD8Pk+ba9Gm\n\tBexVX0n5krcCK+M9qr8ePLR4Pica+SV3ohHKis0Rs7JjfNU8VC+n+G1riB9J8TKFyYgvB5QElsj7O\n\tNQgXMTKix8M+edZvj83sL1NpNVuv7JwL6T/skwUcneSIkfi/DHZHYc0A7i2BpPq/G8/IbbwnfNepV\n\tiGvnYjW/A5ZRF6xcKovw==;","Date":"Wed, 13 Sep 2017 20:21:11 +0100","From":"Dave Martin ","To":"Catalin Marinas ","Subject":"Re: [PATCH v2 10/28] arm64/sve: Low-level CPU setup","Message-ID":"<20170913192110.GE23415@e103592.cambridge.arm.com>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-11-git-send-email-Dave.Martin@arm.com>\n\t<20170913133206.rwobtu7ft5nrsh4p@localhost>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170913133206.rwobtu7ft5nrsh4p@localhost>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170913_122136_135258_AABFA0AF ","X-CRM114-Status":"GOOD ( 13.81 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Ard Biesheuvel\n\t, Szabolcs Nagy ,\n\tRichard Sandiford , \n\tWill Deacon , Alex =?iso-8859-1?q?Benn=E9e?=\n\t, kvmarm@lists.cs.columbia.edu,\n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1780455,"web_url":"http://patchwork.ozlabs.org/comment/1780455/","msgid":"<20171005104716.GV3611@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-05T10:47:17","subject":"Re: [PATCH v2 10/28] arm64/sve: Low-level CPU setup","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Wed, Sep 13, 2017 at 08:21:11PM +0100, Dave Martin wrote:\n> On Wed, Sep 13, 2017 at 06:32:06AM -0700, Catalin Marinas wrote:\n> > On Thu, Aug 31, 2017 at 06:00:42PM +0100, Dave P Martin wrote:\n> > > diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S\n> > > index 877d42f..dd22ef2 100644\n> > > --- a/arch/arm64/mm/proc.S\n> > > +++ b/arch/arm64/mm/proc.S\n> > > @@ -27,6 +27,7 @@\n> > > #include \n> > > #include \n> > > #include \n> > > +#include \n> > > \n> > > #ifdef CONFIG_ARM64_64K_PAGES\n> > > #define TCR_TG_FLAGS\tTCR_TG0_64K | TCR_TG1_64K\n> > > @@ -186,8 +187,17 @@ ENTRY(__cpu_setup)\n> > > \ttlbi\tvmalle1\t\t\t\t// Invalidate local TLB\n> > > \tdsb\tnsh\n> > > \n> > > -\tmov\tx0, #3 << 20\n> > > -\tmsr\tcpacr_el1, x0\t\t\t// Enable FP/ASIMD\n> > > +\tmov\tx0, #3 << 20\t\t\t// FEN\n> > > +\n> > > +\t/* SVE */\n> > > +\tmrs\tx5, id_aa64pfr0_el1\n> > > +\tubfx\tx5, x5, #ID_AA64PFR0_SVE_SHIFT, #4\n> > > +\tcbz\tx5, 1f\n> > > +\n> > > +\tbic\tx0, x0, #CPACR_EL1_ZEN\n> > > +\torr\tx0, x0, #CPACR_EL1_ZEN_EL1EN\t// SVE: trap for EL0, not EL1\n> > > +1:\tmsr\tcpacr_el1, x0\t\t\t// Enable FP/ASIMD\n> > \n> > For EL1, I wonder whether we could move this later to cpufeature.c. IIRC\n> > I tried to do the same with FPSIMD but hit an issue with EFI run-time\n> > services (I may be wrong though).\n> \n> I'll take a look at this -- I believe it should be safe to disable this\n> trap for EL1 relatively late. This is needed before probing for\n> available vector lengths, but apart from that the kernel shouldn't touch\n> SVE until/unless some user task uses SVE.\n> \n> This would change if we eventually enable kernel-mode SVE, but I wouldn't\n> expect that to get used in early boot before the cpufeatures code runs.\n> \n> Ard may have a view on this.\n\nI've had a go at this, but there's a lot of splatter.\n\nI can add a helper el1_enable_sve() say, and call it before probing\nZCR_EL1 in the cpufeatures code.\n\nThis makes enabling SVE a side-effect of the cpufeatures code, which\nI'm not that comfortable with -- it feels like something that later\nrefactoring could easily break.\n\nI can also add an explicit call to el1_enable_sve() in sve_setup(),\nbut this only works on the boot cpu.\n\nFor secondaries, I could add something in secondary_start_kernel(),\nbut this looks incongruous since there's no other call to do something\nsimilar yet.\n\n\n** Suzuki, do we have any other case where the trap for a CPU feature is\nturned off by the cpufeatures code? If there's already a template for\nthis then I'm happy to follow it.\n\nOtherwise, maybe it's simpler to keep it in __cpu_setup after all\nsince that's a common path that all CPUs pass through.\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"gYQ6f2HQ\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y78cP4VMvz9t44\n\tfor ;\n\tThu, 5 Oct 2017 21:47:49 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e03gw-0004an-3W; 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bh=C1TBeb406I9x63rbdNPyzWbhXBgt3Syy0PrA02eXdBQ=;\n\tb=gYQ6f2HQ53X9xt\n\tvxj8y1toCxDCp2DiEt05nSOTfPcBpJ9xO9im66zoLSDociI8rT1nxqPyfiomQONhv1IpQtx6q5OT/\n\tO3r8YMmrov9T4t+4XRui9hUJzWUs4/YLJ86vbsTtlVS5LnucnbHx5X/4Tej//FCwcbhoVLXE5+2TZ\n\tuy5HtFb1QnMiGd+5rabWv1TzkVKs5JBx8OHD3AYKvTJKGgZ4/R8ArhOX59TAx2KFsNrt4eNcHjVZs\n\tu0DY6NbzRJfasE9haEX72zTolHLQ9BAqzqjUcJc6Dlm+pio5PO3qhtamBucLaw80q6/k0lD5t3UGA\n\tPJ92ZEd1eP3xPerYZ3DA==;","Date":"Thu, 5 Oct 2017 11:47:17 +0100","From":"Dave Martin ","To":"Catalin Marinas ,\n\tSuzuki Poulose ","Subject":"Re: [PATCH v2 10/28] arm64/sve: Low-level CPU setup","Message-ID":"<20171005104716.GV3611@e103592.cambridge.arm.com>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-11-git-send-email-Dave.Martin@arm.com>\n\t<20170913133206.rwobtu7ft5nrsh4p@localhost>\n\t<20170913192110.GE23415@e103592.cambridge.arm.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<20170913192110.GE23415@e103592.cambridge.arm.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171005_034741_886702_33315643 ","X-CRM114-Status":"GOOD ( 22.29 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Ard Biesheuvel\n\t, Szabolcs Nagy ,\n\tRichard Sandiford , \n\tWill Deacon , Alex =?iso-8859-1?q?Benn=E9e?=\n\t, kvmarm@lists.cs.columbia.edu,\n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1780469,"web_url":"http://patchwork.ozlabs.org/comment/1780469/","msgid":"<76020d51-a971-e73e-9fba-1e2ec97985dc@arm.com>","list_archive_url":null,"date":"2017-10-05T11:04:12","subject":"Re: [PATCH v2 10/28] arm64/sve: Low-level CPU setup","submitter":{"id":65822,"url":"http://patchwork.ozlabs.org/api/people/65822/","name":"Suzuki K Poulose","email":"suzuki.poulose@arm.com"},"content":"On 05/10/17 11:47, Dave Martin wrote:\n> On Wed, Sep 13, 2017 at 08:21:11PM +0100, Dave Martin wrote:\n>> On Wed, Sep 13, 2017 at 06:32:06AM -0700, Catalin Marinas wrote:\n>>> On Thu, Aug 31, 2017 at 06:00:42PM +0100, Dave P Martin wrote:\n>>>> diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S\n>>>> index 877d42f..dd22ef2 100644\n>>>> --- a/arch/arm64/mm/proc.S\n>>>> +++ b/arch/arm64/mm/proc.S\n>>>> @@ -27,6 +27,7 @@\n>>>> #include \n>>>> #include \n>>>> #include \n>>>> +#include \n>>>> \n>>>> #ifdef CONFIG_ARM64_64K_PAGES\n>>>> #define TCR_TG_FLAGS\tTCR_TG0_64K | TCR_TG1_64K\n>>>> @@ -186,8 +187,17 @@ ENTRY(__cpu_setup)\n>>>> \ttlbi\tvmalle1\t\t\t\t// Invalidate local TLB\n>>>> \tdsb\tnsh\n>>>> \n>>>> -\tmov\tx0, #3 << 20\n>>>> -\tmsr\tcpacr_el1, x0\t\t\t// Enable FP/ASIMD\n>>>> +\tmov\tx0, #3 << 20\t\t\t// FEN\n>>>> +\n>>>> +\t/* SVE */\n>>>> +\tmrs\tx5, id_aa64pfr0_el1\n>>>> +\tubfx\tx5, x5, #ID_AA64PFR0_SVE_SHIFT, #4\n>>>> +\tcbz\tx5, 1f\n>>>> +\n>>>> +\tbic\tx0, x0, #CPACR_EL1_ZEN\n>>>> +\torr\tx0, x0, #CPACR_EL1_ZEN_EL1EN\t// SVE: trap for EL0, not EL1\n>>>> +1:\tmsr\tcpacr_el1, x0\t\t\t// Enable FP/ASIMD\n>>>\n>>> For EL1, I wonder whether we could move this later to cpufeature.c. IIRC\n>>> I tried to do the same with FPSIMD but hit an issue with EFI run-time\n>>> services (I may be wrong though).\n>>\n>> I'll take a look at this -- I believe it should be safe to disable this\n>> trap for EL1 relatively late. This is needed before probing for\n>> available vector lengths, but apart from that the kernel shouldn't touch\n>> SVE until/unless some user task uses SVE.\n>>\n>> This would change if we eventually enable kernel-mode SVE, but I wouldn't\n>> expect that to get used in early boot before the cpufeatures code runs.\n>>\n>> Ard may have a view on this.\n> \n> I've had a go at this, but there's a lot of splatter.\n> \n> I can add a helper el1_enable_sve() say, and call it before probing\n> ZCR_EL1 in the cpufeatures code.\n> \n> This makes enabling SVE a side-effect of the cpufeatures code, which\n> I'm not that comfortable with -- it feels like something that later\n> refactoring could easily break.\n> \n> I can also add an explicit call to el1_enable_sve() in sve_setup(),\n> but this only works on the boot cpu.\n> \n> For secondaries, I could add something in secondary_start_kernel(),\n> but this looks incongruous since there's no other call to do something\n> similar yet.\n> \n> \n> ** Suzuki, do we have any other case where the trap for a CPU feature is\n> turned off by the cpufeatures code? If there's already a template for\n> this then I'm happy to follow it.\n\nThe closest thing you have is an \"enable\" callback for each \"available\"\ncapability, which gets invoked on all CPUs (boot time active CPUs and the\nones which are brought up later). This is used by things like, PAN to\ndo some CPU specific setups.\n\nSee :\n enable_cpu_capabilities() // For all boot time active CPUs\n and\n verify_local_cpu_features() // For CPUs brought up later\n\nCheers\nSuzuki","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"JB5/cIE/\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y79002jKCz9sRq\n\tfor ;\n\tThu, 5 Oct 2017 22:04:48 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e03xH-00016K-IM; Thu, 05 Oct 2017 11:04:39 +0000","from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]\n\thelo=foss.arm.com)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e03xE-00012F-Kq for linux-arm-kernel@lists.infradead.org;\n\tThu, 05 Oct 2017 11:04:38 +0000","from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 802CC80D;\n\tThu, 5 Oct 2017 04:04:16 -0700 (PDT)","from [10.1.206.28] (e107814-lin.cambridge.arm.com [10.1.206.28])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\tB33323F483; Thu, 5 Oct 2017 04:04:14 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:Content-Type:\n\tContent-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive:\n\tList-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From:\n\tReferences:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date:\n\tResent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner;\n\tbh=ZpOFUgMSOT9X6P/djhr0T7r0lL8BxqyLbUbFe1CQS2I=;\n\tb=JB5/cIE/RNtUUZrLWSaqH08p1\n\t2SQp0u2Nzms742eOizJTWXxWWeOnLC8+5UpVc6lOR0avMWXNZe3xDM8UI1oh4QLZzEXoutUg+9IhV\n\tA5sBylWtsroJbFhR0z5u8snaAUWp3zglbRFJ2lxHPJKJiTFnDmpav4ffBffT8wi5zWFbFdBQj077a\n\tHMZ8/nwsxV4UQxeLPlhbbCxcMVJA155ds1YzGsb1W1TJIgd01wbzOtbHbM/AWJ9hwsMfcmIcxcJbV\n\tHR9gWY2jaJZBk3JxvcLF09UyHDAj8j2iRaG1fpr5ny8TCtEaU+hPUuhfQjWjJN0glU0sWdjxlK56U\n\tRsC74ZiEw==;","Subject":"Re: [PATCH v2 10/28] arm64/sve: Low-level CPU setup","To":"Dave Martin ,\n\tCatalin Marinas ","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-11-git-send-email-Dave.Martin@arm.com>\n\t<20170913133206.rwobtu7ft5nrsh4p@localhost>\n\t<20170913192110.GE23415@e103592.cambridge.arm.com>\n\t<20171005104716.GV3611@e103592.cambridge.arm.com>","From":"Suzuki K Poulose ","Message-ID":"<76020d51-a971-e73e-9fba-1e2ec97985dc@arm.com>","Date":"Thu, 5 Oct 2017 12:04:12 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20171005104716.GV3611@e103592.cambridge.arm.com>","Content-Language":"en-US","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171005_040436_749725_F5C5364B ","X-CRM114-Status":"GOOD ( 22.82 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Ard Biesheuvel\n\t, Szabolcs Nagy ,\n\tRichard Sandiford , \n\tWill Deacon , =?utf-8?q?Alex_Benn=C3=A9e?=\n\t, kvmarm@lists.cs.columbia.edu,\n\tlinux-arm-kernel@lists.infradead.org","Content-Transfer-Encoding":"7bit","Content-Type":"text/plain; charset=\"us-ascii\"; Format=\"flowed\"","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1780492,"web_url":"http://patchwork.ozlabs.org/comment/1780492/","msgid":"<20171005112217.GW3611@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-05T11:22:18","subject":"Re: [PATCH v2 10/28] arm64/sve: Low-level CPU setup","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Thu, Oct 05, 2017 at 12:04:12PM +0100, Suzuki K Poulose wrote:\n> On 05/10/17 11:47, Dave Martin wrote:\n\n[...]\n\n> >>>On Thu, Aug 31, 2017 at 06:00:42PM +0100, Dave P Martin wrote:\n> >>>>diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S\n> >>>>index 877d42f..dd22ef2 100644\n> >>>>--- a/arch/arm64/mm/proc.S\n> >>>>+++ b/arch/arm64/mm/proc.S\n> >>>>@@ -27,6 +27,7 @@\n> >>>> #include \n> >>>> #include \n> >>>> #include \n> >>>>+#include \n> >>>> #ifdef CONFIG_ARM64_64K_PAGES\n> >>>> #define TCR_TG_FLAGS\tTCR_TG0_64K | TCR_TG1_64K\n> >>>>@@ -186,8 +187,17 @@ ENTRY(__cpu_setup)\n> >>>> \ttlbi\tvmalle1\t\t\t\t// Invalidate local TLB\n> >>>> \tdsb\tnsh\n> >>>>-\tmov\tx0, #3 << 20\n> >>>>-\tmsr\tcpacr_el1, x0\t\t\t// Enable FP/ASIMD\n> >>>>+\tmov\tx0, #3 << 20\t\t\t// FEN\n> >>>>+\n> >>>>+\t/* SVE */\n> >>>>+\tmrs\tx5, id_aa64pfr0_el1\n> >>>>+\tubfx\tx5, x5, #ID_AA64PFR0_SVE_SHIFT, #4\n> >>>>+\tcbz\tx5, 1f\n> >>>>+\n> >>>>+\tbic\tx0, x0, #CPACR_EL1_ZEN\n> >>>>+\torr\tx0, x0, #CPACR_EL1_ZEN_EL1EN\t// SVE: trap for EL0, not EL1\n> >>>>+1:\tmsr\tcpacr_el1, x0\t\t\t// Enable FP/ASIMD\n\n[..]\n\n> >I can add a helper el1_enable_sve() say, and call it before probing\n> >ZCR_EL1 in the cpufeatures code.\n> >\n> >This makes enabling SVE a side-effect of the cpufeatures code, which\n> >I'm not that comfortable with -- it feels like something that later\n> >refactoring could easily break.\n> >\n> >I can also add an explicit call to el1_enable_sve() in sve_setup(),\n> >but this only works on the boot cpu.\n> >\n> >For secondaries, I could add something in secondary_start_kernel(),\n> >but this looks incongruous since there's no other call to do something\n> >similar yet.\n> >\n> >\n> >** Suzuki, do we have any other case where the trap for a CPU feature is\n> >turned off by the cpufeatures code? If there's already a template for\n> >this then I'm happy to follow it.\n> \n> The closest thing you have is an \"enable\" callback for each \"available\"\n> capability, which gets invoked on all CPUs (boot time active CPUs and the\n> ones which are brought up later). This is used by things like, PAN to\n> do some CPU specific setups.\n> \n> See :\n> enable_cpu_capabilities() // For all boot time active CPUs\n> and\n> verify_local_cpu_features() // For CPUs brought up later\n\nThat may allow me to do something tidier, provided the enable method is\ncalled early enough.\n\nI'll take a look.\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"usjaQ8hn\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y79Nn1kn2z9t2m\n\tfor ;\n\tThu, 5 Oct 2017 22:22:49 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e04En-0003Lx-SD; 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bh=t8fEdDkdrMP6vwwt+wiyG5Qc5G+n77xznshkdmjGSbo=;\n\tb=usjaQ8hnXamiAR\n\tmFFe7dvqxumMIhdoWNW4G6PnfQfLN6+VXWfVKXCKcG7N/EkbVBxhqDQzwlQbIi2TrTjsGq8ENyjYf\n\tYzKRFzzjkfcrdOfFAt6k6h2l42yILq6idHoBLya33jy+cpFDEXwWn7PQ1O4bemFmfVk1sGbu2n0Qs\n\tuJ1b1hr/tnqzOVxEQ0WUS9J4c3gwmq39xlSPQL6aySDbgJErL/mcDIY8LZmWMwgn7iu752lEWQ4ao\n\tbodDbofdp/hPWykwlZe1DEdUoMPSV1/MkHr/MOsxTHiGHT8Yh8wh2frtRJDix1uvkbKl5smfd7rIl\n\tuv+Ibb/95bhBri02HVTg==;","Date":"Thu, 5 Oct 2017 12:22:18 +0100","From":"Dave Martin ","To":"Suzuki K Poulose ","Subject":"Re: [PATCH v2 10/28] arm64/sve: Low-level CPU setup","Message-ID":"<20171005112217.GW3611@e103592.cambridge.arm.com>","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-11-git-send-email-Dave.Martin@arm.com>\n\t<20170913133206.rwobtu7ft5nrsh4p@localhost>\n\t<20170913192110.GE23415@e103592.cambridge.arm.com>\n\t<20171005104716.GV3611@e103592.cambridge.arm.com>\n\t<76020d51-a971-e73e-9fba-1e2ec97985dc@arm.com>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<76020d51-a971-e73e-9fba-1e2ec97985dc@arm.com>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171005_042243_128314_09625D5E ","X-CRM114-Status":"GOOD ( 17.54 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Ard Biesheuvel\n\t, Szabolcs Nagy ,\n\tCatalin Marinas\n\t, Will Deacon , Richard\n\tSandiford , Alex =?iso-8859-1?q?Benn=E9e?=\n\t, kvmarm@lists.cs.columbia.edu,\n\tlinux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; 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