[{"id":1768457,"web_url":"http://patchwork.ozlabs.org/comment/1768457/","msgid":"<87h8w5aakx.fsf@linaro.org>","list_archive_url":null,"date":"2017-09-14T09:33:34","subject":"Re: [PATCH v2 15/28] arm64: cpufeature: Move sys_caps_initialised\n\tdeclarations","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"content":"Dave Martin writes:\n\n> update_cpu_features() currently cannot tell whether it is being\n> called during early or late secondary boot. This doesn't\n> desperately matter for anything it currently does.\n>\n> However, SVE will need to know here whether the set of available\n> vector lengths is fixed of still to be determined when booting a\n> CPU so that it can be updated appropriately.\n>\n> This patch simply moves the sys_caps_initialised stuff to the top\n> of the file so that it can be more widely. There doesn't seem to\n> be a more obvious place to put it.\n>\n> Signed-off-by: Dave Martin \n> Cc: Suzuki K Poulose \n\nReviewed-by: Alex Bennée \n\n> ---\n> arch/arm64/kernel/cpufeature.c | 30 +++++++++++++++---------------\n> 1 file changed, 15 insertions(+), 15 deletions(-)\n>\n> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c\n> index cd52d36..43ba8df 100644\n> --- a/arch/arm64/kernel/cpufeature.c\n> +++ b/arch/arm64/kernel/cpufeature.c\n> @@ -51,6 +51,21 @@ unsigned int compat_elf_hwcap2 __read_mostly;\n> DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);\n> EXPORT_SYMBOL(cpu_hwcaps);\n>\n> +/*\n> + * Flag to indicate if we have computed the system wide\n> + * capabilities based on the boot time active CPUs. This\n> + * will be used to determine if a new booting CPU should\n> + * go through the verification process to make sure that it\n> + * supports the system capabilities, without using a hotplug\n> + * notifier.\n> + */\n> +static bool sys_caps_initialised;\n> +\n> +static inline void set_sys_caps_initialised(void)\n> +{\n> +\tsys_caps_initialised = true;\n> +}\n> +\n> static int dump_cpu_hwcaps(struct notifier_block *self, unsigned long v, void *p)\n> {\n> \t/* file-wide pr_fmt adds \"CPU features: \" prefix */\n> @@ -1041,21 +1056,6 @@ void __init enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps)\n> }\n>\n> /*\n> - * Flag to indicate if we have computed the system wide\n> - * capabilities based on the boot time active CPUs. This\n> - * will be used to determine if a new booting CPU should\n> - * go through the verification process to make sure that it\n> - * supports the system capabilities, without using a hotplug\n> - * notifier.\n> - */\n> -static bool sys_caps_initialised;\n> -\n> -static inline void set_sys_caps_initialised(void)\n> -{\n> -\tsys_caps_initialised = true;\n> -}\n> -\n> -/*\n> * Check for CPU features that are used in early boot\n> * based on the Boot CPU value.\n> */\n\n\n--\nAlex Bennée","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-84599-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"n6TPnuuz\"; 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emacs 25.2.50.3","From":"Alex =?utf-8?q?Benn=C3=A9e?= ","To":"Dave Martin ","Cc":"linux-arm-kernel@lists.infradead.org,\n\tCatalin Marinas ,\n\tWill Deacon ,\n\tArd Biesheuvel ,\n\tSzabolcs Nagy ,\n\tRichard Sandiford ,\n\tkvmarm@lists.cs.columbia.edu, libc-alpha@sourceware.org,\n\tlinux-arch@vger.kernel.org, Suzuki K Poulose ","Subject":"Re: [PATCH v2 15/28] arm64: cpufeature: Move sys_caps_initialised\n\tdeclarations","In-reply-to":"<1504198860-12951-16-git-send-email-Dave.Martin@arm.com>","Date":"Thu, 14 Sep 2017 10:33:34 +0100","Message-ID":"<87h8w5aakx.fsf@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Transfer-Encoding":"8bit"}},{"id":1768460,"web_url":"http://patchwork.ozlabs.org/comment/1768460/","msgid":"","list_archive_url":null,"date":"2017-09-14T09:35:28","subject":"Re: [PATCH v2 15/28] arm64: cpufeature: Move sys_caps_initialised\n\tdeclarations","submitter":{"id":65822,"url":"http://patchwork.ozlabs.org/api/people/65822/","name":"Suzuki K Poulose","email":"suzuki.poulose@arm.com"},"content":"On 31/08/17 18:00, Dave Martin wrote:\n> update_cpu_features() currently cannot tell whether it is being\n> called during early or late secondary boot. This doesn't\n> desperately matter for anything it currently does.\n>\n> However, SVE will need to know here whether the set of available\n> vector lengths is fixed of still to be determined when booting a\n> CPU so that it can be updated appropriately.\n>\n> This patch simply moves the sys_caps_initialised stuff to the top\n> of the file so that it can be more widely. There doesn't seem to\n> be a more obvious place to put it.\n>\n> Signed-off-by: Dave Martin \n> Cc: Suzuki K Poulose \n> ---\n> arch/arm64/kernel/cpufeature.c | 30 +++++++++++++++---------------\n> 1 file changed, 15 insertions(+), 15 deletions(-)\n>\n> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c\n> index cd52d36..43ba8df 100644\n> --- a/arch/arm64/kernel/cpufeature.c\n> +++ b/arch/arm64/kernel/cpufeature.c\n> @@ -51,6 +51,21 @@ unsigned int compat_elf_hwcap2 __read_mostly;\n> DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);\n> EXPORT_SYMBOL(cpu_hwcaps);\n>\n> +/*\n> + * Flag to indicate if we have computed the system wide\n> + * capabilities based on the boot time active CPUs. This\n> + * will be used to determine if a new booting CPU should\n> + * go through the verification process to make sure that it\n> + * supports the system capabilities, without using a hotplug\n> + * notifier.\n> + */\n> +static bool sys_caps_initialised;\n> +\n> +static inline void set_sys_caps_initialised(void)\n> +{\n> +\tsys_caps_initialised = true;\n> +}\n> +\n> static int dump_cpu_hwcaps(struct notifier_block *self, unsigned long v, void *p)\n> {\n> \t/* file-wide pr_fmt adds \"CPU features: \" prefix */\n> @@ -1041,21 +1056,6 @@ void __init enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps)\n> }\n>\n> /*\n> - * Flag to indicate if we have computed the system wide\n> - * capabilities based on the boot time active CPUs. This\n> - * will be used to determine if a new booting CPU should\n> - * go through the verification process to make sure that it\n> - * supports the system capabilities, without using a hotplug\n> - * notifier.\n> - */\n> -static bool sys_caps_initialised;\n> -\n> -static inline void set_sys_caps_initialised(void)\n> -{\n> -\tsys_caps_initialised = true;\n> -}\n\nReviewed-by: Suzuki K Poulose ","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-84600-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"Uuo6aftk\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xtD0t4G4Mz9s06\n\tfor ;\n\tThu, 14 Sep 2017 19:35:42 +1000 (AEST)","(qmail 80077 invoked by alias); 14 Sep 2017 09:35:36 -0000","(qmail 80061 invoked by uid 89); 14 Sep 2017 09:35:35 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:subject:to:references:cc:from:message-id:date\n\t:mime-version:in-reply-to:content-type\n\t:content-transfer-encoding; q=dns; s=default; b=Oj9oq/QbaM88arT4\n\tgQrGMeDKAe9t8ESaOkMB7++J7Z2BJ3F4q7XJ1ZFnl1gaVKqTzWBcFuEmcj4ItAIW\n\tZLaK9glx5FagTkGVGO5nE+QFZv86s8UmxLWQQsBtbsw/BoBIzGVRwGqV3tahRxIk\n\tqxYW2woTSHNW4PLvOT3fST7MaNA=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:subject:to:references:cc:from:message-id:date\n\t:mime-version:in-reply-to:content-type\n\t:content-transfer-encoding; s=default; bh=5shC0mNweUTd9Xi1hvtrXB\n\tRIBbU=; b=Uuo6aftktPI/LSkqf/wWiQbtyAulR0vPsEUDLcPez4eAOj2NIa40FR\n\td9s8A4Q5MVonTTTAylEkN9li+LnILK0A3jvO7aZqowVbWoiwB3D9wydle2YUKBiT\n\t1Hi84wzPNME49fjh0EQyULdRER8X4NsrcjLFj4twWFO9udzjPMQC8=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0,\n\tGIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:2469","X-HELO":"foss.arm.com","Subject":"Re: [PATCH v2 15/28] arm64: cpufeature: Move sys_caps_initialised\n\tdeclarations","To":"Dave Martin , linux-arm-kernel@lists.infradead.org","References":"<1504198860-12951-1-git-send-email-Dave.Martin@arm.com>\n\t<1504198860-12951-16-git-send-email-Dave.Martin@arm.com>","Cc":"Catalin Marinas , Will Deacon\n\t, Ard Biesheuvel , \n\t=?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= ,\n\tSzabolcs Nagy , Richard Sandiford\n\t, kvmarm@lists.cs.columbia.edu, \n\tlibc-alpha@sourceware.org, linux-arch@vger.kernel.org","From":"Suzuki K Poulose ","Message-ID":"","Date":"Thu, 14 Sep 2017 10:35:28 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101\n\tThunderbird/45.8.0","MIME-Version":"1.0","In-Reply-To":"<1504198860-12951-16-git-send-email-Dave.Martin@arm.com>","Content-Type":"text/plain; charset=us-ascii; format=flowed","Content-Transfer-Encoding":"7bit"}}]