[{"id":1761031,"web_url":"http://patchwork.ozlabs.org/comment/1761031/","msgid":"<20170831140441.x6ks2y2z5hai25ez@flea.lan>","list_archive_url":null,"date":"2017-08-31T14:04:41","subject":"Re: [U-Boot] [PATCH] mmc: sunxi: Only update timing mode bit when\n\tenabling new timing mode","submitter":{"id":12916,"url":"http://patchwork.ozlabs.org/api/people/12916/","name":"Maxime Ripard","email":"maxime.ripard@free-electrons.com"},"content":"On Thu, Aug 31, 2017 at 09:57:48PM +0800, Chen-Yu Tsai wrote:\n> When enabling the new mmc timing mode, we inadvertently clear all the\n> remaining bits in the new timing mode register. The bits cleared\n> include a default phase delay on the output clock. The BSP kernel\n> states that the default values are supposed to be used. Clearing them\n> results in decreased performance or transfer errors on some boards.\n> \n> Fixes: de9b1771c3b6 (\"mmc: sunxi: Support new mode\")\n> Signed-off-by: Chen-Yu Tsai \n\nAcked-by: Maxime Ripard \n\nThanks!\nMaxime","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xjkfS0cN1z9sD5\n\tfor ;\n\tFri, 1 Sep 2017 00:05:18 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 64CECC21E53; Thu, 31 Aug 2017 14:05:13 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 9833EC21DBA;\n\tThu, 31 Aug 2017 14:05:11 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 4DB51C21DBA; Thu, 31 Aug 2017 14:05:10 +0000 (UTC)","from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54])\n\tby lists.denx.de (Postfix) with ESMTP id 08281C21DB5\n\tfor ; Thu, 31 Aug 2017 14:05:10 +0000 (UTC)","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 94F5C207B8; Thu, 31 Aug 2017 16:05:08 +0200 (CEST)","from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr\n\t[90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 3C0D5208C1;\n\tThu, 31 Aug 2017 16:04:40 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0","Date":"Thu, 31 Aug 2017 16:04:41 +0200","From":"Maxime Ripard ","To":"Chen-Yu Tsai ","Message-ID":"<20170831140441.x6ks2y2z5hai25ez@flea.lan>","References":"<20170831135748.32498-1-wens@csie.org>","MIME-Version":"1.0","In-Reply-To":"<20170831135748.32498-1-wens@csie.org>","User-Agent":"NeoMutt/20170714 (1.8.3)","Cc":"u-boot@lists.denx.de, Jagan Teki ","Subject":"Re: [U-Boot] [PATCH] mmc: sunxi: Only update timing mode bit when\n\tenabling new timing mode","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"multipart/mixed;\n\tboundary=\"===============1520594228885072202==\"","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1761033,"web_url":"http://patchwork.ozlabs.org/comment/1761033/","msgid":"","list_archive_url":null,"date":"2017-08-31T14:06:40","subject":"Re: [U-Boot] [PATCH] mmc: sunxi: Only update timing mode bit when\n\tenabling new timing mode","submitter":{"id":20045,"url":"http://patchwork.ozlabs.org/api/people/20045/","name":"Jagan Teki","email":"jagannadh.teki@gmail.com"},"content":"On Thu, Aug 31, 2017 at 7:34 PM, Maxime Ripard\n wrote:\n> On Thu, Aug 31, 2017 at 09:57:48PM +0800, Chen-Yu Tsai wrote:\n>> When enabling the new mmc timing mode, we inadvertently clear all the\n>> remaining bits in the new timing mode register. The bits cleared\n>> include a default phase delay on the output clock. The BSP kernel\n>> states that the default values are supposed to be used. Clearing them\n>> results in decreased performance or transfer errors on some boards.\n>>\n>> Fixes: de9b1771c3b6 (\"mmc: sunxi: Support new mode\")\n>> Signed-off-by: Chen-Yu Tsai \n>\n> Acked-by: Maxime Ripard \n\nReviewed-by: Jagan Teki \n\nthanks!","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"B5OW0bUS\"; dkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xjkhC2xMdz9sD9\n\tfor ;\n\tFri, 1 Sep 2017 00:06:51 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 1C546C21E4B; Thu, 31 Aug 2017 14:06:49 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 24BB3C21E0A;\n\tThu, 31 Aug 2017 14:06:46 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 1306DC21E0A; Thu, 31 Aug 2017 14:06:44 +0000 (UTC)","from mail-lf0-f66.google.com (mail-lf0-f66.google.com\n\t[209.85.215.66])\n\tby lists.denx.de (Postfix) with ESMTPS id 557FDC21DB5\n\tfor ; Thu, 31 Aug 2017 14:06:41 +0000 (UTC)","by mail-lf0-f66.google.com with SMTP id l140so529619lfg.3\n\tfor ; Thu, 31 Aug 2017 07:06:41 -0700 (PDT)","by 10.25.222.200 with HTTP; Thu, 31 Aug 2017 07:06:40 -0700 (PDT)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=aNDpUGmVzReEP9kW+0fJvn4NIv6Xrh+pnjK2NBUpx0c=;\n\tb=B5OW0bUSAKn7DgVDhXbIwZY0rdOwT41qb500GaRHpBU3H5nFzi3L2ylJH0yjCYMj4G\n\tESWycuAzQLDde0MMO+LzTd/hua+OwyoWew8cKu5zd8OTsDM3qFYd+tiB105hFPbqk3pK\n\tHSevJ29CqqMZUuM3TXTwslga2w5SfXhZEknp0Cy7DDr2Hq55teItnWT/249xxBPRjb0j\n\t0BQdi36hK1PdJLL+al1LNOeG6CIcG5I2XcqHli2p2IOJjk/SIArV8oS7+hexJZUWhxwF\n\tqlme81sG1vOi4UzejLOdP2JZDKMRlD9Ge/M1Vwj9+kCQBMU3fijap1CwAAWFXwqDps9M\n\tpE7w==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=aNDpUGmVzReEP9kW+0fJvn4NIv6Xrh+pnjK2NBUpx0c=;\n\tb=YirFzd1v+vmDPdv5r3+Vo/VkjCtb5NbFAAe06oPOCRN/iZYMdUDizutAUhslkO6nP3\n\ttCG7jT/WWvXa5iV05XTEry/AHlgjrHVJgKtvbtr8vZxFaig/i6hA/xhHjVj/ruddl/E0\n\tuulldpdsPxqTQleBU98u6QOuEsS72Fft8xZTCOGu9Rd0ejRK6JzUurjhsgLmShSczECI\n\t5xLvBmegKHCum5wIk8EdDi+mPJc++ZoxaqTI9pkKTWlg/byPJ8sLrhUw2zZSaDY9kBFC\n\tTt267kTCW2/zW0dxjFTOpPlyon+ln/nYmJxHpW/Nmkp63kiCOSxK0i83zAL9RZmqMKPs\n\togaw==","X-Gm-Message-State":"AHPjjUipnoVTtcU+HkPxIuhws9PyrDdrtOaeARBO90zWSPkLmW38nIdn\n\t/3D2Qf2r+9gjc9Qz0A7lYDEqcL0R/g==","X-Google-Smtp-Source":"ADKCNb4kmrEIFyi/YlikhM0YjCqWCmJXm4Dbw/1fNZK7bG3euT/wJ1S0knLP6QEQ0ClqhZK5k06QeF+N4IKp8X3nUhU=","X-Received":"by 10.25.16.151 with SMTP id 23mr2286049lfq.182.1504188400726;\n\tThu, 31 Aug 2017 07:06:40 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"<20170831140441.x6ks2y2z5hai25ez@flea.lan>","References":"<20170831135748.32498-1-wens@csie.org>\n\t<20170831140441.x6ks2y2z5hai25ez@flea.lan>","From":"Jagan Teki ","Date":"Thu, 31 Aug 2017 19:36:40 +0530","Message-ID":"","To":"Maxime Ripard ","Cc":"\"u-boot@lists.denx.de\" ,\n\tJagan Teki ","Subject":"Re: [U-Boot] [PATCH] mmc: sunxi: Only update timing mode bit when\n\tenabling new timing mode","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1761721,"web_url":"http://patchwork.ozlabs.org/comment/1761721/","msgid":"","list_archive_url":null,"date":"2017-09-01T14:21:05","subject":"Re: [U-Boot] [PATCH] mmc: sunxi: Only update timing mode bit when\n\tenabling new timing mode","submitter":{"id":20045,"url":"http://patchwork.ozlabs.org/api/people/20045/","name":"Jagan Teki","email":"jagannadh.teki@gmail.com"},"content":"On Thu, Aug 31, 2017 at 7:36 PM, Jagan Teki wrote:\n> On Thu, Aug 31, 2017 at 7:34 PM, Maxime Ripard\n> wrote:\n>> On Thu, Aug 31, 2017 at 09:57:48PM +0800, Chen-Yu Tsai wrote:\n>>> When enabling the new mmc timing mode, we inadvertently clear all the\n>>> remaining bits in the new timing mode register. The bits cleared\n>>> include a default phase delay on the output clock. The BSP kernel\n>>> states that the default values are supposed to be used. Clearing them\n>>> results in decreased performance or transfer errors on some boards.\n>>>\n>>> Fixes: de9b1771c3b6 (\"mmc: sunxi: Support new mode\")\n>>> Signed-off-by: Chen-Yu Tsai \n>>\n>> Acked-by: Maxime Ripard \n>\n> Reviewed-by: Jagan Teki \n\nApplied to u-boot-sunxi/master\n\nthanks!","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"VMvcgzmA\"; dkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xkLyW15j7z9sPk\n\tfor ;\n\tSat, 2 Sep 2017 00:21:21 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid EEC31C21EEE; Fri, 1 Sep 2017 14:21:13 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id D3E6FC21D19;\n\tFri, 1 Sep 2017 14:21:10 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 8B1D0C21D19; Fri, 1 Sep 2017 14:21:09 +0000 (UTC)","from mail-lf0-f66.google.com (mail-lf0-f66.google.com\n\t[209.85.215.66])\n\tby lists.denx.de (Postfix) with ESMTPS id 53621C21C3C\n\tfor ; Fri, 1 Sep 2017 14:21:06 +0000 (UTC)","by mail-lf0-f66.google.com with SMTP id y15so219606lfd.0\n\tfor ; Fri, 01 Sep 2017 07:21:06 -0700 (PDT)","by 10.25.222.200 with HTTP; Fri, 1 Sep 2017 07:21:05 -0700 (PDT)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=cLHtZTdibEV5m+D8JJ09cBxRUMlgmkdn9wCySOEYm08=;\n\tb=VMvcgzmAvglSwEk29Civ4jAuAgRgjQV5vnsugFwhbEi6FTbt6UvqlIrOKLvm9InGY9\n\tvNJ4qVIHE2FB8xHXt/uZ9cDc7BMptofUYEVmB0ejfzyZhr7ArzOwSKToEg+5yMP78GQZ\n\tdk/Czk3WlCU9eGrK/IzKI6pi60TNO6dTU+XCUQ+YQ8+85HFdL2gC+8lT0U72Prfb0M5J\n\tTPg1CLcyOCMCVqgSGywLe60zIL460MK34G2twZNef6PxDLPVnHkTP8qnpydjsPWCGVPp\n\tQiR4JJ+m5ByGwlJZ2C41D16Ywwy/02+NS8TalrxjNTiAUszhUJYCA/t0JMrDtzbv4tlz\n\tzSHg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:mime-version:in-reply-to:references:from:date\n\t:message-id:subject:to:cc;\n\tbh=cLHtZTdibEV5m+D8JJ09cBxRUMlgmkdn9wCySOEYm08=;\n\tb=buEENxz5UDbXvE2BF1PjWFEihmDuk3uNMeTOgRXg7Qfr6dx0guRUsnONzXJ6vTLO3A\n\t5z6DX9SpT5LBHSX7wdU37nxbAHz1nCZ2YVMnunvkt+TQD80u9Ps17r7h0QKBa7R1iVUr\n\t+yPeTv6FhqgVYrxkmrb6HebEtbD+wWbdUlYbrh4AZCCdP3ktdchQ1FY+DYczJGo+G4XZ\n\tngo1FWbF/fluEjJi7malMW2+Rfj8ZnXw5u91H+YXYcZf83GAIjc09fA+8TQPTxxX7Iez\n\tuVC2aHjngLVp+Otg6M0JlIFZEgB8ucmtZLynz4sJPo1lISzd6t7p4qhR1wiu+ombRpQn\n\tTUvg==","X-Gm-Message-State":"AHPjjUiOhQAIDDEPQuZl87bpdKgWr2y0u5c8UfeAocHhVGT3gjUxpWAW\n\tIo9s0cLX6ppUAeflexLc06hcoslQ9g==","X-Google-Smtp-Source":"ADKCNb4BIpyLsA1n/SR/ojp/cFycv00RyIUwYiqCDhoIba3EdOUVlXfxBaV1EDlbmrONRs6+6Z5uViHkxI4dbugBJwk=","X-Received":"by 10.25.56.22 with SMTP id f22mr857757lfa.92.1504275665712; Fri,\n\t01 Sep 2017 07:21:05 -0700 (PDT)","MIME-Version":"1.0","In-Reply-To":"","References":"<20170831135748.32498-1-wens@csie.org>\n\t<20170831140441.x6ks2y2z5hai25ez@flea.lan>\n\t","From":"Jagan Teki ","Date":"Fri, 1 Sep 2017 19:51:05 +0530","Message-ID":"","To":"Maxime Ripard ","Cc":"\"u-boot@lists.denx.de\" ,\n\tJagan Teki ","Subject":"Re: [U-Boot] [PATCH] mmc: sunxi: Only update timing mode bit when\n\tenabling new timing mode","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}}]